cgobj.pas 105 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Member of the Free Pascal development team
  5. This unit implements the basic code generator object
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. {# @abstract(Abstract code generator unit)
  20. Abstreact code generator unit. This contains the base class
  21. to implement for all new supported processors.
  22. WARNING: None of the routines implemented in these modules,
  23. or their descendants, should use the temp. allocator, as
  24. these routines may be called inside genentrycode, and the
  25. stack frame is already setup!
  26. }
  27. unit cgobj;
  28. {$i fpcdefs.inc}
  29. interface
  30. uses
  31. {$ifdef delphi}
  32. dmisc,
  33. {$endif}
  34. cclasses,
  35. cpubase,cpuinfo,cgbase,
  36. aasmbase,aasmtai,aasmcpu,
  37. symconst,symbase,symtype,symdef,symtable,rgobj
  38. ;
  39. type
  40. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  41. {# @abstract(Abstract code generator)
  42. This class implements an abstract instruction generator. Some of
  43. the methods of this class are generic, while others must
  44. be overriden for all new processors which will be supported
  45. by Free Pascal. For 32-bit processors, the base class
  46. sould be @link(tcg64f32) and not @var(tcg).
  47. }
  48. tcg = class
  49. public
  50. alignment : talignment;
  51. rg : array[tregistertype] of trgobj;
  52. t_times:cardinal;
  53. {$ifdef flowgraph}
  54. aktflownode:word;
  55. {$endif}
  56. {************************************************}
  57. { basic routines }
  58. constructor create;
  59. {# Initialize the register allocators needed for the codegenerator.}
  60. procedure init_register_allocators;virtual;
  61. {# Clean up the register allocators needed for the codegenerator.}
  62. procedure done_register_allocators;virtual;
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:Taasmoutput):Tregister;virtual;
  71. function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure ungetregister(list:Taasmoutput;r:Tregister);virtual;
  77. procedure ungetreference(list:Taasmoutput;const r:Treference);virtual;
  78. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  79. procedure add_move_instruction(instr:Taicpu);virtual;
  80. function uses_registers(rt:Tregistertype):boolean;virtual;
  81. {# Get a specific register.}
  82. procedure getexplicitregister(list:Taasmoutput;r:Tregister);virtual;
  83. {# Get multiple registers specified.}
  84. procedure allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  85. {# Free multiple registers specified.}
  86. procedure deallocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  87. procedure do_register_allocation(list:Taasmoutput;headertai:tai);virtual;
  88. function makeregsize(reg:Tregister;size:Tcgsize):Tregister;
  89. {# Returns the tcgsize corresponding with the size of reg.}
  90. class function reg_cgsize(const reg: tregister) : tcgsize; virtual;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : taasmoutput;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : taasmoutput;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : taasmoutput;r : tregister);
  97. {# Pass a parameter, which is located in a register, to a routine.
  98. This routine should push/send the parameter to the routine, as
  99. required by the specific processor ABI and routine modifiers.
  100. This must be overriden for each CPU target.
  101. @param(size size of the operand in the register)
  102. @param(r register source of the operand)
  103. @param(locpara where the parameter will be stored)
  104. }
  105. procedure a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const locpara : tparalocation);virtual;
  106. {# Pass a parameter, which is a constant, to a routine.
  107. A generic version is provided. This routine should
  108. be overriden for optimization purposes if the cpu
  109. permits directly sending this type of parameter.
  110. @param(size size of the operand in constant)
  111. @param(a value of constant to send)
  112. @param(locpara where the parameter will be stored)
  113. }
  114. procedure a_param_const(list : taasmoutput;size : tcgsize;a : aword;const locpara : tparalocation);virtual;
  115. {# Pass the value of a parameter, which is located in memory, to a routine.
  116. A generic version is provided. This routine should
  117. be overriden for optimization purposes if the cpu
  118. permits directly sending this type of parameter.
  119. @param(size size of the operand in constant)
  120. @param(r Memory reference of value to send)
  121. @param(locpara where the parameter will be stored)
  122. }
  123. procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const locpara : tparalocation);virtual;
  124. {# Pass the value of a parameter, which can be located either in a register or memory location,
  125. to a routine.
  126. A generic version is provided.
  127. @param(l location of the operand to send)
  128. @param(nr parameter number (starting from one) of routine (from left to right))
  129. @param(locpara where the parameter will be stored)
  130. }
  131. procedure a_param_loc(list : taasmoutput;const l : tlocation;const locpara : tparalocation);
  132. {# Pass the address of a reference to a routine. This routine
  133. will calculate the address of the reference, and pass this
  134. calculated address as a parameter.
  135. A generic version is provided. This routine should
  136. be overriden for optimization purposes if the cpu
  137. permits directly sending this type of parameter.
  138. @param(r reference to get address from)
  139. @param(nr parameter number (starting from one) of routine (from left to right))
  140. }
  141. procedure a_paramaddr_ref(list : taasmoutput;const r : treference;const locpara : tparalocation);virtual;
  142. { Copies a whole memory block to the stack, the locpara must be a memory location }
  143. procedure a_param_copy_ref(list : taasmoutput;size : qword;const r : treference;const locpara : tparalocation);
  144. { Remarks:
  145. * If a method specifies a size you have only to take care
  146. of that number of bits, i.e. load_const_reg with OP_8 must
  147. only load the lower 8 bit of the specified register
  148. the rest of the register can be undefined
  149. if necessary the compiler will call a method
  150. to zero or sign extend the register
  151. * The a_load_XX_XX with OP_64 needn't to be
  152. implemented for 32 bit
  153. processors, the code generator takes care of that
  154. * the addr size is for work with the natural pointer
  155. size
  156. * the procedures without fpu/mm are only for integer usage
  157. * normally the first location is the source and the
  158. second the destination
  159. }
  160. { Copy a parameter to a (temporary) reference }
  161. procedure a_loadany_param_ref(list : taasmoutput;const locpara : tparalocation;const ref:treference;shuffle : pmmshuffle);virtual;
  162. { Copy a parameter to a register }
  163. procedure a_loadany_param_reg(list : taasmoutput;const locpara : tparalocation;const reg:tregister;shuffle : pmmshuffle);virtual;
  164. {# Emits instruction to call the method specified by symbol name.
  165. This routine must be overriden for each new target cpu.
  166. There is no a_call_ref because loading the reference will use
  167. a temp register on most cpu's resulting in conflicts with the
  168. registers used for the parameters (PFV)
  169. }
  170. procedure a_call_name(list : taasmoutput;const s : string);virtual; abstract;
  171. procedure a_call_reg(list : taasmoutput;reg : tregister);virtual;abstract;
  172. { move instructions }
  173. procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aword;register : tregister);virtual; abstract;
  174. procedure a_load_const_ref(list : taasmoutput;size : tcgsize;a : aword;const ref : treference);virtual;
  175. procedure a_load_const_loc(list : taasmoutput;a : aword;const loc : tlocation);
  176. procedure a_load_reg_ref(list : taasmoutput;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  177. procedure a_load_reg_reg(list : taasmoutput;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  178. procedure a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  179. procedure a_load_ref_reg(list : taasmoutput;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  180. procedure a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  181. procedure a_load_loc_reg(list : taasmoutput;tosize: tcgsize; const loc: tlocation; reg : tregister);
  182. procedure a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  183. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);virtual; abstract;
  184. { fpu move instructions }
  185. procedure a_loadfpu_reg_reg(list: taasmoutput; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  186. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  187. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  188. procedure a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  189. procedure a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  190. procedure a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const locpara : tparalocation);virtual;
  191. procedure a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const locpara : tparalocation);virtual;
  192. { vector register move instructions }
  193. procedure a_loadmm_reg_reg(list: taasmoutput; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  194. procedure a_loadmm_ref_reg(list: taasmoutput; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  195. procedure a_loadmm_reg_ref(list: taasmoutput; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  196. procedure a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  197. procedure a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  198. procedure a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  199. procedure a_parammm_ref(list: taasmoutput; size: tcgsize; const ref: treference;const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  200. procedure a_parammm_loc(list: taasmoutput; const loc: tlocation; const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  201. procedure a_opmm_reg_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  202. procedure a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  203. procedure a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  204. procedure a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  205. { basic arithmetic operations }
  206. { note: for operators which require only one argument (not, neg), use }
  207. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  208. { that in this case the *second* operand is used as both source and }
  209. { destination (JM) }
  210. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; a: AWord; reg: TRegister); virtual; abstract;
  211. procedure a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: AWord; const ref: TReference); virtual;
  212. procedure a_op_const_loc(list : taasmoutput; Op: TOpCG; a: AWord; const loc: tlocation);
  213. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  214. procedure a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  215. procedure a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  216. procedure a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  217. procedure a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  218. { trinary operations for processors that support them, 'emulated' }
  219. { on others. None with "ref" arguments since I don't think there }
  220. { are any processors that support it (JM) }
  221. procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg;
  222. size: tcgsize; a: aword; src, dst: tregister); virtual;
  223. procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  224. size: tcgsize; src1, src2, dst: tregister); virtual;
  225. { comparison operations }
  226. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
  227. l : tasmlabel);virtual; abstract;
  228. procedure a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;const ref : treference;
  229. l : tasmlabel); virtual;
  230. procedure a_cmp_const_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; a: aword; const loc: tlocation;
  231. l : tasmlabel);
  232. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  233. procedure a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  234. procedure a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  235. procedure a_cmp_ref_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  236. l : tasmlabel);
  237. procedure a_jmp_name(list : taasmoutput;const s : string); virtual; abstract;
  238. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); virtual; abstract;
  239. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); virtual; abstract;
  240. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  241. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  242. }
  243. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  244. procedure g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  245. {
  246. This routine tries to optimize the const_reg opcode, and should be
  247. called at the start of a_op_const_reg. It returns the actual opcode
  248. to emit, and the constant value to emit. If this routine returns
  249. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  250. @param(op The opcode to emit, returns the opcode which must be emitted)
  251. @param(a The constant which should be emitted, returns the constant which must
  252. be emitted)
  253. @param(reg The register to emit the opcode with, returns the register with
  254. which the opcode will be emitted)
  255. }
  256. function optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aword; var reg: tregister): boolean;virtual;
  257. {#
  258. This routine is used in exception management nodes. It should
  259. save the exception reason currently in the FUNCTION_RETURN_REG. The
  260. save should be done either to a temp (pointed to by href).
  261. or on the stack (pushing the value on the stack).
  262. The size of the value to save is OS_S32. The default version
  263. saves the exception reason to a temp. memory area.
  264. }
  265. procedure g_exception_reason_save(list : taasmoutput; const href : treference);virtual;
  266. {#
  267. This routine is used in exception management nodes. It should
  268. save the exception reason constant. The
  269. save should be done either to a temp (pointed to by href).
  270. or on the stack (pushing the value on the stack).
  271. The size of the value to save is OS_S32. The default version
  272. saves the exception reason to a temp. memory area.
  273. }
  274. procedure g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aword);virtual;
  275. {#
  276. This routine is used in exception management nodes. It should
  277. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  278. should either be in the temp. area (pointed to by href , href should
  279. *NOT* be freed) or on the stack (the value should be popped).
  280. The size of the value to save is OS_S32. The default version
  281. saves the exception reason to a temp. memory area.
  282. }
  283. procedure g_exception_reason_load(list : taasmoutput; const href : treference);virtual;
  284. procedure g_maybe_testself(list : taasmoutput;reg:tregister);
  285. procedure g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  286. {# This should emit the opcode to copy len bytes from the source
  287. to destination, if loadref is true, it assumes that it first must load
  288. the source address from the memory location where
  289. source points to.
  290. It must be overriden for each new target processor.
  291. @param(source Source reference of copy)
  292. @param(dest Destination reference of copy)
  293. @param(delsource Indicates if the source reference's resources should be freed)
  294. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  295. }
  296. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword;delsource,loadref : boolean);virtual; abstract;
  297. {# This should emit the opcode to a shortrstring from the source
  298. to destination, if loadref is true, it assumes that it first must load
  299. the source address from the memory location where
  300. source points to.
  301. @param(source Source reference of copy)
  302. @param(dest Destination reference of copy)
  303. @param(delsource Indicates if the source reference's resources should be freed)
  304. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  305. }
  306. procedure g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;delsource,loadref : boolean);
  307. procedure g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  308. procedure g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  309. procedure g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  310. procedure g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  311. {# Generates range checking code. It is to note
  312. that this routine does not need to be overriden,
  313. as it takes care of everything.
  314. @param(p Node which contains the value to check)
  315. @param(todef Type definition of node to range check)
  316. }
  317. procedure g_rangecheck(list: taasmoutput; const l:tlocation; fromdef,todef: tdef); virtual;
  318. {# Generates overflow checking code for a node }
  319. procedure g_overflowcheck(list: taasmoutput; const l:tlocation; def:tdef); virtual; abstract;
  320. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref, lenref:treference;elesize:aword);virtual;
  321. procedure g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);virtual;
  322. {# Emits instructions which should be emitted when entering
  323. a routine declared as @var(interrupt). The default
  324. behavior does nothing, should be overriden as required.
  325. }
  326. procedure g_interrupt_stackframe_entry(list : taasmoutput);virtual;
  327. {# Emits instructions which should be emitted when exiting
  328. a routine declared as @var(interrupt). The default
  329. behavior does nothing, should be overriden as required.
  330. }
  331. procedure g_interrupt_stackframe_exit(list : taasmoutput;accused,acchiused:boolean);virtual;
  332. {# Emits instructions when compilation is done in profile
  333. mode (this is set as a command line option). The default
  334. behavior does nothing, should be overriden as required.
  335. }
  336. procedure g_profilecode(list : taasmoutput);virtual;
  337. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  338. @param(size Number of bytes to allocate)
  339. }
  340. procedure g_stackpointer_alloc(list : taasmoutput;size : longint);virtual; abstract;
  341. {# Emits instruction for allocating the locals in entry
  342. code of a routine. This is one of the first
  343. routine called in @var(genentrycode).
  344. @param(localsize Number of bytes to allocate as locals)
  345. }
  346. procedure g_stackframe_entry(list : taasmoutput;localsize : longint);virtual; abstract;
  347. {# Emits instructiona for restoring the frame pointer
  348. at routine exit. For some processors, this routine
  349. may do nothing at all.
  350. }
  351. procedure g_restore_frame_pointer(list : taasmoutput);virtual; abstract;
  352. {# Emits instructions for returning from a subroutine.
  353. Should also restore the stack.
  354. @param(parasize Number of bytes of parameters to deallocate from stack)
  355. }
  356. procedure g_return_from_proc(list : taasmoutput;parasize : aword);virtual; abstract;
  357. {# This routine is called when generating the code for the entry point
  358. of a routine. It should save all registers which are not used in this
  359. routine, and which should be declared as saved in the std_saved_registers
  360. set.
  361. This routine is mainly used when linking to code which is generated
  362. by ABI-compliant compilers (like GCC), to make sure that the reserved
  363. registers of that ABI are not clobbered.
  364. @param(usedinproc Registers which are used in the code of this routine)
  365. }
  366. procedure g_save_standard_registers(list:Taasmoutput);virtual;abstract;
  367. {# This routine is called when generating the code for the exit point
  368. of a routine. It should restore all registers which were previously
  369. saved in @var(g_save_standard_registers).
  370. @param(usedinproc Registers which are used in the code of this routine)
  371. }
  372. procedure g_restore_standard_registers(list:Taasmoutput);virtual;abstract;
  373. procedure g_save_all_registers(list : taasmoutput);virtual;abstract;
  374. procedure g_restore_all_registers(list : taasmoutput;const funcretparaloc:tparalocation);virtual;abstract;
  375. end;
  376. {# @abstract(Abstract code generator for 64 Bit operations)
  377. This class implements an abstract code generator class
  378. for 64 Bit operations.
  379. }
  380. tcg64 = class
  381. { Allocates 64 Bit register r by inserting a pai_realloc record }
  382. procedure a_reg_alloc(list : taasmoutput;r : tregister64);virtual;abstract;
  383. { Deallocates 64 Bit register r by inserting a pa_regdealloc record}
  384. procedure a_reg_dealloc(list : taasmoutput;r : tregister64);virtual;abstract;
  385. procedure a_load64_const_ref(list : taasmoutput;value : qword;const ref : treference);virtual;abstract;
  386. procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);virtual;abstract;
  387. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);virtual;abstract;
  388. procedure a_load64_reg_reg(list : taasmoutput;regsrc,regdst : tregister64);virtual;abstract;
  389. procedure a_load64_const_reg(list : taasmoutput;value : qword;reg : tregister64);virtual;abstract;
  390. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister64);virtual;abstract;
  391. procedure a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);virtual;abstract;
  392. procedure a_load64_const_loc(list : taasmoutput;value : qword;const l : tlocation);virtual;abstract;
  393. procedure a_load64_reg_loc(list : taasmoutput;reg : tregister64;const l : tlocation);virtual;abstract;
  394. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  395. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  396. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  397. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  398. procedure a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  399. procedure a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  400. procedure a_op64_ref_reg(list : taasmoutput;op:TOpCG;const ref : treference;reg : tregister64);virtual;abstract;
  401. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;regsrc,regdst : tregister64);virtual;abstract;
  402. procedure a_op64_reg_ref(list : taasmoutput;op:TOpCG;regsrc : tregister64;const ref : treference);virtual;abstract;
  403. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;value : qword;regdst : tregister64);virtual;abstract;
  404. procedure a_op64_const_ref(list : taasmoutput;op:TOpCG;value : qword;const ref : treference);virtual;abstract;
  405. procedure a_op64_const_loc(list : taasmoutput;op:TOpCG;value : qword;const l: tlocation);virtual;abstract;
  406. procedure a_op64_reg_loc(list : taasmoutput;op:TOpCG;reg : tregister64;const l : tlocation);virtual;abstract;
  407. procedure a_op64_loc_reg(list : taasmoutput;op:TOpCG;const l : tlocation;reg64 : tregister64);virtual;abstract;
  408. procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : qword;regsrc,regdst : tregister64);virtual;
  409. procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);virtual;
  410. procedure a_param64_reg(list : taasmoutput;reg64 : tregister64;const loc : tparalocation);virtual;abstract;
  411. procedure a_param64_const(list : taasmoutput;value : qword;const loc : tparalocation);virtual;abstract;
  412. procedure a_param64_ref(list : taasmoutput;const r : treference;const loc : tparalocation);virtual;abstract;
  413. procedure a_param64_loc(list : taasmoutput;const l : tlocation;const loc : tparalocation);virtual;abstract;
  414. {
  415. This routine tries to optimize the const_reg opcode, and should be
  416. called at the start of a_op64_const_reg. It returns the actual opcode
  417. to emit, and the constant value to emit. If this routine returns
  418. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  419. @param(op The opcode to emit, returns the opcode which must be emitted)
  420. @param(a The constant which should be emitted, returns the constant which must
  421. be emitted)
  422. @param(reg The register to emit the opcode with, returns the register with
  423. which the opcode will be emitted)
  424. }
  425. function optimize64_op_const_reg(list: taasmoutput; var op: topcg; var a : qword; var reg: tregister64): boolean;virtual;abstract;
  426. { override to catch 64bit rangechecks }
  427. procedure g_rangecheck64(list: taasmoutput; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  428. end;
  429. procedure reference_release(list: taasmoutput; const ref : treference);
  430. { tlocation handling }
  431. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  432. procedure location_release(list: taasmoutput; const l : tlocation);
  433. procedure location_freetemp(list: taasmoutput; const l : tlocation);
  434. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  435. procedure location_swap(var destloc,sourceloc : tlocation);
  436. var
  437. {# Main code generator class }
  438. cg : tcg;
  439. {# Code generator class for all operations working with 64-Bit operands }
  440. cg64 : tcg64;
  441. implementation
  442. uses
  443. globals,globtype,options,systems,
  444. verbose,defutil,paramgr,
  445. tgobj,cutils,
  446. cgutils;
  447. const
  448. { Please leave this here, this module should NOT use
  449. exprasmlist, the lists are always passed as arguments.
  450. Declaring it as string here results in an error when compiling (PFV) }
  451. exprasmlist = 'error';
  452. {*****************************************************************************
  453. basic functionallity
  454. ******************************************************************************}
  455. constructor tcg.create;
  456. begin
  457. end;
  458. function Tcg.makeregsize(reg:Tregister;size:Tcgsize):Tregister;
  459. var
  460. subreg:Tsubregister;
  461. begin
  462. subreg:=cgsize2subreg(size);
  463. result:=reg;
  464. setsubreg(result,subreg);
  465. end;
  466. {*****************************************************************************
  467. register allocation
  468. ******************************************************************************}
  469. procedure tcg.init_register_allocators;
  470. begin
  471. fillchar(rg,sizeof(rg),0);
  472. add_reg_instruction_hook:={$ifdef FPCPROCVAR}@{$endif}add_reg_instruction;
  473. end;
  474. procedure tcg.done_register_allocators;
  475. begin
  476. { Safety }
  477. fillchar(rg,sizeof(rg),0);
  478. add_reg_instruction_hook:=nil;
  479. end;
  480. {$ifdef flowgraph}
  481. procedure Tcg.init_flowgraph;
  482. begin
  483. aktflownode:=0;
  484. end;
  485. procedure Tcg.done_flowgraph;
  486. begin
  487. end;
  488. {$endif}
  489. function tcg.getintregister(list:Taasmoutput;size:Tcgsize):Tregister;
  490. begin
  491. if not assigned(rg[R_INTREGISTER]) then
  492. internalerror(200312122);
  493. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  494. end;
  495. function tcg.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
  496. begin
  497. if not assigned(rg[R_FPUREGISTER]) then
  498. internalerror(200312123);
  499. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  500. end;
  501. function tcg.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
  502. begin
  503. if not assigned(rg[R_MMREGISTER]) then
  504. internalerror(200312124);
  505. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  506. end;
  507. function tcg.getaddressregister(list:Taasmoutput):Tregister;
  508. begin
  509. if assigned(rg[R_ADDRESSREGISTER]) then
  510. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  511. else
  512. begin
  513. if not assigned(rg[R_INTREGISTER]) then
  514. internalerror(200312121);
  515. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  516. end;
  517. end;
  518. procedure tcg.getexplicitregister(list:Taasmoutput;r:Tregister);
  519. begin
  520. if not assigned(rg[getregtype(r)]) then
  521. internalerror(200312125);
  522. rg[getregtype(r)].getexplicitregister(list,r);
  523. end;
  524. procedure tcg.ungetregister(list:Taasmoutput;r:Tregister);
  525. begin
  526. if not assigned(rg[getregtype(r)]) then
  527. internalerror(200312126);
  528. rg[getregtype(r)].ungetregister(list,r);
  529. end;
  530. procedure tcg.ungetreference(list:Taasmoutput;const r:Treference);
  531. begin
  532. if r.base<>NR_NO then
  533. ungetregister(list,r.base);
  534. if r.index<>NR_NO then
  535. ungetregister(list,r.index);
  536. end;
  537. procedure tcg.allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  538. begin
  539. if assigned(rg[rt]) then
  540. rg[rt].allocexplicitregisters(list,r)
  541. else
  542. internalerror(200310092);
  543. end;
  544. procedure tcg.deallocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  545. begin
  546. if assigned(rg[rt]) then
  547. rg[rt].deallocexplicitregisters(list,r)
  548. else
  549. internalerror(200310093);
  550. end;
  551. function tcg.uses_registers(rt:Tregistertype):boolean;
  552. begin
  553. if assigned(rg[rt]) then
  554. result:=rg[rt].uses_registers
  555. else
  556. result:=false;
  557. end;
  558. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  559. var
  560. rt : tregistertype;
  561. begin
  562. rt:=getregtype(r);
  563. { Only add it when a register allocator is configured.
  564. No IE can be generated, because the VMT is written
  565. without a valid rg[] }
  566. if assigned(rg[rt]) then
  567. rg[rt].add_reg_instruction(instr,r);
  568. end;
  569. procedure tcg.add_move_instruction(instr:Taicpu);
  570. var
  571. rt : tregistertype;
  572. begin
  573. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  574. if assigned(rg[rt]) then
  575. rg[rt].add_move_instruction(instr)
  576. else
  577. internalerror(200310095);
  578. end;
  579. procedure tcg.do_register_allocation(list:Taasmoutput;headertai:tai);
  580. var
  581. rt : tregistertype;
  582. begin
  583. for rt:=low(tregistertype) to high(tregistertype) do
  584. begin
  585. if assigned(rg[rt]) then
  586. rg[rt].do_register_allocation(list,headertai);
  587. end;
  588. end;
  589. procedure tcg.a_reg_alloc(list : taasmoutput;r : tregister);
  590. begin
  591. list.concat(tai_regalloc.alloc(r));
  592. end;
  593. procedure tcg.a_reg_dealloc(list : taasmoutput;r : tregister);
  594. begin
  595. list.concat(tai_regalloc.dealloc(r));
  596. end;
  597. procedure tcg.a_label(list : taasmoutput;l : tasmlabel);
  598. begin
  599. list.concat(tai_label.create(l));
  600. end;
  601. {*****************************************************************************
  602. for better code generation these methods should be overridden
  603. ******************************************************************************}
  604. procedure tcg.a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const locpara : tparalocation);
  605. var
  606. ref : treference;
  607. begin
  608. case locpara.loc of
  609. LOC_REGISTER,LOC_CREGISTER:
  610. a_load_reg_reg(list,size,locpara.size,r,locpara.register);
  611. LOC_REFERENCE,LOC_CREFERENCE:
  612. begin
  613. reference_reset(ref);
  614. ref.base:=locpara.reference.index;
  615. ref.offset:=locpara.reference.offset;
  616. a_load_reg_ref(list,size,locpara.size,r,ref);
  617. end
  618. else
  619. internalerror(2002071004);
  620. end;
  621. end;
  622. procedure tcg.a_param_const(list : taasmoutput;size : tcgsize;a : aword;const locpara : tparalocation);
  623. var
  624. ref : treference;
  625. begin
  626. case locpara.loc of
  627. LOC_REGISTER,LOC_CREGISTER:
  628. a_load_const_reg(list,locpara.size,a,locpara.register);
  629. LOC_REFERENCE,LOC_CREFERENCE:
  630. begin
  631. reference_reset(ref);
  632. ref.base:=locpara.reference.index;
  633. ref.offset:=locpara.reference.offset;
  634. a_load_const_ref(list,locpara.size,a,ref);
  635. end
  636. else
  637. internalerror(2002071004);
  638. end;
  639. end;
  640. procedure tcg.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const locpara : tparalocation);
  641. var
  642. ref : treference;
  643. begin
  644. case locpara.loc of
  645. LOC_REGISTER,LOC_CREGISTER:
  646. a_load_ref_reg(list,size,locpara.size,r,locpara.register);
  647. LOC_REFERENCE,LOC_CREFERENCE:
  648. begin
  649. reference_reset(ref);
  650. ref.base:=locpara.reference.index;
  651. ref.offset:=locpara.reference.offset;
  652. a_load_ref_ref(list,size,locpara.size,r,ref);
  653. end
  654. else
  655. internalerror(2002071004);
  656. end;
  657. end;
  658. procedure tcg.a_param_loc(list : taasmoutput;const l:tlocation;const locpara : tparalocation);
  659. begin
  660. case l.loc of
  661. LOC_REGISTER,
  662. LOC_CREGISTER :
  663. a_param_reg(list,l.size,l.register,locpara);
  664. LOC_CONSTANT :
  665. a_param_const(list,l.size,l.value,locpara);
  666. LOC_CREFERENCE,
  667. LOC_REFERENCE :
  668. a_param_ref(list,l.size,l.reference,locpara);
  669. else
  670. internalerror(2002032211);
  671. end;
  672. end;
  673. procedure tcg.a_paramaddr_ref(list : taasmoutput;const r : treference;const locpara : tparalocation);
  674. var
  675. hr : tregister;
  676. begin
  677. hr:=getaddressregister(list);
  678. a_loadaddr_ref_reg(list,r,hr);
  679. ungetregister(list,hr);
  680. a_param_reg(list,OS_ADDR,hr,locpara);
  681. end;
  682. procedure tcg.a_param_copy_ref(list : taasmoutput;size : qword;const r : treference;const locpara : tparalocation);
  683. var
  684. ref : treference;
  685. begin
  686. if not(locpara.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  687. internalerror(2003010901);
  688. reference_reset_base(ref,locpara.reference.index,locpara.reference.offset);
  689. g_concatcopy(list,r,ref,size,false,false);
  690. end;
  691. procedure tcg.a_loadany_param_ref(list : taasmoutput;const locpara : tparalocation;const ref:treference;shuffle : pmmshuffle);
  692. begin
  693. case locpara.loc of
  694. LOC_CREGISTER,
  695. LOC_REGISTER:
  696. begin
  697. {$ifndef cpu64bit}
  698. if (locpara.size in [OS_S64,OS_64]) then
  699. begin
  700. getexplicitregister(list,locpara.registerlow);
  701. getexplicitregister(list,locpara.registerhigh);
  702. ungetregister(list,locpara.registerlow);
  703. ungetregister(list,locpara.registerhigh);
  704. cg64.a_load64_reg_ref(list,locpara.register64,ref)
  705. end
  706. else
  707. {$endif cpu64bit}
  708. begin
  709. getexplicitregister(list,locpara.register);
  710. ungetregister(list,locpara.register);
  711. a_load_reg_ref(list,locpara.size,locpara.size,locpara.register,ref);
  712. end;
  713. end;
  714. LOC_MMREGISTER,
  715. LOC_CMMREGISTER:
  716. begin
  717. getexplicitregister(list,locpara.register);
  718. ungetregister(list,locpara.register);
  719. a_loadmm_reg_ref(list,locpara.size,locpara.size,locpara.register,ref,shuffle);
  720. end;
  721. LOC_FPUREGISTER,
  722. LOC_CFPUREGISTER:
  723. begin
  724. getexplicitregister(list,locpara.register);
  725. ungetregister(list,locpara.register);
  726. a_loadfpu_reg_ref(list,locpara.size,locpara.register,ref);
  727. end;
  728. else
  729. internalerror(2002081302);
  730. end;
  731. end;
  732. procedure tcg.a_loadany_param_reg(list : taasmoutput;const locpara : tparalocation;const reg:tregister;shuffle : pmmshuffle);
  733. var
  734. href : treference;
  735. begin
  736. case locpara.loc of
  737. LOC_CREGISTER,
  738. LOC_REGISTER:
  739. begin
  740. if not(locpara.size in [OS_S64,OS_64]) then
  741. begin
  742. getexplicitregister(list,locpara.register);
  743. ungetregister(list,locpara.register);
  744. {
  745. This is now a normal imaginary register, allocated the usual way (JM)
  746. getexplicitregister(list,reg);
  747. }
  748. a_load_reg_reg(list,locpara.size,locpara.size,locpara.register,reg)
  749. end
  750. else
  751. internalerror(2003053011);
  752. end;
  753. LOC_CFPUREGISTER,
  754. LOC_FPUREGISTER:
  755. begin
  756. getexplicitregister(list,locpara.register);
  757. ungetregister(list,locpara.register);
  758. {
  759. This is now a normal imaginary register, allocated the usual way (JM)
  760. getexplicitregister(list,reg);
  761. }
  762. a_loadfpu_reg_reg(list,locpara.size,locpara.register,reg);
  763. end;
  764. LOC_MMREGISTER,
  765. LOC_CMMREGISTER:
  766. begin
  767. getexplicitregister(list,locpara.register);
  768. ungetregister(list,locpara.register);
  769. {
  770. This is now a normal imaginary register, allocated the usual way (JM)
  771. getexplicitregister(list,reg);
  772. }
  773. a_loadmm_reg_reg(list,locpara.size,locpara.size,locpara.register,reg,shuffle);
  774. end;
  775. LOC_REFERENCE,
  776. LOC_CREFERENCE:
  777. begin
  778. reference_reset_base(href,locpara.reference.index,locpara.reference.offset);
  779. {
  780. This is now a normal imaginary register, allocated the usual way (JM)
  781. getexplicitregister(list,reg);
  782. }
  783. a_load_ref_reg(list,locpara.size,locpara.size,href,reg);
  784. end;
  785. else
  786. internalerror(2003053010);
  787. end
  788. end;
  789. {****************************************************************************
  790. some generic implementations
  791. ****************************************************************************}
  792. procedure tcg.a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  793. var
  794. tmpreg: tregister;
  795. begin
  796. { verify if we have the same reference }
  797. if references_equal(sref,dref) then
  798. exit;
  799. tmpreg:=getintregister(list,tosize);
  800. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  801. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  802. ungetregister(list,tmpreg);
  803. end;
  804. procedure tcg.a_load_const_ref(list : taasmoutput;size : tcgsize;a : aword;const ref : treference);
  805. var
  806. tmpreg: tregister;
  807. begin
  808. tmpreg:=getintregister(list,size);
  809. a_load_const_reg(list,size,a,tmpreg);
  810. a_load_reg_ref(list,size,size,tmpreg,ref);
  811. ungetregister(list,tmpreg);
  812. end;
  813. procedure tcg.a_load_const_loc(list : taasmoutput;a : aword;const loc: tlocation);
  814. begin
  815. case loc.loc of
  816. LOC_REFERENCE,LOC_CREFERENCE:
  817. a_load_const_ref(list,loc.size,a,loc.reference);
  818. LOC_REGISTER,LOC_CREGISTER:
  819. a_load_const_reg(list,loc.size,a,loc.register);
  820. else
  821. internalerror(200203272);
  822. end;
  823. end;
  824. procedure tcg.a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  825. begin
  826. case loc.loc of
  827. LOC_REFERENCE,LOC_CREFERENCE:
  828. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  829. LOC_REGISTER,LOC_CREGISTER:
  830. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  831. else
  832. internalerror(200203271);
  833. end;
  834. end;
  835. procedure tcg.a_load_loc_reg(list : taasmoutput; tosize: tcgsize; const loc: tlocation; reg : tregister);
  836. begin
  837. case loc.loc of
  838. LOC_REFERENCE,LOC_CREFERENCE:
  839. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  840. LOC_REGISTER,LOC_CREGISTER:
  841. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  842. LOC_CONSTANT:
  843. a_load_const_reg(list,tosize,loc.value,reg);
  844. else
  845. internalerror(200109092);
  846. end;
  847. end;
  848. procedure tcg.a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  849. begin
  850. case loc.loc of
  851. LOC_REFERENCE,LOC_CREFERENCE:
  852. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  853. LOC_REGISTER,LOC_CREGISTER:
  854. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  855. LOC_CONSTANT:
  856. a_load_const_ref(list,tosize,loc.value,ref);
  857. else
  858. internalerror(200109302);
  859. end;
  860. end;
  861. function tcg.optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aword; var reg:tregister): boolean;
  862. var
  863. powerval : longint;
  864. begin
  865. optimize_op_const_reg := false;
  866. case op of
  867. { or with zero returns same result }
  868. OP_OR : if a = 0 then optimize_op_const_reg := true;
  869. { and with max returns same result }
  870. OP_AND : if (a = high(a)) then optimize_op_const_reg := true;
  871. { division by 1 returns result }
  872. OP_DIV :
  873. begin
  874. if a = 1 then
  875. optimize_op_const_reg := true
  876. else if ispowerof2(int64(a), powerval) then
  877. begin
  878. a := powerval;
  879. op:= OP_SHR;
  880. end;
  881. exit;
  882. end;
  883. OP_IDIV:
  884. begin
  885. if a = 1 then
  886. optimize_op_const_reg := true
  887. else if ispowerof2(int64(a), powerval) then
  888. begin
  889. a := powerval;
  890. op:= OP_SAR;
  891. end;
  892. exit;
  893. end;
  894. OP_MUL,OP_IMUL:
  895. begin
  896. if a = 1 then
  897. optimize_op_const_reg := true
  898. else if ispowerof2(int64(a), powerval) then
  899. begin
  900. a := powerval;
  901. op:= OP_SHL;
  902. end;
  903. exit;
  904. end;
  905. OP_SAR,OP_SHL,OP_SHR:
  906. begin
  907. if a = 0 then
  908. optimize_op_const_reg := true;
  909. exit;
  910. end;
  911. end;
  912. end;
  913. procedure tcg.a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  914. begin
  915. case loc.loc of
  916. LOC_REFERENCE, LOC_CREFERENCE:
  917. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  918. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  919. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  920. else
  921. internalerror(200203301);
  922. end;
  923. end;
  924. procedure tcg.a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  925. begin
  926. case loc.loc of
  927. LOC_REFERENCE, LOC_CREFERENCE:
  928. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  929. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  930. a_loadfpu_reg_reg(list,size,reg,loc.register);
  931. else
  932. internalerror(48991);
  933. end;
  934. end;
  935. procedure tcg.a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const locpara : tparalocation);
  936. var
  937. ref : treference;
  938. begin
  939. case locpara.loc of
  940. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  941. a_loadfpu_reg_reg(list,size,r,locpara.register);
  942. LOC_REFERENCE,LOC_CREFERENCE:
  943. begin
  944. reference_reset(ref);
  945. ref.base:=locpara.reference.index;
  946. ref.offset:=locpara.reference.offset;
  947. a_loadfpu_reg_ref(list,size,r,ref);
  948. end
  949. else
  950. internalerror(2002071004);
  951. end;
  952. end;
  953. procedure tcg.a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const locpara : tparalocation);
  954. var
  955. href : treference;
  956. begin
  957. case locpara.loc of
  958. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  959. a_loadfpu_ref_reg(list,size,ref,locpara.register);
  960. LOC_REFERENCE,LOC_CREFERENCE:
  961. begin
  962. reference_reset(href);
  963. href.base:=locpara.reference.index;
  964. href.offset:=locpara.reference.offset;
  965. { concatcopy should choose the best way to copy the data }
  966. g_concatcopy(list,ref,href,tcgsize2size[size],false,false);
  967. end
  968. else
  969. internalerror(200402201);
  970. end;
  971. end;
  972. procedure tcg.a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: AWord; const ref: TReference);
  973. var
  974. tmpreg: tregister;
  975. begin
  976. tmpreg:=getintregister(list,size);
  977. a_load_ref_reg(list,size,size,ref,tmpreg);
  978. a_op_const_reg(list,op,size,a,tmpreg);
  979. a_load_reg_ref(list,size,size,tmpreg,ref);
  980. ungetregister(list,tmpreg);
  981. end;
  982. procedure tcg.a_op_const_loc(list : taasmoutput; Op: TOpCG; a: AWord; const loc: tlocation);
  983. begin
  984. case loc.loc of
  985. LOC_REGISTER, LOC_CREGISTER:
  986. a_op_const_reg(list,op,loc.size,a,loc.register);
  987. LOC_REFERENCE, LOC_CREFERENCE:
  988. a_op_const_ref(list,op,loc.size,a,loc.reference);
  989. else
  990. internalerror(200109061);
  991. end;
  992. end;
  993. procedure tcg.a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  994. var
  995. tmpreg: tregister;
  996. begin
  997. tmpreg:=getintregister(list,size);
  998. a_load_ref_reg(list,size,size,ref,tmpreg);
  999. a_op_reg_reg(list,op,size,reg,tmpreg);
  1000. a_load_reg_ref(list,size,size,tmpreg,ref);
  1001. ungetregister(list,tmpreg);
  1002. end;
  1003. procedure tcg.a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1004. var
  1005. tmpreg: tregister;
  1006. begin
  1007. case op of
  1008. OP_NOT,OP_NEG:
  1009. { handle it as "load ref,reg; op reg" }
  1010. begin
  1011. a_load_ref_reg(list,size,size,ref,reg);
  1012. a_op_reg_reg(list,op,size,reg,reg);
  1013. end;
  1014. else
  1015. begin
  1016. tmpreg:=getintregister(list,size);
  1017. a_load_ref_reg(list,size,size,ref,tmpreg);
  1018. a_op_reg_reg(list,op,size,tmpreg,reg);
  1019. ungetregister(list,tmpreg);
  1020. end;
  1021. end;
  1022. end;
  1023. procedure tcg.a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  1024. begin
  1025. case loc.loc of
  1026. LOC_REGISTER, LOC_CREGISTER:
  1027. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1028. LOC_REFERENCE, LOC_CREFERENCE:
  1029. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1030. else
  1031. internalerror(200109061);
  1032. end;
  1033. end;
  1034. procedure tcg.a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1035. var
  1036. tmpreg: tregister;
  1037. begin
  1038. case loc.loc of
  1039. LOC_REGISTER,LOC_CREGISTER:
  1040. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1041. LOC_REFERENCE,LOC_CREFERENCE:
  1042. begin
  1043. tmpreg:=getintregister(list,loc.size);
  1044. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1045. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1046. ungetregister(list,tmpreg);
  1047. end;
  1048. else
  1049. internalerror(200109061);
  1050. end;
  1051. end;
  1052. procedure Tcg.a_op_const_reg_reg(list:Taasmoutput;op:Topcg;size:Tcgsize;
  1053. a:aword;src,dst:Tregister);
  1054. begin
  1055. a_load_reg_reg(list,size,size,src,dst);
  1056. a_op_const_reg(list,op,size,a,dst);
  1057. end;
  1058. procedure tcg.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  1059. size: tcgsize; src1, src2, dst: tregister);
  1060. var
  1061. tmpreg: tregister;
  1062. begin
  1063. if (dst<>src1) then
  1064. begin
  1065. a_load_reg_reg(list,size,size,src2,dst);
  1066. a_op_reg_reg(list,op,size,src1,dst);
  1067. end
  1068. else
  1069. begin
  1070. tmpreg:=getintregister(list,size);
  1071. a_load_reg_reg(list,size,size,src2,tmpreg);
  1072. a_op_reg_reg(list,op,size,src1,tmpreg);
  1073. a_load_reg_reg(list,size,size,tmpreg,dst);
  1074. ungetregister(list,tmpreg);
  1075. end;
  1076. end;
  1077. procedure tcg.a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;const ref : treference;
  1078. l : tasmlabel);
  1079. var
  1080. tmpreg: tregister;
  1081. begin
  1082. tmpreg:=getintregister(list,size);
  1083. a_load_ref_reg(list,size,size,ref,tmpreg);
  1084. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1085. ungetregister(list,tmpreg);
  1086. end;
  1087. procedure tcg.a_cmp_const_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;const loc : tlocation;
  1088. l : tasmlabel);
  1089. begin
  1090. case loc.loc of
  1091. LOC_REGISTER,LOC_CREGISTER:
  1092. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1093. LOC_REFERENCE,LOC_CREFERENCE:
  1094. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1095. else
  1096. internalerror(200109061);
  1097. end;
  1098. end;
  1099. procedure tcg.a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1100. var
  1101. tmpreg: tregister;
  1102. begin
  1103. tmpreg:=getintregister(list,size);
  1104. a_load_ref_reg(list,size,size,ref,tmpreg);
  1105. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1106. ungetregister(list,tmpreg);
  1107. end;
  1108. procedure tcg.a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1109. begin
  1110. case loc.loc of
  1111. LOC_REGISTER,
  1112. LOC_CREGISTER:
  1113. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1114. LOC_REFERENCE,
  1115. LOC_CREFERENCE :
  1116. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1117. LOC_CONSTANT:
  1118. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1119. else
  1120. internalerror(200203231);
  1121. end;
  1122. end;
  1123. procedure tcg.a_cmp_ref_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1124. l : tasmlabel);
  1125. var
  1126. tmpreg: tregister;
  1127. begin
  1128. case loc.loc of
  1129. LOC_REGISTER,LOC_CREGISTER:
  1130. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1131. LOC_REFERENCE,LOC_CREFERENCE:
  1132. begin
  1133. tmpreg:=getintregister(list,size);
  1134. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1135. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1136. ungetregister(list,tmpreg);
  1137. end
  1138. else
  1139. internalerror(200109061);
  1140. end;
  1141. end;
  1142. procedure tcg.a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1143. begin
  1144. case loc.loc of
  1145. LOC_MMREGISTER,LOC_CMMREGISTER:
  1146. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1147. LOC_REFERENCE,LOC_CREFERENCE:
  1148. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1149. else
  1150. internalerror(200310121);
  1151. end;
  1152. end;
  1153. procedure tcg.a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1154. begin
  1155. case loc.loc of
  1156. LOC_MMREGISTER,LOC_CMMREGISTER:
  1157. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1158. LOC_REFERENCE,LOC_CREFERENCE:
  1159. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1160. else
  1161. internalerror(200310122);
  1162. end;
  1163. end;
  1164. procedure tcg.a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const locpara : tparalocation;shuffle : pmmshuffle);
  1165. var
  1166. ref : treference;
  1167. begin
  1168. case locpara.loc of
  1169. LOC_MMREGISTER,LOC_CMMREGISTER:
  1170. a_loadmm_reg_reg(list,size,locpara.size,reg,locpara.register,shuffle);
  1171. LOC_REFERENCE,LOC_CREFERENCE:
  1172. begin
  1173. reference_reset(ref);
  1174. ref.base:=locpara.reference.index;
  1175. ref.offset:=locpara.reference.offset;
  1176. a_loadmm_reg_ref(list,size,locpara.size,reg,ref,shuffle);
  1177. end
  1178. else
  1179. internalerror(200310123);
  1180. end;
  1181. end;
  1182. procedure tcg.a_parammm_ref(list: taasmoutput; size: tcgsize;const ref: treference;const locpara : tparalocation;shuffle : pmmshuffle);
  1183. var
  1184. hr : tregister;
  1185. hs : tmmshuffle;
  1186. begin
  1187. hr:=getmmregister(list,locpara.size);
  1188. a_loadmm_ref_reg(list,size,locpara.size,ref,hr,shuffle);
  1189. if realshuffle(shuffle) then
  1190. begin
  1191. hs:=shuffle^;
  1192. removeshuffles(hs);
  1193. a_parammm_reg(list,locpara.size,hr,locpara,@hs);
  1194. end
  1195. else
  1196. a_parammm_reg(list,locpara.size,hr,locpara,shuffle);
  1197. ungetregister(list,hr);
  1198. end;
  1199. procedure tcg.a_parammm_loc(list: taasmoutput;const loc: tlocation; const locpara : tparalocation;shuffle : pmmshuffle);
  1200. begin
  1201. case loc.loc of
  1202. LOC_MMREGISTER,LOC_CMMREGISTER:
  1203. a_parammm_reg(list,loc.size,loc.register,locpara,shuffle);
  1204. LOC_REFERENCE,LOC_CREFERENCE:
  1205. a_parammm_ref(list,loc.size,loc.reference,locpara,shuffle);
  1206. else
  1207. internalerror(200310123);
  1208. end;
  1209. end;
  1210. procedure tcg.a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1211. var
  1212. hr : tregister;
  1213. hs : tmmshuffle;
  1214. begin
  1215. hr:=getmmregister(list,size);
  1216. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1217. if realshuffle(shuffle) then
  1218. begin
  1219. hs:=shuffle^;
  1220. removeshuffles(hs);
  1221. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1222. end
  1223. else
  1224. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1225. ungetregister(list,hr);
  1226. end;
  1227. procedure tcg.a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1228. var
  1229. hr : tregister;
  1230. hs : tmmshuffle;
  1231. begin
  1232. hr:=getmmregister(list,size);
  1233. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1234. if realshuffle(shuffle) then
  1235. begin
  1236. hs:=shuffle^;
  1237. removeshuffles(hs);
  1238. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1239. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1240. end
  1241. else
  1242. begin
  1243. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1244. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1245. end;
  1246. ungetregister(list,hr);
  1247. end;
  1248. procedure tcg.a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1249. begin
  1250. case loc.loc of
  1251. LOC_CMMREGISTER,LOC_MMREGISTER:
  1252. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1253. LOC_CREFERENCE,LOC_REFERENCE:
  1254. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1255. else
  1256. internalerror(200312232);
  1257. end;
  1258. end;
  1259. class function tcg.reg_cgsize(const reg: tregister) : tcgsize;
  1260. begin
  1261. reg_cgsize := OS_INT;
  1262. end;
  1263. procedure tcg.g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;delsource,loadref : boolean);
  1264. var
  1265. paraloc1,paraloc2,paraloc3 : tparalocation;
  1266. begin
  1267. {$ifdef FPC}
  1268. {$warning FIX ME!}
  1269. {$endif}
  1270. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1271. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1272. paraloc3:=paramanager.getintparaloc(pocall_default,3);
  1273. paramanager.allocparaloc(list,paraloc3);
  1274. a_paramaddr_ref(list,dest,paraloc3);
  1275. paramanager.allocparaloc(list,paraloc2);
  1276. if loadref then
  1277. a_param_ref(list,OS_ADDR,source,paraloc2)
  1278. else
  1279. a_paramaddr_ref(list,source,paraloc2);
  1280. if delsource then
  1281. reference_release(list,source);
  1282. paramanager.allocparaloc(list,paraloc1);
  1283. a_param_const(list,OS_INT,len,paraloc1);
  1284. paramanager.freeparaloc(list,paraloc3);
  1285. paramanager.freeparaloc(list,paraloc2);
  1286. paramanager.freeparaloc(list,paraloc1);
  1287. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1288. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1289. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1290. end;
  1291. procedure tcg.g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  1292. var
  1293. href : treference;
  1294. incrfunc : string;
  1295. paraloc1,paraloc2 : tparalocation;
  1296. begin
  1297. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1298. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1299. { These functions should not change the registers (they use
  1300. the saveregister proc directive }
  1301. if is_interfacecom(t) then
  1302. incrfunc:='FPC_INTF_INCR_REF'
  1303. else if is_ansistring(t) then
  1304. {$ifdef ansistring_bits}
  1305. begin
  1306. case Tstringdef(t).string_typ of
  1307. st_ansistring16:
  1308. incrfunc:='FPC_ANSISTR16_INCR_REF';
  1309. st_ansistring32:
  1310. incrfunc:='FPC_ANSISTR32_INCR_REF';
  1311. st_ansistring64:
  1312. incrfunc:='FPC_ANSISTR64_INCR_REF';
  1313. end;
  1314. end
  1315. {$else}
  1316. incrfunc:='FPC_ANSISTR_INCR_REF'
  1317. {$endif}
  1318. else if is_widestring(t) then
  1319. incrfunc:='FPC_WIDESTR_INCR_REF'
  1320. else if is_dynamic_array(t) then
  1321. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1322. else
  1323. incrfunc:='';
  1324. { call the special incr function or the generic addref }
  1325. if incrfunc<>'' then
  1326. begin
  1327. { these functions get the pointer by value }
  1328. paramanager.allocparaloc(list,paraloc1);
  1329. a_param_ref(list,OS_ADDR,ref,paraloc1);
  1330. paramanager.freeparaloc(list,paraloc1);
  1331. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1332. a_call_name(list,incrfunc);
  1333. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1334. end
  1335. else
  1336. begin
  1337. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1338. paramanager.allocparaloc(list,paraloc2);
  1339. a_paramaddr_ref(list,href,paraloc2);
  1340. paramanager.allocparaloc(list,paraloc1);
  1341. if loadref then
  1342. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1343. else
  1344. a_paramaddr_ref(list,ref,paraloc1);
  1345. paramanager.freeparaloc(list,paraloc1);
  1346. paramanager.freeparaloc(list,paraloc2);
  1347. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1348. a_call_name(list,'FPC_ADDREF');
  1349. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1350. end;
  1351. end;
  1352. procedure tcg.g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference; loadref:boolean);
  1353. var
  1354. hreg : tregister;
  1355. href : treference;
  1356. decrfunc : string;
  1357. needrtti : boolean;
  1358. paraloc1,paraloc2 : tparalocation;
  1359. begin
  1360. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1361. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1362. needrtti:=false;
  1363. if is_interfacecom(t) then
  1364. decrfunc:='FPC_INTF_DECR_REF'
  1365. else if is_ansistring(t) then
  1366. {$ifdef ansistring_bits}
  1367. begin
  1368. case Tstringdef(t).string_typ of
  1369. st_ansistring16:
  1370. decrfunc:='FPC_ANSISTR16_DECR_REF';
  1371. st_ansistring32:
  1372. decrfunc:='FPC_ANSISTR32_DECR_REF';
  1373. st_ansistring64:
  1374. decrfunc:='FPC_ANSISTR64_DECR_REF';
  1375. end;
  1376. end
  1377. {$else}
  1378. decrfunc:='FPC_ANSISTR_DECR_REF'
  1379. {$endif}
  1380. else if is_widestring(t) then
  1381. decrfunc:='FPC_WIDESTR_DECR_REF'
  1382. else if is_dynamic_array(t) then
  1383. begin
  1384. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1385. needrtti:=true;
  1386. end
  1387. else
  1388. decrfunc:='';
  1389. { call the special decr function or the generic decref }
  1390. if decrfunc<>'' then
  1391. begin
  1392. if needrtti then
  1393. begin
  1394. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1395. paramanager.allocparaloc(list,paraloc2);
  1396. a_paramaddr_ref(list,href,paraloc2);
  1397. end;
  1398. paramanager.allocparaloc(list,paraloc1);
  1399. if loadref then
  1400. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1401. else
  1402. a_paramaddr_ref(list,ref,paraloc1);
  1403. paramanager.freeparaloc(list,paraloc1);
  1404. if needrtti then
  1405. paramanager.freeparaloc(list,paraloc2);
  1406. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1407. a_call_name(list,decrfunc);
  1408. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1409. end
  1410. else
  1411. begin
  1412. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1413. paramanager.allocparaloc(list,paraloc2);
  1414. a_paramaddr_ref(list,href,paraloc2);
  1415. paramanager.allocparaloc(list,paraloc1);
  1416. if loadref then
  1417. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1418. else
  1419. a_paramaddr_ref(list,ref,paraloc1);
  1420. paramanager.freeparaloc(list,paraloc1);
  1421. paramanager.freeparaloc(list,paraloc2);
  1422. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1423. a_call_name(list,'FPC_DECREF');
  1424. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1425. end;
  1426. { Temp locations need always to be reset to 0 }
  1427. if tg.istemp(ref) then
  1428. begin
  1429. if loadref then
  1430. begin
  1431. hreg:=getaddressregister(list);
  1432. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1433. reference_reset_base(href,hreg,0);
  1434. a_load_const_ref(list,OS_ADDR,0,href);
  1435. ungetregister(list,hreg);
  1436. end
  1437. else
  1438. a_load_const_ref(list,OS_ADDR,0,ref);
  1439. end;
  1440. end;
  1441. procedure tcg.g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1442. var
  1443. href : treference;
  1444. paraloc1,paraloc2 : tparalocation;
  1445. begin
  1446. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1447. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1448. if is_ansistring(t) or
  1449. is_widestring(t) or
  1450. is_interfacecom(t) or
  1451. is_dynamic_array(t) then
  1452. a_load_const_ref(list,OS_ADDR,0,ref)
  1453. else
  1454. begin
  1455. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1456. paramanager.allocparaloc(list,paraloc2);
  1457. a_paramaddr_ref(list,href,paraloc2);
  1458. paramanager.allocparaloc(list,paraloc1);
  1459. if loadref then
  1460. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1461. else
  1462. a_paramaddr_ref(list,ref,paraloc1);
  1463. paramanager.freeparaloc(list,paraloc1);
  1464. paramanager.freeparaloc(list,paraloc2);
  1465. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1466. a_call_name(list,'FPC_INITIALIZE');
  1467. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1468. end;
  1469. end;
  1470. procedure tcg.g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1471. var
  1472. hreg : tregister;
  1473. href : treference;
  1474. paraloc1,paraloc2 : tparalocation;
  1475. begin
  1476. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1477. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1478. if is_ansistring(t) or
  1479. is_widestring(t) or
  1480. is_interfacecom(t) then
  1481. begin
  1482. g_decrrefcount(list,t,ref,loadref);
  1483. { Temp locations are already reset to 0 }
  1484. if not tg.istemp(ref) then
  1485. begin
  1486. if loadref then
  1487. begin
  1488. hreg:=getaddressregister(list);
  1489. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1490. reference_reset_base(href,hreg,0);
  1491. a_load_const_ref(list,OS_ADDR,0,href);
  1492. ungetregister(list,hreg);
  1493. end
  1494. else
  1495. a_load_const_ref(list,OS_ADDR,0,ref);
  1496. end;
  1497. end
  1498. else
  1499. begin
  1500. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1501. paramanager.allocparaloc(list,paraloc2);
  1502. a_paramaddr_ref(list,href,paraloc2);
  1503. paramanager.allocparaloc(list,paraloc1);
  1504. if loadref then
  1505. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1506. else
  1507. a_paramaddr_ref(list,ref,paraloc1);
  1508. paramanager.freeparaloc(list,paraloc1);
  1509. paramanager.freeparaloc(list,paraloc2);
  1510. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1511. a_call_name(list,'FPC_FINALIZE');
  1512. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1513. end;
  1514. end;
  1515. procedure tcg.g_rangecheck(list: taasmoutput; const l:tlocation;fromdef,todef: tdef);
  1516. { generate range checking code for the value at location p. The type }
  1517. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1518. { is the original type used at that location. When both defs are equal }
  1519. { the check is also insert (needed for succ,pref,inc,dec) }
  1520. const
  1521. {$ifdef ver1_0}
  1522. awordsignedmax=high(longint);
  1523. {$else}
  1524. awordsignedmax=high(aword) div 2;
  1525. {$endif}
  1526. var
  1527. neglabel : tasmlabel;
  1528. hreg : tregister;
  1529. lto,hto,
  1530. lfrom,hfrom : TConstExprInt;
  1531. from_signed: boolean;
  1532. begin
  1533. { range checking on and range checkable value? }
  1534. if not(cs_check_range in aktlocalswitches) or
  1535. not(fromdef.deftype in [orddef,enumdef,arraydef]) then
  1536. exit;
  1537. if is_64bit(fromdef) or is_64bit(todef) then
  1538. begin
  1539. cg64.g_rangecheck64(list,l,fromdef,todef);
  1540. exit;
  1541. end;
  1542. { only check when assigning to scalar, subranges are different, }
  1543. { when todef=fromdef then the check is always generated }
  1544. getrange(fromdef,lfrom,hfrom);
  1545. getrange(todef,lto,hto);
  1546. { no range check if from and to are equal and are both longint/dword }
  1547. { (if we have a 32bit processor) or int64/qword, since such }
  1548. { operations can at most cause overflows (JM) }
  1549. { Note that these checks are mostly processor independent, they only }
  1550. { have to be changed once we introduce 64bit subrange types }
  1551. {$warning range check still s32bit}
  1552. if (fromdef = todef) and
  1553. (fromdef.deftype=orddef) and
  1554. (((sizeof(aword) = 4) and
  1555. (((torddef(fromdef).typ = s32bit) and
  1556. (lfrom = low(longint)) and
  1557. (hfrom = high(longint))) or
  1558. ((torddef(fromdef).typ = u32bit) and
  1559. (lfrom = low(cardinal)) and
  1560. (hfrom = high(cardinal)))))) then
  1561. exit;
  1562. if todef<>fromdef then
  1563. begin
  1564. { if the from-range falls completely in the to-range, no check }
  1565. { is necessary }
  1566. if (lto<=lfrom) and (hto>=hfrom) then
  1567. exit;
  1568. end;
  1569. { generate the rangecheck code for the def where we are going to }
  1570. { store the result }
  1571. { use the trick that }
  1572. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1573. { To be able to do that, we have to make sure however that either }
  1574. { fromdef and todef are both signed or unsigned, or that we leave }
  1575. { the parts < 0 and > maxlongint out }
  1576. { is_signed now also works for arrays (it checks the rangetype) (JM) }
  1577. from_signed := is_signed(fromdef);
  1578. if from_signed xor is_signed(todef) then
  1579. if from_signed then
  1580. { from is signed, to is unsigned }
  1581. begin
  1582. { if high(from) < 0 -> always range error }
  1583. if (hfrom < 0) or
  1584. { if low(to) > maxlongint also range error }
  1585. (lto > awordsignedmax) then
  1586. begin
  1587. a_call_name(list,'FPC_RANGEERROR');
  1588. exit
  1589. end;
  1590. { from is signed and to is unsigned -> when looking at from }
  1591. { as an unsigned value, it must be < maxlongint (otherwise }
  1592. { it's negative, which is invalid since "to" is unsigned) }
  1593. if hto > awordsignedmax then
  1594. hto := awordsignedmax;
  1595. end
  1596. else
  1597. { from is unsigned, to is signed }
  1598. begin
  1599. if (lfrom > awordsignedmax) or
  1600. (hto < 0) then
  1601. begin
  1602. a_call_name(list,'FPC_RANGEERROR');
  1603. exit
  1604. end;
  1605. { from is unsigned and to is signed -> when looking at to }
  1606. { as an unsigned value, it must be >= 0 (since negative }
  1607. { values are the same as values > maxlongint) }
  1608. if lto < 0 then
  1609. lto := 0;
  1610. end;
  1611. hreg:=getintregister(list,OS_INT);
  1612. a_load_loc_reg(list,OS_INT,l,hreg);
  1613. a_op_const_reg(list,OP_SUB,OS_INT,aword(lto),hreg);
  1614. objectlibrary.getlabel(neglabel);
  1615. a_cmp_const_reg_label(list,OS_INT,OC_BE,aword(hto-lto),hreg,neglabel);
  1616. { !!! should happen right after the compare (JM) }
  1617. ungetregister(list,hreg);
  1618. a_call_name(list,'FPC_RANGEERROR');
  1619. a_label(list,neglabel);
  1620. end;
  1621. procedure tcg.g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference);
  1622. var
  1623. tmpreg : tregister;
  1624. begin
  1625. tmpreg:=getintregister(list,size);
  1626. g_flags2reg(list,size,f,tmpreg);
  1627. a_load_reg_ref(list,size,size,tmpreg,ref);
  1628. ungetregister(list,tmpreg);
  1629. end;
  1630. procedure tcg.g_maybe_testself(list : taasmoutput;reg:tregister);
  1631. var
  1632. OKLabel : tasmlabel;
  1633. paraloc1 : tparalocation;
  1634. begin
  1635. if (cs_check_object in aktlocalswitches) or
  1636. (cs_check_range in aktlocalswitches) then
  1637. begin
  1638. objectlibrary.getlabel(oklabel);
  1639. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1640. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1641. paramanager.allocparaloc(list,paraloc1);
  1642. a_param_const(list,OS_INT,210,paraloc1);
  1643. paramanager.freeparaloc(list,paraloc1);
  1644. a_call_name(list,'FPC_HANDLEERROR');
  1645. a_label(list,oklabel);
  1646. end;
  1647. end;
  1648. procedure tcg.g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  1649. var
  1650. hrefvmt : treference;
  1651. paraloc1,paraloc2 : tparalocation;
  1652. begin
  1653. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1654. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1655. if (cs_check_object in aktlocalswitches) then
  1656. begin
  1657. reference_reset_symbol(hrefvmt,objectlibrary.newasmsymbol(objdef.vmt_mangledname,AB_EXTERNAL,AT_DATA),0);
  1658. paramanager.allocparaloc(list,paraloc2);
  1659. a_paramaddr_ref(list,hrefvmt,paraloc2);
  1660. paramanager.allocparaloc(list,paraloc1);
  1661. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1662. paramanager.freeparaloc(list,paraloc1);
  1663. paramanager.freeparaloc(list,paraloc2);
  1664. { No register saving needed, saveregisters is used }
  1665. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1666. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1667. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1668. end
  1669. else
  1670. if (cs_check_range in aktlocalswitches) then
  1671. begin
  1672. paramanager.allocparaloc(list,paraloc1);
  1673. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1674. paramanager.freeparaloc(list,paraloc1);
  1675. { No register saving needed, saveregisters is used }
  1676. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1677. a_call_name(list,'FPC_CHECK_OBJECT');
  1678. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1679. end;
  1680. end;
  1681. {*****************************************************************************
  1682. Entry/Exit Code Functions
  1683. *****************************************************************************}
  1684. procedure tcg.g_copyvaluepara_openarray(list : taasmoutput;const ref, lenref:treference;elesize:aword);
  1685. var
  1686. sizereg,sourcereg,destreg : tregister;
  1687. paraloc1,paraloc2,paraloc3 : tparalocation;
  1688. begin
  1689. { because ppc abi doesn't support dynamic stack allocation properly
  1690. open array value parameters are copied onto the heap
  1691. }
  1692. { allocate two registers for len and source }
  1693. sizereg:=getintregister(list,OS_INT);
  1694. sourcereg:=getintregister(list,OS_ADDR);
  1695. destreg:=getintregister(list,OS_ADDR);
  1696. { calculate necessary memory }
  1697. a_load_ref_reg(list,OS_INT,OS_INT,lenref,sizereg);
  1698. a_op_const_reg(list,OP_ADD,OS_INT,1,sizereg);
  1699. a_op_const_reg(list,OP_MUL,OS_INT,elesize,sizereg);
  1700. { load source }
  1701. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,sourcereg);
  1702. { do getmem call }
  1703. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1704. paramanager.allocparaloc(list,paraloc1);
  1705. a_param_reg(list,OS_INT,sizereg,paraloc1);
  1706. paramanager.freeparaloc(list,paraloc1);
  1707. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1708. a_call_name(list,'FPC_GETMEM');
  1709. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1710. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1711. a_load_reg_ref(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,ref);
  1712. { do move call }
  1713. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1714. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1715. paraloc3:=paramanager.getintparaloc(pocall_default,3);
  1716. { load size }
  1717. paramanager.allocparaloc(list,paraloc3);
  1718. a_param_reg(list,OS_INT,sizereg,paraloc3);
  1719. { load destination }
  1720. paramanager.allocparaloc(list,paraloc2);
  1721. a_param_reg(list,OS_ADDR,destreg,paraloc2);
  1722. { load source }
  1723. paramanager.allocparaloc(list,paraloc1);
  1724. a_param_reg(list,OS_ADDR,sourcereg,paraloc1);
  1725. paramanager.freeparaloc(list,paraloc3);
  1726. paramanager.freeparaloc(list,paraloc2);
  1727. paramanager.freeparaloc(list,paraloc1);
  1728. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1729. a_call_name(list,'FPC_MOVE');
  1730. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1731. { release used registers }
  1732. ungetregister(list,sizereg);
  1733. ungetregister(list,sourcereg);
  1734. ungetregister(list,destreg);
  1735. end;
  1736. procedure tcg.g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);
  1737. var
  1738. paraloc : tparalocation;
  1739. begin
  1740. { do move call }
  1741. paraloc:=paramanager.getintparaloc(pocall_default,1);
  1742. { load source }
  1743. paramanager.allocparaloc(list,paraloc);
  1744. a_param_ref(list,OS_ADDR,ref,paraloc);
  1745. paramanager.freeparaloc(list,paraloc);
  1746. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1747. a_call_name(list,'FPC_FREEMEM');
  1748. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1749. end;
  1750. procedure tcg.g_interrupt_stackframe_entry(list : taasmoutput);
  1751. begin
  1752. end;
  1753. procedure tcg.g_interrupt_stackframe_exit(list : taasmoutput;accused,acchiused:boolean);
  1754. begin
  1755. end;
  1756. procedure tcg.g_profilecode(list : taasmoutput);
  1757. begin
  1758. end;
  1759. procedure tcg.g_exception_reason_save(list : taasmoutput; const href : treference);
  1760. begin
  1761. a_load_reg_ref(list, OS_S32, OS_32, NR_FUNCTION_RETURN_REG, href);
  1762. end;
  1763. procedure tcg.g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aword);
  1764. begin
  1765. a_load_const_ref(list, OS_S32, a, href);
  1766. end;
  1767. procedure tcg.g_exception_reason_load(list : taasmoutput; const href : treference);
  1768. begin
  1769. a_load_ref_reg(list, OS_S32, OS_S32, href, NR_FUNCTION_RETURN_REG);
  1770. end;
  1771. {*****************************************************************************
  1772. TCG64
  1773. *****************************************************************************}
  1774. procedure tcg64.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : qword; regsrc,regdst : tregister64);
  1775. begin
  1776. a_load64_reg_reg(list,regsrc,regdst);
  1777. a_op64_const_reg(list,op,value,regdst);
  1778. end;
  1779. procedure tcg64.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);
  1780. begin
  1781. a_load64_reg_reg(list,regsrc2,regdst);
  1782. a_op64_reg_reg(list,op,regsrc1,regdst);
  1783. end;
  1784. {****************************************************************************
  1785. TReference
  1786. ****************************************************************************}
  1787. procedure reference_release(list: taasmoutput; const ref : treference);
  1788. begin
  1789. cg.ungetreference(list,ref);
  1790. end;
  1791. {****************************************************************************
  1792. TLocation
  1793. ****************************************************************************}
  1794. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  1795. begin
  1796. FillChar(l,sizeof(tlocation),0);
  1797. l.loc:=lt;
  1798. l.size:=lsize;
  1799. {$ifdef arm}
  1800. if l.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  1801. l.reference.signindex:=1;
  1802. {$endif arm}
  1803. end;
  1804. procedure location_release(list: taasmoutput; const l : tlocation);
  1805. begin
  1806. case l.loc of
  1807. LOC_REGISTER,LOC_CREGISTER :
  1808. begin
  1809. cg.ungetregister(list,l.register);
  1810. {$ifndef cpu64bit}
  1811. if l.size in [OS_64,OS_S64] then
  1812. cg.ungetregister(list,l.registerhigh);
  1813. {$endif cpu64bit}
  1814. end;
  1815. LOC_FPUREGISTER,LOC_CFPUREGISTER :
  1816. cg.ungetregister(list,l.register);
  1817. LOC_CREFERENCE,LOC_REFERENCE :
  1818. cg.ungetreference(list, l.reference);
  1819. end;
  1820. end;
  1821. procedure location_freetemp(list:taasmoutput; const l : tlocation);
  1822. begin
  1823. if (l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  1824. tg.ungetiftemp(list,l.reference);
  1825. end;
  1826. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  1827. begin
  1828. destloc:=sourceloc;
  1829. end;
  1830. procedure location_swap(var destloc,sourceloc : tlocation);
  1831. var
  1832. swapl : tlocation;
  1833. begin
  1834. swapl := destloc;
  1835. destloc := sourceloc;
  1836. sourceloc := swapl;
  1837. end;
  1838. initialization
  1839. ;
  1840. finalization
  1841. cg.free;
  1842. cg64.free;
  1843. end.
  1844. {
  1845. $Log$
  1846. Revision 1.163 2004-04-29 19:56:36 daniel
  1847. * Prepare compiler infrastructure for multiple ansistring types
  1848. Revision 1.162 2004/04/18 07:52:43 florian
  1849. * fixed web bug 3048: comparision of dyn. arrays
  1850. Revision 1.161 2004/03/06 20:35:19 florian
  1851. * fixed arm compilation
  1852. * cleaned up code generation for exported linux procedures
  1853. Revision 1.160 2004/03/02 00:36:33 olle
  1854. * big transformation of Tai_[const_]Symbol.Create[data]name*
  1855. Revision 1.159 2004/02/27 10:21:05 florian
  1856. * top_symbol killed
  1857. + refaddr to treference added
  1858. + refsymbol to treference added
  1859. * top_local stuff moved to an extra record to save memory
  1860. + aint introduced
  1861. * tppufile.get/putint64/aint implemented
  1862. Revision 1.158 2004/02/20 22:16:34 florian
  1863. * handling of float parameters passed in mm registers fixed
  1864. Revision 1.157 2004/02/12 15:54:03 peter
  1865. * make extcycle is working again
  1866. Revision 1.156 2004/02/08 18:08:59 jonas
  1867. * fixed regvars support. Needs -doldregvars to activate. Only tested with
  1868. ppc, other processors should however only require maxregvars and
  1869. maxfpuregvars constants in cpubase.pas. Remember to take scratch-
  1870. registers into account when defining that value.
  1871. Revision 1.155 2004/02/04 22:01:13 peter
  1872. * first try to get cpupara working for x86_64
  1873. Revision 1.154 2004/02/03 22:32:53 peter
  1874. * renamed xNNbittype to xNNinttype
  1875. * renamed registers32 to registersint
  1876. * replace some s32bit,u32bit with torddef([su]inttype).def.typ
  1877. Revision 1.153 2004/01/31 17:45:17 peter
  1878. * Change several $ifdef i386 to x86
  1879. * Change several OS_32 to OS_INT/OS_ADDR
  1880. Revision 1.152 2004/01/22 22:12:21 peter
  1881. * g_finalize needs to reset to nil after decr_ref
  1882. * support loadref in decr_ref reset to nil
  1883. Revision 1.151 2004/01/21 22:13:20 peter
  1884. * decrrefcount resets temps to nil
  1885. Revision 1.150 2004/01/21 21:01:34 peter
  1886. * fixed stackchecking for register calling
  1887. Revision 1.149 2004/01/20 12:59:36 florian
  1888. * common addnode code for x86-64 and i386
  1889. Revision 1.148 2004/01/12 22:11:38 peter
  1890. * use localalign info for alignment for locals and temps
  1891. * sparc fpu flags branching added
  1892. * moved powerpc copy_valye_openarray to generic
  1893. Revision 1.147 2004/01/11 23:56:19 daniel
  1894. * Experiment: Compress strings to save memory
  1895. Did not save a single byte of mem; clearly the core size is boosted by
  1896. temporary memory usage...
  1897. Revision 1.146 2003/12/26 14:02:30 peter
  1898. * sparc updates
  1899. * use registertype in spill_register
  1900. Revision 1.145 2003/12/26 13:19:16 florian
  1901. * rtl and compiler compile with -Cfsse2
  1902. Revision 1.144 2003/12/24 00:10:02 florian
  1903. - delete parameter in cg64 methods removed
  1904. Revision 1.143 2003/12/23 14:38:07 florian
  1905. + second_floataddsse implemented
  1906. Revision 1.142 2003/12/22 19:00:17 florian
  1907. * fixed some x86-64 issues
  1908. Revision 1.141 2003/12/21 19:42:42 florian
  1909. * fixed ppc inlining stuff
  1910. * fixed wrong unit writing
  1911. + added some sse stuff
  1912. Revision 1.140 2003/12/15 21:39:39 florian
  1913. * improved register allocation of generic a_param_const and a_param_ref
  1914. Revision 1.139 2003/12/15 21:25:48 peter
  1915. * reg allocations for imaginary register are now inserted just
  1916. before reg allocation
  1917. * tregister changed to enum to allow compile time check
  1918. * fixed several tregister-tsuperregister errors
  1919. Revision 1.138 2003/12/12 17:16:17 peter
  1920. * rg[tregistertype] added in tcg
  1921. Revision 1.137 2003/12/06 22:11:47 jonas
  1922. + allocate volatile registers around calls to procedures declared with
  1923. "saveregisters" on non-x86 processors
  1924. Revision 1.136 2003/12/06 01:15:22 florian
  1925. * reverted Peter's alloctemp patch; hopefully properly
  1926. Revision 1.135 2003/12/03 23:13:19 peter
  1927. * delayed paraloc allocation, a_param_*() gets extra parameter
  1928. if it needs to allocate temp or real paralocation
  1929. * optimized/simplified int-real loading
  1930. Revision 1.134 2003/11/05 23:05:13 florian
  1931. * elesize of g_copyvaluepara_openarray changed
  1932. + g_releaesvaluepara_openarray added
  1933. Revision 1.133 2003/10/19 01:34:30 florian
  1934. * some ppc stuff fixed
  1935. * memory leak fixed
  1936. Revision 1.132 2003/10/17 15:25:18 florian
  1937. * fixed more ppc stuff
  1938. Revision 1.131 2003/10/17 14:38:32 peter
  1939. * 64k registers supported
  1940. * fixed some memory leaks
  1941. Revision 1.130 2003/10/13 01:23:13 florian
  1942. * some ideas for mm support implemented
  1943. Revision 1.129 2003/10/11 16:06:42 florian
  1944. * fixed some MMX<->SSE
  1945. * started to fix ppc, needs an overhaul
  1946. + stabs info improve for spilling, not sure if it works correctly/completly
  1947. - MMX_SUPPORT removed from Makefile.fpc
  1948. Revision 1.128 2003/10/10 17:48:13 peter
  1949. * old trgobj moved to x86/rgcpu and renamed to trgx86fpu
  1950. * tregisteralloctor renamed to trgobj
  1951. * removed rgobj from a lot of units
  1952. * moved location_* and reference_* to cgobj
  1953. * first things for mmx register allocation
  1954. Revision 1.127 2003/10/09 21:31:37 daniel
  1955. * Register allocator splitted, ans abstract now
  1956. Revision 1.126 2003/10/01 20:34:48 peter
  1957. * procinfo unit contains tprocinfo
  1958. * cginfo renamed to cgbase
  1959. * moved cgmessage to verbose
  1960. * fixed ppc and sparc compiles
  1961. Revision 1.125 2003/09/28 17:55:03 peter
  1962. * parent framepointer changed to hidden parameter
  1963. * tloadparentfpnode added
  1964. Revision 1.124 2003/09/28 13:40:13 peter
  1965. * a_call_ref removed
  1966. Revision 1.123 2003/09/25 21:26:24 peter
  1967. * remove obsolete tparalocation.sp_fixup
  1968. Revision 1.122 2003/09/23 20:37:16 peter
  1969. * fpc_check_object(_ext) has saveregisters and doesn't need
  1970. saving of registers
  1971. Revision 1.121 2003/09/10 08:31:47 marco
  1972. * Patch from Peter for paraloc
  1973. Revision 1.120 2003/09/09 20:59:27 daniel
  1974. * Adding register allocation order
  1975. Revision 1.119 2003/09/07 22:09:34 peter
  1976. * preparations for different default calling conventions
  1977. * various RA fixes
  1978. Revision 1.118 2003/09/03 15:55:00 peter
  1979. * NEWRA branch merged
  1980. Revision 1.117 2003/09/03 11:18:36 florian
  1981. * fixed arm concatcopy
  1982. + arm support in the common compiler sources added
  1983. * moved some generic cg code around
  1984. + tfputype added
  1985. * ...
  1986. Revision 1.116.2.4 2003/08/29 17:28:59 peter
  1987. * next batch of updates
  1988. Revision 1.116.2.3 2003/08/28 18:35:07 peter
  1989. * tregister changed to cardinal
  1990. Revision 1.116.2.2 2003/08/27 20:23:55 peter
  1991. * remove old ra code
  1992. Revision 1.116.2.1 2003/08/27 19:55:54 peter
  1993. * first tregister patch
  1994. Revision 1.116 2003/08/17 16:59:20 jonas
  1995. * fixed regvars so they work with newra (at least for ppc)
  1996. * fixed some volatile register bugs
  1997. + -dnotranslation option for -dnewra, which causes the registers not to
  1998. be translated from virtual to normal registers. Requires support in
  1999. the assembler writer as well, which is only implemented in aggas/
  2000. agppcgas currently
  2001. Revision 1.115 2003/07/23 11:01:14 jonas
  2002. * several rg.allocexplicitregistersint/rg.deallocexplicitregistersint
  2003. pairs round calls to helpers
  2004. Revision 1.114 2003/07/06 17:58:22 peter
  2005. * framepointer fixes for sparc
  2006. * parent framepointer code more generic
  2007. Revision 1.113 2003/07/02 22:18:04 peter
  2008. * paraloc splitted in callerparaloc,calleeparaloc
  2009. * sparc calling convention updates
  2010. Revision 1.112 2003/06/13 21:19:30 peter
  2011. * current_procdef removed, use current_procinfo.procdef instead
  2012. Revision 1.111 2003/06/12 21:11:10 peter
  2013. * ungetregisterfpu gets size parameter
  2014. Revision 1.110 2003/06/12 16:43:07 peter
  2015. * newra compiles for sparc
  2016. Revision 1.109 2003/06/07 18:57:04 jonas
  2017. + added freeintparaloc
  2018. * ppc get/freeintparaloc now check whether the parameter regs are
  2019. properly allocated/deallocated (and get an extra list para)
  2020. * ppc a_call_* now internalerrors if pi_do_call is not yet set
  2021. * fixed lot of missing pi_do_call's
  2022. Revision 1.108 2003/06/06 14:43:02 peter
  2023. * g_copyopenarrayvalue gets length reference
  2024. * don't copy open arrays for cdecl
  2025. Revision 1.107 2003/06/03 21:11:09 peter
  2026. * cg.a_load_* get a from and to size specifier
  2027. * makeregsize only accepts newregister
  2028. * i386 uses generic tcgnotnode,tcgunaryminus
  2029. Revision 1.106 2003/06/03 13:01:59 daniel
  2030. * Register allocator finished
  2031. Revision 1.105 2003/06/01 21:38:06 peter
  2032. * getregisterfpu size parameter added
  2033. * op_const_reg size parameter added
  2034. * sparc updates
  2035. Revision 1.104 2003/06/01 01:02:39 peter
  2036. * generic a_call_ref
  2037. Revision 1.103 2003/05/30 23:57:08 peter
  2038. * more sparc cleanup
  2039. * accumulator removed, splitted in function_return_reg (called) and
  2040. function_result_reg (caller)
  2041. Revision 1.102 2003/05/30 23:49:18 jonas
  2042. * a_load_loc_reg now has an extra size parameter for the destination
  2043. register (properly fixes what I worked around in revision 1.106 of
  2044. ncgutil.pas)
  2045. Revision 1.101 2003/05/30 21:40:00 jonas
  2046. * fixed bug in a_load_loc_ref (the source instead of dest size was passed
  2047. to a_load_reg_ref in case of a register)
  2048. Revision 1.100 2003/05/30 12:36:13 jonas
  2049. * use as little different registers on the ppc until newra is released,
  2050. since every used register must be saved
  2051. Revision 1.99 2003/05/23 14:27:35 peter
  2052. * remove some unit dependencies
  2053. * current_procinfo changes to store more info
  2054. Revision 1.98 2003/05/15 18:58:53 peter
  2055. * removed selfpointer_offset, vmtpointer_offset
  2056. * tvarsym.adjusted_address
  2057. * address in localsymtable is now in the real direction
  2058. * removed some obsolete globals
  2059. Revision 1.97 2003/05/13 19:14:41 peter
  2060. * failn removed
  2061. * inherited result code check moven to pexpr
  2062. Revision 1.96 2003/05/11 21:37:03 peter
  2063. * moved implicit exception frame from ncgutil to psub
  2064. * constructor/destructor helpers moved from cobj/ncgutil to psub
  2065. Revision 1.95 2003/05/09 17:47:02 peter
  2066. * self moved to hidden parameter
  2067. * removed hdisposen,hnewn,selfn
  2068. Revision 1.94 2003/05/01 12:23:46 jonas
  2069. * fix for op_reg_reg_reg in case the destination is the same as the first
  2070. source register
  2071. Revision 1.93 2003/04/29 07:28:52 michael
  2072. + Patch from peter to fix wrong pushing of ansistring function results in open array
  2073. Revision 1.92 2003/04/27 11:21:32 peter
  2074. * aktprocdef renamed to current_procinfo.procdef
  2075. * procinfo renamed to current_procinfo
  2076. * procinfo will now be stored in current_module so it can be
  2077. cleaned up properly
  2078. * gen_main_procsym changed to create_main_proc and release_main_proc
  2079. to also generate a tprocinfo structure
  2080. * fixed unit implicit initfinal
  2081. Revision 1.91 2003/04/27 07:29:50 peter
  2082. * current_procinfo.procdef cleanup, current_procdef is now always nil when parsing
  2083. a new procdef declaration
  2084. * aktprocsym removed
  2085. * lexlevel removed, use symtable.symtablelevel instead
  2086. * implicit init/final code uses the normal genentry/genexit
  2087. * funcret state checking updated for new funcret handling
  2088. Revision 1.90 2003/04/26 20:57:17 florian
  2089. * fixed para locations of fpc_class_new helper call
  2090. Revision 1.89 2003/04/26 17:21:08 florian
  2091. * fixed passing of fpu values by fpu register
  2092. Revision 1.88 2003/04/23 20:16:03 peter
  2093. + added currency support based on int64
  2094. + is_64bit for use in cg units instead of is_64bitint
  2095. * removed cgmessage from n386add, replace with internalerrors
  2096. Revision 1.87 2003/04/23 14:42:07 daniel
  2097. * Further register allocator work. Compiler now smaller with new
  2098. allocator than without.
  2099. * Somebody forgot to adjust ppu version number
  2100. Revision 1.86 2003/04/23 13:20:34 peter
  2101. * fix self passing to fpc_help_fail
  2102. Revision 1.85 2003/04/23 12:35:34 florian
  2103. * fixed several issues with powerpc
  2104. + applied a patch from Jonas for nested function calls (PowerPC only)
  2105. * ...
  2106. Revision 1.84 2003/04/22 14:33:38 peter
  2107. * removed some notes/hints
  2108. Revision 1.83 2003/04/22 13:47:08 peter
  2109. * fixed C style array of const
  2110. * fixed C array passing
  2111. * fixed left to right with high parameters
  2112. Revision 1.82 2003/04/22 10:09:34 daniel
  2113. + Implemented the actual register allocator
  2114. + Scratch registers unavailable when new register allocator used
  2115. + maybe_save/maybe_restore unavailable when new register allocator used
  2116. Revision 1.81 2003/04/06 21:11:23 olle
  2117. * changed newasmsymbol to newasmsymboldata for data symbols
  2118. Revision 1.80 2003/03/28 19:16:56 peter
  2119. * generic constructor working for i386
  2120. * remove fixed self register
  2121. * esi added as address register for i386
  2122. Revision 1.79 2003/03/22 18:07:18 jonas
  2123. + add used scratch registers to usedintbyproc for non-i386
  2124. Revision 1.78 2003/03/11 21:46:24 jonas
  2125. * lots of new regallocator fixes, both in generic and ppc-specific code
  2126. (ppc compiler still can't compile the linux system unit though)
  2127. Revision 1.77 2003/02/19 22:00:14 daniel
  2128. * Code generator converted to new register notation
  2129. - Horribily outdated todo.txt removed
  2130. Revision 1.76 2003/01/31 22:47:48 peter
  2131. * maybe_testself now really uses the passed register
  2132. Revision 1.75 2003/01/30 21:46:35 peter
  2133. * maybe_testvmt added
  2134. Revision 1.74 2003/01/17 12:45:40 daniel
  2135. * Fixed internalerror 200301081 problem
  2136. Revision 1.73 2003/01/13 14:54:34 daniel
  2137. * Further work to convert codegenerator register convention;
  2138. internalerror bug fixed.
  2139. Revision 1.72 2003/01/09 22:00:53 florian
  2140. * fixed some PowerPC issues
  2141. Revision 1.71 2003/01/09 20:41:10 florian
  2142. * fixed broken PowerPC compiler
  2143. Revision 1.70 2003/01/08 18:43:56 daniel
  2144. * Tregister changed into a record
  2145. Revision 1.69 2002/12/24 15:56:50 peter
  2146. * stackpointer_alloc added for adjusting ESP. Win32 needs
  2147. this for the pageprotection
  2148. Revision 1.68 2002/12/20 18:14:04 peter
  2149. * removed some runerror and writeln
  2150. Revision 1.67 2002/12/14 15:02:03 carl
  2151. * maxoperands -> max_operands (for portability in rautils.pas)
  2152. * fix some range-check errors with loadconst
  2153. + add ncgadd unit to m68k
  2154. * some bugfix of a_param_reg with LOC_CREFERENCE
  2155. Revision 1.66 2002/11/25 17:43:16 peter
  2156. * splitted defbase in defutil,symutil,defcmp
  2157. * merged isconvertable and is_equal into compare_defs(_ext)
  2158. * made operator search faster by walking the list only once
  2159. Revision 1.65 2002/11/17 16:27:31 carl
  2160. * document flags2reg
  2161. Revision 1.64 2002/11/16 17:06:28 peter
  2162. * return error 210 for failed self test
  2163. Revision 1.63 2002/11/15 01:58:46 peter
  2164. * merged changes from 1.0.7 up to 04-11
  2165. - -V option for generating bug report tracing
  2166. - more tracing for option parsing
  2167. - errors for cdecl and high()
  2168. - win32 import stabs
  2169. - win32 records<=8 are returned in eax:edx (turned off by default)
  2170. - heaptrc update
  2171. - more info for temp management in .s file with EXTDEBUG
  2172. Revision 1.62 2002/10/16 19:01:43 peter
  2173. + $IMPLICITEXCEPTIONS switch to turn on/off generation of the
  2174. implicit exception frames for procedures with initialized variables
  2175. and for constructors. The default is on for compatibility
  2176. Revision 1.61 2002/10/05 12:43:23 carl
  2177. * fixes for Delphi 6 compilation
  2178. (warning : Some features do not work under Delphi)
  2179. Revision 1.60 2002/10/02 18:20:52 peter
  2180. * Copy() is now internal syssym that calls compilerprocs
  2181. Revision 1.59 2002/09/17 18:54:02 jonas
  2182. * a_load_reg_reg() now has two size parameters: source and dest. This
  2183. allows some optimizations on architectures that don't encode the
  2184. register size in the register name.
  2185. Revision 1.58 2002/09/09 19:29:29 peter
  2186. * fixed dynarr_decr_ref call
  2187. Revision 1.57 2002/09/07 15:25:01 peter
  2188. * old logs removed and tabs fixed
  2189. Revision 1.56 2002/09/01 21:04:47 florian
  2190. * several powerpc related stuff fixed
  2191. Revision 1.55 2002/09/01 17:05:43 florian
  2192. + added abstract tcg.g_removevaluepara_openarray
  2193. Revision 1.54 2002/09/01 12:09:27 peter
  2194. + a_call_reg, a_call_loc added
  2195. * removed exprasmlist references
  2196. Revision 1.53 2002/08/19 18:17:48 carl
  2197. + optimize64_op_const_reg implemented (optimizes 64-bit constant opcodes)
  2198. * more fixes to m68k for 64-bit operations
  2199. Revision 1.52 2002/08/17 22:09:43 florian
  2200. * result type handling in tcgcal.pass_2 overhauled
  2201. * better tnode.dowrite
  2202. * some ppc stuff fixed
  2203. Revision 1.51 2002/08/17 09:23:33 florian
  2204. * first part of procinfo rewrite
  2205. Revision 1.50 2002/08/16 14:24:57 carl
  2206. * issameref() to test if two references are the same (then emit no opcodes)
  2207. + ret_in_reg to replace ret_in_acc
  2208. (fix some register allocation bugs at the same time)
  2209. + save_std_register now has an extra parameter which is the
  2210. usedinproc registers
  2211. Revision 1.49 2002/08/15 08:13:54 carl
  2212. - a_load_sym_ofs_reg removed
  2213. * loadvmt now calls loadaddr_ref_reg instead
  2214. Revision 1.48 2002/08/14 19:26:02 carl
  2215. + routine to optimize opcodes with constants
  2216. Revision 1.47 2002/08/11 14:32:26 peter
  2217. * renamed current_library to objectlibrary
  2218. Revision 1.46 2002/08/11 13:24:11 peter
  2219. * saving of asmsymbols in ppu supported
  2220. * asmsymbollist global is removed and moved into a new class
  2221. tasmlibrarydata that will hold the info of a .a file which
  2222. corresponds with a single module. Added librarydata to tmodule
  2223. to keep the library info stored for the module. In the future the
  2224. objectfiles will also be stored to the tasmlibrarydata class
  2225. * all getlabel/newasmsymbol and friends are moved to the new class
  2226. Revision 1.45 2002/08/10 17:15:20 jonas
  2227. * register parameters are now LOC_CREGISTER instead of LOC_REGISTER
  2228. Revision 1.44 2002/08/09 19:10:05 carl
  2229. - moved new_exception and free_exception to ncgutils
  2230. Revision 1.43 2002/08/05 18:27:48 carl
  2231. + more more more documentation
  2232. + first version include/exclude (can't test though, not enough scratch for i386 :()...
  2233. Revision 1.42 2002/08/04 19:08:21 carl
  2234. + added generic exception support (still does not work!)
  2235. + more documentation
  2236. Revision 1.41 2002/07/30 20:50:43 florian
  2237. * the code generator knows now if parameters are in registers
  2238. Revision 1.40 2002/07/29 21:16:02 florian
  2239. * some more ppc fixes
  2240. Revision 1.39 2002/07/28 15:56:00 jonas
  2241. + tcg64.a_op64_const_reg_reg() and tcg64.a_op64_reg_reg_reg() methods +
  2242. generic implementation
  2243. Revision 1.38 2002/07/27 19:53:51 jonas
  2244. + generic implementation of tcg.g_flags2ref()
  2245. * tcg.flags2xxx() now also needs a size parameter
  2246. Revision 1.37 2002/07/20 11:57:53 florian
  2247. * types.pas renamed to defbase.pas because D6 contains a types
  2248. unit so this would conflicts if D6 programms are compiled
  2249. + Willamette/SSE2 instructions to assembler added
  2250. }