cgcpu.pas 67 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_load_reg_cgpara(list : TAsmList; size : tcgsize;r : tregister; const cgpara : tcgpara);override;
  40. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  41. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_name(list : TAsmList;const s : string); override;
  58. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  59. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  60. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  61. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  62. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  63. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  64. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  65. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  66. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  67. procedure g_save_registers(list : TAsmList);override;
  68. procedure g_restore_registers(list : TAsmList);override;
  69. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  70. procedure fixref(list : TAsmList;var ref : treference);
  71. function normalize_ref(list : TAsmList;ref : treference;
  72. tmpreg : tregister) : treference;
  73. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  74. procedure g_stackpointer_alloc(list : TAsmList;size : longint);override;
  75. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  76. procedure a_adjust_sp(list: TAsmList; value: longint);
  77. function GetLoad(const ref : treference) : tasmop;
  78. function GetStore(const ref: treference): tasmop;
  79. procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: TCGSize; src, dst: TRegister); override;
  80. protected
  81. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  82. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  83. end;
  84. tcg64favr = class(tcg64f32)
  85. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  86. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  87. end;
  88. procedure create_codegen;
  89. const
  90. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  91. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  92. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  93. implementation
  94. uses
  95. globals,verbose,systems,cutils,
  96. fmodule,
  97. symconst,symsym,symtable,
  98. tgobj,rgobj,
  99. procinfo,cpupi,
  100. paramgr;
  101. procedure tcgavr.init_register_allocators;
  102. begin
  103. inherited init_register_allocators;
  104. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  105. [RS_R8,RS_R9,
  106. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  107. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  108. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7],first_int_imreg,[]);
  109. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  110. [RS_R26,RS_R30],first_int_imreg,[]); }
  111. end;
  112. procedure tcgavr.done_register_allocators;
  113. begin
  114. rg[R_INTREGISTER].free;
  115. // rg[R_ADDRESSREGISTER].free;
  116. inherited done_register_allocators;
  117. end;
  118. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  119. var
  120. tmp1,tmp2,tmp3 : TRegister;
  121. begin
  122. case size of
  123. OS_8,OS_S8:
  124. Result:=inherited getintregister(list, size);
  125. OS_16,OS_S16:
  126. begin
  127. Result:=inherited getintregister(list, OS_8);
  128. { ensure that the high register can be retrieved by
  129. GetNextReg
  130. }
  131. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  132. internalerror(2011021331);
  133. end;
  134. OS_32,OS_S32:
  135. begin
  136. Result:=inherited getintregister(list, OS_8);
  137. tmp1:=inherited getintregister(list, OS_8);
  138. { ensure that the high register can be retrieved by
  139. GetNextReg
  140. }
  141. if tmp1<>GetNextReg(Result) then
  142. internalerror(2011021332);
  143. tmp2:=inherited getintregister(list, OS_8);
  144. { ensure that the upper register can be retrieved by
  145. GetNextReg
  146. }
  147. if tmp2<>GetNextReg(tmp1) then
  148. internalerror(2011021333);
  149. tmp3:=inherited getintregister(list, OS_8);
  150. { ensure that the upper register can be retrieved by
  151. GetNextReg
  152. }
  153. if tmp3<>GetNextReg(tmp2) then
  154. internalerror(2011021334);
  155. end;
  156. else
  157. internalerror(2011021330);
  158. end;
  159. end;
  160. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  161. begin
  162. Result:=getintregister(list,OS_ADDR);
  163. end;
  164. procedure tcgavr.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);
  165. procedure load_para_loc(r : TRegister;paraloc : PCGParaLocation);
  166. var
  167. ref : treference;
  168. begin
  169. paramanager.allocparaloc(list,paraloc);
  170. case paraloc^.loc of
  171. LOC_REGISTER,LOC_CREGISTER:
  172. a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
  173. LOC_REFERENCE,LOC_CREFERENCE:
  174. begin
  175. reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2);
  176. a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
  177. end;
  178. else
  179. internalerror(2002071004);
  180. end;
  181. end;
  182. var
  183. i, i2 : longint;
  184. hp : PCGParaLocation;
  185. begin
  186. { if use_push(cgpara) then
  187. begin
  188. if tcgsize2size[cgpara.Size] > 2 then
  189. begin
  190. if tcgsize2size[cgpara.Size] <> 4 then
  191. internalerror(2013031101);
  192. if cgpara.location^.Next = nil then
  193. begin
  194. if tcgsize2size[cgpara.location^.size] <> 4 then
  195. internalerror(2013031101);
  196. end
  197. else
  198. begin
  199. if tcgsize2size[cgpara.location^.size] <> 2 then
  200. internalerror(2013031101);
  201. if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
  202. internalerror(2013031101);
  203. if cgpara.location^.Next^.Next <> nil then
  204. internalerror(2013031101);
  205. end;
  206. if tcgsize2size[cgpara.size]>cgpara.alignment then
  207. pushsize:=cgpara.size
  208. else
  209. pushsize:=int_cgsize(cgpara.alignment);
  210. pushsize2 := int_cgsize(tcgsize2size[pushsize] - 2);
  211. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize2],makeregsize(list,GetNextReg(r),pushsize2)));
  212. list.concat(taicpu.op_reg(A_PUSH,S_W,makeregsize(list,r,OS_16)));
  213. end
  214. else
  215. begin
  216. cgpara.check_simple_location;
  217. if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
  218. pushsize:=cgpara.location^.size
  219. else
  220. pushsize:=int_cgsize(cgpara.alignment);
  221. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize],makeregsize(list,r,pushsize)));
  222. end;
  223. end
  224. else }
  225. begin
  226. if not(tcgsize2size[cgpara.Size] in [1..4]) then
  227. internalerror(2014011101);
  228. hp:=cgpara.location;
  229. i:=0;
  230. while i<tcgsize2size[cgpara.Size] do
  231. begin
  232. if not(assigned(hp)) then
  233. internalerror(2014011102);
  234. inc(i, tcgsize2size[hp^.Size]);
  235. if hp^.Loc=LOC_REGISTER then
  236. begin
  237. load_para_loc(r,hp);
  238. hp:=hp^.Next;
  239. r:=GetNextReg(r);
  240. end
  241. else
  242. begin
  243. load_para_loc(r,hp);
  244. for i2:=1 to tcgsize2size[hp^.Size] do
  245. r:=GetNextReg(r);
  246. hp:=hp^.Next;
  247. end;
  248. end;
  249. if assigned(hp) then
  250. internalerror(2014011103);
  251. end;
  252. end;
  253. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  254. var
  255. i : longint;
  256. hp : PCGParaLocation;
  257. begin
  258. if not(tcgsize2size[paraloc.Size] in [1..4]) then
  259. internalerror(2014011101);
  260. hp:=paraloc.location;
  261. for i:=1 to tcgsize2size[paraloc.Size] do
  262. begin
  263. if not(assigned(hp)) or
  264. (tcgsize2size[hp^.size]<>1) or
  265. (hp^.shiftval<>0) then
  266. internalerror(2014011105);
  267. case hp^.loc of
  268. LOC_REGISTER,LOC_CREGISTER:
  269. a_load_const_reg(list,hp^.size,(a shr (i-1)) and $ff,hp^.register);
  270. LOC_REFERENCE,LOC_CREFERENCE:
  271. begin
  272. list.concat(taicpu.op_const(A_PUSH,(a shr (i-1)) and $ff));
  273. end;
  274. else
  275. internalerror(2002071004);
  276. end;
  277. hp:=hp^.Next;
  278. end;
  279. if assigned(hp) then
  280. internalerror(2014011104);
  281. end;
  282. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  283. var
  284. tmpref, ref: treference;
  285. location: pcgparalocation;
  286. sizeleft: tcgint;
  287. begin
  288. location := paraloc.location;
  289. tmpref := r;
  290. sizeleft := paraloc.intsize;
  291. while assigned(location) do
  292. begin
  293. paramanager.allocparaloc(list,location);
  294. case location^.loc of
  295. LOC_REGISTER,LOC_CREGISTER:
  296. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  297. LOC_REFERENCE:
  298. begin
  299. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  300. { doubles in softemu mode have a strange order of registers and references }
  301. if location^.size=OS_32 then
  302. g_concatcopy(list,tmpref,ref,4)
  303. else
  304. begin
  305. g_concatcopy(list,tmpref,ref,sizeleft);
  306. if assigned(location^.next) then
  307. internalerror(2005010710);
  308. end;
  309. end;
  310. LOC_VOID:
  311. begin
  312. // nothing to do
  313. end;
  314. else
  315. internalerror(2002081103);
  316. end;
  317. inc(tmpref.offset,tcgsize2size[location^.size]);
  318. dec(sizeleft,tcgsize2size[location^.size]);
  319. location := location^.next;
  320. end;
  321. end;
  322. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  323. var
  324. tmpreg: tregister;
  325. begin
  326. tmpreg:=getaddressregister(list);
  327. a_loadaddr_ref_reg(list,r,tmpreg);
  328. a_load_reg_cgpara(list,OS_ADDR,tmpreg,paraloc);
  329. end;
  330. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  331. begin
  332. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  333. {
  334. the compiler does not properly set this flag anymore in pass 1, and
  335. for now we only need it after pass 2 (I hope) (JM)
  336. if not(pi_do_call in current_procinfo.flags) then
  337. internalerror(2003060703);
  338. }
  339. include(current_procinfo.flags,pi_do_call);
  340. end;
  341. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  342. begin
  343. a_reg_alloc(list,NR_ZLO);
  344. a_reg_alloc(list,NR_ZHI);
  345. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  346. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  347. list.concat(taicpu.op_none(A_ICALL));
  348. a_reg_dealloc(list,NR_ZLO);
  349. a_reg_dealloc(list,NR_ZHI);
  350. include(current_procinfo.flags,pi_do_call);
  351. end;
  352. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  353. begin
  354. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  355. internalerror(2012102403);
  356. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  357. end;
  358. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  359. begin
  360. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  361. internalerror(2012102401);
  362. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  363. end;
  364. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  365. var
  366. countreg,
  367. tmpreg: tregister;
  368. i : integer;
  369. instr : taicpu;
  370. paraloc1,paraloc2,paraloc3 : TCGPara;
  371. l1,l2 : tasmlabel;
  372. pd : tprocdef;
  373. procedure NextSrcDst;
  374. begin
  375. if i=5 then
  376. begin
  377. dst:=dsthi;
  378. src:=srchi;
  379. end
  380. else
  381. begin
  382. dst:=GetNextReg(dst);
  383. src:=GetNextReg(src);
  384. end;
  385. end;
  386. { iterates TmpReg through all registers of dst }
  387. procedure NextTmp;
  388. begin
  389. if i=5 then
  390. tmpreg:=dsthi
  391. else
  392. tmpreg:=GetNextReg(tmpreg);
  393. end;
  394. begin
  395. case op of
  396. OP_ADD:
  397. begin
  398. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  399. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  400. begin
  401. for i:=2 to tcgsize2size[size] do
  402. begin
  403. NextSrcDst;
  404. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  405. end;
  406. end;
  407. end;
  408. OP_SUB:
  409. begin
  410. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  411. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  412. begin
  413. for i:=2 to tcgsize2size[size] do
  414. begin
  415. NextSrcDst;
  416. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  417. end;
  418. end;
  419. end;
  420. OP_NEG:
  421. begin
  422. if src<>dst then
  423. begin
  424. if size in [OS_S64,OS_64] then
  425. begin
  426. a_load_reg_reg(list,OS_32,OS_32,src,dst);
  427. a_load_reg_reg(list,OS_32,OS_32,srchi,dsthi);
  428. end
  429. else
  430. a_load_reg_reg(list,size,size,src,dst);
  431. end;
  432. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  433. begin
  434. tmpreg:=GetNextReg(dst);
  435. for i:=2 to tcgsize2size[size] do
  436. begin
  437. list.concat(taicpu.op_reg(A_COM,tmpreg));
  438. NextTmp;
  439. end;
  440. list.concat(taicpu.op_reg(A_NEG,dst));
  441. tmpreg:=GetNextReg(dst);
  442. for i:=2 to tcgsize2size[size] do
  443. begin
  444. list.concat(taicpu.op_reg_const(A_SBCI,tmpreg,-1));
  445. NextTmp;
  446. end;
  447. end;
  448. end;
  449. OP_NOT:
  450. begin
  451. for i:=1 to tcgsize2size[size] do
  452. begin
  453. if src<>dst then
  454. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  455. list.concat(taicpu.op_reg(A_COM,dst));
  456. NextSrcDst;
  457. end;
  458. end;
  459. OP_MUL,OP_IMUL:
  460. begin
  461. if size in [OS_8,OS_S8] then
  462. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  463. else if size=OS_16 then
  464. begin
  465. pd:=search_system_proc('fpc_mul_word');
  466. paraloc1.init;
  467. paraloc2.init;
  468. paraloc3.init;
  469. paramanager.getintparaloc(pd,1,paraloc1);
  470. paramanager.getintparaloc(pd,2,paraloc2);
  471. paramanager.getintparaloc(pd,3,paraloc3);
  472. a_load_const_cgpara(list,OS_8,0,paraloc3);
  473. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  474. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  475. paramanager.freecgpara(list,paraloc3);
  476. paramanager.freecgpara(list,paraloc2);
  477. paramanager.freecgpara(list,paraloc1);
  478. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  479. a_call_name(list,'FPC_MUL_WORD',false);
  480. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  481. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  482. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  483. paraloc3.done;
  484. paraloc2.done;
  485. paraloc1.done;
  486. end
  487. else
  488. internalerror(2011022002);
  489. end;
  490. OP_DIV,OP_IDIV:
  491. { special stuff, needs separate handling inside code }
  492. { generator }
  493. internalerror(2011022001);
  494. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  495. begin
  496. current_asmdata.getjumplabel(l1);
  497. current_asmdata.getjumplabel(l2);
  498. countreg:=getintregister(list,OS_8);
  499. a_load_reg_reg(list,size,OS_8,src,countreg);
  500. list.concat(taicpu.op_reg_const(A_CPI,countreg,0));
  501. a_jmp_flags(list,F_EQ,l2);
  502. cg.a_label(list,l1);
  503. case op of
  504. OP_SHR:
  505. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  506. OP_SHL:
  507. list.concat(taicpu.op_reg(A_LSL,dst));
  508. OP_SAR:
  509. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  510. OP_ROR:
  511. begin
  512. { load carry? }
  513. if not(size in [OS_8,OS_S8]) then
  514. begin
  515. list.concat(taicpu.op_none(A_CLC));
  516. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  517. list.concat(taicpu.op_none(A_SEC));
  518. end;
  519. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  520. end;
  521. OP_ROL:
  522. begin
  523. { load carry? }
  524. if not(size in [OS_8,OS_S8]) then
  525. begin
  526. list.concat(taicpu.op_none(A_CLC));
  527. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  528. list.concat(taicpu.op_none(A_SEC));
  529. end;
  530. list.concat(taicpu.op_reg(A_ROL,dst))
  531. end;
  532. else
  533. internalerror(2011030901);
  534. end;
  535. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  536. begin
  537. for i:=2 to tcgsize2size[size] do
  538. begin
  539. case op of
  540. OP_ROR,
  541. OP_SHR:
  542. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  543. OP_ROL,
  544. OP_SHL:
  545. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  546. OP_SAR:
  547. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  548. else
  549. internalerror(2011030902);
  550. end;
  551. end;
  552. end;
  553. a_op_const_reg(list,OP_SUB,OS_8,1,countreg);
  554. a_jmp_flags(list,F_NE,l1);
  555. // keep registers alive
  556. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  557. cg.a_label(list,l2);
  558. end;
  559. OP_AND,OP_OR,OP_XOR:
  560. begin
  561. for i:=1 to tcgsize2size[size] do
  562. begin
  563. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  564. NextSrcDst;
  565. end;
  566. end;
  567. else
  568. internalerror(2011022004);
  569. end;
  570. end;
  571. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  572. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  573. var
  574. mask : qword;
  575. shift : byte;
  576. i : byte;
  577. tmpreg : tregister;
  578. tmpreg64 : tregister64;
  579. procedure NextReg;
  580. begin
  581. if i=5 then
  582. reg:=reghi
  583. else
  584. reg:=GetNextReg(reg);
  585. end;
  586. begin
  587. mask:=$ff;
  588. shift:=0;
  589. case op of
  590. OP_OR:
  591. begin
  592. for i:=1 to tcgsize2size[size] do
  593. begin
  594. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  595. NextReg;
  596. mask:=mask shl 8;
  597. inc(shift,8);
  598. end;
  599. end;
  600. OP_AND:
  601. begin
  602. for i:=1 to tcgsize2size[size] do
  603. begin
  604. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  605. NextReg;
  606. mask:=mask shl 8;
  607. inc(shift,8);
  608. end;
  609. end;
  610. OP_SUB:
  611. begin
  612. list.concat(taicpu.op_reg_const(A_SUBI,reg,a and mask));
  613. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  614. begin
  615. for i:=2 to tcgsize2size[size] do
  616. begin
  617. NextReg;
  618. mask:=mask shl 8;
  619. inc(shift,8);
  620. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  621. end;
  622. end;
  623. end;
  624. {OP_ADD:
  625. begin
  626. list.concat(taicpu.op_reg_const(A_SUBI,reg,(-a) and mask));
  627. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  628. begin
  629. for i:=2 to tcgsize2size[size] do
  630. begin
  631. NextReg;
  632. mask:=mask shl 8;
  633. inc(shift,8);
  634. list.concat(taicpu.op_reg_const(A_ADC,reg,(a and mask) shr shift));
  635. end;
  636. end;
  637. end; }
  638. else
  639. begin
  640. if size in [OS_64,OS_S64] then
  641. begin
  642. tmpreg64.reglo:=getintregister(list,OS_32);
  643. tmpreg64.reghi:=getintregister(list,OS_32);
  644. cg64.a_load64_const_reg(list,a,tmpreg64);
  645. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  646. end
  647. else
  648. begin
  649. tmpreg:=getintregister(list,size);
  650. a_load_const_reg(list,size,a,tmpreg);
  651. a_op_reg_reg(list,op,size,tmpreg,reg);
  652. end;
  653. end;
  654. end;
  655. end;
  656. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  657. var
  658. mask : qword;
  659. shift : byte;
  660. i : byte;
  661. begin
  662. mask:=$ff;
  663. shift:=0;
  664. for i:=1 to tcgsize2size[size] do
  665. begin
  666. if ((qword(a) and mask) shr shift)=0 then
  667. emit_mov(list,reg,NR_R1)
  668. else
  669. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  670. mask:=mask shl 8;
  671. inc(shift,8);
  672. reg:=GetNextReg(reg);
  673. end;
  674. end;
  675. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  676. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  677. begin
  678. { allocate the register only, if a cpu register is passed }
  679. if getsupreg(reg)<first_int_imreg then
  680. getcpuregister(list,reg);
  681. end;
  682. var
  683. tmpref : treference;
  684. l : tasmlabel;
  685. begin
  686. Result:=ref;
  687. if ref.addressmode<>AM_UNCHANGED then
  688. internalerror(2011021701);
  689. { Be sure to have a base register }
  690. if (ref.base=NR_NO) then
  691. begin
  692. { only symbol+offset? }
  693. if ref.index=NR_NO then
  694. exit;
  695. ref.base:=ref.index;
  696. ref.index:=NR_NO;
  697. end;
  698. if assigned(ref.symbol) or (ref.offset<>0) then
  699. begin
  700. reference_reset(tmpref,0);
  701. tmpref.symbol:=ref.symbol;
  702. tmpref.offset:=ref.offset;
  703. tmpref.refaddr:=addr_lo8;
  704. maybegetcpuregister(list,tmpreg);
  705. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  706. tmpref.refaddr:=addr_hi8;
  707. maybegetcpuregister(list,GetNextReg(tmpreg));
  708. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  709. if (ref.base<>NR_NO) then
  710. begin
  711. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  712. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  713. end;
  714. if (ref.index<>NR_NO) then
  715. begin
  716. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  717. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  718. end;
  719. ref.symbol:=nil;
  720. ref.offset:=0;
  721. ref.base:=tmpreg;
  722. ref.index:=NR_NO;
  723. end
  724. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  725. begin
  726. maybegetcpuregister(list,tmpreg);
  727. emit_mov(list,tmpreg,ref.base);
  728. maybegetcpuregister(list,GetNextReg(tmpreg));
  729. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  730. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  731. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  732. ref.base:=tmpreg;
  733. ref.index:=NR_NO;
  734. end
  735. else if (ref.base<>NR_NO) then
  736. begin
  737. maybegetcpuregister(list,tmpreg);
  738. emit_mov(list,tmpreg,ref.base);
  739. maybegetcpuregister(list,GetNextReg(tmpreg));
  740. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  741. ref.base:=tmpreg;
  742. ref.index:=NR_NO;
  743. end
  744. else if (ref.index<>NR_NO) then
  745. begin
  746. maybegetcpuregister(list,tmpreg);
  747. emit_mov(list,tmpreg,ref.index);
  748. maybegetcpuregister(list,GetNextReg(tmpreg));
  749. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  750. ref.base:=tmpreg;
  751. ref.index:=NR_NO;
  752. end;
  753. Result:=ref;
  754. end;
  755. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  756. var
  757. href : treference;
  758. conv_done: boolean;
  759. tmpreg : tregister;
  760. i : integer;
  761. QuickRef : Boolean;
  762. begin
  763. QuickRef:=false;
  764. if not((Ref.addressmode=AM_UNCHANGED) and
  765. (Ref.symbol=nil) and
  766. ((Ref.base=NR_R28) or
  767. (Ref.base=NR_R29)) and
  768. (Ref.Index=NR_No) and
  769. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  770. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  771. href:=normalize_ref(list,Ref,NR_R30)
  772. else
  773. begin
  774. QuickRef:=true;
  775. href:=Ref;
  776. end;
  777. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  778. internalerror(2011021307);
  779. conv_done:=false;
  780. if tosize<>fromsize then
  781. begin
  782. conv_done:=true;
  783. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  784. fromsize:=tosize;
  785. case fromsize of
  786. OS_8:
  787. begin
  788. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  789. href.addressmode:=AM_POSTINCREMENT;
  790. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  791. for i:=2 to tcgsize2size[tosize] do
  792. begin
  793. if QuickRef then
  794. inc(href.offset);
  795. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  796. href.addressmode:=AM_POSTINCREMENT
  797. else
  798. href.addressmode:=AM_UNCHANGED;
  799. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  800. end;
  801. end;
  802. OS_S8:
  803. begin
  804. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  805. href.addressmode:=AM_POSTINCREMENT;
  806. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  807. if tcgsize2size[tosize]>1 then
  808. begin
  809. tmpreg:=getintregister(list,OS_8);
  810. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  811. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  812. list.concat(taicpu.op_reg(A_COM,tmpreg));
  813. for i:=2 to tcgsize2size[tosize] do
  814. begin
  815. if QuickRef then
  816. inc(href.offset);
  817. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  818. href.addressmode:=AM_POSTINCREMENT
  819. else
  820. href.addressmode:=AM_UNCHANGED;
  821. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  822. end;
  823. end;
  824. end;
  825. OS_16:
  826. begin
  827. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  828. href.addressmode:=AM_POSTINCREMENT;
  829. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  830. if QuickRef then
  831. inc(href.offset)
  832. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  833. href.addressmode:=AM_POSTINCREMENT
  834. else
  835. href.addressmode:=AM_UNCHANGED;
  836. reg:=GetNextReg(reg);
  837. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  838. for i:=3 to tcgsize2size[tosize] do
  839. begin
  840. if QuickRef then
  841. inc(href.offset);
  842. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  843. href.addressmode:=AM_POSTINCREMENT
  844. else
  845. href.addressmode:=AM_UNCHANGED;
  846. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  847. end;
  848. end;
  849. OS_S16:
  850. begin
  851. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  852. href.addressmode:=AM_POSTINCREMENT;
  853. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  854. if QuickRef then
  855. inc(href.offset)
  856. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  857. href.addressmode:=AM_POSTINCREMENT
  858. else
  859. href.addressmode:=AM_UNCHANGED;
  860. reg:=GetNextReg(reg);
  861. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  862. if tcgsize2size[tosize]>2 then
  863. begin
  864. tmpreg:=getintregister(list,OS_8);
  865. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  866. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  867. list.concat(taicpu.op_reg(A_COM,tmpreg));
  868. for i:=3 to tcgsize2size[tosize] do
  869. begin
  870. if QuickRef then
  871. inc(href.offset);
  872. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  873. href.addressmode:=AM_POSTINCREMENT
  874. else
  875. href.addressmode:=AM_UNCHANGED;
  876. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  877. end;
  878. end;
  879. end;
  880. else
  881. conv_done:=false;
  882. end;
  883. end;
  884. if not conv_done then
  885. begin
  886. for i:=1 to tcgsize2size[fromsize] do
  887. begin
  888. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  889. href.addressmode:=AM_POSTINCREMENT
  890. else
  891. href.addressmode:=AM_UNCHANGED;
  892. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  893. if QuickRef then
  894. inc(href.offset);
  895. reg:=GetNextReg(reg);
  896. end;
  897. end;
  898. if not(QuickRef) then
  899. begin
  900. ungetcpuregister(list,href.base);
  901. ungetcpuregister(list,GetNextReg(href.base));
  902. end;
  903. end;
  904. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  905. const Ref : treference;reg : tregister);
  906. var
  907. href : treference;
  908. conv_done: boolean;
  909. tmpreg : tregister;
  910. i : integer;
  911. QuickRef : boolean;
  912. begin
  913. QuickRef:=false;
  914. if not((Ref.addressmode=AM_UNCHANGED) and
  915. (Ref.symbol=nil) and
  916. ((Ref.base=NR_R28) or
  917. (Ref.base=NR_R29)) and
  918. (Ref.Index=NR_No) and
  919. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  920. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  921. href:=normalize_ref(list,Ref,NR_R30)
  922. else
  923. begin
  924. QuickRef:=true;
  925. href:=Ref;
  926. end;
  927. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  928. internalerror(2011021307);
  929. conv_done:=false;
  930. if tosize<>fromsize then
  931. begin
  932. conv_done:=true;
  933. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  934. fromsize:=tosize;
  935. case fromsize of
  936. OS_8:
  937. begin
  938. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  939. for i:=2 to tcgsize2size[tosize] do
  940. begin
  941. reg:=GetNextReg(reg);
  942. list.concat(taicpu.op_reg(A_CLR,reg));
  943. end;
  944. end;
  945. OS_S8:
  946. begin
  947. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  948. tmpreg:=reg;
  949. if tcgsize2size[tosize]>1 then
  950. begin
  951. reg:=GetNextReg(reg);
  952. list.concat(taicpu.op_reg(A_CLR,reg));
  953. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  954. list.concat(taicpu.op_reg(A_COM,reg));
  955. tmpreg:=reg;
  956. for i:=3 to tcgsize2size[tosize] do
  957. begin
  958. reg:=GetNextReg(reg);
  959. emit_mov(list,reg,tmpreg);
  960. end;
  961. end;
  962. end;
  963. OS_16:
  964. begin
  965. if not(QuickRef) then
  966. href.addressmode:=AM_POSTINCREMENT;
  967. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  968. if QuickRef then
  969. inc(href.offset);
  970. href.addressmode:=AM_UNCHANGED;
  971. reg:=GetNextReg(reg);
  972. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  973. for i:=3 to tcgsize2size[tosize] do
  974. begin
  975. reg:=GetNextReg(reg);
  976. list.concat(taicpu.op_reg(A_CLR,reg));
  977. end;
  978. end;
  979. OS_S16:
  980. begin
  981. if not(QuickRef) then
  982. href.addressmode:=AM_POSTINCREMENT;
  983. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  984. if QuickRef then
  985. inc(href.offset);
  986. href.addressmode:=AM_UNCHANGED;
  987. reg:=GetNextReg(reg);
  988. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  989. tmpreg:=reg;
  990. reg:=GetNextReg(reg);
  991. list.concat(taicpu.op_reg(A_CLR,reg));
  992. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  993. list.concat(taicpu.op_reg(A_COM,reg));
  994. tmpreg:=reg;
  995. for i:=4 to tcgsize2size[tosize] do
  996. begin
  997. reg:=GetNextReg(reg);
  998. emit_mov(list,reg,tmpreg);
  999. end;
  1000. end;
  1001. else
  1002. conv_done:=false;
  1003. end;
  1004. end;
  1005. if not conv_done then
  1006. begin
  1007. for i:=1 to tcgsize2size[fromsize] do
  1008. begin
  1009. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  1010. href.addressmode:=AM_POSTINCREMENT
  1011. else
  1012. href.addressmode:=AM_UNCHANGED;
  1013. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1014. if QuickRef then
  1015. inc(href.offset);
  1016. reg:=GetNextReg(reg);
  1017. end;
  1018. end;
  1019. if not(QuickRef) then
  1020. begin
  1021. ungetcpuregister(list,href.base);
  1022. ungetcpuregister(list,GetNextReg(href.base));
  1023. end;
  1024. end;
  1025. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  1026. var
  1027. conv_done: boolean;
  1028. tmpreg : tregister;
  1029. i : integer;
  1030. begin
  1031. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  1032. internalerror(2011021310);
  1033. conv_done:=false;
  1034. if tosize<>fromsize then
  1035. begin
  1036. conv_done:=true;
  1037. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  1038. fromsize:=tosize;
  1039. case fromsize of
  1040. OS_8:
  1041. begin
  1042. emit_mov(list,reg2,reg1);
  1043. for i:=2 to tcgsize2size[tosize] do
  1044. begin
  1045. reg2:=GetNextReg(reg2);
  1046. list.concat(taicpu.op_reg(A_CLR,reg2));
  1047. end;
  1048. end;
  1049. OS_S8:
  1050. begin
  1051. emit_mov(list,reg2,reg1);
  1052. if tcgsize2size[tosize]>1 then
  1053. begin
  1054. reg2:=GetNextReg(reg2);
  1055. list.concat(taicpu.op_reg(A_CLR,reg2));
  1056. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1057. list.concat(taicpu.op_reg(A_COM,reg2));
  1058. tmpreg:=reg2;
  1059. for i:=3 to tcgsize2size[tosize] do
  1060. begin
  1061. reg2:=GetNextReg(reg2);
  1062. emit_mov(list,reg2,tmpreg);
  1063. end;
  1064. end;
  1065. end;
  1066. OS_16:
  1067. begin
  1068. emit_mov(list,reg2,reg1);
  1069. reg1:=GetNextReg(reg1);
  1070. reg2:=GetNextReg(reg2);
  1071. emit_mov(list,reg2,reg1);
  1072. for i:=3 to tcgsize2size[tosize] do
  1073. begin
  1074. reg2:=GetNextReg(reg2);
  1075. list.concat(taicpu.op_reg(A_CLR,reg2));
  1076. end;
  1077. end;
  1078. OS_S16:
  1079. begin
  1080. emit_mov(list,reg2,reg1);
  1081. reg1:=GetNextReg(reg1);
  1082. reg2:=GetNextReg(reg2);
  1083. emit_mov(list,reg2,reg1);
  1084. if tcgsize2size[tosize]>2 then
  1085. begin
  1086. reg2:=GetNextReg(reg2);
  1087. list.concat(taicpu.op_reg(A_CLR,reg2));
  1088. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1089. list.concat(taicpu.op_reg(A_COM,reg2));
  1090. tmpreg:=reg2;
  1091. for i:=4 to tcgsize2size[tosize] do
  1092. begin
  1093. reg2:=GetNextReg(reg2);
  1094. emit_mov(list,reg2,tmpreg);
  1095. end;
  1096. end;
  1097. end;
  1098. else
  1099. conv_done:=false;
  1100. end;
  1101. end;
  1102. if not conv_done and (reg1<>reg2) then
  1103. begin
  1104. for i:=1 to tcgsize2size[fromsize] do
  1105. begin
  1106. emit_mov(list,reg2,reg1);
  1107. reg1:=GetNextReg(reg1);
  1108. reg2:=GetNextReg(reg2);
  1109. end;
  1110. end;
  1111. end;
  1112. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1113. begin
  1114. internalerror(2012010702);
  1115. end;
  1116. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1117. begin
  1118. internalerror(2012010703);
  1119. end;
  1120. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1121. begin
  1122. internalerror(2012010704);
  1123. end;
  1124. { comparison operations }
  1125. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1126. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1127. var
  1128. swapped : boolean;
  1129. tmpreg : tregister;
  1130. i : byte;
  1131. begin
  1132. if a=0 then
  1133. begin
  1134. swapped:=false;
  1135. { swap parameters? }
  1136. case cmp_op of
  1137. OC_GT:
  1138. begin
  1139. swapped:=true;
  1140. cmp_op:=OC_LT;
  1141. end;
  1142. OC_LTE:
  1143. begin
  1144. swapped:=true;
  1145. cmp_op:=OC_GTE;
  1146. end;
  1147. OC_BE:
  1148. begin
  1149. swapped:=true;
  1150. cmp_op:=OC_AE;
  1151. end;
  1152. OC_A:
  1153. begin
  1154. swapped:=true;
  1155. cmp_op:=OC_B;
  1156. end;
  1157. end;
  1158. if swapped then
  1159. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1160. else
  1161. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1162. for i:=2 to tcgsize2size[size] do
  1163. begin
  1164. reg:=GetNextReg(reg);
  1165. if swapped then
  1166. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1167. else
  1168. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1169. end;
  1170. a_jmp_cond(list,cmp_op,l);
  1171. end
  1172. else
  1173. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1174. end;
  1175. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1176. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1177. var
  1178. swapped : boolean;
  1179. tmpreg : tregister;
  1180. i : byte;
  1181. begin
  1182. swapped:=false;
  1183. { swap parameters? }
  1184. case cmp_op of
  1185. OC_GT:
  1186. begin
  1187. swapped:=true;
  1188. cmp_op:=OC_LT;
  1189. end;
  1190. OC_LTE:
  1191. begin
  1192. swapped:=true;
  1193. cmp_op:=OC_GTE;
  1194. end;
  1195. OC_BE:
  1196. begin
  1197. swapped:=true;
  1198. cmp_op:=OC_AE;
  1199. end;
  1200. OC_A:
  1201. begin
  1202. swapped:=true;
  1203. cmp_op:=OC_B;
  1204. end;
  1205. end;
  1206. if swapped then
  1207. begin
  1208. tmpreg:=reg1;
  1209. reg1:=reg2;
  1210. reg2:=tmpreg;
  1211. end;
  1212. list.concat(taicpu.op_reg_reg(A_CP,reg2,reg1));
  1213. for i:=2 to tcgsize2size[size] do
  1214. begin
  1215. reg1:=GetNextReg(reg1);
  1216. reg2:=GetNextReg(reg2);
  1217. list.concat(taicpu.op_reg_reg(A_CPC,reg2,reg1));
  1218. end;
  1219. a_jmp_cond(list,cmp_op,l);
  1220. end;
  1221. procedure tcgavr.a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: TCGSize; src, dst: TRegister);
  1222. begin
  1223. Comment(V_Error,'tcgarm.a_bit_scan_reg_reg method not implemented');
  1224. end;
  1225. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1226. var
  1227. ai : taicpu;
  1228. begin
  1229. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s));
  1230. ai.is_jmp:=true;
  1231. list.concat(ai);
  1232. end;
  1233. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1234. var
  1235. ai : taicpu;
  1236. begin
  1237. ai:=taicpu.op_sym(A_JMP,l);
  1238. ai.is_jmp:=true;
  1239. list.concat(ai);
  1240. end;
  1241. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1242. var
  1243. ai : taicpu;
  1244. begin
  1245. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1246. ai.is_jmp:=true;
  1247. list.concat(ai);
  1248. end;
  1249. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1250. var
  1251. l : TAsmLabel;
  1252. tmpflags : TResFlags;
  1253. begin
  1254. current_asmdata.getjumplabel(l);
  1255. {
  1256. if flags_to_cond(f) then
  1257. begin
  1258. tmpflags:=f;
  1259. inverse_flags(tmpflags);
  1260. list.concat(taicpu.op_reg(A_CLR,reg));
  1261. a_jmp_flags(list,tmpflags,l);
  1262. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1263. end
  1264. else
  1265. }
  1266. begin
  1267. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1268. a_jmp_flags(list,f,l);
  1269. list.concat(taicpu.op_reg(A_CLR,reg));
  1270. end;
  1271. cg.a_label(list,l);
  1272. end;
  1273. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1274. var
  1275. i : integer;
  1276. begin
  1277. case value of
  1278. 0:
  1279. ;
  1280. {-14..-1:
  1281. begin
  1282. if ((-value) mod 2)<>0 then
  1283. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1284. for i:=1 to (-value) div 2 do
  1285. list.concat(taicpu.op_const(A_RCALL,0));
  1286. end;
  1287. 1..7:
  1288. begin
  1289. for i:=1 to value do
  1290. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1291. end;}
  1292. else
  1293. begin
  1294. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1295. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1296. // get SREG
  1297. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1298. // block interrupts
  1299. list.concat(taicpu.op_none(A_CLI));
  1300. // write high SP
  1301. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1302. // release interrupts
  1303. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1304. // write low SP
  1305. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1306. end;
  1307. end;
  1308. end;
  1309. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1310. begin
  1311. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1312. result:=A_LDS
  1313. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1314. result:=A_LDD
  1315. else
  1316. result:=A_LD;
  1317. end;
  1318. function tcgavr.GetStore(const ref: treference) : tasmop;
  1319. begin
  1320. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1321. result:=A_STS
  1322. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1323. result:=A_STD
  1324. else
  1325. result:=A_ST;
  1326. end;
  1327. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1328. var
  1329. regs : tcpuregisterset;
  1330. reg : tsuperregister;
  1331. begin
  1332. if not(nostackframe) then
  1333. begin
  1334. { save int registers }
  1335. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1336. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1337. regs:=regs+[RS_R28,RS_R29];
  1338. for reg:=RS_R31 downto RS_R0 do
  1339. if reg in regs then
  1340. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1341. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1342. begin
  1343. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1344. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1345. end
  1346. else
  1347. { the framepointer cannot be omitted on avr because sp
  1348. is not a register but part of the i/o map
  1349. }
  1350. internalerror(2011021901);
  1351. a_adjust_sp(list,-localsize);
  1352. end;
  1353. end;
  1354. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1355. var
  1356. regs : tcpuregisterset;
  1357. reg : TSuperRegister;
  1358. LocalSize : longint;
  1359. begin
  1360. if not(nostackframe) then
  1361. begin
  1362. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1363. begin
  1364. LocalSize:=current_procinfo.calc_stackframe_size;
  1365. a_adjust_sp(list,LocalSize);
  1366. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1367. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1368. regs:=regs+[RS_R28,RS_R29];
  1369. for reg:=RS_R0 to RS_R31 do
  1370. if reg in regs then
  1371. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1372. end
  1373. else
  1374. { the framepointer cannot be omitted on avr because sp
  1375. is not a register but part of the i/o map
  1376. }
  1377. internalerror(2011021902);
  1378. end;
  1379. list.concat(taicpu.op_none(A_RET));
  1380. end;
  1381. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1382. var
  1383. tmpref : treference;
  1384. begin
  1385. if ref.addressmode<>AM_UNCHANGED then
  1386. internalerror(2011021701);
  1387. if assigned(ref.symbol) or (ref.offset<>0) then
  1388. begin
  1389. reference_reset(tmpref,0);
  1390. tmpref.symbol:=ref.symbol;
  1391. tmpref.offset:=ref.offset;
  1392. tmpref.refaddr:=addr_lo8;
  1393. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1394. tmpref.refaddr:=addr_hi8;
  1395. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1396. if (ref.base<>NR_NO) then
  1397. begin
  1398. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1399. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1400. end;
  1401. if (ref.index<>NR_NO) then
  1402. begin
  1403. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1404. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1405. end;
  1406. end
  1407. else if (ref.base<>NR_NO)then
  1408. begin
  1409. emit_mov(list,r,ref.base);
  1410. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1411. if (ref.index<>NR_NO) then
  1412. begin
  1413. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1414. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1415. end;
  1416. end
  1417. else if (ref.index<>NR_NO) then
  1418. begin
  1419. emit_mov(list,r,ref.index);
  1420. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1421. end;
  1422. end;
  1423. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1424. begin
  1425. internalerror(2011021320);
  1426. end;
  1427. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1428. var
  1429. paraloc1,paraloc2,paraloc3 : TCGPara;
  1430. pd : tprocdef;
  1431. begin
  1432. pd:=search_system_proc('MOVE');
  1433. paraloc1.init;
  1434. paraloc2.init;
  1435. paraloc3.init;
  1436. paramanager.getintparaloc(pd,1,paraloc1);
  1437. paramanager.getintparaloc(pd,2,paraloc2);
  1438. paramanager.getintparaloc(pd,3,paraloc3);
  1439. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1440. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1441. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1442. paramanager.freecgpara(list,paraloc3);
  1443. paramanager.freecgpara(list,paraloc2);
  1444. paramanager.freecgpara(list,paraloc1);
  1445. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1446. a_call_name_static(list,'FPC_MOVE');
  1447. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1448. paraloc3.done;
  1449. paraloc2.done;
  1450. paraloc1.done;
  1451. end;
  1452. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1453. var
  1454. countreg,tmpreg : tregister;
  1455. srcref,dstref : treference;
  1456. copysize,countregsize : tcgsize;
  1457. l : TAsmLabel;
  1458. i : longint;
  1459. SrcQuickRef, DestQuickRef : Boolean;
  1460. begin
  1461. if len>16 then
  1462. begin
  1463. current_asmdata.getjumplabel(l);
  1464. reference_reset(srcref,0);
  1465. reference_reset(dstref,0);
  1466. srcref.base:=NR_R30;
  1467. srcref.addressmode:=AM_POSTINCREMENT;
  1468. dstref.base:=NR_R26;
  1469. dstref.addressmode:=AM_POSTINCREMENT;
  1470. copysize:=OS_8;
  1471. if len<256 then
  1472. countregsize:=OS_8
  1473. else if len<65536 then
  1474. countregsize:=OS_16
  1475. else
  1476. internalerror(2011022007);
  1477. countreg:=getintregister(list,countregsize);
  1478. a_load_const_reg(list,countregsize,len,countreg);
  1479. a_loadaddr_ref_reg(list,source,NR_R30);
  1480. tmpreg:=getaddressregister(list);
  1481. a_loadaddr_ref_reg(list,dest,tmpreg);
  1482. { X is used for spilling code so we can load it
  1483. only by a push/pop sequence, this can be
  1484. optimized later on by the peephole optimizer
  1485. }
  1486. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1487. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1488. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1489. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1490. cg.a_label(list,l);
  1491. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1492. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1493. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1494. a_jmp_flags(list,F_NE,l);
  1495. // keep registers alive
  1496. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1497. end
  1498. else
  1499. begin
  1500. SrcQuickRef:=false;
  1501. DestQuickRef:=false;
  1502. if not((source.addressmode=AM_UNCHANGED) and
  1503. (source.symbol=nil) and
  1504. ((source.base=NR_R28) or
  1505. (source.base=NR_R29)) and
  1506. (source.Index=NR_NO) and
  1507. (source.Offset in [0..64-len])) and
  1508. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1509. srcref:=normalize_ref(list,source,NR_R30)
  1510. else
  1511. begin
  1512. SrcQuickRef:=true;
  1513. srcref:=source;
  1514. end;
  1515. if not((dest.addressmode=AM_UNCHANGED) and
  1516. (dest.symbol=nil) and
  1517. ((dest.base=NR_R28) or
  1518. (dest.base=NR_R29)) and
  1519. (dest.Index=NR_No) and
  1520. (dest.Offset in [0..64-len])) and
  1521. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1522. begin
  1523. if not(SrcQuickRef) then
  1524. begin
  1525. tmpreg:=getaddressregister(list);
  1526. dstref:=normalize_ref(list,dest,tmpreg);
  1527. { X is used for spilling code so we can load it
  1528. only by a push/pop sequence, this can be
  1529. optimized later on by the peephole optimizer
  1530. }
  1531. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1532. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1533. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1534. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1535. dstref.base:=NR_R26;
  1536. end
  1537. else
  1538. dstref:=normalize_ref(list,dest,NR_R30);
  1539. end
  1540. else
  1541. begin
  1542. DestQuickRef:=true;
  1543. dstref:=dest;
  1544. end;
  1545. for i:=1 to len do
  1546. begin
  1547. if not(SrcQuickRef) and (i<len) then
  1548. srcref.addressmode:=AM_POSTINCREMENT
  1549. else
  1550. srcref.addressmode:=AM_UNCHANGED;
  1551. if not(DestQuickRef) and (i<len) then
  1552. dstref.addressmode:=AM_POSTINCREMENT
  1553. else
  1554. dstref.addressmode:=AM_UNCHANGED;
  1555. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1556. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1557. if SrcQuickRef then
  1558. inc(srcref.offset);
  1559. if DestQuickRef then
  1560. inc(dstref.offset);
  1561. end;
  1562. if not(SrcQuickRef) then
  1563. begin
  1564. ungetcpuregister(list,srcref.base);
  1565. ungetcpuregister(list,GetNextReg(srcref.base));
  1566. end;
  1567. end;
  1568. end;
  1569. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1570. var
  1571. hl : tasmlabel;
  1572. ai : taicpu;
  1573. cond : TAsmCond;
  1574. begin
  1575. if not(cs_check_overflow in current_settings.localswitches) then
  1576. exit;
  1577. current_asmdata.getjumplabel(hl);
  1578. if not ((def.typ=pointerdef) or
  1579. ((def.typ=orddef) and
  1580. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1581. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1582. cond:=C_VC
  1583. else
  1584. cond:=C_CC;
  1585. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1586. ai.SetCondition(cond);
  1587. ai.is_jmp:=true;
  1588. list.concat(ai);
  1589. a_call_name(list,'FPC_OVERFLOW',false);
  1590. a_label(list,hl);
  1591. end;
  1592. procedure tcgavr.g_save_registers(list: TAsmList);
  1593. begin
  1594. { this is done by the entry code }
  1595. end;
  1596. procedure tcgavr.g_restore_registers(list: TAsmList);
  1597. begin
  1598. { this is done by the exit code }
  1599. end;
  1600. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1601. var
  1602. ai1,ai2 : taicpu;
  1603. hl : TAsmLabel;
  1604. begin
  1605. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1606. ai1.is_jmp:=true;
  1607. hl:=nil;
  1608. case cond of
  1609. OC_EQ:
  1610. ai1.SetCondition(C_EQ);
  1611. OC_GT:
  1612. begin
  1613. { emulate GT }
  1614. current_asmdata.getjumplabel(hl);
  1615. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1616. ai2.SetCondition(C_EQ);
  1617. ai2.is_jmp:=true;
  1618. list.concat(ai2);
  1619. ai1.SetCondition(C_GE);
  1620. end;
  1621. OC_LT:
  1622. ai1.SetCondition(C_LT);
  1623. OC_GTE:
  1624. ai1.SetCondition(C_GE);
  1625. OC_LTE:
  1626. begin
  1627. { emulate LTE }
  1628. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1629. ai2.SetCondition(C_EQ);
  1630. ai2.is_jmp:=true;
  1631. list.concat(ai2);
  1632. ai1.SetCondition(C_LT);
  1633. end;
  1634. OC_NE:
  1635. ai1.SetCondition(C_NE);
  1636. OC_BE:
  1637. begin
  1638. { emulate BE }
  1639. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1640. ai2.SetCondition(C_EQ);
  1641. ai2.is_jmp:=true;
  1642. list.concat(ai2);
  1643. ai1.SetCondition(C_LO);
  1644. end;
  1645. OC_B:
  1646. ai1.SetCondition(C_LO);
  1647. OC_AE:
  1648. ai1.SetCondition(C_SH);
  1649. OC_A:
  1650. begin
  1651. { emulate A (unsigned GT) }
  1652. current_asmdata.getjumplabel(hl);
  1653. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1654. ai2.SetCondition(C_EQ);
  1655. ai2.is_jmp:=true;
  1656. list.concat(ai2);
  1657. ai1.SetCondition(C_SH);
  1658. end;
  1659. else
  1660. internalerror(2011082501);
  1661. end;
  1662. list.concat(ai1);
  1663. if assigned(hl) then
  1664. a_label(list,hl);
  1665. end;
  1666. procedure tcgavr.g_stackpointer_alloc(list: TAsmList; size: longint);
  1667. begin
  1668. internalerror(201201071);
  1669. end;
  1670. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1671. begin
  1672. //internalerror(2011021324);
  1673. end;
  1674. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1675. var
  1676. instr: taicpu;
  1677. begin
  1678. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1679. list.Concat(instr);
  1680. { Notify the register allocator that we have written a move instruction so
  1681. it can try to eliminate it. }
  1682. add_move_instruction(instr);
  1683. end;
  1684. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1685. begin
  1686. if not(size in [OS_S64,OS_64]) then
  1687. internalerror(2012102402);
  1688. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1689. end;
  1690. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1691. begin
  1692. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1693. end;
  1694. procedure create_codegen;
  1695. begin
  1696. cg:=tcgavr.create;
  1697. cg64:=tcg64favr.create;
  1698. end;
  1699. end.