cpuinfo.pas 3.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136
  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for the MIPS
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. ts32real = single;
  17. ts64real = double;
  18. ts80real = type double;
  19. ts128real = type double;
  20. ts64comp = comp;
  21. pbestreal=^bestreal;
  22. { possible supported processors for this target }
  23. tcputype =
  24. (cpu_none,
  25. cpu_mips1,
  26. cpu_mips2,
  27. cpu_mips3,
  28. cpu_mips4,
  29. cpu_mips5,
  30. cpu_mips32,
  31. cpu_mips32r2
  32. );
  33. tfputype =(fpu_none,fpu_soft,fpu_mips2,fpu_mips3);
  34. tabitype =
  35. (
  36. abi_none,
  37. abi_default,
  38. abi_o32,
  39. abi_n32,
  40. abi_o64,
  41. abi_n64,
  42. abi_eabi
  43. );
  44. Const
  45. {# Size of native extended floating point type }
  46. extended_size = 8;
  47. {# Size of a multimedia register }
  48. mmreg_size = 0;
  49. { calling conventions supported by the code generator }
  50. supported_calling_conventions : tproccalloptions = [
  51. pocall_internproc,
  52. pocall_stdcall,
  53. pocall_safecall,
  54. { same as stdcall only different name mangling }
  55. pocall_cdecl,
  56. { same as stdcall only different name mangling }
  57. pocall_cppdecl
  58. ];
  59. { cpu strings as accepted by
  60. GNU assembler in -arch=XXX option
  61. this ilist needs to be uppercased }
  62. cputypestr : array[tcputype] of string[8] = ('',
  63. { cpu_mips1 } 'MIPS1',
  64. { cpu_mips2 } 'MIPS2',
  65. { cpu_mips3 } 'MIPS3',
  66. { cpu_mips4 } 'MIPS4',
  67. { cpu_mips5 } 'MIPS5',
  68. { cpu_mips32 } 'MIPS32',
  69. { cpu_mips32r2 } 'MIPS32R2'
  70. );
  71. fputypestr : array[tfputype] of string[9] = ('',
  72. 'SOFT',
  73. 'FPU_MIPS2','FPU_MIPS3'
  74. );
  75. { abi strings as accepted by
  76. GNU assembler in -abi=XXX option }
  77. abitypestr : array[tabitype] of string[4] =
  78. ({ abi_none } '',
  79. { abi_default } '32',
  80. { abi_o32 } '32',
  81. { abi_n32 } 'n32',
  82. { abi_o64 } 'o64',
  83. { abi_n64 } '64',
  84. { abi_eabi } 'eabi'
  85. );
  86. mips_abi : tabitype = abi_default;
  87. { Supported optimizations, only used for information }
  88. supported_optimizerswitches = [cs_opt_regvar,cs_opt_loopunroll,cs_opt_nodecse,
  89. cs_opt_reorder_fields,cs_opt_fastmath];
  90. level1optimizerswitches = [cs_opt_level1];
  91. level2optimizerswitches = level1optimizerswitches + [cs_opt_regvar,cs_opt_stackframe,cs_opt_nodecse];
  92. level3optimizerswitches = level2optimizerswitches + [cs_opt_loopunroll];
  93. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
  94. function SetMipsABIType(const s : string) : boolean;
  95. Implementation
  96. uses
  97. cutils;
  98. function SetMipsABIType(const s : string) : boolean;
  99. var
  100. abi : tabitype;
  101. begin
  102. SetMipsABIType:=false;
  103. for abi := low(tabitype) to high(tabitype) do
  104. if (lower(s)=abitypestr[abi]) then
  105. begin
  106. mips_abi:=abi;
  107. SetMipsABIType:=true;
  108. break;
  109. end;
  110. end;
  111. end.