cgcpu.pas 47 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);override;
  36. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  37. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  39. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  40. procedure a_call_ref(list : TAsmList;ref: treference);override;
  41. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister); override;
  42. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
  43. { move instructions }
  44. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);override;
  45. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  46. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  47. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  48. { comparison operations }
  49. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  50. l : tasmlabel);override;
  51. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  52. procedure a_jmp_name(list : TAsmList;const s : string); override;
  53. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  54. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  55. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  56. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  57. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  58. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  59. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);override;
  60. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);override;
  61. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  62. procedure g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : aint;aligned : boolean);
  63. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  64. procedure g_save_registers(list : TAsmList);override;
  65. procedure g_restore_registers(list : TAsmList);override;
  66. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  67. procedure fixref(list : TAsmList;var ref : treference);
  68. function normalize_ref(list:TAsmList;ref: treference):treference;
  69. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  70. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  71. procedure a_adjust_sp(list: TAsmList; value: longint);
  72. function GetLoad(const ref : treference) : tasmop;
  73. function GetStore(const ref: treference): tasmop;
  74. end;
  75. tcg64favr = class(tcg64f32)
  76. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  77. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  78. end;
  79. procedure create_codegen;
  80. const
  81. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  82. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  83. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  84. implementation
  85. uses
  86. globals,verbose,systems,cutils,
  87. fmodule,
  88. symconst,symsym,
  89. tgobj,
  90. procinfo,cpupi,
  91. paramgr;
  92. procedure tcgavr.init_register_allocators;
  93. begin
  94. inherited init_register_allocators;
  95. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  96. [RS_R0,RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,
  97. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  98. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25],first_int_imreg,[]);
  99. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  100. [RS_R26,RS_R30],first_int_imreg,[]); }
  101. end;
  102. procedure tcgavr.done_register_allocators;
  103. begin
  104. rg[R_INTREGISTER].free;
  105. // rg[R_ADDRESSREGISTER].free;
  106. inherited done_register_allocators;
  107. end;
  108. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  109. var
  110. tmp1,tmp2,tmp3 : TRegister;
  111. begin
  112. case size of
  113. OS_8,OS_S8:
  114. Result:=inherited getintregister(list, size);
  115. OS_16,OS_S16:
  116. begin
  117. Result:=inherited getintregister(list, OS_8);
  118. { ensure that the high register can be retrieved by
  119. GetNextReg
  120. }
  121. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  122. internalerror(2011021331);
  123. end;
  124. OS_32,OS_S32:
  125. begin
  126. Result:=inherited getintregister(list, OS_8);
  127. tmp1:=inherited getintregister(list, OS_8);
  128. { ensure that the high register can be retrieved by
  129. GetNextReg
  130. }
  131. if tmp1<>GetNextReg(Result) then
  132. internalerror(2011021332);
  133. tmp2:=inherited getintregister(list, OS_8);
  134. { ensure that the upper register can be retrieved by
  135. GetNextReg
  136. }
  137. if tmp2<>GetNextReg(tmp1) then
  138. internalerror(2011021333);
  139. tmp3:=inherited getintregister(list, OS_8);
  140. { ensure that the upper register can be retrieved by
  141. GetNextReg
  142. }
  143. if tmp3<>GetNextReg(tmp2) then
  144. internalerror(2011021334);
  145. end;
  146. else
  147. internalerror(2011021330);
  148. end;
  149. end;
  150. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);
  151. var
  152. ref: treference;
  153. begin
  154. paraloc.check_simple_location;
  155. paramanager.allocparaloc(list,paraloc.location);
  156. case paraloc.location^.loc of
  157. LOC_REGISTER,LOC_CREGISTER:
  158. a_load_const_reg(list,size,a,paraloc.location^.register);
  159. LOC_REFERENCE:
  160. begin
  161. reference_reset(ref,paraloc.alignment);
  162. ref.base:=paraloc.location^.reference.index;
  163. ref.offset:=paraloc.location^.reference.offset;
  164. a_load_const_ref(list,size,a,ref);
  165. end;
  166. else
  167. internalerror(2002081101);
  168. end;
  169. end;
  170. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  171. var
  172. tmpref, ref: treference;
  173. location: pcgparalocation;
  174. sizeleft: aint;
  175. begin
  176. location := paraloc.location;
  177. tmpref := r;
  178. sizeleft := paraloc.intsize;
  179. while assigned(location) do
  180. begin
  181. paramanager.allocparaloc(list,location);
  182. case location^.loc of
  183. LOC_REGISTER,LOC_CREGISTER:
  184. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  185. LOC_REFERENCE:
  186. begin
  187. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  188. { doubles in softemu mode have a strange order of registers and references }
  189. if location^.size=OS_32 then
  190. g_concatcopy(list,tmpref,ref,4)
  191. else
  192. begin
  193. g_concatcopy(list,tmpref,ref,sizeleft);
  194. if assigned(location^.next) then
  195. internalerror(2005010710);
  196. end;
  197. end;
  198. LOC_VOID:
  199. begin
  200. // nothing to do
  201. end;
  202. else
  203. internalerror(2002081103);
  204. end;
  205. inc(tmpref.offset,tcgsize2size[location^.size]);
  206. dec(sizeleft,tcgsize2size[location^.size]);
  207. location := location^.next;
  208. end;
  209. end;
  210. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  211. var
  212. ref: treference;
  213. tmpreg: tregister;
  214. begin
  215. paraloc.check_simple_location;
  216. paramanager.allocparaloc(list,paraloc.location);
  217. case paraloc.location^.loc of
  218. LOC_REGISTER,LOC_CREGISTER:
  219. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  220. LOC_REFERENCE:
  221. begin
  222. reference_reset(ref,paraloc.alignment);
  223. ref.base := paraloc.location^.reference.index;
  224. ref.offset := paraloc.location^.reference.offset;
  225. tmpreg := getintregister(list,OS_ADDR);
  226. a_loadaddr_ref_reg(list,r,tmpreg);
  227. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  228. end;
  229. else
  230. internalerror(2002080701);
  231. end;
  232. end;
  233. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  234. begin
  235. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  236. {
  237. the compiler does not properly set this flag anymore in pass 1, and
  238. for now we only need it after pass 2 (I hope) (JM)
  239. if not(pi_do_call in current_procinfo.flags) then
  240. internalerror(2003060703);
  241. }
  242. include(current_procinfo.flags,pi_do_call);
  243. end;
  244. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  245. begin
  246. a_reg_alloc(list,NR_ZLO);
  247. a_reg_alloc(list,NR_ZHI);
  248. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  249. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  250. list.concat(taicpu.op_none(A_ICALL));
  251. a_reg_dealloc(list,NR_ZLO);
  252. a_reg_dealloc(list,NR_ZHI);
  253. include(current_procinfo.flags,pi_do_call);
  254. end;
  255. procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
  256. begin
  257. a_reg_alloc(list,NR_ZLO);
  258. a_reg_alloc(list,NR_ZHI);
  259. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
  260. list.concat(taicpu.op_none(A_ICALL));
  261. a_reg_dealloc(list,NR_ZLO);
  262. a_reg_dealloc(list,NR_ZHI);
  263. include(current_procinfo.flags,pi_do_call);
  264. end;
  265. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister);
  266. var
  267. mask : qword;
  268. shift : byte;
  269. i : byte;
  270. tmpreg : tregister;
  271. begin
  272. mask:=$ff;
  273. shift:=0;
  274. case op of
  275. OP_OR:
  276. begin
  277. for i:=1 to tcgsize2size[size] do
  278. begin
  279. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  280. reg:=GetNextReg(reg);
  281. mask:=mask shl 8;
  282. inc(shift,8);
  283. end;
  284. end;
  285. OP_AND:
  286. begin
  287. for i:=1 to tcgsize2size[size] do
  288. begin
  289. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  290. reg:=GetNextReg(reg);
  291. mask:=mask shl 8;
  292. inc(shift,8);
  293. end;
  294. end;
  295. OP_SUB:
  296. begin
  297. list.concat(taicpu.op_reg_const(A_SUBI,reg,a));
  298. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  299. begin
  300. for i:=2 to tcgsize2size[size] do
  301. begin
  302. reg:=GetNextReg(reg);
  303. mask:=mask shl 8;
  304. inc(shift,8);
  305. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  306. end;
  307. end;
  308. end;
  309. else
  310. begin
  311. tmpreg:=getintregister(list,size);
  312. a_load_const_reg(list,size,a,tmpreg);
  313. a_op_reg_reg(list,op,size,tmpreg,reg);
  314. end;
  315. end;
  316. end;
  317. procedure tcgavr.a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister);
  318. var
  319. tmpreg: tregister;
  320. i : integer;
  321. instr : taicpu;
  322. paraloc1,paraloc2,paraloc3 : TCGPara;
  323. begin
  324. case op of
  325. OP_ADD:
  326. begin
  327. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  328. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  329. begin
  330. for i:=2 to tcgsize2size[size] do
  331. begin
  332. dst:=GetNextReg(dst);
  333. src:=GetNextReg(src);
  334. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  335. end;
  336. end
  337. else
  338. end;
  339. OP_SUB:
  340. begin
  341. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  342. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  343. begin
  344. for i:=2 to tcgsize2size[size] do
  345. begin
  346. dst:=GetNextReg(dst);
  347. src:=GetNextReg(src);
  348. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  349. end;
  350. end;
  351. end;
  352. OP_NEG:
  353. begin
  354. if src<>dst then
  355. a_load_reg_reg(list,size,size,src,dst);
  356. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  357. begin
  358. tmpreg:=GetNextReg(dst);
  359. for i:=2 to tcgsize2size[size] do
  360. begin
  361. list.concat(taicpu.op_reg(A_COM,tmpreg));
  362. tmpreg:=GetNextReg(tmpreg);
  363. end;
  364. list.concat(taicpu.op_reg(A_NEG,dst));
  365. tmpreg:=GetNextReg(dst);
  366. for i:=2 to tcgsize2size[size] do
  367. begin
  368. list.concat(taicpu.op_reg_const(A_SBCI,dst,-1));
  369. tmpreg:=GetNextReg(tmpreg);
  370. end;
  371. end
  372. else
  373. list.concat(taicpu.op_reg(A_NEG,dst));
  374. end;
  375. OP_NOT:
  376. begin
  377. for i:=1 to tcgsize2size[size] do
  378. begin
  379. if src<>dst then
  380. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  381. list.concat(taicpu.op_reg(A_COM,dst));
  382. src:=GetNextReg(src);
  383. dst:=GetNextReg(dst);
  384. end;
  385. end;
  386. OP_MUL,OP_IMUL:
  387. begin
  388. if size in [OS_8,OS_S8] then
  389. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  390. else if size=OS_16 then
  391. begin
  392. paraloc1.init;
  393. paraloc2.init;
  394. paraloc3.init;
  395. paramanager.getintparaloc(pocall_default,1,paraloc1);
  396. paramanager.getintparaloc(pocall_default,2,paraloc2);
  397. paramanager.getintparaloc(pocall_default,3,paraloc3);
  398. a_load_const_cgpara(list,OS_8,0,paraloc3);
  399. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  400. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  401. paramanager.freecgpara(list,paraloc3);
  402. paramanager.freecgpara(list,paraloc2);
  403. paramanager.freecgpara(list,paraloc1);
  404. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  405. a_call_name(list,'FPC_MUL_WORD',false);
  406. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  407. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  408. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  409. paraloc3.done;
  410. paraloc2.done;
  411. paraloc1.done;
  412. end
  413. else
  414. internalerror(2011022002);
  415. end;
  416. OP_DIV,OP_IDIV:
  417. { special stuff, needs separate handling inside code }
  418. { generator }
  419. internalerror(2011022001);
  420. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  421. begin
  422. { TODO : Shift operators }
  423. end;
  424. OP_AND,OP_OR,OP_XOR:
  425. begin
  426. for i:=1 to tcgsize2size[size] do
  427. begin
  428. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  429. dst:=GetNextReg(dst);
  430. src:=GetNextReg(src);
  431. end;
  432. end;
  433. else
  434. internalerror(2011022004);
  435. end;
  436. end;
  437. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);
  438. var
  439. mask : qword;
  440. shift : byte;
  441. i : byte;
  442. begin
  443. mask:=$ff;
  444. shift:=0;
  445. for i:=1 to tcgsize2size[size] do
  446. begin
  447. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  448. mask:=mask shl 8;
  449. inc(shift,8);
  450. reg:=GetNextReg(reg);
  451. end;
  452. end;
  453. function tcgavr.normalize_ref(list:TAsmList;ref: treference):treference;
  454. var
  455. tmpreg : tregister;
  456. tmpref : treference;
  457. l : tasmlabel;
  458. begin
  459. tmpreg:=NR_NO;
  460. Result:=ref;
  461. if ref.addressmode<>AM_UNCHANGED then
  462. internalerror(2011021701);
  463. { Be sure to have a base register }
  464. if (ref.base=NR_NO) then
  465. begin
  466. { only symbol+offset? }
  467. if ref.index=NR_NO then
  468. exit;
  469. ref.base:=ref.index;
  470. ref.index:=NR_NO;
  471. end;
  472. if assigned(ref.symbol) or (ref.offset<>0) then
  473. begin
  474. getcpuregister(list,NR_R30);
  475. getcpuregister(list,NR_R31);
  476. tmpreg:=NR_R30;
  477. reference_reset(tmpref,0);
  478. tmpref.symbol:=ref.symbol;
  479. tmpref.offset:=ref.offset;
  480. tmpref.refaddr:=addr_lo8;
  481. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  482. tmpref.refaddr:=addr_hi8;
  483. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  484. if (ref.base<>NR_NO) then
  485. begin
  486. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  487. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  488. end;
  489. if (ref.index<>NR_NO) then
  490. begin
  491. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  492. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  493. end;
  494. ref.symbol:=nil;
  495. ref.offset:=0;
  496. ref.base:=tmpreg;
  497. ref.index:=NR_NO;
  498. end
  499. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  500. begin
  501. getcpuregister(list,NR_R30);
  502. getcpuregister(list,NR_R31);
  503. tmpreg:=NR_R30;
  504. list.concat(taicpu.op_reg_reg(A_MOV,tmpreg,ref.index));
  505. list.concat(taicpu.op_reg_reg(A_MOV,GetNextReg(tmpreg),GetNextReg(ref.index)));
  506. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  507. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  508. ref.base:=tmpreg;
  509. ref.index:=NR_NO;
  510. end
  511. else if (ref.base<>NR_NO) then
  512. begin
  513. getcpuregister(list,NR_R30);
  514. getcpuregister(list,NR_R31);
  515. tmpreg:=NR_R30;
  516. list.concat(taicpu.op_reg_reg(A_MOV,tmpreg,ref.base));
  517. list.concat(taicpu.op_reg_reg(A_MOV,GetNextReg(tmpreg),GetNextReg(ref.base)));
  518. ref.base:=tmpreg;
  519. ref.index:=NR_NO;
  520. end
  521. else if (ref.index<>NR_NO) then
  522. begin
  523. getcpuregister(list,NR_R30);
  524. getcpuregister(list,NR_R31);
  525. tmpreg:=NR_R30;
  526. list.concat(taicpu.op_reg_reg(A_MOV,tmpreg,ref.index));
  527. list.concat(taicpu.op_reg_reg(A_MOV,GetNextReg(tmpreg),GetNextReg(ref.index)));
  528. ref.base:=tmpreg;
  529. ref.index:=NR_NO;
  530. end;
  531. Result:=ref;
  532. end;
  533. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  534. var
  535. href : treference;
  536. conv_done: boolean;
  537. tmpreg : tregister;
  538. i : integer;
  539. begin
  540. href:=normalize_ref(list,Ref);
  541. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  542. internalerror(2011021307);
  543. conv_done:=false;
  544. if tosize<>fromsize then
  545. begin
  546. conv_done:=true;
  547. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  548. fromsize:=tosize;
  549. case fromsize of
  550. OS_8:
  551. begin
  552. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  553. href.addressmode:=AM_POSTINCREMENT;
  554. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  555. for i:=2 to tcgsize2size[tosize] do
  556. begin
  557. if (href.offset<>0) or assigned(href.symbol) then
  558. inc(href.offset);
  559. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  560. href.addressmode:=AM_POSTINCREMENT
  561. else
  562. href.addressmode:=AM_UNCHANGED;
  563. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  564. end;
  565. end;
  566. OS_S8:
  567. begin
  568. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  569. href.addressmode:=AM_POSTINCREMENT;
  570. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  571. if tcgsize2size[tosize]>1 then
  572. begin
  573. tmpreg:=getintregister(list,OS_8);
  574. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  575. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  576. list.concat(taicpu.op_reg(A_COM,tmpreg));
  577. for i:=2 to tcgsize2size[tosize] do
  578. begin
  579. if (href.offset<>0) or assigned(href.symbol) then
  580. inc(href.offset);
  581. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  582. href.addressmode:=AM_POSTINCREMENT
  583. else
  584. href.addressmode:=AM_UNCHANGED;
  585. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  586. end;
  587. end;
  588. end;
  589. OS_16:
  590. begin
  591. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  592. href.addressmode:=AM_POSTINCREMENT;
  593. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  594. if (href.offset<>0) or assigned(href.symbol) then
  595. inc(href.offset)
  596. else if (href.base<>NR_NO) and (tcgsize2size[fromsize]>2) then
  597. href.addressmode:=AM_POSTINCREMENT
  598. else
  599. href.addressmode:=AM_UNCHANGED;
  600. reg:=GetNextReg(reg);
  601. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  602. for i:=3 to tcgsize2size[tosize] do
  603. begin
  604. if (href.offset<>0) or assigned(href.symbol) then
  605. inc(href.offset);
  606. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  607. href.addressmode:=AM_POSTINCREMENT
  608. else
  609. href.addressmode:=AM_UNCHANGED;
  610. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  611. end;
  612. end;
  613. OS_S16:
  614. begin
  615. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  616. href.addressmode:=AM_POSTINCREMENT;
  617. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  618. if (href.offset<>0) or assigned(href.symbol) then
  619. inc(href.offset)
  620. else if (href.base<>NR_NO) and (tcgsize2size[fromsize]>2) then
  621. href.addressmode:=AM_POSTINCREMENT
  622. else
  623. href.addressmode:=AM_UNCHANGED;
  624. reg:=GetNextReg(reg);
  625. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  626. if tcgsize2size[tosize]>2 then
  627. begin
  628. tmpreg:=getintregister(list,OS_8);
  629. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  630. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  631. list.concat(taicpu.op_reg(A_COM,tmpreg));
  632. for i:=3 to tcgsize2size[tosize] do
  633. begin
  634. if (href.offset<>0) or assigned(href.symbol) then
  635. inc(href.offset);
  636. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  637. href.addressmode:=AM_POSTINCREMENT
  638. else
  639. href.addressmode:=AM_UNCHANGED;
  640. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  641. end;
  642. end;
  643. end;
  644. else
  645. conv_done:=false;
  646. end;
  647. end;
  648. if not conv_done then
  649. begin
  650. for i:=1 to tcgsize2size[fromsize] do
  651. begin
  652. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  653. href.addressmode:=AM_POSTINCREMENT
  654. else
  655. href.addressmode:=AM_UNCHANGED;
  656. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  657. if (href.offset<>0) or assigned(href.symbol) then
  658. inc(href.offset);
  659. reg:=GetNextReg(reg);
  660. end;
  661. end;
  662. end;
  663. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  664. const Ref : treference;reg : tregister);
  665. var
  666. href : treference;
  667. conv_done: boolean;
  668. tmpreg : tregister;
  669. i : integer;
  670. begin
  671. href:=normalize_ref(list,Ref);
  672. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  673. internalerror(2011021307);
  674. conv_done:=false;
  675. if tosize<>fromsize then
  676. begin
  677. conv_done:=true;
  678. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  679. fromsize:=tosize;
  680. case fromsize of
  681. OS_8:
  682. begin
  683. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  684. for i:=2 to tcgsize2size[tosize] do
  685. begin
  686. reg:=GetNextReg(reg);
  687. list.concat(taicpu.op_reg(A_CLR,reg));
  688. end;
  689. end;
  690. OS_S8:
  691. begin
  692. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  693. tmpreg:=reg;
  694. if tcgsize2size[tosize]>1 then
  695. begin
  696. reg:=GetNextReg(reg);
  697. list.concat(taicpu.op_reg(A_CLR,reg));
  698. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  699. list.concat(taicpu.op_reg(A_COM,reg));
  700. tmpreg:=reg;
  701. for i:=3 to tcgsize2size[tosize] do
  702. begin
  703. reg:=GetNextReg(reg);
  704. emit_mov(list,reg,tmpreg);
  705. end;
  706. end;
  707. end;
  708. OS_16:
  709. begin
  710. if href.base<>NR_NO then
  711. href.addressmode:=AM_POSTINCREMENT;
  712. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  713. if (href.offset<>0) or assigned(href.symbol) then
  714. inc(href.offset);
  715. href.addressmode:=AM_UNCHANGED;
  716. reg:=GetNextReg(reg);
  717. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  718. for i:=3 to tcgsize2size[tosize] do
  719. begin
  720. reg:=GetNextReg(reg);
  721. list.concat(taicpu.op_reg(A_CLR,reg));
  722. end;
  723. end;
  724. OS_S16:
  725. begin
  726. if href.base<>NR_NO then
  727. href.addressmode:=AM_POSTINCREMENT;
  728. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  729. if (href.offset<>0) or assigned(href.symbol) then
  730. inc(href.offset);
  731. href.addressmode:=AM_UNCHANGED;
  732. reg:=GetNextReg(reg);
  733. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  734. tmpreg:=reg;
  735. reg:=GetNextReg(reg);
  736. list.concat(taicpu.op_reg(A_CLR,reg));
  737. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  738. list.concat(taicpu.op_reg(A_COM,reg));
  739. tmpreg:=reg;
  740. for i:=4 to tcgsize2size[tosize] do
  741. begin
  742. reg:=GetNextReg(reg);
  743. emit_mov(list,reg,tmpreg);
  744. end;
  745. end;
  746. else
  747. conv_done:=false;
  748. end;
  749. end;
  750. if not conv_done then
  751. begin
  752. for i:=1 to tcgsize2size[fromsize] do
  753. begin
  754. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  755. href.addressmode:=AM_POSTINCREMENT
  756. else
  757. href.addressmode:=AM_UNCHANGED;
  758. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  759. if (href.offset<>0) or assigned(href.symbol) then
  760. inc(href.offset);
  761. reg:=GetNextReg(reg);
  762. end;
  763. end;
  764. end;
  765. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  766. var
  767. conv_done: boolean;
  768. tmpreg : tregister;
  769. i : integer;
  770. begin
  771. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  772. internalerror(2011021310);
  773. conv_done:=false;
  774. if tosize<>fromsize then
  775. begin
  776. conv_done:=true;
  777. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  778. fromsize:=tosize;
  779. case fromsize of
  780. OS_8:
  781. begin
  782. emit_mov(list,reg2,reg1);
  783. for i:=2 to tcgsize2size[tosize] do
  784. begin
  785. reg2:=GetNextReg(reg2);
  786. list.concat(taicpu.op_reg(A_CLR,reg2));
  787. end;
  788. end;
  789. OS_S8:
  790. begin
  791. { dest is always at least 16 bit at this point }
  792. emit_mov(list,reg2,reg1);
  793. reg2:=GetNextReg(reg2);
  794. list.concat(taicpu.op_reg(A_CLR,reg2));
  795. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  796. list.concat(taicpu.op_reg(A_COM,reg2));
  797. tmpreg:=reg2;
  798. for i:=3 to tcgsize2size[tosize] do
  799. begin
  800. reg2:=GetNextReg(reg2);
  801. emit_mov(list,reg2,tmpreg);
  802. end;
  803. end;
  804. OS_16:
  805. begin
  806. emit_mov(list,reg2,reg1);
  807. reg1:=GetNextReg(reg1);
  808. reg2:=GetNextReg(reg2);
  809. emit_mov(list,reg2,reg1);
  810. for i:=3 to tcgsize2size[tosize] do
  811. begin
  812. reg2:=GetNextReg(reg2);
  813. list.concat(taicpu.op_reg(A_CLR,reg2));
  814. end;
  815. end;
  816. OS_S16:
  817. begin
  818. { dest is always at least 32 bit at this point }
  819. emit_mov(list,reg2,reg1);
  820. reg1:=GetNextReg(reg1);
  821. reg2:=GetNextReg(reg2);
  822. emit_mov(list,reg2,reg1);
  823. reg2:=GetNextReg(reg2);
  824. list.concat(taicpu.op_reg(A_CLR,reg2));
  825. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  826. list.concat(taicpu.op_reg(A_COM,reg2));
  827. tmpreg:=reg2;
  828. for i:=4 to tcgsize2size[tosize] do
  829. begin
  830. reg2:=GetNextReg(reg2);
  831. emit_mov(list,reg2,tmpreg);
  832. end;
  833. end;
  834. else
  835. conv_done:=false;
  836. end;
  837. end;
  838. if not conv_done and (reg1<>reg2) then
  839. begin
  840. for i:=1 to tcgsize2size[fromsize] do
  841. begin
  842. emit_mov(list,reg2,reg1);
  843. reg1:=GetNextReg(reg1);
  844. reg2:=GetNextReg(reg2);
  845. end;
  846. end;
  847. end;
  848. { comparison operations }
  849. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  850. l : tasmlabel);
  851. begin
  852. { TODO : a_cmp_const_reg_label }
  853. end;
  854. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  855. begin
  856. { TODO : a_cmp_reg_reg_label }
  857. end;
  858. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  859. begin
  860. internalerror(2011021313);
  861. end;
  862. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  863. var
  864. ai : taicpu;
  865. begin
  866. ai:=taicpu.op_sym(A_JMP,l);
  867. ai.is_jmp:=true;
  868. list.concat(ai);
  869. end;
  870. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  871. var
  872. ai : taicpu;
  873. begin
  874. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  875. ai.is_jmp:=true;
  876. list.concat(ai);
  877. end;
  878. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  879. begin
  880. { TODO : implement g_flags2reg }
  881. end;
  882. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  883. var
  884. i : integer;
  885. begin
  886. case value of
  887. 0:
  888. ;
  889. -14..-1:
  890. begin
  891. if ((-value) mod 2)<>0 then
  892. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  893. for i:=1 to (-value) div 2 do
  894. list.concat(taicpu.op_const(A_RCALL,0));
  895. end;
  896. 1..7:
  897. begin
  898. for i:=1 to value do
  899. list.concat(taicpu.op_reg(A_POP,NR_R0));
  900. end;
  901. else
  902. begin
  903. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  904. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  905. // get SREG
  906. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  907. // block interrupts
  908. list.concat(taicpu.op_none(A_CLI));
  909. // write high SP
  910. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  911. // release interrupts
  912. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  913. // write low SP
  914. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  915. end;
  916. end;
  917. end;
  918. function tcgavr.GetLoad(const ref: treference) : tasmop;
  919. begin
  920. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  921. result:=A_LDS
  922. else
  923. result:=A_LD;
  924. end;
  925. function tcgavr.GetStore(const ref: treference) : tasmop;
  926. begin
  927. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  928. result:=A_STS
  929. else
  930. result:=A_ST;
  931. end;
  932. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  933. var
  934. regs : tcpuregisterset;
  935. reg : tsuperregister;
  936. begin
  937. if not(nostackframe) then
  938. begin
  939. { save int registers }
  940. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  941. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  942. regs:=regs+[RS_R28,RS_R29];
  943. for reg:=RS_R31 downto RS_R0 do
  944. if reg in regs then
  945. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  946. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  947. begin
  948. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  949. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  950. end
  951. else
  952. { the framepointer cannot be omitted on avr because sp
  953. is not a register but part of the i/o map
  954. }
  955. internalerror(2011021901);
  956. a_adjust_sp(list,-localsize);
  957. end;
  958. end;
  959. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  960. var
  961. regs : tcpuregisterset;
  962. reg : TSuperRegister;
  963. LocalSize : longint;
  964. begin
  965. if not(nostackframe) then
  966. begin
  967. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  968. begin
  969. LocalSize:=current_procinfo.calc_stackframe_size;
  970. a_adjust_sp(list,LocalSize);
  971. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  972. for reg:=RS_R0 to RS_R31 do
  973. if reg in regs then
  974. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  975. end
  976. else
  977. { the framepointer cannot be omitted on avr because sp
  978. is not a register but part of the i/o map
  979. }
  980. internalerror(2011021902);
  981. end;
  982. list.concat(taicpu.op_none(A_RET));
  983. end;
  984. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  985. begin
  986. { TODO : a_loadaddr_ref_reg }
  987. end;
  988. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  989. begin
  990. internalerror(2011021320);
  991. end;
  992. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  993. var
  994. paraloc1,paraloc2,paraloc3 : TCGPara;
  995. begin
  996. paraloc1.init;
  997. paraloc2.init;
  998. paraloc3.init;
  999. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1000. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1001. paramanager.getintparaloc(pocall_default,3,paraloc3);
  1002. a_load_const_cgpara(list,OS_INT,len,paraloc3);
  1003. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1004. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1005. paramanager.freecgpara(list,paraloc3);
  1006. paramanager.freecgpara(list,paraloc2);
  1007. paramanager.freecgpara(list,paraloc1);
  1008. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1009. a_call_name_static(list,'FPC_MOVE');
  1010. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1011. paraloc3.done;
  1012. paraloc2.done;
  1013. paraloc1.done;
  1014. end;
  1015. procedure tcgavr.g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : aint;aligned : boolean);
  1016. begin
  1017. internalerror(2011021321);
  1018. end;
  1019. procedure tcgavr.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  1020. begin
  1021. g_concatcopy_internal(list,source,dest,len,false);
  1022. end;
  1023. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);
  1024. var
  1025. countreg,tmpreg : tregister;
  1026. srcref,dstref : treference;
  1027. copysize,countregsize : tcgsize;
  1028. l : TAsmLabel;
  1029. i : longint;
  1030. begin
  1031. current_asmdata.getjumplabel(l);
  1032. if len>16 then
  1033. begin
  1034. reference_reset(srcref,0);
  1035. reference_reset(dstref,0);
  1036. { TODO : load refs! }
  1037. copysize:=OS_8;
  1038. if len<256 then
  1039. countregsize:=OS_8
  1040. else if len<65536 then
  1041. countregsize:=OS_16
  1042. else
  1043. internalerror(2011022007);
  1044. countreg:=getintregister(list,countregsize);
  1045. a_load_const_reg(list,countregsize,len,countreg);
  1046. cg.a_label(list,l);
  1047. tmpreg:=getintregister(list,copysize);
  1048. list.concat(taicpu.op_reg_ref(GetLoad(srcref),tmpreg,srcref));
  1049. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,tmpreg));
  1050. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1051. a_jmp_flags(list,F_NE,l);
  1052. end
  1053. else
  1054. begin
  1055. for i:=1 to len do
  1056. begin
  1057. srcref:=normalize_ref(list,source);
  1058. dstref:=normalize_ref(list,source);
  1059. copysize:=OS_8;
  1060. tmpreg:=getintregister(list,copysize);
  1061. if (srcref.base<>NR_NO) and (i<len) then
  1062. srcref.addressmode:=AM_POSTINCREMENT
  1063. else
  1064. srcref.addressmode:=AM_UNCHANGED;
  1065. if (dstref.base<>NR_NO) and (i<len) then
  1066. dstref.addressmode:=AM_POSTINCREMENT
  1067. else
  1068. dstref.addressmode:=AM_UNCHANGED;
  1069. list.concat(taicpu.op_reg_ref(GetLoad(srcref),tmpreg,srcref));
  1070. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,tmpreg));
  1071. if (dstref.offset<>0) or assigned(dstref.symbol) then
  1072. inc(dstref.offset);
  1073. if (srcref.offset<>0) or assigned(srcref.symbol) then
  1074. inc(srcref.offset);
  1075. end;
  1076. end;
  1077. end;
  1078. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1079. var
  1080. hl : tasmlabel;
  1081. ai : taicpu;
  1082. cond : TAsmCond;
  1083. begin
  1084. if not(cs_check_overflow in current_settings.localswitches) then
  1085. exit;
  1086. current_asmdata.getjumplabel(hl);
  1087. if not ((def.typ=pointerdef) or
  1088. ((def.typ=orddef) and
  1089. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,pasbool]))) then
  1090. cond:=C_VC
  1091. else
  1092. cond:=C_CC;
  1093. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1094. ai.SetCondition(cond);
  1095. ai.is_jmp:=true;
  1096. list.concat(ai);
  1097. a_call_name(list,'FPC_OVERFLOW',false);
  1098. a_label(list,hl);
  1099. end;
  1100. procedure tcgavr.g_save_registers(list: TAsmList);
  1101. begin
  1102. { this is done by the entry code }
  1103. end;
  1104. procedure tcgavr.g_restore_registers(list: TAsmList);
  1105. begin
  1106. { this is done by the exit code }
  1107. end;
  1108. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1109. var
  1110. ai : taicpu;
  1111. begin
  1112. { TODO : fix a_jmp_cond }
  1113. {
  1114. ai:=Taicpu.Op_sym(A_BRxx,l);
  1115. case cond of
  1116. OC_EQ:
  1117. ai.SetCondition(C_EQ);
  1118. OC_GT
  1119. OC_LT
  1120. OC_GTE
  1121. OC_LTE
  1122. OC_NE
  1123. OC_BE
  1124. OC_B
  1125. OC_AE
  1126. OC_A:
  1127. ai.is_jmp:=true;
  1128. list.concat(ai);
  1129. }
  1130. end;
  1131. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1132. begin
  1133. internalerror(2011021324);
  1134. end;
  1135. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1136. var
  1137. instr: taicpu;
  1138. begin
  1139. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1140. list.Concat(instr);
  1141. { Notify the register allocator that we have written a move instruction so
  1142. it can try to eliminate it. }
  1143. add_move_instruction(instr);
  1144. end;
  1145. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1146. begin
  1147. { TODO : a_op64_reg_reg }
  1148. end;
  1149. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1150. begin
  1151. { TODO : a_op64_const_reg }
  1152. end;
  1153. procedure create_codegen;
  1154. begin
  1155. cg:=tcgavr.create;
  1156. cg64:=tcg64favr.create;
  1157. end;
  1158. end.