aoptcpu.pas 27 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses cpubase, cgbase, aasmtai, aopt, aoptcpub;
  22. Type
  23. TCpuAsmOptimizer = class(TAsmOptimizer)
  24. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  25. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  26. { uses the same constructor as TAopObj }
  27. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  28. procedure PeepHoleOptPass2;override;
  29. End;
  30. Implementation
  31. uses
  32. cutils,
  33. cpuinfo,
  34. aasmbase,aasmcpu,aasmdata,
  35. globals,globtype,
  36. cgutils;
  37. type
  38. TAsmOpSet = set of TAsmOp;
  39. function CanBeCond(p : tai) : boolean;
  40. begin
  41. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  42. end;
  43. function RefsEqual(const r1, r2: treference): boolean;
  44. begin
  45. refsequal :=
  46. (r1.offset = r2.offset) and
  47. (r1.base = r2.base) and
  48. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  49. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  50. (r1.relsymbol = r2.relsymbol) and
  51. (r1.addressmode = r2.addressmode);
  52. end;
  53. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  54. begin
  55. result:=oper1.typ=oper2.typ;
  56. if result then
  57. case oper1.typ of
  58. top_const:
  59. Result:=oper1.val = oper2.val;
  60. top_reg:
  61. Result:=oper1.reg = oper2.reg;
  62. top_ref:
  63. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  64. else Result:=false;
  65. end
  66. end;
  67. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  68. begin
  69. result := (oper.typ = top_reg) and (oper.reg = reg);
  70. end;
  71. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  72. begin
  73. result :=
  74. (instr.typ = ait_instruction) and
  75. (taicpu(instr).opcode = op);
  76. end;
  77. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  78. begin
  79. result :=
  80. (instr.typ = ait_instruction) and
  81. (taicpu(instr).opcode in ops);
  82. end;
  83. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  84. begin
  85. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  86. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  87. Result:=true
  88. else
  89. Result:=inherited RegInInstruction(Reg, p1);
  90. end;
  91. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  92. var Next: tai; reg: TRegister): Boolean;
  93. begin
  94. Next:=Current;
  95. repeat
  96. Result:=GetNextInstruction(Next,Next);
  97. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  98. (is_calljmp(taicpu(Next).opcode));
  99. end;
  100. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  101. var
  102. hp1,hp2,hp3,hp4,hp5: tai;
  103. alloc, dealloc: tai_regalloc;
  104. i: integer;
  105. l: TAsmLabel;
  106. begin
  107. result := false;
  108. case p.typ of
  109. ait_instruction:
  110. begin
  111. {
  112. change
  113. <op> reg,x,y
  114. cp reg,r1
  115. into
  116. <op>s reg,x,y
  117. }
  118. { this optimization can applied only to the currently enabled operations because
  119. the other operations do not update all flags and FPC does not track flag usage }
  120. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  121. A_INC,A_LSL,A_LSR,
  122. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  123. GetNextInstruction(p, hp1) and
  124. MatchInstruction(hp1, A_CP) and
  125. (taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  126. (taicpu(hp1).oper[1]^.reg = NR_R1) and
  127. GetNextInstruction(hp1, hp2) and
  128. { be careful here, following instructions could use other flags
  129. however after a jump fpc never depends on the value of flags }
  130. { All above instructions set Z and N according to the following
  131. Z := result = 0;
  132. N := result[31];
  133. EQ = Z=1; NE = Z=0;
  134. MI = N=1; PL = N=0; }
  135. MatchInstruction(hp2, A_BRxx) and
  136. (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) { and
  137. no flag allocation tracking implemented yet on avr
  138. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  139. begin
  140. { move flag allocation if possible }
  141. { no flag allocation tracking implemented yet on avr
  142. GetLastInstruction(hp1, hp2);
  143. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  144. if assigned(hp2) then
  145. begin
  146. asml.Remove(hp2);
  147. asml.insertbefore(hp2, p);
  148. end;
  149. }
  150. asml.remove(hp1);
  151. hp1.free;
  152. Result:=true;
  153. end
  154. else
  155. case taicpu(p).opcode of
  156. A_LDI:
  157. begin
  158. { turn
  159. ldi reg0, imm
  160. cp reg1, reg0
  161. dealloc reg0
  162. into
  163. cpi reg1, imm
  164. }
  165. if (taicpu(p).ops=2) and
  166. (taicpu(p).oper[0]^.typ=top_reg) and
  167. (taicpu(p).oper[1]^.typ=top_const) and
  168. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  169. (hp1.typ=ait_instruction) and
  170. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  171. (taicpu(hp1).opcode=A_CP) and
  172. (taicpu(hp1).ops=2) and
  173. (taicpu(hp1).oper[1]^.typ=top_reg) and
  174. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  175. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  176. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  177. begin
  178. taicpu(hp1).opcode:=A_CPI;
  179. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  180. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  181. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  182. if assigned(alloc) and assigned(dealloc) then
  183. begin
  184. asml.Remove(alloc);
  185. alloc.Free;
  186. asml.Remove(dealloc);
  187. dealloc.Free;
  188. end;
  189. GetNextInstruction(p,hp1);
  190. asml.Remove(p);
  191. p.Free;
  192. p:=hp1;
  193. result:=true;
  194. end;
  195. end;
  196. A_STS:
  197. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  198. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  199. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  200. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  201. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  202. (taicpu(p).oper[0]^.ref^.offset>=32) and
  203. (taicpu(p).oper[0]^.ref^.offset<=95) then
  204. begin
  205. taicpu(p).opcode:=A_OUT;
  206. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  207. end;
  208. A_LDS:
  209. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  210. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  211. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  212. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  213. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  214. (taicpu(p).oper[1]^.ref^.offset>=32) and
  215. (taicpu(p).oper[1]^.ref^.offset<=95) then
  216. begin
  217. taicpu(p).opcode:=A_IN;
  218. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  219. end;
  220. A_IN:
  221. if GetNextInstruction(p,hp1) then
  222. begin
  223. {
  224. in rX,Y
  225. ori rX,n
  226. out Y,rX
  227. into
  228. sbi rX,lg(n)
  229. }
  230. if (taicpu(p).oper[1]^.val<=31) and
  231. MatchInstruction(hp1,A_ORI) and
  232. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  233. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  234. GetNextInstruction(hp1,hp2) and
  235. MatchInstruction(hp2,A_OUT) and
  236. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  237. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  238. begin
  239. taicpu(p).opcode:=A_SBI;
  240. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  241. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  242. asml.Remove(hp1);
  243. hp1.Free;
  244. asml.Remove(hp2);
  245. hp2.Free;
  246. result:=true;
  247. end
  248. {
  249. in rX,Y
  250. andi rX,not(n)
  251. out Y,rX
  252. into
  253. cbi rX,lg(n)
  254. }
  255. else if (taicpu(p).oper[1]^.val<=31) and
  256. MatchInstruction(hp1,A_ANDI) and
  257. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  258. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  259. GetNextInstruction(hp1,hp2) and
  260. MatchInstruction(hp2,A_OUT) and
  261. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  262. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  263. begin
  264. taicpu(p).opcode:=A_CBI;
  265. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  266. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  267. asml.Remove(hp1);
  268. hp1.Free;
  269. asml.Remove(hp2);
  270. hp2.Free;
  271. result:=true;
  272. end
  273. {
  274. in rX,Y
  275. andi rX,n
  276. breq/brne L1
  277. into
  278. sbis/sbic Y,lg(n)
  279. jmp L1
  280. .Ltemp:
  281. }
  282. else if (taicpu(p).oper[1]^.val<=31) and
  283. MatchInstruction(hp1,A_ANDI) and
  284. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  285. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  286. GetNextInstruction(hp1,hp2) and
  287. MatchInstruction(hp2,A_BRxx) and
  288. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  289. begin
  290. if taicpu(hp2).condition=C_EQ then
  291. taicpu(p).opcode:=A_SBIS
  292. else
  293. taicpu(p).opcode:=A_SBIC;
  294. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  295. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  296. asml.Remove(hp1);
  297. hp1.Free;
  298. taicpu(hp2).condition:=C_None;
  299. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  300. taicpu(hp2).opcode:=A_JMP
  301. else
  302. taicpu(hp2).opcode:=A_RJMP;
  303. current_asmdata.getjumplabel(l);
  304. l.increfs;
  305. asml.InsertAfter(tai_label.create(l), hp2);
  306. result:=true;
  307. end;
  308. end;
  309. A_CLR:
  310. begin
  311. { turn the common
  312. clr rX
  313. mov/ld rX, rY
  314. into
  315. mov/ld rX, rY
  316. }
  317. if (taicpu(p).ops=1) and
  318. (taicpu(p).oper[0]^.typ=top_reg) and
  319. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  320. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  321. (hp1.typ=ait_instruction) and
  322. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  323. (taicpu(hp1).ops>0) and
  324. (taicpu(hp1).oper[0]^.typ=top_reg) and
  325. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  326. begin
  327. asml.Remove(p);
  328. p.Free;
  329. p:=hp1;
  330. result:=true;
  331. end
  332. { turn
  333. clr rX
  334. ...
  335. adc rY, rX
  336. into
  337. ...
  338. adc rY, r1
  339. }
  340. else if (taicpu(p).ops=1) and
  341. (taicpu(p).oper[0]^.typ=top_reg) and
  342. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  343. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  344. (hp1.typ=ait_instruction) and
  345. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  346. (taicpu(hp1).ops=2) and
  347. (taicpu(hp1).oper[1]^.typ=top_reg) and
  348. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  349. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  350. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  351. begin
  352. taicpu(hp1).oper[1]^.reg:=NR_R1;
  353. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  354. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  355. if assigned(alloc) and assigned(dealloc) then
  356. begin
  357. asml.Remove(alloc);
  358. alloc.Free;
  359. asml.Remove(dealloc);
  360. dealloc.Free;
  361. end;
  362. GetNextInstruction(p,hp1);
  363. asml.Remove(p);
  364. p.free;
  365. p:=hp1;
  366. result:=true;
  367. end;
  368. end;
  369. A_PUSH:
  370. begin
  371. { turn
  372. push reg0
  373. push reg1
  374. pop reg3
  375. pop reg2
  376. into
  377. movw reg2,reg0
  378. }
  379. if (taicpu(p).ops=1) and
  380. (taicpu(p).oper[0]^.typ=top_reg) and
  381. GetNextInstruction(p,hp1) and
  382. (hp1.typ=ait_instruction) and
  383. (taicpu(hp1).opcode=A_PUSH) and
  384. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  385. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  386. GetNextInstruction(hp1,hp2) and
  387. (hp2.typ=ait_instruction) and
  388. (taicpu(hp2).opcode=A_POP) and
  389. GetNextInstruction(hp2,hp3) and
  390. (hp3.typ=ait_instruction) and
  391. (taicpu(hp3).opcode=A_POP) and
  392. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  393. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  394. begin
  395. taicpu(p).ops:=2;
  396. taicpu(p).opcode:=A_MOVW;
  397. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  398. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  399. asml.Remove(hp1);
  400. hp1.Free;
  401. asml.Remove(hp2);
  402. hp2.Free;
  403. asml.Remove(hp3);
  404. hp3.Free;
  405. result:=true;
  406. end;
  407. end;
  408. A_MOV:
  409. begin
  410. { turn
  411. mov reg0, reg1
  412. push reg0
  413. dealloc reg0
  414. into
  415. push reg1
  416. }
  417. if (taicpu(p).ops=2) and
  418. (taicpu(p).oper[0]^.typ = top_reg) and
  419. (taicpu(p).oper[1]^.typ = top_reg) and
  420. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  421. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  422. (hp1.typ = ait_instruction) and
  423. (taicpu(hp1).opcode in [A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_EOR,A_AND,A_OR]) and
  424. RegInInstruction(taicpu(p).oper[0]^.reg, hp1) and
  425. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  426. {(taicpu(hp1).ops=1) and
  427. (taicpu(hp1).oper[0]^.typ = top_reg) and
  428. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  429. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  430. begin
  431. for i := 0 to taicpu(hp1).ops-1 do
  432. if taicpu(hp1).oper[i]^.typ=top_reg then
  433. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  434. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  435. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  436. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  437. if assigned(alloc) and assigned(dealloc) then
  438. begin
  439. asml.Remove(alloc);
  440. alloc.Free;
  441. asml.Remove(dealloc);
  442. dealloc.Free;
  443. end;
  444. GetNextInstruction(p,hp1);
  445. asml.Remove(p);
  446. p.free;
  447. p:=hp1;
  448. result:=true;
  449. end
  450. { remove
  451. mov reg0,reg0
  452. }
  453. else if (taicpu(p).ops=2) and
  454. (taicpu(p).oper[0]^.typ = top_reg) and
  455. (taicpu(p).oper[1]^.typ = top_reg) and
  456. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  457. begin
  458. GetNextInstruction(p,hp1);
  459. asml.remove(p);
  460. p.free;
  461. p:=hp1;
  462. result:=true;
  463. end
  464. { fold
  465. mov reg2,reg0
  466. mov reg3,reg1
  467. to
  468. movw reg2,reg0
  469. }
  470. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  471. (taicpu(p).ops=2) and
  472. (taicpu(p).oper[0]^.typ = top_reg) and
  473. (taicpu(p).oper[1]^.typ = top_reg) and
  474. getnextinstruction(p,hp1) and
  475. (hp1.typ = ait_instruction) and
  476. (taicpu(hp1).opcode = A_MOV) and
  477. (taicpu(hp1).ops=2) and
  478. (taicpu(hp1).oper[0]^.typ = top_reg) and
  479. (taicpu(hp1).oper[1]^.typ = top_reg) and
  480. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  481. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  482. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  483. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  484. begin
  485. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  486. if assigned(alloc) then
  487. begin
  488. asml.Remove(alloc);
  489. asml.InsertBefore(alloc,p);
  490. end;
  491. taicpu(p).opcode:=A_MOVW;
  492. asml.remove(hp1);
  493. hp1.free;
  494. result:=true;
  495. end
  496. {
  497. This removes the first mov from
  498. mov rX,...
  499. mov rX,...
  500. }
  501. else if taicpu(hp1).opcode=A_MOV then
  502. while (hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_MOV) and
  503. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  504. { don't remove the first mov if the second is a mov rX,rX }
  505. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  506. begin
  507. asml.remove(p);
  508. p.free;
  509. p:=hp1;
  510. GetNextInstruction(hp1,hp1);
  511. result:=true;
  512. if not assigned(hp1) then
  513. break;
  514. end;
  515. end;
  516. A_SBIC,
  517. A_SBIS:
  518. begin
  519. {
  520. Turn
  521. sbic/sbis X, y
  522. jmp .L1
  523. op
  524. .L1:
  525. into
  526. sbis/sbic X,y
  527. op
  528. .L1:
  529. }
  530. if GetNextInstruction(p, hp1) and
  531. (hp1.typ=ait_instruction) and
  532. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  533. (taicpu(hp1).ops>0) and
  534. (taicpu(hp1).oper[0]^.typ = top_ref) and
  535. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  536. GetNextInstruction(hp1, hp2) and
  537. (hp2.typ=ait_instruction) and
  538. (not taicpu(hp2).is_jmp) and
  539. GetNextInstruction(hp2, hp3) and
  540. (hp3.typ=ait_label) and
  541. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  542. begin
  543. if taicpu(p).opcode=A_SBIC then
  544. taicpu(p).opcode:=A_SBIS
  545. else
  546. taicpu(p).opcode:=A_SBIC;
  547. tai_label(hp3).labsym.decrefs;
  548. AsmL.remove(hp1);
  549. taicpu(hp1).Free;
  550. result:=true;
  551. end
  552. {
  553. Turn
  554. sbiX X, y
  555. jmp .L1
  556. jmp .L2
  557. .L1:
  558. op
  559. .L2:
  560. into
  561. sbiX X,y
  562. .L1:
  563. op
  564. .L2:
  565. }
  566. else if GetNextInstruction(p, hp1) and
  567. (hp1.typ=ait_instruction) and
  568. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  569. (taicpu(hp1).ops>0) and
  570. (taicpu(hp1).oper[0]^.typ = top_ref) and
  571. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  572. GetNextInstruction(hp1, hp2) and
  573. (hp2.typ=ait_instruction) and
  574. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  575. (taicpu(hp2).ops>0) and
  576. (taicpu(hp2).oper[0]^.typ = top_ref) and
  577. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  578. GetNextInstruction(hp2, hp3) and
  579. (hp3.typ=ait_label) and
  580. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  581. GetNextInstruction(hp3, hp4) and
  582. (hp4.typ=ait_instruction) and
  583. GetNextInstruction(hp4, hp5) and
  584. (hp3.typ=ait_label) and
  585. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  586. begin
  587. tai_label(hp3).labsym.decrefs;
  588. tai_label(hp5).labsym.decrefs;
  589. AsmL.remove(hp1);
  590. taicpu(hp1).Free;
  591. AsmL.remove(hp2);
  592. taicpu(hp2).Free;
  593. result:=true;
  594. end;
  595. end;
  596. end;
  597. end;
  598. end;
  599. end;
  600. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  601. begin
  602. end;
  603. begin
  604. casmoptimizer:=TCpuAsmOptimizer;
  605. End.