cpuinfo.pas 25 KB

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  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for the ARM
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. ts32real = single;
  17. ts64real = double;
  18. ts80real = type extended;
  19. ts128real = type extended;
  20. ts64comp = comp;
  21. pbestreal=^bestreal;
  22. { possible supported processors for this target }
  23. tcputype =
  24. (cpu_none,
  25. cpu_armv3,
  26. cpu_armv4,
  27. cpu_armv4t,
  28. cpu_armv5,
  29. cpu_armv6,
  30. cpu_armv7,
  31. cpu_armv7m
  32. );
  33. Const
  34. cpu_arm = [cpu_none,cpu_armv3,cpu_armv4,cpu_armv4t,cpu_armv5];
  35. cpu_thumb = [];
  36. cpu_thumb2 = [cpu_armv7m];
  37. Type
  38. tfputype =
  39. (fpu_none,
  40. fpu_soft,
  41. fpu_libgcc,
  42. fpu_fpa,
  43. fpu_fpa10,
  44. fpu_fpa11,
  45. fpu_vfpv2,
  46. fpu_vfpv3
  47. );
  48. tcontrollertype =
  49. (ct_none,
  50. { Phillips }
  51. ct_lpc2114,
  52. ct_lpc2124,
  53. ct_lpc2194,
  54. ct_lpc1768,
  55. { ATMEL }
  56. ct_at91sam7s256,
  57. ct_at91sam7se256,
  58. ct_at91sam7x256,
  59. ct_at91sam7xc256,
  60. { STMicroelectronics }
  61. ct_stm32f103rb,
  62. ct_stm32f103re,
  63. ct_stm32f103c4t,
  64. { TI - Fury Class - 64 K Flash, 16 K SRAM Devices }
  65. ct_lm3s1110,
  66. ct_lm3s1133,
  67. ct_lm3s1138,
  68. ct_lm3s1150,
  69. ct_lm3s1162,
  70. ct_lm3s1165,
  71. ct_lm3s1166,
  72. ct_lm3s2110,
  73. ct_lm3s2139,
  74. ct_lm3s6100,
  75. ct_lm3s6110,
  76. { TI - Fury Class - 128K Flash, 32K SRAM devices }
  77. ct_lm3s1601,
  78. ct_lm3s1608,
  79. ct_lm3s1620,
  80. ct_lm3s1635,
  81. ct_lm3s1636,
  82. ct_lm3s1637,
  83. ct_lm3s1651,
  84. ct_lm3s2601,
  85. ct_lm3s2608,
  86. ct_lm3s2620,
  87. ct_lm3s2637,
  88. ct_lm3s2651,
  89. ct_lm3s6610,
  90. ct_lm3s6611,
  91. ct_lm3s6618,
  92. ct_lm3s6633,
  93. ct_lm3s6637,
  94. ct_lm3s8630,
  95. { TI - Fury Class - 256K Flash, 64K SRAM devices }
  96. ct_lm3s1911,
  97. ct_lm3s1918,
  98. ct_lm3s1937,
  99. ct_lm3s1958,
  100. ct_lm3s1960,
  101. ct_lm3s1968,
  102. ct_lm3s1969,
  103. ct_lm3s2911,
  104. ct_lm3s2918,
  105. ct_lm3s2919,
  106. ct_lm3s2939,
  107. ct_lm3s2948,
  108. ct_lm3s2950,
  109. ct_lm3s2965,
  110. ct_lm3s6911,
  111. ct_lm3s6918,
  112. ct_lm3s6938,
  113. ct_lm3s6950,
  114. ct_lm3s6952,
  115. ct_lm3s6965,
  116. ct_lm3s8930,
  117. ct_lm3s8933,
  118. ct_lm3s8938,
  119. ct_lm3s8962,
  120. ct_lm3s8970,
  121. ct_lm3s8971,
  122. { TI - Tempest Tempest - 256 K Flash, 64 K SRAM }
  123. ct_lm3s5951,
  124. ct_lm3s5956,
  125. ct_lm3s1b21,
  126. ct_lm3s2b93,
  127. ct_lm3s5b91,
  128. ct_lm3s9b81,
  129. ct_lm3s9b90,
  130. ct_lm3s9b92,
  131. ct_lm3s9b95,
  132. ct_lm3s9b96,
  133. { SAMSUNG }
  134. ct_sc32442b,
  135. // generic Thumb2 target
  136. ct_thumb2bare
  137. );
  138. Const
  139. {# Size of native extended floating point type }
  140. extended_size = 12;
  141. {# Size of a multimedia register }
  142. mmreg_size = 16;
  143. { target cpu string (used by compiler options) }
  144. target_cpu_string = 'arm';
  145. { calling conventions supported by the code generator }
  146. supported_calling_conventions : tproccalloptions = [
  147. pocall_internproc,
  148. pocall_safecall,
  149. pocall_stdcall,
  150. { same as stdcall only different name mangling }
  151. pocall_cdecl,
  152. { same as stdcall only different name mangling }
  153. pocall_cppdecl,
  154. { same as stdcall but floating point numbers are handled like equal sized integers }
  155. pocall_softfloat,
  156. { same as stdcall (requires that all const records are passed by
  157. reference, but that's already done for stdcall) }
  158. pocall_mwpascal,
  159. { used for interrupt handling }
  160. pocall_interrupt
  161. ];
  162. cputypestr : array[tcputype] of string[8] = ('',
  163. 'ARMV3',
  164. 'ARMV4',
  165. 'ARMV4T',
  166. 'ARMV5',
  167. 'ARMV6',
  168. 'ARMV7',
  169. 'ARMV7M'
  170. );
  171. fputypestr : array[tfputype] of string[6] = ('',
  172. 'SOFT',
  173. 'LIBGCC',
  174. 'FPA',
  175. 'FPA10',
  176. 'FPA11',
  177. 'VFPV2',
  178. 'VFPV3'
  179. );
  180. { We know that there are fields after sramsize
  181. but we don't care about this warning }
  182. {$WARN 3177 OFF}
  183. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  184. ((
  185. controllertypestr:'';
  186. controllerunitstr:'';
  187. interruptvectors:0;
  188. flashbase:0;
  189. flashsize:0;
  190. srambase:0;
  191. sramsize:0
  192. ),
  193. (
  194. controllertypestr:'LPC2114';
  195. controllerunitstr:'LPC21x4';
  196. interruptvectors:8;
  197. flashbase:$00000000;
  198. flashsize:$00040000;
  199. srambase:$40000000;
  200. sramsize:$00004000
  201. ),
  202. (
  203. controllertypestr:'LPC2124';
  204. controllerunitstr:'LPC21x4';
  205. interruptvectors:8;
  206. flashbase:$00000000;
  207. flashsize:$00040000;
  208. srambase:$40000000;
  209. sramsize:$00004000
  210. ),
  211. (
  212. controllertypestr:'LPC2194';
  213. controllerunitstr:'LPC21x4';
  214. interruptvectors:8;
  215. flashbase:$00000000;
  216. flashsize:$00040000;
  217. srambase:$40000000;
  218. sramsize:$00004000
  219. ),
  220. (
  221. controllertypestr:'LPC1768';
  222. controllerunitstr:'LPC1768';
  223. interruptvectors:12;
  224. flashbase:$00000000;
  225. flashsize:$00040000;
  226. srambase:$10000000;
  227. sramsize:$00008000
  228. ),
  229. (
  230. controllertypestr:'AT91SAM7S256';
  231. controllerunitstr:'AT91SAM7x256';
  232. interruptvectors:8;
  233. flashbase:$00000000;
  234. flashsize:$00040000;
  235. srambase:$00200000;
  236. sramsize:$00010000
  237. ),
  238. (
  239. controllertypestr:'AT91SAM7SE256';
  240. controllerunitstr:'AT91SAM7x256';
  241. interruptvectors:8;
  242. flashbase:$00000000;
  243. flashsize:$00040000;
  244. srambase:$00200000;
  245. sramsize:$00010000
  246. ),
  247. (
  248. controllertypestr:'AT91SAM7X256';
  249. controllerunitstr:'AT91SAM7x256';
  250. interruptvectors:8;
  251. flashbase:$00000000;
  252. flashsize:$00040000;
  253. srambase:$00200000;
  254. sramsize:$00010000
  255. ),
  256. (
  257. controllertypestr:'AT91SAM7XC256';
  258. controllerunitstr:'AT91SAM7x256';
  259. interruptvectors:8;
  260. flashbase:$00000000;
  261. flashsize:$00040000;
  262. srambase:$00200000;
  263. sramsize:$00010000
  264. ),
  265. // ct_stm32f103rb,
  266. (
  267. controllertypestr:'STM32F103RB';
  268. controllerunitstr:'STM32F103';
  269. interruptvectors:12;
  270. flashbase:$08000000;
  271. flashsize:$00020000;
  272. srambase:$20000000;
  273. sramsize:$00005000
  274. ),
  275. // ct_stm32f103re,
  276. (
  277. controllertypestr:'STM32F103RE';
  278. controllerunitstr:'STM32F103';
  279. interruptvectors:12;
  280. flashbase:$08000000;
  281. flashsize:$00080000;
  282. srambase:$20000000;
  283. sramsize:$00010000
  284. ),
  285. // ct_stm32f103re,
  286. (
  287. controllertypestr:'STM32F103C4T';
  288. controllerunitstr:'STM32F103';
  289. interruptvectors:12;
  290. flashbase:$08000000;
  291. flashsize:$00004000;
  292. srambase:$20000000;
  293. sramsize:$00001800
  294. ),
  295. { TI - 64 K Flash, 16 K SRAM Devices }
  296. // ct_lm3s1110,
  297. (
  298. controllertypestr:'LM3S1110';
  299. controllerunitstr:'LM3FURY';
  300. interruptvectors:72;
  301. flashbase:$00000000;
  302. flashsize:$00010000;
  303. srambase:$20000000;
  304. sramsize:$00004000
  305. ),
  306. // ct_lm3s1133,
  307. (
  308. controllertypestr:'LM3S1133';
  309. controllerunitstr:'LM3FURY';
  310. interruptvectors:72;
  311. flashbase:$00000000;
  312. flashsize:$00010000;
  313. srambase:$20000000;
  314. sramsize:$00004000
  315. ),
  316. // ct_lm3s1138,
  317. (
  318. controllertypestr:'LM3S1138';
  319. controllerunitstr:'LM3FURY';
  320. interruptvectors:72;
  321. flashbase:$00000000;
  322. flashsize:$00010000;
  323. srambase:$20000000;
  324. sramsize:$00004000
  325. ),
  326. // ct_lm3s1150,
  327. (
  328. controllertypestr:'LM3S1150';
  329. controllerunitstr:'LM3FURY';
  330. interruptvectors:72;
  331. flashbase:$00000000;
  332. flashsize:$00010000;
  333. srambase:$20000000;
  334. sramsize:$00004000
  335. ),
  336. // ct_lm3s1162,
  337. (
  338. controllertypestr:'LM3S1162';
  339. controllerunitstr:'LM3FURY';
  340. interruptvectors:72;
  341. flashbase:$00000000;
  342. flashsize:$00010000;
  343. srambase:$20000000;
  344. sramsize:$00004000
  345. ),
  346. // ct_lm3s1165,
  347. (
  348. controllertypestr:'LM3S1165';
  349. controllerunitstr:'LM3FURY';
  350. interruptvectors:72;
  351. flashbase:$00000000;
  352. flashsize:$00010000;
  353. srambase:$20000000;
  354. sramsize:$00004000
  355. ),
  356. // ct_lm3s1166,
  357. (
  358. controllertypestr:'LM3S1166';
  359. controllerunitstr:'LM3FURY';
  360. interruptvectors:72;
  361. flashbase:$00000000;
  362. flashsize:$00010000;
  363. srambase:$20000000;
  364. sramsize:$00004000
  365. ),
  366. // ct_lm3s2110,
  367. (
  368. controllertypestr:'LM3S2110';
  369. controllerunitstr:'LM3FURY';
  370. interruptvectors:72;
  371. flashbase:$00000000;
  372. flashsize:$00010000;
  373. srambase:$20000000;
  374. sramsize:$00004000
  375. ),
  376. // ct_lm3s2139,
  377. (
  378. controllertypestr:'LM3S2139';
  379. controllerunitstr:'LM3FURY';
  380. interruptvectors:72;
  381. flashbase:$00000000;
  382. flashsize:$00010000;
  383. srambase:$20000000;
  384. sramsize:$00004000
  385. ),
  386. // ct_lm3s6100,
  387. (
  388. controllertypestr:'LM3S6100';
  389. controllerunitstr:'LM3FURY';
  390. interruptvectors:72;
  391. flashbase:$00000000;
  392. flashsize:$00010000;
  393. srambase:$20000000;
  394. sramsize:$00004000
  395. ),
  396. // ct_lm3s6110,
  397. (
  398. controllertypestr:'LM3S6110';
  399. controllerunitstr:'LM3FURY';
  400. interruptvectors:72;
  401. flashbase:$00000000;
  402. flashsize:$00010000;
  403. srambase:$20000000;
  404. sramsize:$00004000
  405. ),
  406. { TI - 128K Flash, 32K SRAM devices }
  407. // ct_lm3s1601,
  408. (
  409. controllertypestr:'LM3S1601';
  410. controllerunitstr:'LM3FURY';
  411. interruptvectors:72;
  412. flashbase:$00000000;
  413. flashsize:$00020000;
  414. srambase:$20000000;
  415. sramsize:$00008000
  416. ),
  417. // ct_lm3s1608,
  418. (
  419. controllertypestr:'LM3S1608';
  420. controllerunitstr:'LM3FURY';
  421. interruptvectors:72;
  422. flashbase:$00000000;
  423. flashsize:$00020000;
  424. srambase:$20000000;
  425. sramsize:$00008000
  426. ),
  427. // ct_lm3s1620,
  428. (
  429. controllertypestr:'LM3S1620';
  430. controllerunitstr:'LM3FURY';
  431. interruptvectors:72;
  432. flashbase:$00000000;
  433. flashsize:$00020000;
  434. srambase:$20000000;
  435. sramsize:$00008000
  436. ),
  437. // ct_lm3s1635,
  438. (
  439. controllertypestr:'LM3S1635';
  440. controllerunitstr:'LM3FURY';
  441. interruptvectors:72;
  442. flashbase:$00000000;
  443. flashsize:$00020000;
  444. srambase:$20000000;
  445. sramsize:$00008000
  446. ),
  447. // ct_lm3s1636,
  448. (
  449. controllertypestr:'LM3S1636';
  450. controllerunitstr:'LM3FURY';
  451. interruptvectors:72;
  452. flashbase:$00000000;
  453. flashsize:$00020000;
  454. srambase:$20000000;
  455. sramsize:$00008000
  456. ),
  457. // ct_lm3s1637,
  458. (
  459. controllertypestr:'LM3S1637';
  460. controllerunitstr:'LM3FURY';
  461. interruptvectors:72;
  462. flashbase:$00000000;
  463. flashsize:$00020000;
  464. srambase:$20000000;
  465. sramsize:$00008000
  466. ),
  467. // ct_lm3s1651,
  468. (
  469. controllertypestr:'LM3S1651';
  470. controllerunitstr:'LM3FURY';
  471. interruptvectors:72;
  472. flashbase:$00000000;
  473. flashsize:$00020000;
  474. srambase:$20000000;
  475. sramsize:$00008000
  476. ),
  477. // ct_lm3s2601,
  478. (
  479. controllertypestr:'LM3S2601';
  480. controllerunitstr:'LM3FURY';
  481. interruptvectors:72;
  482. flashbase:$00000000;
  483. flashsize:$00020000;
  484. srambase:$20000000;
  485. sramsize:$00008000
  486. ),
  487. // ct_lm3s2608,
  488. (
  489. controllertypestr:'LM3S2608';
  490. controllerunitstr:'LM3FURY';
  491. interruptvectors:72;
  492. flashbase:$00000000;
  493. flashsize:$00020000;
  494. srambase:$20000000;
  495. sramsize:$00008000
  496. ),
  497. // ct_lm3s2620,
  498. (
  499. controllertypestr:'LM3S2620';
  500. controllerunitstr:'LM3FURY';
  501. interruptvectors:72;
  502. flashbase:$00000000;
  503. flashsize:$00020000;
  504. srambase:$20000000;
  505. sramsize:$00008000
  506. ),
  507. // ct_lm3s2637,
  508. (
  509. controllertypestr:'LM3S2637';
  510. controllerunitstr:'LM3FURY';
  511. interruptvectors:72;
  512. flashbase:$00000000;
  513. flashsize:$00020000;
  514. srambase:$20000000;
  515. sramsize:$00008000
  516. ),
  517. // ct_lm3s2651,
  518. (
  519. controllertypestr:'LM3S2651';
  520. controllerunitstr:'LM3FURY';
  521. interruptvectors:72;
  522. flashbase:$00000000;
  523. flashsize:$00020000;
  524. srambase:$20000000;
  525. sramsize:$00008000
  526. ),
  527. // ct_lm3s6610,
  528. (
  529. controllertypestr:'LM3S6610';
  530. controllerunitstr:'LM3FURY';
  531. interruptvectors:72;
  532. flashbase:$00000000;
  533. flashsize:$00020000;
  534. srambase:$20000000;
  535. sramsize:$00008000
  536. ),
  537. // ct_lm3s6611,
  538. (
  539. controllertypestr:'LM3S6611';
  540. controllerunitstr:'LM3FURY';
  541. interruptvectors:72;
  542. flashbase:$00000000;
  543. flashsize:$00020000;
  544. srambase:$20000000;
  545. sramsize:$00008000
  546. ),
  547. // ct_lm3s6618,
  548. (
  549. controllertypestr:'LM3S6618';
  550. controllerunitstr:'LM3FURY';
  551. interruptvectors:72;
  552. flashbase:$00000000;
  553. flashsize:$00020000;
  554. srambase:$20000000;
  555. sramsize:$00008000
  556. ),
  557. // ct_lm3s6633,
  558. (
  559. controllertypestr:'LM3S6633';
  560. controllerunitstr:'LM3FURY';
  561. interruptvectors:72;
  562. flashbase:$00000000;
  563. flashsize:$00020000;
  564. srambase:$20000000;
  565. sramsize:$00008000
  566. ),
  567. // ct_lm3s6637,
  568. (
  569. controllertypestr:'LM3S6637';
  570. controllerunitstr:'LM3FURY';
  571. interruptvectors:72;
  572. flashbase:$00000000;
  573. flashsize:$00020000;
  574. srambase:$20000000;
  575. sramsize:$00008000
  576. ),
  577. // ct_lm3s8630,
  578. (
  579. controllertypestr:'LM3S8630';
  580. controllerunitstr:'LM3FURY';
  581. interruptvectors:72;
  582. flashbase:$00000000;
  583. flashsize:$00020000;
  584. srambase:$20000000;
  585. sramsize:$00008000
  586. ),
  587. { TI - 256K Flash, 64K SRAM devices }
  588. // ct_lm3s1911,
  589. (
  590. controllertypestr:'LM3S1911';
  591. controllerunitstr:'LM3FURY';
  592. interruptvectors:72;
  593. flashbase:$00000000;
  594. flashsize:$00040000;
  595. srambase:$20000000;
  596. sramsize:$00010000
  597. ),
  598. // ct_lm3s1918,
  599. (
  600. controllertypestr:'LM3S1918';
  601. controllerunitstr:'LM3FURY';
  602. interruptvectors:72;
  603. flashbase:$00000000;
  604. flashsize:$00040000;
  605. srambase:$20000000;
  606. sramsize:$00010000
  607. ),
  608. // ct_lm3s1937,
  609. (
  610. controllertypestr:'LM3S1937';
  611. controllerunitstr:'LM3FURY';
  612. interruptvectors:72;
  613. flashbase:$00000000;
  614. flashsize:$00040000;
  615. srambase:$20000000;
  616. sramsize:$00010000
  617. ),
  618. // ct_lm3s1958,
  619. (
  620. controllertypestr:'LM3S1958';
  621. controllerunitstr:'LM3FURY';
  622. interruptvectors:72;
  623. flashbase:$00000000;
  624. flashsize:$00040000;
  625. srambase:$20000000;
  626. sramsize:$00010000
  627. ),
  628. // ct_lm3s1960,
  629. (
  630. controllertypestr:'LM3S1960';
  631. controllerunitstr:'LM3FURY';
  632. interruptvectors:72;
  633. flashbase:$00000000;
  634. flashsize:$00040000;
  635. srambase:$20000000;
  636. sramsize:$00010000
  637. ),
  638. // ct_lm3s1968,
  639. (
  640. controllertypestr:'LM3S1968';
  641. controllerunitstr:'LM3FURY';
  642. interruptvectors:72;
  643. flashbase:$00000000;
  644. flashsize:$00040000;
  645. srambase:$20000000;
  646. sramsize:$00010000
  647. ),
  648. // ct_lm3s1969,
  649. (
  650. controllertypestr:'LM3S1969';
  651. controllerunitstr:'LM3FURY';
  652. interruptvectors:72;
  653. flashbase:$00000000;
  654. flashsize:$00040000;
  655. srambase:$20000000;
  656. sramsize:$00010000
  657. ),
  658. // ct_lm3s2911,
  659. (
  660. controllertypestr:'LM3S2911';
  661. controllerunitstr:'LM3FURY';
  662. interruptvectors:72;
  663. flashbase:$00000000;
  664. flashsize:$00040000;
  665. srambase:$20000000;
  666. sramsize:$00010000
  667. ),
  668. // ct_lm3s2918,
  669. (
  670. controllertypestr:'LM3S2918';
  671. controllerunitstr:'LM3FURY';
  672. interruptvectors:72;
  673. flashbase:$00000000;
  674. flashsize:$00040000;
  675. srambase:$20000000;
  676. sramsize:$00010000
  677. ),
  678. // ct_lm3s2919,
  679. (
  680. controllertypestr:'LM3S2919';
  681. controllerunitstr:'LM3FURY';
  682. interruptvectors:72;
  683. flashbase:$00000000;
  684. flashsize:$00040000;
  685. srambase:$20000000;
  686. sramsize:$00010000
  687. ),
  688. // ct_lm3s2939,
  689. (
  690. controllertypestr:'LM3S2939';
  691. controllerunitstr:'LM3FURY';
  692. interruptvectors:72;
  693. flashbase:$00000000;
  694. flashsize:$00040000;
  695. srambase:$20000000;
  696. sramsize:$00010000
  697. ),
  698. // ct_lm3s2948,
  699. (
  700. controllertypestr:'LM3S2948';
  701. controllerunitstr:'LM3FURY';
  702. interruptvectors:72;
  703. flashbase:$00000000;
  704. flashsize:$00040000;
  705. srambase:$20000000;
  706. sramsize:$00010000
  707. ),
  708. // ct_lm3s2950,
  709. (
  710. controllertypestr:'LM3S2950';
  711. controllerunitstr:'LM3FURY';
  712. interruptvectors:72;
  713. flashbase:$00000000;
  714. flashsize:$00040000;
  715. srambase:$20000000;
  716. sramsize:$00010000
  717. ),
  718. // ct_lm3s2965,
  719. (
  720. controllertypestr:'LM3S2965';
  721. controllerunitstr:'LM3FURY';
  722. interruptvectors:72;
  723. flashbase:$00000000;
  724. flashsize:$00040000;
  725. srambase:$20000000;
  726. sramsize:$00010000
  727. ),
  728. // ct_lm3s6911,
  729. (
  730. controllertypestr:'LM3S6911';
  731. controllerunitstr:'LM3FURY';
  732. interruptvectors:72;
  733. flashbase:$00000000;
  734. flashsize:$00040000;
  735. srambase:$20000000;
  736. sramsize:$00010000
  737. ),
  738. // ct_lm3s6918,
  739. (
  740. controllertypestr:'LM3S6918';
  741. controllerunitstr:'LM3FURY';
  742. interruptvectors:72;
  743. flashbase:$00000000;
  744. flashsize:$00040000;
  745. srambase:$20000000;
  746. sramsize:$00010000
  747. ),
  748. // ct_lm3s6938,
  749. (
  750. controllertypestr:'LM3S6938';
  751. controllerunitstr:'LM3FURY';
  752. interruptvectors:72;
  753. flashbase:$00000000;
  754. flashsize:$00040000;
  755. srambase:$20000000;
  756. sramsize:$00010000
  757. ),
  758. // ct_lm3s6950,
  759. (
  760. controllertypestr:'LM3S6950';
  761. controllerunitstr:'LM3FURY';
  762. interruptvectors:72;
  763. flashbase:$00000000;
  764. flashsize:$00040000;
  765. srambase:$20000000;
  766. sramsize:$00010000
  767. ),
  768. // ct_lm3s6952,
  769. (
  770. controllertypestr:'LM3S6952';
  771. controllerunitstr:'LM3FURY';
  772. interruptvectors:72;
  773. flashbase:$00000000;
  774. flashsize:$00040000;
  775. srambase:$20000000;
  776. sramsize:$00010000
  777. ),
  778. // ct_lm3s6965,
  779. (
  780. controllertypestr:'LM3S6965';
  781. controllerunitstr:'LM3FURY';
  782. interruptvectors:72;
  783. flashbase:$00000000;
  784. flashsize:$00040000;
  785. srambase:$20000000;
  786. sramsize:$00010000
  787. ),
  788. // ct_lm3s8930,
  789. (
  790. controllertypestr:'LM3S8930';
  791. controllerunitstr:'LM3FURY';
  792. interruptvectors:72;
  793. flashbase:$00000000;
  794. flashsize:$00040000;
  795. srambase:$20000000;
  796. sramsize:$00010000
  797. ),
  798. // ct_lm3s8933,
  799. (
  800. controllertypestr:'LM3S8933';
  801. controllerunitstr:'LM3FURY';
  802. interruptvectors:72;
  803. flashbase:$00000000;
  804. flashsize:$00040000;
  805. srambase:$20000000;
  806. sramsize:$00010000
  807. ),
  808. // ct_lm3s8938,
  809. (
  810. controllertypestr:'LM3S8938';
  811. controllerunitstr:'LM3FURY';
  812. interruptvectors:72;
  813. flashbase:$00000000;
  814. flashsize:$00040000;
  815. srambase:$20000000;
  816. sramsize:$00010000
  817. ),
  818. // ct_lm3s8962,
  819. (
  820. controllertypestr:'LM3S8962';
  821. controllerunitstr:'LM3FURY';
  822. interruptvectors:72;
  823. flashbase:$00000000;
  824. flashsize:$00040000;
  825. srambase:$20000000;
  826. sramsize:$00010000
  827. ),
  828. // ct_lm3s8970,
  829. (
  830. controllertypestr:'LM3S8970';
  831. controllerunitstr:'LM3FURY';
  832. interruptvectors:72;
  833. flashbase:$00000000;
  834. flashsize:$00040000;
  835. srambase:$20000000;
  836. sramsize:$00010000
  837. ),
  838. // ct_lm3s8971,
  839. (
  840. controllertypestr:'LM3S8971';
  841. controllerunitstr:'LM3FURY';
  842. interruptvectors:72;
  843. flashbase:$00000000;
  844. flashsize:$00040000;
  845. srambase:$20000000;
  846. sramsize:$00010000
  847. ),
  848. { TI - Tempest parts - 256 K Flash, 64 K SRAM }
  849. // ct_lm3s5951,
  850. (
  851. controllertypestr:'LM3S5951';
  852. controllerunitstr:'LM3TEMPEST';
  853. interruptvectors:72;
  854. flashbase:$00000000;
  855. flashsize:$00040000;
  856. srambase:$20000000;
  857. sramsize:$00010000
  858. ),
  859. // ct_lm3s5956,
  860. (
  861. controllertypestr:'LM3S5956';
  862. controllerunitstr:'LM3TEMPEST';
  863. interruptvectors:72;
  864. flashbase:$00000000;
  865. flashsize:$00040000;
  866. srambase:$20000000;
  867. sramsize:$00010000
  868. ),
  869. // ct_lm3s1b21,
  870. (
  871. controllertypestr:'LM3S1B21';
  872. controllerunitstr:'LM3TEMPEST';
  873. interruptvectors:72;
  874. flashbase:$00000000;
  875. flashsize:$00040000;
  876. srambase:$20000000;
  877. sramsize:$00010000
  878. ),
  879. // ct_lm3s2b93,
  880. (
  881. controllertypestr:'LM3S2B93';
  882. controllerunitstr:'LM3TEMPEST';
  883. interruptvectors:72;
  884. flashbase:$00000000;
  885. flashsize:$00040000;
  886. srambase:$20000000;
  887. sramsize:$00010000
  888. ),
  889. // ct_lm3s5b91,
  890. (
  891. controllertypestr:'LM3S5B91';
  892. controllerunitstr:'LM3TEMPEST';
  893. interruptvectors:72;
  894. flashbase:$00000000;
  895. flashsize:$00040000;
  896. srambase:$20000000;
  897. sramsize:$00010000
  898. ),
  899. // ct_lm3s9b81,
  900. (
  901. controllertypestr:'LM3S9B81';
  902. controllerunitstr:'LM3TEMPEST';
  903. interruptvectors:72;
  904. flashbase:$00000000;
  905. flashsize:$00040000;
  906. srambase:$20000000;
  907. sramsize:$00010000
  908. ),
  909. // ct_lm3s9b90,
  910. (
  911. controllertypestr:'LM3S9B90';
  912. controllerunitstr:'LM3TEMPEST';
  913. interruptvectors:72;
  914. flashbase:$00000000;
  915. flashsize:$00040000;
  916. srambase:$20000000;
  917. sramsize:$00010000
  918. ),
  919. // ct_lm3s9b92,
  920. (
  921. controllertypestr:'LM3S9B92';
  922. controllerunitstr:'LM3TEMPEST';
  923. interruptvectors:72;
  924. flashbase:$00000000;
  925. flashsize:$00040000;
  926. srambase:$20000000;
  927. sramsize:$00010000
  928. ),
  929. // ct_lm3s9b95,
  930. (
  931. controllertypestr:'LM3S9B95';
  932. controllerunitstr:'LM3TEMPEST';
  933. interruptvectors:72;
  934. flashbase:$00000000;
  935. flashsize:$00040000;
  936. srambase:$20000000;
  937. sramsize:$00010000
  938. ),
  939. // ct_lm3s9b96,
  940. (
  941. controllertypestr:'LM3S9B96';
  942. controllerunitstr:'LM3TEMPEST';
  943. interruptvectors:72;
  944. flashbase:$00000000;
  945. flashsize:$00040000;
  946. srambase:$20000000;
  947. sramsize:$00010000
  948. ),
  949. //ct_SC32442b,
  950. (
  951. controllertypestr:'SC32442B';
  952. controllerunitstr:'sc32442b';
  953. interruptvectors:7;
  954. flashbase:$00000000;
  955. flashsize:$00000000;
  956. srambase:$00000000;
  957. sramsize:$08000000
  958. ),
  959. // bare bones Thumb2
  960. (
  961. controllertypestr:'THUMB2_BARE';
  962. controllerunitstr:'THUMB2_BARE';
  963. interruptvectors:128;
  964. flashbase:$00000000;
  965. flashsize:$00100000;
  966. srambase:$20000000;
  967. sramsize:$00100000
  968. )
  969. );
  970. vfp_scalar = [fpu_vfpv2,fpu_vfpv3];
  971. { Supported optimizations, only used for information }
  972. supported_optimizerswitches = genericlevel1optimizerswitches+
  973. genericlevel2optimizerswitches+
  974. genericlevel3optimizerswitches-
  975. { no need to write info about those }
  976. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  977. [cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,
  978. cs_opt_stackframe,cs_opt_nodecse];
  979. level1optimizerswitches = genericlevel1optimizerswitches;
  980. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  981. [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse];
  982. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
  983. Implementation
  984. end.