csopt386.pas 86 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  4. development team
  5. This unit contains the common subexpression elimination procedure.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. Unit CSOpt386;
  20. {$i fpcdefs.inc}
  21. Interface
  22. Uses aasmbase,aasmtai,aasmcpu, cpuinfo, cpubase, optbase;
  23. function CSE(asmL: TAAsmoutput; first, last: Tai; pass: longint): boolean;
  24. function doReplaceReg(hp: Taicpu; newReg, orgReg: tregister): boolean;
  25. function changeOp(var o: toper; newReg, orgReg: tregister): boolean;
  26. function storeBack(p1: Tai; orgReg, newReg: tregister): boolean;
  27. function NoHardCodedRegs(p: Taicpu; orgReg, newReg: TRegister): boolean;
  28. function RegSizesOK(oldReg,newReg: TRegister; p: Taicpu): boolean;
  29. Implementation
  30. Uses
  31. {$ifdef replaceregdebug}cutils,{$endif}
  32. globtype, verbose, cgbase, globals, daopt386, cginfo, rgobj, rropt386;
  33. {
  34. Function TaiInSequence(P: Tai; Const Seq: TContent): Boolean;
  35. Var P1: Tai;
  36. Counter: Byte;
  37. TmpResult: Boolean;
  38. Begin
  39. TmpResult := False;
  40. P1 := Seq.StartMod;
  41. Counter := 1;
  42. While Not(TmpResult) And
  43. (Counter <= Seq.NrOfMods) Do
  44. Begin
  45. If (P = P1) Then TmpResult := True;
  46. Inc(Counter);
  47. p1 := Tai(p1.Next);
  48. End;
  49. TaiInSequence := TmpResult;
  50. End;
  51. }
  52. function modifiesConflictingMemLocation(p1: Tai; reg: tregister; c: tregContent;
  53. var regsStillValid: tregset): boolean;
  54. var
  55. p, hp: Taicpu;
  56. tmpRef: treference;
  57. r,regCounter: tregister;
  58. opCount: byte;
  59. dummy: boolean;
  60. begin
  61. modifiesConflictingMemLocation := false;
  62. if p1.typ <> ait_instruction then
  63. exit;
  64. p := Taicpu(p1);
  65. case p.opcode of
  66. A_MOV,A_MOVSX,A_MOVZX:
  67. if p.oper[1].typ = top_ref then
  68. for regCounter.enum := R_EAX to R_EDI do
  69. begin
  70. if p.oper[0].typ<>top_reg then
  71. break;
  72. if writeToMemDestroysContents(reg32(p.oper[0].reg),p.oper[1].ref^,
  73. regCounter,c[regCounter.enum],dummy) then
  74. begin
  75. exclude(regsStillValid,regCounter.enum);
  76. modifiesConflictingMemLocation := not(reg.enum in regsStillValid);
  77. end;
  78. end
  79. else
  80. { if is_reg_var[reg32(p.oper[1].reg)] then }
  81. for regCounter.enum := R_EAX to R_EDI do
  82. begin
  83. if writeDestroysContents(p.oper[1],regCounter,c[regCounter.enum]) then
  84. begin
  85. exclude(regsStillValid,regCounter.enum);
  86. modifiesConflictingMemLocation := not(reg.enum in regsStillValid);
  87. end
  88. end;
  89. A_DIV, A_IDIV, A_MUL, A_IMUL:
  90. begin
  91. if (p.ops = 1) then
  92. begin
  93. r.enum:=R_EDX;
  94. if rg.is_reg_var[R_EDX] and
  95. (not getNextInstruction(p,hp) or
  96. not((hp.typ = ait_instruction) and
  97. (hp.opcode = A_MOV) and
  98. (hp.oper[0].typ = top_reg) and
  99. (reg32(hp.oper[0].reg).enum = R_EDX) and
  100. getNextInstruction(hp,hp) and
  101. (hp.typ = ait_instruction) and
  102. (hp.opcode = A_POP) and
  103. (hp.oper[0].reg.enum = R_EDX))) then
  104. for regCounter.enum := R_EAX to R_EDI do
  105. if writeToRegDestroysContents(r,regCounter,c[regCounter.enum]) then
  106. begin
  107. exclude(regsStillValid,R_EDX);
  108. modifiesConflictingMemLocation := not(reg.enum in regsStillValid);
  109. end
  110. end
  111. else
  112. { only possible for imul }
  113. { last operand is always destination }
  114. if rg.is_reg_var[reg32(p.oper[p.ops-1].reg).enum] then
  115. for regCounter.enum := R_EAX to R_EDI do
  116. begin
  117. if writeDestroysContents(p.oper[p.ops-1],regCounter,c[regCounter.enum]) then
  118. begin
  119. exclude(regsStillValid,regCounter.enum);
  120. modifiesConflictingMemLocation := not(reg.enum in regsStillValid);
  121. end
  122. end
  123. end;
  124. else
  125. for opCount := 1 to MaxCh do
  126. case InsProp[p.opcode].Ch[opCount] of
  127. Ch_MOp1,CH_WOp1,CH_RWOp1:
  128. { if (p.oper[0].typ = top_ref) or }
  129. { ((p.oper[0].typ = top_reg) and }
  130. { is_reg_var[reg32(p.oper[0].reg)]) then }
  131. for regCounter.enum := R_EAX to R_EDI do
  132. if writeDestroysContents(p.oper[0],regCounter,c[regCounter.enum]) then
  133. begin
  134. exclude(regsStillValid,regCounter.enum);
  135. modifiesConflictingMemLocation := not(reg.enum in regsStillValid);
  136. end;
  137. Ch_MOp2,CH_WOp2,CH_RWOp2:
  138. { if (p.oper[1].typ = top_ref) or }
  139. { ((p.oper[1].typ = top_reg) and }
  140. { is_reg_var[reg32(p.oper[1].reg)]) then }
  141. for regCounter.enum := R_EAX to R_EDI do
  142. if writeDestroysContents(p.oper[1],regCounter,c[regCounter.enum]) then
  143. begin
  144. exclude(regsStillValid,regCounter.enum);
  145. modifiesConflictingMemLocation := not(reg.enum in regsStillValid);
  146. end;
  147. Ch_MOp3,CH_WOp3,CH_RWOp3:
  148. { if (p.oper[2].typ = top_ref) or }
  149. { ((p.oper[2].typ = top_reg) and }
  150. { is_reg_var[reg32(p.oper[2].reg)]) then }
  151. for regCounter.enum := R_EAX to R_EDI do
  152. if writeDestroysContents(p.oper[2],regCounter,c[regCounter.enum]) then
  153. begin
  154. exclude(regsStillValid,regCounter.enum);
  155. modifiesConflictingMemLocation := not(reg.enum in regsStillValid);
  156. end;
  157. Ch_WMemEDI:
  158. begin
  159. fillchar(tmpref,sizeof(tmpref),0);
  160. tmpRef.base.enum := R_EDI;
  161. tmpRef.index.enum := R_EDI;
  162. r.enum:=R_NO;
  163. for regCounter.enum := R_EAX to R_EDI do
  164. if writeToMemDestroysContents(r,tmpRef,regCounter,c[regCounter.enum],dummy) then
  165. begin
  166. exclude(regsStillValid,regCounter.enum);
  167. modifiesConflictingMemLocation := not(reg.enum in regsStillValid);
  168. end;
  169. end;
  170. end;
  171. end;
  172. end;
  173. function isSimpleMemLoc(const ref: treference): boolean;
  174. begin
  175. isSimpleMemLoc :=
  176. (ref.index.enum = R_NO) and
  177. not(ref.base.enum in (rg.usableregsint+[R_EDI]));
  178. end;
  179. {checks whether the current instruction sequence (starting with p) and the
  180. one between StartMod and EndMod of Reg are the same. If so, the number of
  181. instructions that match is stored in Found and true is returned, otherwise
  182. Found holds the number of instructions between StartMod and EndMod and false
  183. is returned}
  184. Function CheckSequence(p: Tai; var prev: Tai; Reg: TRegister; Var Found: Longint;
  185. Var RegInfo: TRegInfo; findPrevSeqs: boolean): Boolean;
  186. var
  187. regsNotRead, regsStillValid : tregset;
  188. checkingPrevSequences,
  189. passedFlagsModifyingInstr,
  190. passedJump : boolean;
  191. function getPrevSequence(p: Tai; reg: tregister; currentPrev: Tai; var newPrev: Tai): tregister;
  192. const
  193. current_reg: tregister = (enum:R_NO;number:0);
  194. function stillValid(p: Tai): boolean;
  195. begin
  196. stillValid :=
  197. (p.typ = ait_instruction) and
  198. (Taicpu(p).opcode <> a_jmp) and
  199. (pTaiprop(p.optinfo)^.regs[reg.enum].wstate =
  200. pTaiprop(currentPrev.optinfo)^.regs[reg.enum].wstate) and
  201. { in case destroyreg is called with doIncState = false }
  202. (pTaiprop(p.optinfo)^.regs[reg.enum].typ =
  203. pTaiprop(currentPrev.optinfo)^.regs[reg.enum].typ) and
  204. (reg.enum in (regsNotRead * regsStillValid));
  205. passedJump :=
  206. (p.typ = ait_instruction) and
  207. (Taicpu(p).is_jmp);
  208. passedFlagsModifyingInstr :=
  209. instrWritesFlags(currentPrev);
  210. end;
  211. function findChangedRegister(p: Tai): tregister;
  212. var
  213. regCounter: tregister;
  214. begin
  215. for regCounter.enum := succ(current_reg.enum) to R_EDI do
  216. with pTaiprop(p.optinfo)^.regs[regCounter.enum] do
  217. if ((startmod <>
  218. pTaiprop(currentPrev.optinfo)^.regs[regCounter.enum].startmod) or
  219. (nrOfMods <>
  220. pTaiprop(currentPrev.optinfo)^.regs[regCounter.enum].nrOfMods)) and
  221. (pTaiprop(p.optinfo)^.regs[regCounter.enum].typ in
  222. [con_ref,con_noRemoveRef]) then
  223. begin
  224. findChangedRegister := regCounter;
  225. current_reg := regCounter;
  226. exit;
  227. end;
  228. current_reg.enum := R_NO;
  229. findChangedRegister.enum := R_NO;
  230. end;
  231. var
  232. hp, prevFound: Tai;
  233. tmpResult, regCounter: tregister;
  234. begin
  235. if not(current_reg.enum in [R_NO,R_EDI]) then
  236. begin
  237. tmpResult := findChangedRegister(currentPrev);
  238. if tmpResult.enum <> R_NO then
  239. begin
  240. getPrevSequence := tmpResult;
  241. exit;
  242. end;
  243. end;
  244. getPrevSequence.enum := R_NO;
  245. passedJump := passedJump or
  246. ((currentPrev.typ = ait_instruction) and
  247. (Taicpu(currentPrev).is_jmp));
  248. passedFlagsModifyingInstr := instrWritesFlags(currentPrev);
  249. if (passedJump and not(reg.enum in (rg.usableregsint+[R_EDI]))) or
  250. not getLastInstruction(currentPrev,hp) then
  251. exit;
  252. prevFound := currentPrev;
  253. tmpResult.enum := R_NO;
  254. while (tmpResult.enum = R_NO) and
  255. stillValid(hp) and
  256. (pTaiprop(prevFound.optinfo)^.canBeRemoved or
  257. not(modifiesConflictingMemLocation(prevFound,reg,
  258. pTaiprop(p.optinfo)^.regs,regsStillValid))) do
  259. begin
  260. { only update the regsread for the instructions we already passed }
  261. if not(pTaiprop(prevFound.optinfo)^.canBeRemoved) then
  262. for regCounter.enum := R_EAX to R_EDI do
  263. if regReadByInstruction(regCounter,prevFound) then
  264. exclude(regsNotRead,regCounter.enum);
  265. { in case getPreviousInstruction fails and sets hp to nil in the }
  266. { next iteration }
  267. prevFound := hp;
  268. if not(pTaiprop(hp.optinfo)^.canBeRemoved) then
  269. tmpResult := findChangedRegister(hp);
  270. if { do not load the self pointer or a regvar before a (conditional) }
  271. { jump with a new value, since if the jump is taken, the old value }
  272. { is (probably) still necessary }
  273. (passedJump and not(reg.enum in (rg.usableregsint+[R_EDI]))) or
  274. not getLastInstruction(hp,hp) then
  275. break;
  276. end;
  277. getPrevSequence := tmpResult;
  278. if tmpResult.enum <> R_NO then
  279. newPrev := prevFound;
  280. end;
  281. function getNextRegToTest(var prev: Tai; currentReg: tregister): tregister;
  282. begin
  283. if not checkingPrevSequences then
  284. begin
  285. Repeat
  286. Inc(currentReg.enum);
  287. Until (currentReg.enum > R_EDI) or
  288. (pTaiprop(prev.optInfo)^.regs[currentReg.enum].typ
  289. in [con_ref,con_noRemoveRef]);
  290. if currentReg.enum > R_EDI then
  291. begin
  292. if (Taicpu(p).oper[0].typ <> top_ref) or
  293. isSimpleMemLoc(Taicpu(p).oper[0].ref^) then
  294. begin
  295. checkingPrevSequences := true;
  296. passedJump := false;
  297. end
  298. else
  299. getNextRegToTest.enum := R_NO;
  300. end
  301. else getNextRegToTest := currentReg;
  302. end;
  303. if checkingPrevSequences then
  304. if findPrevSeqs then
  305. getNextRegToTest :=
  306. getPrevSequence(p,reg,prev,prev)
  307. else
  308. getNextRegToTest.enum := R_NO;
  309. end;
  310. Var hp2, hp3{, EndMod},highPrev, orgPrev: Tai;
  311. {Cnt,} OldNrOfMods: Longint;
  312. startRegInfo, OrgRegInfo, HighRegInfo: TRegInfo;
  313. regModified: array[R_NO..R_EDI] of boolean;
  314. HighFound, OrgRegFound: Byte;
  315. RegCounter, regCounter2, tmpreg, base, index: TRegister;
  316. OrgRegResult: Boolean;
  317. TmpResult, flagResultsNeeded: Boolean;
  318. Begin {CheckSequence}
  319. Reg := Reg32(Reg);
  320. TmpResult := False;
  321. FillChar(OrgRegInfo, SizeOf(OrgRegInfo), 0);
  322. FillChar(startRegInfo, sizeof(startRegInfo), 0);
  323. OrgRegFound := 0;
  324. HighFound := 0;
  325. OrgRegResult := False;
  326. with startRegInfo do
  327. begin
  328. newRegsEncountered := [procinfo.FramePointer.enum, STACK_POINTER_REG];
  329. new2OldReg[procinfo.FramePointer.enum] := procinfo.FramePointer;
  330. new2OldReg[STACK_POINTER_REG].enum := STACK_POINTER_REG;
  331. oldRegsEncountered := newRegsEncountered;
  332. end;
  333. checkingPrevSequences := false;
  334. passedFlagsModifyingInstr := false;
  335. flagResultsNeeded := false;
  336. regsNotRead := [R_EAX,R_EBX,R_ECX,R_EDX,R_ESP,R_EBP,R_EDI,R_ESI];
  337. regsStillValid := regsNotRead;
  338. GetLastInstruction(p, prev);
  339. tmpreg.enum:=R_NO;
  340. regCounter := getNextRegToTest(prev,tmpreg);
  341. While (RegCounter.enum <> R_NO) Do
  342. Begin
  343. fillchar(regModified,sizeof(regModified),0);
  344. regInfo := startRegInfo;
  345. Found := 0;
  346. hp2 := PTaiProp(prev.OptInfo)^.Regs[RegCounter.enum].StartMod;
  347. If (prev <> PTaiProp(prev.OptInfo)^.Regs[RegCounter.enum].StartMod)
  348. Then OldNrOfMods := PTaiProp(prev.OptInfo)^.Regs[RegCounter.enum].NrOfMods
  349. Else OldNrOfMods := 1;
  350. hp3 := p;
  351. While (Found <> OldNrOfMods) And
  352. { old new }
  353. InstructionsEquivalent(hp2, hp3, RegInfo) Do
  354. Begin
  355. if not checkingPrevSequences and
  356. (hp3.typ = ait_instruction) and
  357. ((Taicpu(hp3).opcode = A_MOV) or
  358. (Taicpu(hp3).opcode = A_MOVZX) or
  359. (Taicpu(hp3).opcode = A_LEA) or
  360. (Taicpu(hp3).opcode = A_MOVSX)) and
  361. (Taicpu(hp3).oper[1].typ = top_reg) and
  362. not(regInOp(Taicpu(hp3).oper[1].reg,
  363. Taicpu(hp3).oper[0])) then
  364. begin
  365. tmpreg := reg32(Taicpu(hp3).oper[1].reg);
  366. regInfo.lastReload[tmpreg.enum] := hp3;
  367. case Taicpu(hp3).oper[0].typ of
  368. top_ref:
  369. begin
  370. base := reg32(Taicpu(hp3).oper[0].ref^.base);
  371. index := reg32(Taicpu(hp3).oper[0].ref^.index);
  372. if (found <> 0) and
  373. ((base.enum = R_NO) or
  374. regModified[base.enum] or
  375. (base.enum = procinfo.framepointer.enum) or
  376. (assigned(procinfo._class) and (base.enum = R_ESI))) and
  377. ((index.enum = R_NO) or
  378. regModified[index.enum] or
  379. (assigned(procinfo._class) and (index.enum = R_ESI))) and
  380. not(regInRef(tmpReg,Taicpu(hp3).oper[0].ref^)) then
  381. with pTaiprop(hp3.optinfo)^.regs[tmpreg.enum] do
  382. if nrOfMods > (oldNrOfMods - found) then
  383. oldNrOfMods := found + nrOfMods;
  384. end;
  385. top_reg:
  386. if regModified[reg32(Taicpu(hp3).oper[0].reg).enum] then
  387. with pTaiprop(hp3.optinfo)^.regs[tmpreg.enum] do
  388. if nrOfMods > (oldNrOfMods - found) then
  389. oldNrOfMods := found + nrOfMods;
  390. end;
  391. end;
  392. for regCounter2.enum := R_EAX to R_EDI do
  393. regModified[regCounter2.enum] := regModified[regCounter2.enum] or
  394. regModifiedByInstruction(regCounter2,hp3);
  395. if flagResultsNeeded then
  396. flagResultsNeeded := not instrReadsFlags(hp3);
  397. if not flagResultsNeeded then
  398. flagResultsNeeded := pTaiprop(hp3.optinfo)^.FlagsUsed;
  399. GetNextInstruction(hp2, hp2);
  400. GetNextInstruction(hp3, hp3);
  401. Inc(Found);
  402. End;
  403. for regCounter2.enum := R_EAX to R_EDI do
  404. if (regInfo.new2OldReg[regCounter2.enum].enum <> R_NO) and
  405. (regCounter2.enum in PTaiProp(hp3.optInfo)^.usedRegs) and
  406. not regLoadedWithNewValue(regCounter2,false,hp3) then
  407. include(regInfo.regsStillUsedAfterSeq,regCounter2.enum);
  408. if checkingPrevSequences then
  409. begin
  410. for regCounter2.enum := R_EAX to R_EDI do
  411. if not(regInfo.new2OldReg[regCounter2.enum].enum in [R_NO,regCounter2.enum]) and
  412. (not(regCounter2.enum in (regsNotRead * regsStillValid)) or
  413. not(regInfo.new2OldReg[regCounter2.enum].enum in regsStillValid)) then
  414. begin
  415. found := 0;
  416. break;
  417. end;
  418. if passedFlagsModifyingInstr and flagResultsNeeded then
  419. found := 0;
  420. end;
  421. If (Found <> OldNrOfMods) or
  422. { the following is to avoid problems with rangecheck code (see testcse2) }
  423. (assigned(hp3) and
  424. ((reg.enum in regInfo.regsLoadedForRef) and
  425. (reg.enum in PTaiProp(hp3.optInfo)^.usedRegs) and
  426. not regLoadedWithNewValue(reg,false,hp3))) then
  427. Begin
  428. TmpResult := False;
  429. If (found > 0) then
  430. {this is correct because we only need to turn off the CanBeRemoved flag
  431. when an instruction has already been processed by CheckSequence
  432. (otherwise CanBeRemoved can't be true and thus can't have to be turned off).
  433. If it has already been processed by CheckSequence and flagged to be
  434. removed, it means that it has been checked against a previous sequence
  435. and that it was equal (otherwise CheckSequence would have returned false
  436. and the instruction wouldn't have been removed). If this "If found > 0"
  437. check is left out, incorrect optimizations are performed.}
  438. Found := PTaiProp(Tai(p).OptInfo)^.Regs[Reg.enum].NrOfMods
  439. End
  440. Else TmpResult := True;
  441. If TmpResult And
  442. (Found > HighFound)
  443. Then
  444. Begin
  445. highPrev := prev;
  446. HighFound := Found;
  447. HighRegInfo := RegInfo;
  448. End;
  449. If (RegCounter.enum = Reg.enum) Then
  450. Begin
  451. orgPrev := prev;
  452. OrgRegFound := Found;
  453. OrgRegResult := TmpResult;
  454. OrgRegInfo := RegInfo
  455. End;
  456. regCounter := getNextRegToTest(prev,regCounter);
  457. End;
  458. If (HighFound > 0) And
  459. (Not(OrgRegResult) Or
  460. (HighFound > OrgRegFound))
  461. Then
  462. Begin
  463. {$ifndef fpc}
  464. TmpResult := True;
  465. {$else fpc}
  466. CheckSequence := True;
  467. {$endif fpc}
  468. prev := highPrev;
  469. RegInfo := HighRegInfo;
  470. Found := HighFound
  471. End
  472. Else
  473. Begin
  474. {$ifndef fpc}
  475. TmpResult := OrgRegResult;
  476. {$else fpc}
  477. CheckSequence := OrgRegResult;
  478. {$endif fpc}
  479. prev := orgPrev;
  480. Found := OrgRegFound;
  481. RegInfo := OrgRegInfo;
  482. End;
  483. {$ifndef fpc}
  484. CheckSequence := TmpResult;
  485. {$endif fpc}
  486. End; {CheckSequence}
  487. Procedure SetAlignReg(p: Tai);
  488. Const alignSearch = 12;
  489. var regsUsable: TRegSet;
  490. prevInstrCount, nextInstrCount: Longint;
  491. prevState, nextWState,nextRState: Array[R_EAX..R_EDI] of byte;
  492. regCounter, lastRemoved: TRegister;
  493. prev, next: Tai;
  494. {$ifdef alignregdebug}
  495. temp: Tai;
  496. {$endif alignregdebug}
  497. begin
  498. regsUsable := [R_EAX,R_ECX,R_EDX,R_EBX,{R_ESP,R_EBP,}R_ESI,R_EDI];
  499. for regCounter.enum := R_EAX to R_EDI do
  500. begin
  501. prevState[regCounter.enum] := PTaiProp(p.optInfo)^.Regs[regCounter.enum].wState;
  502. nextWState[regCounter.enum] := PTaiProp(p.optInfo)^.Regs[regCounter.enum].wState;
  503. nextRState[regCounter.enum] := PTaiProp(p.optInfo)^.Regs[regCounter.enum].rState;
  504. end;
  505. getLastInstruction(p,prev);
  506. getNextInstruction(p,next);
  507. lastRemoved := Tai_align(p).reg;
  508. nextInstrCount := 0;
  509. prevInstrCount := 0;
  510. while ((assigned(prev) and
  511. assigned(prev.optInfo) and
  512. (prevInstrCount < alignSearch)) or
  513. (assigned(next) and
  514. assigned(next.optInfo) and
  515. (nextInstrCount < alignSearch))) And
  516. (regsUsable <> []) do
  517. begin
  518. {$ifdef alignregdebug}
  519. if assigned(prev) then
  520. begin
  521. temp := tai_comment.Create(strpnew('got here'));
  522. temp.next := prev.next;
  523. temp.previous := prev;
  524. prev.next := temp;
  525. if assigned(temp.next) then
  526. temp.next.previous := temp;
  527. end;
  528. {$endif alignregdebug}
  529. if assigned(prev) and assigned(prev.optinfo) and
  530. (prevInstrCount < alignSearch) then
  531. begin
  532. if (prev.typ = ait_instruction) And
  533. (insProp[TaiCpu(prev).opcode].ch[1] <> Ch_ALL) and
  534. (TaiCpu(prev).opcode <> A_JMP) then
  535. begin
  536. inc(prevInstrCount);
  537. for regCounter.enum := R_EAX to R_EDI do
  538. begin
  539. if (regCounter.enum in regsUsable) And
  540. (PTaiProp(prev.optInfo)^.Regs[regCounter.enum].wState <>
  541. prevState[regCounter.enum]) then
  542. begin
  543. lastRemoved := regCounter;
  544. exclude(regsUsable,regCounter.enum);
  545. {$ifdef alignregdebug}
  546. temp := tai_comment.Create(strpnew(
  547. std_reg2str[regCounter.enum]+' removed')));
  548. temp.next := prev.next;
  549. temp.previous := prev;
  550. prev.next := temp;
  551. if assigned(temp.next) then
  552. temp.next.previous := temp;
  553. if regsUsable = [] then
  554. begin
  555. temp := tai_comment.Create(strpnew(
  556. 'regsUsable empty here')));
  557. temp.next := prev.next;
  558. temp.previous := prev;
  559. prev.next := temp;
  560. if assigned(temp.next) then
  561. temp.next.previous := temp;
  562. end;
  563. {$endif alignregdebug}
  564. end;
  565. prevState[regCounter.enum] :=
  566. PTaiProp(prev.optInfo)^.Regs[regCounter.enum].wState;
  567. end;
  568. getLastInstruction(prev,prev);
  569. end
  570. else
  571. If GetLastInstruction(prev,prev) and
  572. assigned(prev.optinfo) then
  573. for regCounter.enum := R_EAX to R_EDI do
  574. prevState[regCounter.enum] :=
  575. PTaiProp(prev.optInfo)^.Regs[regCounter.enum].wState
  576. end;
  577. if assigned(next) and assigned(next.optInfo) and
  578. (nextInstrCount < alignSearch) then
  579. begin
  580. if (next.typ = ait_instruction) and
  581. (insProp[TaiCpu(next).opcode].ch[1] <> Ch_ALL) and
  582. (TaiCpu(next).opcode <> A_JMP) then
  583. begin
  584. inc(nextInstrCount);
  585. for regCounter.enum := R_EAX to R_EDI do
  586. begin
  587. if (regCounter.enum in regsUsable) And
  588. ((PTaiProp(next.optInfo)^.Regs[regCounter.enum].wState <>
  589. nextWState[regCounter.enum]) or
  590. (PTaiProp(next.optInfo)^.Regs[regCounter.enum].rState <>
  591. nextRState[regCounter.enum])) Then
  592. begin
  593. lastRemoved := regCounter;
  594. exclude(regsUsable,regCounter.enum);
  595. {$ifdef alignregdebug}
  596. temp := tai_comment.Create(strpnew(
  597. std_reg2str[regCounter.enum]+' removed')));
  598. temp.next := next.next;
  599. temp.previous := next;
  600. next.next := temp;
  601. if assigned(temp.next) then
  602. temp.next.previous := temp;
  603. if regsUsable = [] then
  604. begin
  605. temp := tai_comment.Create(strpnew(
  606. 'regsUsable empty here')));
  607. temp.next := next.next;
  608. temp.previous := next;
  609. next.next := temp;
  610. if assigned(temp.next) then
  611. temp.next.previous := temp;
  612. end;
  613. {$endif alignregdebug}
  614. end;
  615. nextWState[regCounter.enum] :=
  616. PTaiProp(next.optInfo)^.Regs[regCounter.enum].wState;
  617. nextRState[regCounter.enum] :=
  618. PTaiProp(next.optInfo)^.Regs[regCounter.enum].rState;
  619. end
  620. end
  621. else
  622. for regCounter.enum := R_EAX to R_EDI do
  623. begin
  624. nextWState[regCounter.enum] :=
  625. PTaiProp(next.optInfo)^.Regs[regCounter.enum].wState;
  626. nextRState[regCounter.enum] :=
  627. PTaiProp(next.optInfo)^.Regs[regCounter.enum].rState;
  628. end;
  629. getNextInstruction(next,next);
  630. end;
  631. end;
  632. if regsUsable <> [] then
  633. for regCounter.enum := R_EAX to R_EDI do
  634. if regCounter.enum in regsUsable then
  635. begin
  636. lastRemoved := regCounter;
  637. break
  638. end;
  639. {$ifdef alignregdebug}
  640. next := tai_comment.Create(strpnew(std_reg2str[lastRemoved.enum]+
  641. ' chosen as alignment register')));
  642. next.next := p.next;
  643. next.previous := p;
  644. p.next := next;
  645. if assigned(next.next) then
  646. next.next.previous := next;
  647. {$endif alignregdebug}
  648. Tai_align(p).reg := lastRemoved;
  649. End;
  650. procedure clearmemwrites(p: tai; reg: tregister);
  651. var
  652. beginmemwrite: tai;
  653. begin
  654. beginmemwrite := pTaiprop(p.optinfo)^.regs[reg.enum].memwrite;
  655. repeat
  656. pTaiprop(p.optinfo)^.regs[reg.enum].memwrite := nil;
  657. until not getnextinstruction(p,p) or
  658. (pTaiprop(p.optinfo)^.regs[reg.enum].memwrite <> beginmemwrite);
  659. end;
  660. Procedure ClearRegContentsFrom(reg: TRegister; p, endP: Tai);
  661. { first clears the contents of reg from p till endP. Then the contents are }
  662. { cleared until the first instruction that changes reg }
  663. var
  664. {$ifdef replaceregdebug}
  665. hp: Tai;
  666. l: longint;
  667. {$endif replaceregdebug}
  668. regcounter: tregister;
  669. oldStartmod: Tai;
  670. begin
  671. {$ifdef replaceregdebug}
  672. l := random(1000);
  673. hp := tai_comment.Create(strpnew(
  674. 'cleared '+std_reg2str[reg]+' from here... '+tostr(l))));
  675. hp.next := p;
  676. hp.previous := p.previous;
  677. p.previous := hp;
  678. if assigned(hp.previous) then
  679. hp.previous^.next := hp;
  680. {$endif replaceregdebug}
  681. PTaiProp(p.optInfo)^.Regs[reg.enum].typ := con_unknown;
  682. While (p <> endP) Do
  683. Begin
  684. for regcounter.enum := R_EAX to R_EDI do
  685. if (regcounter.enum <> reg.enum) and
  686. assigned(pTaiprop(p.optinfo)^.regs[reg.enum].memwrite) and
  687. reginref(regcounter,pTaiprop(p.optinfo)^.regs[reg.enum].memwrite.oper[1].ref^) then
  688. clearmemwrites(p,regcounter);
  689. with PTaiProp(p.optInfo)^.Regs[reg.enum] do
  690. begin
  691. typ := con_unknown;
  692. memwrite := nil;
  693. end;
  694. getNextInstruction(p,p);
  695. end;
  696. oldStartmod := PTaiProp(p.optInfo)^.Regs[reg.enum].startmod;
  697. repeat
  698. with PTaiProp(p.optInfo)^.Regs[reg.enum] do
  699. begin
  700. typ := con_unknown;
  701. memwrite := nil;
  702. end;
  703. until not getNextInstruction(p,p) or
  704. (PTaiProp(p.optInfo)^.Regs[reg.enum].startmod <> oldStartmod);
  705. {$ifdef replaceregdebug}
  706. if assigned(p) then
  707. begin
  708. hp := tai_comment.Create(strpnew(
  709. 'cleared '+std_reg2str[reg.enum]+' till here... '+tostr(l))));
  710. hp.next := p;
  711. hp.previous := p.previous;
  712. p.previous := hp;
  713. if assigned(hp.previous) then
  714. hp.previous^.next := hp;
  715. end;
  716. {$endif replaceregdebug}
  717. end;
  718. Procedure RestoreRegContentsTo(reg: TRegister; const c: TContent; p, endP: Tai);
  719. var
  720. {$ifdef replaceregdebug}
  721. hp: Tai;
  722. l: longint;
  723. {$endif replaceregdebug}
  724. tmpState: byte;
  725. begin
  726. {$ifdef replaceregdebug}
  727. l := random(1000);
  728. hp := tai_comment.Create(strpnew(
  729. 'restored '+std_reg2str[reg.enum]+' with data from here... '+tostr(l))));
  730. hp.next := p;
  731. hp.previous := p.previous;
  732. p.previous := hp;
  733. if assigned(hp.previous) then
  734. hp.previous^.next := hp;
  735. {$endif replaceregdebug}
  736. { PTaiProp(p.optInfo)^.Regs[reg] := c;}
  737. While (p <> endP) Do
  738. Begin
  739. PTaiProp(p.optInfo)^.Regs[reg.enum] := c;
  740. getNextInstruction(p,p);
  741. end;
  742. tmpState := PTaiProp(p.optInfo)^.Regs[reg.enum].wState;
  743. repeat
  744. PTaiProp(p.optInfo)^.Regs[reg.enum] := c;
  745. until not getNextInstruction(p,p) or
  746. (PTaiProp(p.optInfo)^.Regs[reg.enum].wState <> tmpState) or
  747. (p.typ = ait_label);
  748. if p.typ = ait_label then
  749. clearRegContentsFrom(reg,p,p);
  750. {$ifdef replaceregdebug}
  751. if assigned(p) then
  752. begin
  753. hp := tai_comment.Create(strpnew(
  754. 'restored '+std_reg2str[reg.enum]+' till here... '+tostr(l))));
  755. hp.next := p;
  756. hp.previous := p.previous;
  757. p.previous := hp;
  758. if assigned(hp.previous) then
  759. hp.previous^.next := hp;
  760. end;
  761. {$endif replaceregdebug}
  762. end;
  763. function NoHardCodedRegs(p: Taicpu; orgReg, newReg: TRegister): boolean;
  764. var chCount: byte;
  765. begin
  766. case p.opcode of
  767. A_IMUL: noHardCodedRegs := p.ops <> 1;
  768. A_SHL,A_SHR,A_SHLD,A_SHRD: noHardCodedRegs :=
  769. (p.oper[0].typ <> top_reg) or
  770. ((orgReg.enum <> R_ECX) and (newReg.enum <> R_ECX));
  771. else
  772. begin
  773. NoHardCodedRegs := true;
  774. with InsProp[p.opcode] do
  775. for chCount := 1 to MaxCh do
  776. if Ch[chCount] in ([Ch_REAX..Ch_MEDI,Ch_WMemEDI,Ch_All]-[Ch_RESP,Ch_WESP,Ch_RWESP]) then
  777. begin
  778. NoHardCodedRegs := false;
  779. break
  780. end;
  781. end;
  782. end;
  783. end;
  784. function ChangeReg(var Reg: TRegister; newReg, orgReg: TRegister): boolean;
  785. begin
  786. changeReg := true;
  787. if reg.enum = newReg.enum then
  788. reg := orgReg
  789. else if (reg.enum in regset8bit) and
  790. (reg.enum = rg.makeregsize(newReg,OS_8).enum) then
  791. reg := rg.makeregsize(orgReg,OS_8)
  792. else if (reg.enum in regset16bit) and
  793. (reg.enum = rg.makeregsize(newReg,OS_16).enum) then
  794. reg := rg.makeregsize(orgReg,OS_16)
  795. else
  796. changeReg := false;
  797. end;
  798. function changeOp(var o: toper; newReg, orgReg: tregister): boolean;
  799. var
  800. tmpresult: boolean;
  801. begin
  802. changeOp := false;
  803. case o.typ of
  804. top_reg: changeOp := changeReg(o.reg,newReg,orgReg);
  805. top_ref:
  806. begin
  807. tmpresult := changeReg(o.ref^.base,newReg,orgReg);
  808. changeop := changeReg(o.ref^.index,newReg,orgReg) or tmpresult;
  809. end;
  810. end;
  811. end;
  812. procedure updateStates(orgReg,newReg: tregister; hp: Tai; writeStateToo: boolean);
  813. var
  814. prev: Tai;
  815. newOrgRegRState, newOrgRegWState: byte;
  816. begin
  817. if getLastInstruction(hp,prev) then
  818. with pTaiprop(prev.optinfo)^ do
  819. begin
  820. {$ifopt r+}
  821. {$define rangeon}
  822. {$r-}
  823. {$endif}
  824. newOrgRegRState := regs[orgReg.enum].rState +
  825. pTaiprop(hp.optinfo)^.regs[newReg.enum].rState - regs[newReg.enum].rstate;
  826. if writeStateToo then
  827. newOrgRegWState := regs[orgReg.enum].wState +
  828. pTaiprop(hp.optinfo)^.regs[newReg.enum].wState - regs[newReg.enum].wstate;
  829. {$ifdef rangeon}
  830. {$undef rangeon}
  831. {$r+}
  832. {$endif}
  833. end
  834. else
  835. with pTaiprop(hp.optinfo)^.regs[newReg.enum] do
  836. begin
  837. newOrgRegRState := rState;
  838. if writeStateToo then
  839. newOrgRegWState := wState;
  840. end;
  841. with pTaiprop(hp.optinfo)^.regs[orgReg.enum] do
  842. begin
  843. rState := newOrgRegRState;
  844. if writeStateToo then
  845. wState := newOrgRegwState;
  846. end;
  847. end;
  848. function doReplaceReg(hp: Taicpu; newReg, orgReg: tregister): boolean;
  849. var
  850. opCount: longint;
  851. tmpResult: boolean;
  852. begin
  853. for opCount := 0 to hp.ops-1 do
  854. tmpResult :=
  855. changeOp(hp.oper[opCount],newReg,orgReg) or tmpResult;
  856. doReplaceReg := tmpResult;
  857. end;
  858. function RegSizesOK(oldReg,newReg: TRegister; p: Taicpu): boolean;
  859. { oldreg and newreg must be 32bit components }
  860. var opCount: byte;
  861. begin
  862. RegSizesOK := true;
  863. { if only one of them is a general purpose register ... }
  864. if (IsGP32reg(oldReg) xor IsGP32Reg(newReg)) then
  865. begin
  866. for opCount := 0 to 2 do
  867. if (p.oper[opCount].typ = top_reg) and
  868. (p.oper[opCount].reg.enum in [R_AL..R_DH]) then
  869. begin
  870. RegSizesOK := false;
  871. break
  872. end
  873. end;
  874. end;
  875. function doReplaceReadReg(p: Taicpu; newReg,orgReg: tregister): boolean;
  876. var opCount: byte;
  877. begin
  878. doReplaceReadReg := false;
  879. { handle special case }
  880. case p.opcode of
  881. A_IMUL:
  882. begin
  883. case p.ops of
  884. 1: internalerror(1301001);
  885. 2,3:
  886. begin
  887. if changeOp(p.oper[0],newReg,orgReg) then
  888. begin
  889. { updateStates(orgReg,newReg,p,false);}
  890. doReplaceReadReg := true;
  891. end;
  892. if p.ops = 3 then
  893. if changeOp(p.oper[1],newReg,orgReg) then
  894. begin
  895. { updateStates(orgReg,newReg,p,false);}
  896. doReplaceReadReg := true;
  897. end;
  898. end;
  899. end;
  900. end;
  901. A_DIV,A_IDIV,A_MUL: internalerror(1301002);
  902. else
  903. begin
  904. for opCount := 0 to 2 do
  905. if p.oper[opCount].typ = top_ref then
  906. if changeOp(p.oper[opCount],newReg,orgReg) then
  907. begin
  908. { updateStates(orgReg,newReg,p,false);}
  909. doReplaceReadReg := true;
  910. end;
  911. for opCount := 1 to MaxCh do
  912. case InsProp[p.opcode].Ch[opCount] of
  913. Ch_ROp1:
  914. if p.oper[0].typ = top_reg then
  915. if changeReg(p.oper[0].reg,newReg,orgReg) then
  916. begin
  917. { updateStates(orgReg,newReg,p,false);}
  918. doReplaceReadReg := true;
  919. end;
  920. Ch_ROp2:
  921. if p.oper[1].typ = top_reg then
  922. if changeReg(p.oper[1].reg,newReg,orgReg) then
  923. begin
  924. { updateStates(orgReg,newReg,p,false);}
  925. doReplaceReadReg := true;
  926. end;
  927. Ch_ROp3:
  928. if p.oper[2].typ = top_reg then
  929. if changeReg(p.oper[2].reg,newReg,orgReg) then
  930. begin
  931. { updateStates(orgReg,newReg,p,false);}
  932. doReplaceReadReg := true;
  933. end;
  934. end;
  935. end;
  936. end;
  937. end;
  938. procedure updateState(reg: tregister; p: Tai);
  939. { this procedure updates the read and write states of the instructions }
  940. { coming after p. It's called when the read/write state of p has been }
  941. { changed and this change has to be propagated to the following }
  942. { instructions as well }
  943. var
  944. newRState, newWState: byte;
  945. prevRState, prevWState: byte;
  946. doRState, doWState: boolean;
  947. begin
  948. { get the new read/write states from p }
  949. with pTaiprop(p.optinfo)^.regs[reg.enum] do
  950. begin
  951. newRState := rState;
  952. newWState := wState;
  953. end;
  954. if not GetNextInstruction(p,p) then
  955. exit;
  956. { get the old read/write states from the next instruction, to know }
  957. { when we can stop updating }
  958. with pTaiprop(p.optinfo)^.regs[reg.enum] do
  959. begin
  960. prevRState := rState;
  961. prevWState := wState;
  962. end;
  963. { adjust the states if this next instruction reads/writes the register }
  964. if regReadByInstruction(reg,p) then
  965. incState(newRState,1);
  966. if regModifiedByInstruction(reg,p) then
  967. incState(newWState,1);
  968. { do we still have to update the read and/or write states? }
  969. doRState := true;
  970. doWState := true;
  971. repeat
  972. { update the states }
  973. with pTaiprop(p.optinfo)^.regs[reg.enum] do
  974. begin
  975. if doRState then
  976. rState := newRState;
  977. if doWState then
  978. wState := newWState;
  979. end;
  980. if not getNextInstruction(p,p) then
  981. break;
  982. with pTaiprop(p.optinfo)^.regs[reg.enum] do
  983. begin
  984. { stop updating the read state if it changes }
  985. doRState :=
  986. doRState and (rState = prevRState);
  987. { if, by accident, this changed state is the same as the one }
  988. { we've been using, change it to a value that's definitely }
  989. { different from the previous and next state }
  990. if not doRState and
  991. (rState = newRState) then
  992. begin
  993. incState(newRState,1);
  994. prevRState := rState;
  995. doRState := true;
  996. end;
  997. { ditto for the write state }
  998. doWState :=
  999. doWState and (WState = prevWState);
  1000. if not doWState and
  1001. (wState = newWState) then
  1002. begin
  1003. incState(newWState,1);
  1004. prevWState := wState;
  1005. doWState := true;
  1006. end;
  1007. end;
  1008. { stop when we don't have to update either state anymore }
  1009. until not(doRState or doWState);
  1010. end;
  1011. function storeBack(p1: Tai; orgReg, newReg: tregister): boolean;
  1012. { returns true if p1 contains an instruction that stores the contents }
  1013. { of newReg back to orgReg }
  1014. begin
  1015. storeBack :=
  1016. (p1.typ = ait_instruction) and
  1017. (Taicpu(p1).opcode = A_MOV) and
  1018. (Taicpu(p1).oper[0].typ = top_reg) and
  1019. (Taicpu(p1).oper[0].reg.enum = newReg.enum) and
  1020. (Taicpu(p1).oper[1].typ = top_reg) and
  1021. (Taicpu(p1).oper[1].reg.enum = orgReg.enum);
  1022. end;
  1023. function ReplaceReg(asmL: TAAsmOutput; orgReg, newReg: TRegister; p: Tai;
  1024. const c: TContent; orgRegCanBeModified: Boolean;
  1025. var returnEndP: Tai): Boolean;
  1026. { Tries to replace orgreg with newreg in all instructions coming after p }
  1027. { until orgreg gets loaded with a new value. Returns true if successful, }
  1028. { false otherwise. If successful, the contents of newReg are set to c, }
  1029. { which should hold the contents of newReg before the current sequence }
  1030. { started }
  1031. { if the function returns true, returnEndP holds the last instruction }
  1032. { where newReg was replaced by orgReg }
  1033. var endP, hp: Tai;
  1034. removeLast, sequenceEnd, tmpResult, newRegModified, orgRegRead,
  1035. stateChanged, readStateChanged: Boolean;
  1036. begin
  1037. ReplaceReg := false;
  1038. tmpResult := true;
  1039. sequenceEnd := false;
  1040. newRegModified := false;
  1041. orgRegRead := false;
  1042. removeLast := false;
  1043. endP := p;
  1044. while tmpResult and not sequenceEnd do
  1045. begin
  1046. tmpResult :=
  1047. getNextInstruction(endP,endP) and
  1048. (endp.typ = ait_instruction) and
  1049. not(Taicpu(endp).is_jmp);
  1050. if tmpresult and not assigned(endp.optInfo) then
  1051. begin
  1052. { hp := tai_comment.Create(strpnew('next no optinfo'));
  1053. hp.next := endp;
  1054. hp.previous := endp.previous;
  1055. endp.previous := hp;
  1056. if assigned(hp.previous) then
  1057. hp.previous^.next := hp;}
  1058. exit;
  1059. end;
  1060. If tmpResult and
  1061. { don't take into account instructions that will be removed }
  1062. Not (PTaiProp(endp.optInfo)^.canBeRemoved) then
  1063. begin
  1064. { if the newReg gets stored back to the oldReg, we can change }
  1065. { "mov %oldReg,%newReg; <operations on %newReg>; mov %newReg, }
  1066. { %oldReg" to "<operations on %oldReg>" }
  1067. removeLast := storeBack(endP, orgReg, newReg);
  1068. sequenceEnd :=
  1069. { no support for (i)div, mul and imul with hardcoded operands }
  1070. (noHardCodedRegs(Taicpu(endP),orgReg,newReg) and
  1071. { if newReg gets loaded with a new value, we can stop }
  1072. { replacing newReg with oldReg here (possibly keeping }
  1073. { the original contents of oldReg so we still know them }
  1074. { afterwards) }
  1075. RegLoadedWithNewValue(newReg,true,Taicpu(endP)) or
  1076. { we can also stop if we reached the end of the use of }
  1077. { newReg's current contents }
  1078. (GetNextInstruction(endp,hp) and
  1079. FindRegDealloc(newReg,hp)));
  1080. { to be able to remove the first and last instruction of }
  1081. { movl %reg1, %reg2 }
  1082. { <operations on %reg2> (replacing reg2 with reg1 here) }
  1083. { movl %reg2, %reg1 }
  1084. { %reg2 must not be use afterwards (it can be as the }
  1085. { result of a peepholeoptimization) }
  1086. removeLast := removeLast and sequenceEnd;
  1087. newRegModified :=
  1088. newRegModified or
  1089. (not(regLoadedWithNewValue(newReg,true,Taicpu(endP))) and
  1090. RegModifiedByInstruction(newReg,endP));
  1091. orgRegRead := newRegModified and RegReadByInstruction(orgReg,endP);
  1092. sequenceEnd := SequenceEnd and
  1093. (removeLast or
  1094. { since newReg will be replaced by orgReg, we can't allow that newReg }
  1095. { gets modified if orgReg is still read afterwards (since after }
  1096. { replacing, this would mean that orgReg first gets modified and then }
  1097. { gets read in the assumption it still contains the unmodified value) }
  1098. not(newRegModified and orgRegRead)) (* and
  1099. { since newReg will be replaced by orgReg, we can't allow that newReg }
  1100. { gets modified if orgRegCanBeModified = false }
  1101. { this now gets checked after the loop (JM) }
  1102. (orgRegCanBeModified or not(newRegModified)) *);
  1103. tmpResult :=
  1104. not(removeLast) and
  1105. not(newRegModified and orgRegRead) and
  1106. (* (orgRegCanBeModified or not(newRegModified)) and *)
  1107. (* already check at the top
  1108. (endp.typ = ait_instruction) and *)
  1109. NoHardCodedRegs(Taicpu(endP),orgReg,newReg) and
  1110. RegSizesOk(orgReg,newReg,Taicpu(endP)) and
  1111. not RegModifiedByInstruction(orgReg,endP);
  1112. end;
  1113. end;
  1114. sequenceEnd := sequenceEnd and
  1115. (removeLast or
  1116. (orgRegCanBeModified or not(newRegModified))) and
  1117. (not(assigned(endp)) or
  1118. not(endp.typ = ait_instruction) or
  1119. (noHardCodedRegs(Taicpu(endP),orgReg,newReg) and
  1120. RegSizesOk(orgReg,newReg,Taicpu(endP)) and
  1121. not(newRegModified and
  1122. (orgReg.enum in PTaiProp(endp.optInfo)^.usedRegs) and
  1123. not(RegLoadedWithNewValue(orgReg,true,Taicpu(endP))))));
  1124. if SequenceEnd then
  1125. begin
  1126. {$ifdef replaceregdebug}
  1127. hp := tai_comment.Create(strpnew(
  1128. 'replacing '+std_reg2str[newreg]+' with '+std_reg2str[orgreg]+
  1129. ' from here...')));
  1130. hp.next := p;
  1131. hp.previous := p.previous;
  1132. p.previous := hp;
  1133. if assigned(hp.previous) then
  1134. hp.previous^.next := hp;
  1135. hp := tai_comment.Create(strpnew(
  1136. 'replaced '+std_reg2str[newreg]+' with '+std_reg2str[orgreg]+
  1137. ' till here')));
  1138. hp.next := endp.next;
  1139. hp.previous := endp;
  1140. endp.next := hp;
  1141. if assigned(hp.next) then
  1142. hp.next.previous := hp;
  1143. {$endif replaceregdebug}
  1144. replaceReg := true;
  1145. returnEndP := endP;
  1146. getNextInstruction(p,hp);
  1147. stateChanged := false;
  1148. while hp <> endP do
  1149. begin
  1150. if {not(PTaiProp(hp.optInfo)^.canBeRemoved) and }
  1151. (hp.typ = ait_instruction) then
  1152. stateChanged :=
  1153. doReplaceReg(Taicpu(hp),newReg,orgReg) or stateChanged;
  1154. if stateChanged then
  1155. updateStates(orgReg,newReg,hp,true);
  1156. getNextInstruction(hp,hp)
  1157. end;
  1158. if assigned(endp) and (endp.typ = ait_instruction) then
  1159. readStateChanged :=
  1160. DoReplaceReadReg(Taicpu(endP),newReg,orgReg);
  1161. if stateChanged or readStateChanged then
  1162. updateStates(orgReg,newReg,endP,stateChanged);
  1163. if stateChanged or readStateChanged then
  1164. updateState(orgReg,endP);
  1165. { the replacing stops either at the moment that }
  1166. { a) the newreg gets loaded with a new value (one not depending on the }
  1167. { current value of newreg) }
  1168. { b) newreg is completely replaced in this sequence and it's current value }
  1169. { isn't used anymore }
  1170. { In case b, the newreg was completely replaced by oldreg, so it's contents }
  1171. { are unchanged compared the start of this sequence, so restore them }
  1172. If removeLast or
  1173. RegLoadedWithNewValue(newReg,true,endP) then
  1174. GetLastInstruction(endP,hp)
  1175. else hp := endP;
  1176. if removeLast or
  1177. (p <> endp) or
  1178. not RegLoadedWithNewValue(newReg,true,endP) then
  1179. RestoreRegContentsTo(newReg,c,p,hp);
  1180. { In both case a and b, it is possible that the new register was modified }
  1181. { (e.g. an add/sub), so if it was replaced by oldreg in that instruction, }
  1182. { oldreg's contents have been changed. To take this into account, we simply }
  1183. { set the contents of orgreg to "unknown" after this sequence }
  1184. if newRegModified then
  1185. ClearRegContentsFrom(orgReg,p,hp);
  1186. if removeLast then
  1187. pTaiprop(endp.optinfo)^.canBeRemoved := true;
  1188. allocRegBetween(asml,orgReg,p,endP);
  1189. end
  1190. {$ifdef replaceregdebug}
  1191. else
  1192. begin
  1193. hp := tai_comment.Create(strpnew(
  1194. 'replacing '+std_reg2str[newreg]+' with '+std_reg2str[orgreg]+
  1195. ' from here...')));
  1196. hp.previous := p.previous;
  1197. hp.next := p;
  1198. p.previous := hp;
  1199. if assigned(hp.previous) then
  1200. hp.previous^.next := hp;
  1201. hp := tai_comment.Create(strpnew(
  1202. 'replacing '+std_reg2str[newreg]+' with '+std_reg2str[orgreg]+
  1203. ' failed here')));
  1204. hp.next := endp.next;
  1205. hp.previous := endp;
  1206. endp.next := hp;
  1207. if assigned(hp.next) then
  1208. hp.next.previous := hp;
  1209. end;
  1210. {$endif replaceregdebug}
  1211. End;
  1212. Function FindRegWithConst(p: Tai; size: topsize; l: aword; Var Res: TRegister): Boolean;
  1213. {Finds a register which contains the constant l}
  1214. Var Counter: TRegister;
  1215. {$ifdef testing}
  1216. hp: Tai;
  1217. {$endif testing}
  1218. tmpresult: boolean;
  1219. Begin
  1220. Counter.enum := R_NO;
  1221. repeat
  1222. inc(counter.enum);
  1223. tmpresult := (pTaiprop(p.optInfo)^.regs[counter.enum].typ in
  1224. [con_const,con_noRemoveConst]) and
  1225. (Taicpu(PTaiProp(p.OptInfo)^.Regs[Counter.enum].StartMod).opsize = size) and
  1226. (Taicpu(PTaiProp(p.OptInfo)^.Regs[Counter.enum].StartMod).oper[0].typ = top_const) and
  1227. (Taicpu(PTaiProp(p.OptInfo)^.Regs[Counter.enum].StartMod).oper[0].val = l);
  1228. {$ifdef testing}
  1229. if (pTaiprop(p.optInfo)^.regs[counter.enum].typ in [con_const,con_noRemoveConst]) then
  1230. begin
  1231. hp := tai_comment.Create(strpnew(
  1232. 'checking const load of '+tostr(l)+' here...')));
  1233. hp.next := PTaiProp(p.OptInfo)^.Regs[Counter.enum].StartMod;
  1234. hp.previous := PTaiProp(p.OptInfo)^.Regs[Counter.enum].StartMod^.previous;
  1235. PTaiProp(p.OptInfo)^.Regs[Counter.enum].StartMod^.previous := hp;
  1236. if assigned(hp.previous) then
  1237. hp.previous^.next := hp;
  1238. end;
  1239. {$endif testing}
  1240. until tmpresult or (Counter.enum = R_EDI);
  1241. if tmpResult then
  1242. res := Taicpu(PTaiProp(p.OptInfo)^.Regs[Counter.enum].StartMod).oper[1].reg;
  1243. FindRegWithConst := tmpResult;
  1244. End;
  1245. procedure removePrevNotUsedLoad(p: Tai; reg: tRegister; check: boolean);
  1246. { If check = true, it means the procedure has to check whether it isn't }
  1247. { possible that the contents are still used after p (used when removing }
  1248. { instructions because of a "call"), otherwise this is not necessary }
  1249. { (e.g. when you have a "mov 8(%ebp),%eax", you can be sure the previous }
  1250. { value of %eax isn't used anymore later on) }
  1251. var
  1252. hp1: Tai;
  1253. begin
  1254. if getLastInstruction(p,hp1) then
  1255. with pTaiprop(hp1.optInfo)^.regs[reg.enum] do
  1256. if (typ in [con_ref,con_invalid,con_const]) and
  1257. (nrOfMods = 1) and
  1258. (rState = pTaiprop(startmod.optInfo)^.regs[reg.enum].rState) and
  1259. (not(check) or
  1260. (not(regInInstruction(reg.enum,p)) and
  1261. (not(reg.enum in rg.usableregsint) and
  1262. (startmod.typ = ait_instruction) and
  1263. ((Taicpu(startmod).opcode = A_MOV) or
  1264. (Taicpu(startmod).opcode = A_MOVZX) or
  1265. (Taicpu(startmod).opcode = A_MOVSX) or
  1266. (Taicpu(startmod).opcode = A_LEA)) and
  1267. (Taicpu(startmod).oper[0].typ = top_ref) and
  1268. (Taicpu(startmod).oper[0].ref^.base.enum = STACK_POINTER_REG)) or
  1269. not(reg.enum in pTaiprop(hp1.optInfo)^.usedRegs) or
  1270. findRegDealloc(reg,p))) then
  1271. pTaiprop(startMod.optInfo)^.canBeRemoved := true;
  1272. end;
  1273. {$ifdef notused}
  1274. function is_mov_for_div(p: Taicpu): boolean;
  1275. begin
  1276. is_mov_for_div :=
  1277. (p.opcode = A_MOV) and
  1278. (p.oper[0].typ = top_const) and
  1279. (p.oper[1].typ = top_reg) and
  1280. (p.oper[1].reg = R_EDX) and
  1281. getNextInstruction(p,p) and
  1282. (p.typ = ait_instruction) and
  1283. ((p.opcode = A_DIV) or
  1284. (p.opcode = A_IDIV));
  1285. end;
  1286. {$endif notused}
  1287. function memtoreg(const t: Taicpu; const ref: treference; var startp: tai): tregister;
  1288. var
  1289. hp: tai;
  1290. p: pTaiprop;
  1291. regcounter: tregister;
  1292. optimizable: boolean;
  1293. begin
  1294. if not getlastinstruction(t,hp) or
  1295. not issimplememloc(ref) then
  1296. begin
  1297. memtoreg.enum := R_NO;
  1298. exit;
  1299. end;
  1300. p := pTaiprop(hp.optinfo);
  1301. optimizable := false;
  1302. for regcounter.enum := R_EAX to R_EDI do
  1303. begin
  1304. if (assigned(p^.regs[regcounter.enum].memwrite) and
  1305. refsequal(ref,p^.regs[regcounter.enum].memwrite.oper[1].ref^)) then
  1306. begin
  1307. optimizable := true;
  1308. hp := p^.regs[regcounter.enum].memwrite;
  1309. end
  1310. else if ((p^.regs[regcounter.enum].typ in [CON_REF,CON_NOREMOVEREF]) and
  1311. (p^.regs[regcounter.enum].nrofmods = 1) and
  1312. ((Taicpu(p^.regs[regcounter.enum].startmod).opcode = A_MOV) or
  1313. (Taicpu(p^.regs[regcounter.enum].startmod).opcode = A_MOVZX) or
  1314. (Taicpu(p^.regs[regcounter.enum].startmod).opcode = A_MOVSX)) and
  1315. (taicpu(p^.regs[regcounter.enum].startmod).oper[0].typ = top_ref) and
  1316. refsequal(ref,taicpu(p^.regs[regcounter.enum].startmod).oper[0].ref^)) then
  1317. begin
  1318. optimizable := true;
  1319. hp := p^.regs[regcounter.enum].startmod;
  1320. end;
  1321. if optimizable then
  1322. if ((t.opsize <> S_B) or
  1323. (regcounter.enum <> R_EDI)) and
  1324. sizescompatible(Taicpu(hp).opsize,t.opsize) then
  1325. begin
  1326. case t.opsize of
  1327. S_B,S_BW,S_BL:
  1328. memtoreg := rg.makeregsize(regcounter,OS_8);
  1329. S_W,S_WL:
  1330. memtoreg := rg.makeregsize(regcounter,OS_16);
  1331. S_L:
  1332. memtoreg := regcounter;
  1333. end;
  1334. startp := hp;
  1335. exit;
  1336. end;
  1337. end;
  1338. memtoreg.enum := R_NO;
  1339. end;
  1340. procedure removeLocalStores(const t1: tai);
  1341. {var
  1342. p: tai;
  1343. regcount: tregister; }
  1344. begin
  1345. {
  1346. for regcount := LoGPReg to HiGPReg do
  1347. if assigned(pTaiProp(t1.optinfo)^.regs[regcount].memwrite) and
  1348. (taicpu(pTaiProp(t1.optinfo)^.regs[regcount].memwrite).oper[1].ref^.base
  1349. = procinfo.framepointer) then
  1350. begin
  1351. pTaiProp(pTaiProp(t1.optinfo)^.regs[regcount].memwrite.optinfo)^.canberemoved := true;
  1352. clearmemwrites(pTaiProp(t1.optinfo)^.regs[regcount].memwrite,regcount);
  1353. end;
  1354. }
  1355. end;
  1356. procedure DoCSE(AsmL: TAAsmOutput; First, Last: Tai; findPrevSeqs, doSubOpts: boolean);
  1357. {marks the instructions that can be removed by RemoveInstructs. They're not
  1358. removed immediately because sometimes an instruction needs to be checked in
  1359. two different sequences}
  1360. var cnt, cnt2, {cnt3,} orgNrOfMods: longint;
  1361. p, hp1, hp2, prevSeq, prevSeq_next: Tai;
  1362. hp3, hp4: Tai;
  1363. hp5 : Tai;
  1364. RegInfo: TRegInfo;
  1365. RegCounter: TRegister;
  1366. Begin
  1367. p := First;
  1368. SkipHead(p);
  1369. While (p <> Last) Do
  1370. Begin
  1371. Case p.typ Of
  1372. ait_align:
  1373. if not(Tai_align(p).use_op) then
  1374. SetAlignReg(p);
  1375. ait_instruction:
  1376. Begin
  1377. Case Taicpu(p).opcode Of
  1378. A_CALL:
  1379. for regCounter.enum := R_EAX to R_EBX do
  1380. removePrevNotUsedLoad(p,regCounter,true);
  1381. A_CLD: If GetLastInstruction(p, hp1) And
  1382. (PTaiProp(hp1.OptInfo)^.DirFlag = F_NotSet) Then
  1383. PTaiProp(Tai(p).OptInfo)^.CanBeRemoved := True;
  1384. A_LEA, A_MOV, A_MOVZX, A_MOVSX:
  1385. Begin
  1386. hp2 := p;
  1387. Case Taicpu(p).oper[0].typ Of
  1388. top_ref, top_reg:
  1389. if (Taicpu(p).oper[1].typ = top_reg) then
  1390. Begin
  1391. With PTaiProp(p.OptInfo)^.Regs[Reg32(Taicpu(p).oper[1].reg).enum] Do
  1392. Begin
  1393. if (startmod = p) then
  1394. orgNrOfMods := nrOfMods
  1395. else
  1396. orgNrOfMods := 0;
  1397. If (p = StartMod) And
  1398. GetLastInstruction (p, hp1) And
  1399. not(hp1.typ in [ait_marker,ait_label]) then
  1400. {so we don't try to check a sequence when p is the first instruction of the block}
  1401. begin
  1402. {$ifdef csdebug}
  1403. hp5 := tai_comment.Create(strpnew(
  1404. 'cse checking '+std_reg2str[Reg32(Taicpu(p).oper[1].reg)])));
  1405. insertLLItem(asml,p,p.next,hp5);
  1406. {$endif csdebug}
  1407. If CheckSequence(p,prevSeq,Taicpu(p).oper[1].reg, Cnt, RegInfo, findPrevSeqs) And
  1408. (Cnt > 0) Then
  1409. Begin
  1410. (*
  1411. hp1 := nil;
  1412. { although it's perfectly ok to remove an instruction which doesn't contain }
  1413. { the register that we've just checked (CheckSequence takes care of that), }
  1414. { the sequence containing this other register should also be completely }
  1415. { checked and removed, otherwise we may get situations like this: }
  1416. { }
  1417. { movl 12(%ebp), %edx movl 12(%ebp), %edx }
  1418. { movl 16(%ebp), %eax movl 16(%ebp), %eax }
  1419. { movl 8(%edx), %edx movl 8(%edx), %edx }
  1420. { movl (%eax), eax movl (%eax), eax }
  1421. { cmpl %eax, %edx cmpl %eax, %edx }
  1422. { jnz l123 getting converted to jnz l123 }
  1423. { movl 12(%ebp), %edx movl 4(%eax), eax }
  1424. { movl 16(%ebp), %eax }
  1425. { movl 8(%edx), %edx }
  1426. { movl 4(%eax), eax }
  1427. *)
  1428. { not anymore: if the start of a new sequence is found while checking (e.g. }
  1429. { above that of eax while checking edx, this new sequence is automatically }
  1430. { also checked }
  1431. Cnt2 := 1;
  1432. While Cnt2 <= Cnt Do
  1433. Begin
  1434. (*
  1435. If not(regInInstruction(Taicpu(hp2).oper[1].reg, p)) and
  1436. not(pTaiprop(p.optinfo)^.canBeRemoved) then
  1437. begin
  1438. if (p.typ = ait_instruction) And
  1439. ((Taicpu(p).OpCode = A_MOV) or
  1440. (Taicpu(p).opcode = A_MOVZX) or
  1441. (Taicpu(p).opcode = A_MOVSX)) And
  1442. (Taicpu(p).oper[1].typ = top_reg) then
  1443. if not is_mov_for_div(Taicpu(p)) then
  1444. begin
  1445. regCounter := reg32(Taicpu(p).oper[1].reg);
  1446. if (regCounter in reginfo.regsStillUsedAfterSeq) then
  1447. begin
  1448. if (hp1 = nil) then
  1449. hp1 := reginfo.lastReload[regCounter];
  1450. end
  1451. {$ifndef noremove}
  1452. else
  1453. begin
  1454. hp5 := p;
  1455. for cnt3 := pTaiprop(p.optinfo)^.regs[regCounter].nrofmods downto 1 do
  1456. begin
  1457. if regModifiedByInstruction(regCounter,hp5) then
  1458. PTaiProp(hp5.OptInfo)^.CanBeRemoved := True;
  1459. getNextInstruction(hp5,hp5);
  1460. end;
  1461. end
  1462. {$endif noremove}
  1463. end
  1464. {$ifndef noremove}
  1465. else
  1466. PTaiProp(p.OptInfo)^.CanBeRemoved := True
  1467. {$endif noremove}
  1468. end
  1469. *)
  1470. {$ifndef noremove}
  1471. (* else *)
  1472. PTaiProp(p.OptInfo)^.CanBeRemoved := True
  1473. {$endif noremove}
  1474. ; Inc(Cnt2);
  1475. GetNextInstruction(p, p);
  1476. End;
  1477. {hp4 is used to get the contents of the registers before the sequence}
  1478. GetLastInstruction(hp2, hp4);
  1479. getNextInstruction(prevSeq,prevSeq_next);
  1480. {$IfDef CSDebug}
  1481. For RegCounter := R_EAX To R_EDI Do
  1482. If (RegCounter in RegInfo.RegsLoadedForRef) Then
  1483. Begin
  1484. hp5 := tai_comment.Create(strpnew('New: '+std_reg2str[RegCounter]+', Old: '+
  1485. std_reg2str[RegInfo.New2OldReg[RegCounter]])));
  1486. InsertLLItem(AsmL, Tai(hp2.previous), hp2, hp5);
  1487. End;
  1488. {$EndIf CSDebug}
  1489. { If some registers were different in the old and the new sequence, move }
  1490. { the contents of those old registers to the new ones }
  1491. For RegCounter.enum := R_EAX To R_EDI Do
  1492. If Not(RegCounter.enum in [R_ESP,procinfo.framepointer.enum]) And
  1493. (RegInfo.New2OldReg[RegCounter.enum].enum <> R_NO) Then
  1494. Begin
  1495. AllocRegBetween(AsmL,RegInfo.New2OldReg[RegCounter.enum],
  1496. PTaiProp(prevSeq.OptInfo)^.Regs[RegInfo.New2OldReg[RegCounter.enum].enum].StartMod,hp2);
  1497. if hp4 <> prevSeq then
  1498. begin
  1499. if assigned(reginfo.lastReload[regCounter.enum]) then
  1500. getLastInstruction(reginfo.lastReload[regCounter.enum],hp3)
  1501. else if assigned(reginfo.lastReload[regInfo.New2OldReg[regCounter.enum].enum]) then
  1502. getLastInstruction(reginfo.lastReload[regInfo.new2OldReg[regCounter.enum].enum],hp3)
  1503. else hp3 := hp4;
  1504. clearRegContentsFrom(regCounter,prevSeq_next,hp3);
  1505. getnextInstruction(hp3,hp3);
  1506. allocRegBetween(asmL,regCounter,prevSeq,hp3);
  1507. end;
  1508. If Not(RegCounter.enum In RegInfo.RegsLoadedForRef) And
  1509. {old reg new reg}
  1510. (RegInfo.New2OldReg[RegCounter.enum].enum <> RegCounter.enum) Then
  1511. Begin
  1512. getLastInstruction(p,hp3);
  1513. If (hp4 <> prevSeq) or
  1514. not(regCounter.enum in rg.usableregsint + [R_EDI,R_ESI]) or
  1515. not ReplaceReg(asmL,RegInfo.New2OldReg[RegCounter.enum],
  1516. regCounter,hp3,
  1517. PTaiProp(PrevSeq.optInfo)^.Regs[regCounter.enum],true,hp5) then
  1518. begin
  1519. hp3 := Tai_Marker.Create(NoPropInfoStart);
  1520. InsertLLItem(AsmL, prevSeq_next.previous,Tai(prevSeq_next), hp3);
  1521. hp5 := Taicpu.Op_Reg_Reg(A_MOV, S_L,
  1522. {old reg new reg}
  1523. RegInfo.New2OldReg[RegCounter.enum], RegCounter);
  1524. new(pTaiprop(hp5.optinfo));
  1525. pTaiprop(hp5.optinfo)^ := pTaiprop(prevSeq_next.optinfo)^;
  1526. pTaiprop(hp5.optinfo)^.canBeRemoved := false;
  1527. InsertLLItem(AsmL, prevSeq_next.previous, Tai(prevSeq_next), hp5);
  1528. hp3 := Tai_Marker.Create(NoPropInfoEnd);
  1529. InsertLLItem(AsmL, prevSeq_next.previous, Tai(prevSeq_next), hp3);
  1530. { adjusts states in previous instruction so that it will }
  1531. { definitely be different from the previous or next state }
  1532. incstate(pTaiprop(hp5.optinfo)^.
  1533. regs[RegInfo.New2OldReg[RegCounter.enum].enum].rstate,20);
  1534. incstate(pTaiprop(hp5.optinfo)^.
  1535. regs[regCounter.enum].wstate,20);
  1536. updateState(RegInfo.New2OldReg[RegCounter.enum],hp5);
  1537. end
  1538. End
  1539. Else
  1540. { imagine the following code: }
  1541. { normal wrong optimized }
  1542. { movl 8(%ebp), %eax movl 8(%ebp), %eax }
  1543. { movl (%eax), %eax movl (%eax), %eax }
  1544. { cmpl 8(%ebp), %eax cmpl 8(%ebp), %eax }
  1545. { jne l1 jne l1 }
  1546. { movl 8(%ebp), %eax }
  1547. { movl (%eax), %edi movl %eax, %edi }
  1548. { movl %edi, -4(%ebp) movl %edi, -4(%ebp) }
  1549. { movl 8(%ebp), %eax }
  1550. { pushl 70(%eax) pushl 70(%eax) }
  1551. { }
  1552. { The error is that at the moment that the last instruction is executed, }
  1553. { %eax doesn't contain 8(%ebp) anymore. Solution: the contents of }
  1554. { registers that are completely removed from a sequence (= registers in }
  1555. { RegLoadedForRef, have to be changed to their contents from before the }
  1556. { sequence. }
  1557. If RegCounter.enum in RegInfo.RegsLoadedForRef Then
  1558. Begin
  1559. hp3 := hp2;
  1560. { cnt still holds the number of instructions }
  1561. { of the sequence, so go to the end of it }
  1562. for cnt2 := 1 to pred(cnt) Do
  1563. getNextInstruction(hp3,hp3);
  1564. { hp4 = instruction prior to start of sequence }
  1565. restoreRegContentsTo(regCounter,
  1566. PTaiProp(hp4.OptInfo)^.Regs[RegCounter.enum],
  1567. hp2,hp3);
  1568. End;
  1569. End;
  1570. (*
  1571. If hp1 <> nil Then
  1572. p := hp1;
  1573. *)
  1574. Continue;
  1575. End
  1576. (*
  1577. Else
  1578. If (PTaiProp(p.OptInfo)^.
  1579. regs[reg32(Taicpu(p).oper[1].reg)].typ
  1580. in [con_ref,con_noRemoveRef]) and
  1581. (PTaiProp(p.OptInfo)^.CanBeRemoved) Then
  1582. if (cnt > 0) then
  1583. begin
  1584. p := hp2;
  1585. Cnt2 := 1;
  1586. While Cnt2 <= Cnt Do
  1587. Begin
  1588. If RegInInstruction(Taicpu(hp2).oper[1].reg, p) Then
  1589. PTaiProp(p.OptInfo)^.CanBeRemoved := False;
  1590. Inc(Cnt2);
  1591. GetNextInstruction(p, p);
  1592. End;
  1593. Continue;
  1594. End
  1595. else
  1596. begin
  1597. { Fix for web bug 972 }
  1598. regCounter := Reg32(Taicpu(p).oper[1].reg);
  1599. cnt := PTaiProp(p.optInfo)^.Regs[regCounter].nrOfMods;
  1600. hp3 := p;
  1601. for cnt2 := 1 to cnt do
  1602. if not(regModifiedByInstruction(regCounter,hp3) and
  1603. not(PTaiProp(hp3.optInfo)^.canBeRemoved)) then
  1604. getNextInstruction(hp3,hp3)
  1605. else
  1606. break;
  1607. getLastInstruction(p,hp4);
  1608. RestoreRegContentsTo(regCounter,
  1609. PTaiProp(hp4.optInfo)^.Regs[regCounter],
  1610. p,hp3);
  1611. end;
  1612. *)
  1613. End;
  1614. End;
  1615. { try to replace the new reg with the old reg }
  1616. if not(PTaiProp(p.optInfo)^.canBeRemoved) then
  1617. if (Taicpu(p).oper[0].typ = top_reg) and
  1618. (Taicpu(p).oper[1].typ = top_reg) and
  1619. { only remove if we're not storing something in a regvar }
  1620. (Taicpu(p).oper[1].reg.enum in (rg.usableregsint+[R_EDI])) and
  1621. (Taicpu(p).opcode = A_MOV) and
  1622. getLastInstruction(p,hp4) and
  1623. { we only have to start replacing from the instruction after the mov, }
  1624. { but replacereg only starts with getnextinstruction(p,p) }
  1625. replaceReg(asmL,Taicpu(p).oper[0].reg,
  1626. Taicpu(p).oper[1].reg,p,
  1627. pTaiprop(hp4.optInfo)^.regs[Taicpu(p).oper[1].reg.enum],false,hp1) then
  1628. begin
  1629. pTaiprop(p.optInfo)^.canBeRemoved := true;
  1630. allocRegBetween(asmL,Taicpu(p).oper[0].reg,
  1631. pTaiProp(p.optInfo)^.regs[Taicpu(p).oper[0].reg.enum].startMod,hp1);
  1632. end
  1633. else
  1634. begin
  1635. if (Taicpu(p).oper[1].typ = top_reg) and
  1636. not regInOp(Taicpu(p).oper[1].reg,Taicpu(p).oper[0]) then
  1637. removePrevNotUsedLoad(p,reg32(Taicpu(p).oper[1].reg),false);
  1638. if doSubOpts and
  1639. (Taicpu(p).opcode <> A_LEA) and
  1640. (Taicpu(p).oper[0].typ = top_ref) then
  1641. begin
  1642. regcounter :=
  1643. memtoreg(taicpu(p),
  1644. Taicpu(p).oper[0].ref^,hp5);
  1645. if regcounter.enum <> R_NO then
  1646. if (taicpu(p).opcode = A_MOV) and
  1647. (taicpu(p).oper[1].typ = top_reg) and
  1648. (taicpu(p).oper[1].reg.enum = regcounter.enum) then
  1649. begin
  1650. pTaiProp(p.optinfo)^.canberemoved := true;
  1651. allocregbetween(asml,reg32(regcounter),hp5,p);
  1652. end
  1653. else
  1654. begin
  1655. Taicpu(p).loadreg(0,regcounter);
  1656. regcounter := reg32(regcounter);
  1657. allocregbetween(asml,regcounter,hp5,p);
  1658. incstate(pTaiProp(p.optinfo)^.regs[regcounter.enum].rstate,1);
  1659. updatestate(regcounter,p);
  1660. end;
  1661. end;
  1662. end;
  1663. { at first, only try optimizations of large blocks, because doing }
  1664. { doing smaller ones may prevent bigger ones from completing in }
  1665. { in the next pass }
  1666. if not doSubOpts and (orgNrOfMods <> 0) then
  1667. begin
  1668. p := hp2;
  1669. for cnt := 1 to pred(orgNrOfMods) do
  1670. getNextInstruction(p,p);
  1671. end;
  1672. End;
  1673. top_symbol,Top_Const:
  1674. Begin
  1675. Case Taicpu(p).oper[1].typ Of
  1676. Top_Reg:
  1677. Begin
  1678. regCounter := Reg32(Taicpu(p).oper[1].reg);
  1679. If GetLastInstruction(p, hp1) Then
  1680. With PTaiProp(hp1.OptInfo)^.Regs[regCounter.enum] Do
  1681. if (typ in [con_const,con_noRemoveConst]) and
  1682. (Taicpu(startMod).opsize >= Taicpu(p).opsize) and
  1683. opsequal(Taicpu(StartMod).oper[0],Taicpu(p).oper[0]) Then
  1684. begin
  1685. PTaiProp(p.OptInfo)^.CanBeRemoved := True;
  1686. allocRegBetween(asmL,regCounter,startMod,p);
  1687. end
  1688. else
  1689. removePrevNotUsedLoad(p,reg32(Taicpu(p).oper[1].reg),false);
  1690. End;
  1691. Top_Ref:
  1692. if (Taicpu(p).oper[0].typ = top_const) and
  1693. getLastInstruction(p,hp1) and
  1694. findRegWithConst(hp1,Taicpu(p).opsize,Taicpu(p).oper[0].val,regCounter) then
  1695. begin
  1696. Taicpu(p).loadreg(0,regCounter);
  1697. allocRegBetween(AsmL,reg32(regCounter),
  1698. PTaiProp(hp1.optinfo)^.regs[reg32(regCounter).enum].startMod,p);
  1699. end;
  1700. End;
  1701. End;
  1702. End;
  1703. End;
  1704. A_LEAVE:
  1705. begin
  1706. if getlastinstruction(p,hp1) then
  1707. removeLocalStores(hp1);
  1708. end;
  1709. A_STD: If GetLastInstruction(p, hp1) And
  1710. (PTaiProp(hp1.OptInfo)^.DirFlag = F_Set) Then
  1711. PTaiProp(Tai(p).OptInfo)^.CanBeRemoved := True;
  1712. else
  1713. begin
  1714. for cnt := 1 to maxch do
  1715. begin
  1716. case InsProp[taicpu(p).opcode].Ch[cnt] of
  1717. Ch_ROp1:
  1718. if (taicpu(p).oper[0].typ = top_ref) and
  1719. ((taicpu(p).opcode < A_F2XM1) or
  1720. ((taicpu(p).opcode > A_IN) and
  1721. (taicpu(p).opcode < A_OUT)) or
  1722. (taicpu(p).opcode = A_PUSH) or
  1723. ((taicpu(p).opcode >= A_RCL) and
  1724. (taicpu(p).opcode <= A_XOR))) then
  1725. begin
  1726. regcounter :=
  1727. memtoreg(taicpu(p),
  1728. Taicpu(p).oper[0].ref^,hp5);
  1729. if regcounter.enum <> R_NO then
  1730. begin
  1731. Taicpu(p).loadreg(0,regcounter);
  1732. regcounter := reg32(regcounter);
  1733. allocregbetween(asml,regcounter,hp5,p);
  1734. incstate(pTaiProp(p.optinfo)^.regs[regcounter.enum].rstate,1);
  1735. updatestate(regcounter,p);
  1736. end;
  1737. end;
  1738. Ch_MOp1:
  1739. if Not(CS_LittleSize in aktglobalswitches) And
  1740. (taicpu(p).oper[0].typ = top_ref) then
  1741. begin
  1742. regcounter :=
  1743. memtoreg(taicpu(p),
  1744. Taicpu(p).oper[0].ref^,hp5);
  1745. if (regcounter.enum <> R_NO) (* and
  1746. (not getNextInstruction(p,hp1) or
  1747. (RegLoadedWithNewValue(reg32(regcounter),false,hp1) or
  1748. FindRegDealloc(reg32(regcounter),hp1))) *) then
  1749. begin
  1750. hp1 := Tai_Marker.Create(NoPropInfoEnd);
  1751. insertllitem(asml,p,p.next,hp1);
  1752. hp1 := taicpu.op_reg_ref(A_MOV,reg2opsize[regcounter.enum],
  1753. regcounter,taicpu(p).oper[0].ref^);
  1754. new(pTaiprop(hp1.optinfo));
  1755. pTaiProp(hp1.optinfo)^ := pTaiProp(p.optinfo)^;
  1756. insertllitem(asml,p,p.next,hp1);
  1757. incstate(pTaiProp(hp1.optinfo)^.regs[reg32(regcounter).enum].rstate,1);
  1758. updatestate(reg32(regcounter),hp1);
  1759. hp1 := Tai_Marker.Create(NoPropInfoStart);
  1760. insertllitem(asml,p,p.next,hp1);
  1761. Taicpu(p).loadreg(0,regcounter);
  1762. regcounter := reg32(regcounter);
  1763. allocregbetween(asml,regcounter,hp5,
  1764. tai(p.next.next));
  1765. end;
  1766. end;
  1767. Ch_ROp2:
  1768. if ((taicpu(p).opcode = A_CMP) or
  1769. (taicpu(p).opcode = A_TEST)) and
  1770. (taicpu(p).oper[1].typ = top_ref) then
  1771. begin
  1772. regcounter :=
  1773. memtoreg(taicpu(p),
  1774. Taicpu(p).oper[1].ref^,hp5);
  1775. if regcounter.enum <> R_NO then
  1776. begin
  1777. Taicpu(p).loadreg(1,regcounter);
  1778. regcounter := reg32(regcounter);
  1779. allocregbetween(asml,regcounter,hp5,p);
  1780. incstate(pTaiProp(p.optinfo)^.regs[regcounter.enum].rstate,1);
  1781. updatestate(regcounter,p);
  1782. end;
  1783. end;
  1784. Ch_MOp2:
  1785. if not(cs_littlesize in aktglobalswitches) and
  1786. (taicpu(p).oper[1].typ = top_ref) and
  1787. ((taicpu(p).opcode < A_BT) or
  1788. ((taicpu(p).opcode > A_IN) and
  1789. (taicpu(p).opcode < A_OUT)) or
  1790. (taicpu(p).opcode = A_PUSH) or
  1791. ((taicpu(p).opcode >= A_RCL) and
  1792. (taicpu(p).opcode <= A_XOR))) then
  1793. begin
  1794. regcounter :=
  1795. memtoreg(taicpu(p),
  1796. Taicpu(p).oper[1].ref^,hp5);
  1797. if (regcounter.enum <> R_NO) (* and
  1798. (not getNextInstruction(p,hp1) or
  1799. (RegLoadedWithNewValue(reg32(regcounter),false,hp1) or
  1800. FindRegDealloc(reg32(regcounter),hp1))) *) then
  1801. begin
  1802. hp1 := Tai_Marker.Create(NoPropInfoEnd);
  1803. insertllitem(asml,p,p.next,hp1);
  1804. hp1 := taicpu.op_reg_ref(A_MOV,reg2opsize[regcounter.enum],
  1805. regcounter,taicpu(p).oper[1].ref^);
  1806. new(pTaiprop(hp1.optinfo));
  1807. pTaiProp(hp1.optinfo)^ := pTaiProp(p.optinfo)^;
  1808. insertllitem(asml,p,p.next,hp1);
  1809. incstate(pTaiProp(hp1.optinfo)^.regs[reg32(regcounter).enum].rstate,1);
  1810. updatestate(reg32(regcounter),hp1);
  1811. hp1 := Tai_Marker.Create(NoPropInfoStart);
  1812. insertllitem(asml,p,p.next,hp1);
  1813. Taicpu(p).loadreg(1,regcounter);
  1814. regcounter := reg32(regcounter);
  1815. allocregbetween(asml,regcounter,hp5,
  1816. tai(p.next.next));
  1817. end;
  1818. end;
  1819. end;
  1820. end;
  1821. end;
  1822. End
  1823. End;
  1824. End;
  1825. GetNextInstruction(p, p);
  1826. End;
  1827. End;
  1828. function removeInstructs(asmL: TAAsmoutput; first, last: Tai): boolean;
  1829. { Removes the marked instructions and disposes the PTaiProps of the other }
  1830. { instructions }
  1831. Var
  1832. p, hp1: Tai;
  1833. nopropinfolevel: longint;
  1834. begin
  1835. removeInstructs := false;
  1836. p := First;
  1837. nopropinfolevel := 0;
  1838. While (p <> Last) Do
  1839. Begin
  1840. If (p.typ = ait_marker) and
  1841. (Tai_marker(p).kind = noPropInfoStart) then
  1842. begin
  1843. hp1 := Tai(p.next);
  1844. asmL.remove(p);
  1845. p.free;
  1846. nopropinfolevel := 1;
  1847. while (nopropinfolevel <> 0) do
  1848. begin
  1849. p := Tai(hp1.next);
  1850. {$ifndef noinstremove}
  1851. { allocregbetween can insert new ait_regalloc objects }
  1852. { without optinfo }
  1853. if (hp1.typ = ait_marker) then
  1854. begin
  1855. case Tai_marker(hp1).kind of
  1856. { they can be nested! }
  1857. noPropInfoStart: inc(nopropinfolevel);
  1858. noPropInfoEnd: dec(nopropinfolevel);
  1859. else
  1860. begin
  1861. hp1 := p;
  1862. continue;
  1863. end;
  1864. end;
  1865. asmL.remove(hp1);
  1866. hp1.free;
  1867. end
  1868. else if assigned(hp1.optinfo) then
  1869. if pTaiprop(hp1.optinfo)^.canBeRemoved then
  1870. begin
  1871. dispose(pTaiprop(hp1.optinfo));
  1872. hp1.optinfo := nil;
  1873. asmL.remove(hp1);
  1874. hp1.free;
  1875. end
  1876. else
  1877. {$endif noinstremove}
  1878. begin
  1879. dispose(pTaiprop(hp1.optinfo));
  1880. hp1.optinfo := nil;
  1881. end;
  1882. hp1 := p;
  1883. end;
  1884. end
  1885. else
  1886. {$ifndef noinstremove}
  1887. if assigned(p.optInfo) and
  1888. PTaiProp(p.optInfo)^.canBeRemoved then
  1889. begin
  1890. hp1 := Tai(p.next);
  1891. AsmL.Remove(p);
  1892. p.free;
  1893. p := hp1;
  1894. removeInstructs := true;
  1895. End
  1896. Else
  1897. {$endif noinstremove}
  1898. Begin
  1899. p.OptInfo := nil;
  1900. p := Tai(p.next);;
  1901. End;
  1902. End;
  1903. FreeMem(TaiPropBlock, NrOfTaiObjs*SizeOf(TTaiProp))
  1904. End;
  1905. function CSE(AsmL: TAAsmOutput; First, Last: Tai; pass: longint): boolean;
  1906. Begin
  1907. DoCSE(AsmL, First, Last, not(cs_slowoptimize in aktglobalswitches) or (pass >= 2),
  1908. not(cs_slowoptimize in aktglobalswitches) or (pass >= 1));
  1909. { register renaming }
  1910. if not(cs_slowoptimize in aktglobalswitches) or (pass > 0) then
  1911. doRenaming(asmL, first, last);
  1912. cse := removeInstructs(asmL, first, last);
  1913. End;
  1914. End.
  1915. {
  1916. $Log$
  1917. Revision 1.39 2003-01-08 18:43:57 daniel
  1918. * Tregister changed into a record
  1919. Revision 1.38 2002/08/18 20:06:29 peter
  1920. * inlining is now also allowed in interface
  1921. * renamed write/load to ppuwrite/ppuload
  1922. * tnode storing in ppu
  1923. * nld,ncon,nbas are already updated for storing in ppu
  1924. Revision 1.37 2002/08/17 09:23:44 florian
  1925. * first part of procinfo rewrite
  1926. Revision 1.36 2002/07/01 18:46:31 peter
  1927. * internal linker
  1928. * reorganized aasm layer
  1929. Revision 1.35 2002/05/18 13:34:22 peter
  1930. * readded missing revisions
  1931. Revision 1.34 2002/05/16 19:46:51 carl
  1932. + defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand
  1933. + try to fix temp allocation (still in ifdef)
  1934. + generic constructor calls
  1935. + start of tassembler / tmodulebase class cleanup
  1936. Revision 1.32 2002/04/21 15:32:59 carl
  1937. * changeregsize -> rg.makeregsize
  1938. Revision 1.31 2002/04/20 21:37:07 carl
  1939. + generic FPC_CHECKPOINTER
  1940. + first parameter offset in stack now portable
  1941. * rename some constants
  1942. + move some cpu stuff to other units
  1943. - remove unused constents
  1944. * fix stacksize for some targets
  1945. * fix generic size problems which depend now on EXTEND_SIZE constant
  1946. * removing frame pointer in routines is only available for : i386,m68k and vis targets
  1947. Revision 1.30 2002/04/15 19:44:20 peter
  1948. * fixed stackcheck that would be called recursively when a stack
  1949. error was found
  1950. * generic changeregsize(reg,size) for i386 register resizing
  1951. * removed some more routines from cga unit
  1952. * fixed returnvalue handling
  1953. * fixed default stacksize of linux and go32v2, 8kb was a bit small :-)
  1954. Revision 1.29 2002/04/15 19:12:09 carl
  1955. + target_info.size_of_pointer -> pointer_size
  1956. + some cleanup of unused types/variables
  1957. * move several constants from cpubase to their specific units
  1958. (where they are used)
  1959. + att_Reg2str -> gas_reg2str
  1960. + int_reg2str -> std_reg2str
  1961. Revision 1.28 2002/04/14 17:00:49 carl
  1962. + att_reg2str -> std_reg2str
  1963. Revision 1.27 2002/04/04 19:06:10 peter
  1964. * removed unused units
  1965. * use tlocation.size in cg.a_*loc*() routines
  1966. Revision 1.26 2002/04/02 17:11:34 peter
  1967. * tlocation,treference update
  1968. * LOC_CONSTANT added for better constant handling
  1969. * secondadd splitted in multiple routines
  1970. * location_force_reg added for loading a location to a register
  1971. of a specified size
  1972. * secondassignment parses now first the right and then the left node
  1973. (this is compatible with Kylix). This saves a lot of push/pop especially
  1974. with string operations
  1975. * adapted some routines to use the new cg methods
  1976. Revision 1.25 2002/03/31 20:26:38 jonas
  1977. + a_loadfpu_* and a_loadmm_* methods in tcg
  1978. * register allocation is now handled by a class and is mostly processor
  1979. independent (+rgobj.pas and i386/rgcpu.pas)
  1980. * temp allocation is now handled by a class (+tgobj.pas, -i386\tgcpu.pas)
  1981. * some small improvements and fixes to the optimizer
  1982. * some register allocation fixes
  1983. * some fpuvaroffset fixes in the unary minus node
  1984. * push/popusedregisters is now called rg.save/restoreusedregisters and
  1985. (for i386) uses temps instead of push/pop's when using -Op3 (that code is
  1986. also better optimizable)
  1987. * fixed and optimized register saving/restoring for new/dispose nodes
  1988. * LOC_FPU locations now also require their "register" field to be set to
  1989. R_ST, not R_ST0 (the latter is used for LOC_CFPUREGISTER locations only)
  1990. - list field removed of the tnode class because it's not used currently
  1991. and can cause hard-to-find bugs
  1992. Revision 1.24 2002/03/04 19:10:12 peter
  1993. * removed compiler warnings
  1994. }