aoptcpu.pas 41 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. {$define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase, cgbase, aasmtai, aopt,AoptObj, aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. globals,globtype,
  42. cgutils;
  43. type
  44. TAsmOpSet = set of TAsmOp;
  45. function CanBeCond(p : tai) : boolean;
  46. begin
  47. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  48. end;
  49. function RefsEqual(const r1, r2: treference): boolean;
  50. begin
  51. refsequal :=
  52. (r1.offset = r2.offset) and
  53. (r1.base = r2.base) and
  54. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  55. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  56. (r1.relsymbol = r2.relsymbol) and
  57. (r1.addressmode = r2.addressmode);
  58. end;
  59. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  60. begin
  61. result:=oper1.typ=oper2.typ;
  62. if result then
  63. case oper1.typ of
  64. top_const:
  65. Result:=oper1.val = oper2.val;
  66. top_reg:
  67. Result:=oper1.reg = oper2.reg;
  68. top_ref:
  69. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  70. else Result:=false;
  71. end
  72. end;
  73. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  74. begin
  75. result := (oper.typ = top_reg) and (oper.reg = reg);
  76. end;
  77. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  78. begin
  79. result :=
  80. (instr.typ = ait_instruction) and
  81. (taicpu(instr).opcode = op);
  82. end;
  83. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  84. begin
  85. result :=
  86. (instr.typ = ait_instruction) and
  87. (taicpu(instr).opcode in ops);
  88. end;
  89. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  90. begin
  91. result :=
  92. (instr.typ = ait_instruction) and
  93. (taicpu(instr).opcode in ops) and
  94. (taicpu(instr).ops=opcount);
  95. end;
  96. function MatchOpType(const instr : tai;ot0,ot1 : toptype) : Boolean;
  97. begin
  98. Result:=(taicpu(instr).ops=2) and
  99. (taicpu(instr).oper[0]^.typ=ot0) and
  100. (taicpu(instr).oper[1]^.typ=ot1);
  101. end;
  102. {$ifdef DEBUG_AOPTCPU}
  103. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  104. begin
  105. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  106. end;
  107. {$else DEBUG_AOPTCPU}
  108. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  109. begin
  110. end;
  111. {$endif DEBUG_AOPTCPU}
  112. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  113. begin
  114. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  115. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  116. Result:=true
  117. else
  118. Result:=inherited RegInInstruction(Reg, p1);
  119. end;
  120. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  121. var Next: tai; reg: TRegister): Boolean;
  122. begin
  123. Next:=Current;
  124. repeat
  125. Result:=GetNextInstruction(Next,Next);
  126. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  127. (is_calljmp(taicpu(Next).opcode));
  128. end;
  129. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  130. var
  131. p: taicpu;
  132. begin
  133. if not assigned(hp) or
  134. (hp.typ <> ait_instruction) then
  135. begin
  136. Result := false;
  137. exit;
  138. end;
  139. p := taicpu(hp);
  140. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  141. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  142. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  143. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  144. end;
  145. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  146. var
  147. p: taicpu;
  148. i: longint;
  149. begin
  150. Result := false;
  151. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  152. exit;
  153. p:=taicpu(hp);
  154. i:=0;
  155. { we do not care about the stack pointer }
  156. if p.opcode in [A_POP] then
  157. exit;
  158. { first operand only written?
  159. then skip it }
  160. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  161. i:=1;
  162. while(i<p.ops) do
  163. begin
  164. case p.oper[I]^.typ of
  165. top_reg:
  166. Result := (p.oper[I]^.reg = reg) or
  167. { MOVW }
  168. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  169. top_ref:
  170. Result :=
  171. (p.oper[I]^.ref^.base = reg) or
  172. (p.oper[I]^.ref^.index = reg);
  173. end;
  174. { Bailout if we found something }
  175. if Result then
  176. exit;
  177. Inc(I);
  178. end;
  179. end;
  180. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  181. var
  182. hp1,hp2,hp3,hp4,hp5: tai;
  183. alloc, dealloc: tai_regalloc;
  184. i: integer;
  185. l: TAsmLabel;
  186. TmpUsedRegs : TAllUsedRegs;
  187. begin
  188. result := false;
  189. case p.typ of
  190. ait_instruction:
  191. begin
  192. {
  193. change
  194. <op> reg,x,y
  195. cp reg,r1
  196. into
  197. <op>s reg,x,y
  198. }
  199. { this optimization can applied only to the currently enabled operations because
  200. the other operations do not update all flags and FPC does not track flag usage }
  201. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  202. A_INC,A_LSL,A_LSR,
  203. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  204. GetNextInstruction(p, hp1) and
  205. ((MatchInstruction(hp1, A_CP) and
  206. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  207. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  208. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  209. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  210. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  211. A_LSL,A_LSR,
  212. A_OR,A_ORI,A_ROL,A_ROR])))) or
  213. (MatchInstruction(hp1, A_CPI) and
  214. (taicpu(p).opcode = A_ANDI) and
  215. (taicpu(p).oper[1]^.typ=top_const) and
  216. (taicpu(hp1).oper[1]^.typ=top_const) and
  217. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  218. GetNextInstruction(hp1, hp2) and
  219. { be careful here, following instructions could use other flags
  220. however after a jump fpc never depends on the value of flags }
  221. { All above instructions set Z and N according to the following
  222. Z := result = 0;
  223. N := result[31];
  224. EQ = Z=1; NE = Z=0;
  225. MI = N=1; PL = N=0; }
  226. MatchInstruction(hp2, A_BRxx) and
  227. (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) { and
  228. no flag allocation tracking implemented yet on avr
  229. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  230. begin
  231. { move flag allocation if possible }
  232. { no flag allocation tracking implemented yet on avr
  233. GetLastInstruction(hp1, hp2);
  234. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  235. if assigned(hp2) then
  236. begin
  237. asml.Remove(hp2);
  238. asml.insertbefore(hp2, p);
  239. end;
  240. }
  241. // If we compare to the same value we are masking then invert the comparison
  242. if (taicpu(hp1).opcode=A_CPI) then
  243. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  244. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  245. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  246. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  247. DebugMsg('Peephole OpCp2Op performed', p);
  248. asml.remove(hp1);
  249. hp1.free;
  250. Result:=true;
  251. end
  252. else
  253. case taicpu(p).opcode of
  254. A_LDI:
  255. begin
  256. { turn
  257. ldi reg0, imm
  258. cp/mov reg1, reg0
  259. dealloc reg0
  260. into
  261. cpi/ldi reg1, imm
  262. }
  263. if MatchOpType(p,top_reg,top_const) and
  264. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  265. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  266. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  267. MatchOpType(hp1,top_reg,top_reg) and
  268. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  269. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) then
  270. begin
  271. CopyUsedRegs(TmpUsedRegs);
  272. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  273. begin
  274. case taicpu(hp1).opcode of
  275. A_CP:
  276. taicpu(hp1).opcode:=A_CPI;
  277. A_MOV:
  278. taicpu(hp1).opcode:=A_LDI;
  279. else
  280. internalerror(2016111901);
  281. end;
  282. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  283. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  284. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  285. if assigned(alloc) and assigned(dealloc) then
  286. begin
  287. asml.Remove(alloc);
  288. alloc.Free;
  289. asml.Remove(dealloc);
  290. dealloc.Free;
  291. end;
  292. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  293. GetNextInstruction(p,hp1);
  294. asml.Remove(p);
  295. p.Free;
  296. p:=hp1;
  297. result:=true;
  298. end;
  299. ReleaseUsedRegs(TmpUsedRegs);
  300. end;
  301. end;
  302. A_STS:
  303. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  304. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  305. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  306. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  307. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  308. (taicpu(p).oper[0]^.ref^.offset>=32) and
  309. (taicpu(p).oper[0]^.ref^.offset<=95) then
  310. begin
  311. DebugMsg('Peephole Sts2Out performed', p);
  312. taicpu(p).opcode:=A_OUT;
  313. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  314. end;
  315. A_LDS:
  316. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  317. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  318. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  319. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  320. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  321. (taicpu(p).oper[1]^.ref^.offset>=32) and
  322. (taicpu(p).oper[1]^.ref^.offset<=95) then
  323. begin
  324. DebugMsg('Peephole Lds2In performed', p);
  325. taicpu(p).opcode:=A_IN;
  326. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  327. end;
  328. A_IN:
  329. if GetNextInstruction(p,hp1) then
  330. begin
  331. {
  332. in rX,Y
  333. ori rX,n
  334. out Y,rX
  335. into
  336. sbi rX,lg(n)
  337. }
  338. if (taicpu(p).oper[1]^.val<=31) and
  339. MatchInstruction(hp1,A_ORI) and
  340. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  341. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  342. GetNextInstruction(hp1,hp2) and
  343. MatchInstruction(hp2,A_OUT) and
  344. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  345. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  346. begin
  347. DebugMsg('Peephole InOriOut2Sbi performed', p);
  348. taicpu(p).opcode:=A_SBI;
  349. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  350. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  351. asml.Remove(hp1);
  352. hp1.Free;
  353. asml.Remove(hp2);
  354. hp2.Free;
  355. result:=true;
  356. end
  357. {
  358. in rX,Y
  359. andi rX,not(n)
  360. out Y,rX
  361. into
  362. cbi rX,lg(n)
  363. }
  364. else if (taicpu(p).oper[1]^.val<=31) and
  365. MatchInstruction(hp1,A_ANDI) and
  366. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  367. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  368. GetNextInstruction(hp1,hp2) and
  369. MatchInstruction(hp2,A_OUT) and
  370. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  371. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  372. begin
  373. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  374. taicpu(p).opcode:=A_CBI;
  375. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  376. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  377. asml.Remove(hp1);
  378. hp1.Free;
  379. asml.Remove(hp2);
  380. hp2.Free;
  381. result:=true;
  382. end
  383. {
  384. in rX,Y
  385. andi rX,n
  386. breq/brne L1
  387. into
  388. sbis/sbic Y,lg(n)
  389. jmp L1
  390. .Ltemp:
  391. }
  392. else if (taicpu(p).oper[1]^.val<=31) and
  393. MatchInstruction(hp1,A_ANDI) and
  394. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  395. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  396. GetNextInstruction(hp1,hp2) and
  397. MatchInstruction(hp2,A_BRxx) and
  398. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  399. begin
  400. if taicpu(hp2).condition=C_EQ then
  401. taicpu(p).opcode:=A_SBIS
  402. else
  403. taicpu(p).opcode:=A_SBIC;
  404. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  405. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  406. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  407. asml.Remove(hp1);
  408. hp1.Free;
  409. taicpu(hp2).condition:=C_None;
  410. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  411. taicpu(hp2).opcode:=A_JMP
  412. else
  413. taicpu(hp2).opcode:=A_RJMP;
  414. current_asmdata.getjumplabel(l);
  415. l.increfs;
  416. asml.InsertAfter(tai_label.create(l), hp2);
  417. result:=true;
  418. end;
  419. end;
  420. A_ANDI:
  421. begin
  422. {
  423. Turn
  424. andi rx, #pow2
  425. brne l
  426. <op>
  427. l:
  428. Into
  429. sbrs rx, #(1 shl imm)
  430. <op>
  431. l:
  432. }
  433. if (taicpu(p).ops=2) and
  434. (taicpu(p).oper[1]^.typ=top_const) and
  435. ispowerof2(taicpu(p).oper[1]^.val,i) and
  436. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  437. GetNextInstruction(p,hp1) and
  438. (hp1.typ=ait_instruction) and
  439. (taicpu(hp1).opcode=A_BRxx) and
  440. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  441. (taicpu(hp1).ops>0) and
  442. (taicpu(hp1).oper[0]^.typ = top_ref) and
  443. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  444. GetNextInstruction(hp1,hp2) and
  445. (hp2.typ=ait_instruction) and
  446. GetNextInstruction(hp2,hp3) and
  447. (hp3.typ=ait_label) and
  448. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  449. begin
  450. DebugMsg('Peephole AndiBr2Sbr performed', p);
  451. taicpu(p).oper[1]^.val:=i;
  452. if taicpu(hp1).condition=C_NE then
  453. taicpu(p).opcode:=A_SBRS
  454. else
  455. taicpu(p).opcode:=A_SBRC;
  456. asml.Remove(hp1);
  457. hp1.free;
  458. result:=true;
  459. end
  460. {
  461. Remove
  462. andi rx, #y
  463. dealloc rx
  464. }
  465. else if (taicpu(p).ops=2) and
  466. (taicpu(p).oper[0]^.typ=top_reg) and
  467. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  468. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  469. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  470. begin
  471. DebugMsg('Redundant Andi removed', p);
  472. GetNextInstruction(p,hp1);
  473. AsmL.Remove(p);
  474. p.free;
  475. p:=hp1;
  476. result:=true;
  477. end;
  478. end;
  479. A_CLR:
  480. begin
  481. { turn the common
  482. clr rX
  483. mov/ld rX, rY
  484. into
  485. mov/ld rX, rY
  486. }
  487. if (taicpu(p).ops=1) and
  488. (taicpu(p).oper[0]^.typ=top_reg) and
  489. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  490. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  491. (hp1.typ=ait_instruction) and
  492. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  493. (taicpu(hp1).ops>0) and
  494. (taicpu(hp1).oper[0]^.typ=top_reg) and
  495. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  496. begin
  497. DebugMsg('Peephole ClrMov2Mov performed', p);
  498. asml.Remove(p);
  499. p.Free;
  500. p:=hp1;
  501. result:=true;
  502. end
  503. { turn
  504. clr rX
  505. ...
  506. adc rY, rX
  507. into
  508. ...
  509. adc rY, r1
  510. }
  511. else if (taicpu(p).ops=1) and
  512. (taicpu(p).oper[0]^.typ=top_reg) and
  513. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  514. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  515. (hp1.typ=ait_instruction) and
  516. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  517. (taicpu(hp1).ops=2) and
  518. (taicpu(hp1).oper[1]^.typ=top_reg) and
  519. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  520. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  521. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  522. begin
  523. DebugMsg('Peephole ClrAdc2Adc performed', p);
  524. taicpu(hp1).oper[1]^.reg:=NR_R1;
  525. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  526. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  527. if assigned(alloc) and assigned(dealloc) then
  528. begin
  529. asml.Remove(alloc);
  530. alloc.Free;
  531. asml.Remove(dealloc);
  532. dealloc.Free;
  533. end;
  534. GetNextInstruction(p,hp1);
  535. asml.Remove(p);
  536. p.free;
  537. p:=hp1;
  538. result:=true;
  539. end;
  540. end;
  541. A_PUSH:
  542. begin
  543. { turn
  544. push reg0
  545. push reg1
  546. pop reg3
  547. pop reg2
  548. into
  549. movw reg2,reg0
  550. }
  551. if (taicpu(p).ops=1) and
  552. (taicpu(p).oper[0]^.typ=top_reg) and
  553. GetNextInstruction(p,hp1) and
  554. (hp1.typ=ait_instruction) and
  555. (taicpu(hp1).opcode=A_PUSH) and
  556. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  557. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  558. GetNextInstruction(hp1,hp2) and
  559. (hp2.typ=ait_instruction) and
  560. (taicpu(hp2).opcode=A_POP) and
  561. GetNextInstruction(hp2,hp3) and
  562. (hp3.typ=ait_instruction) and
  563. (taicpu(hp3).opcode=A_POP) and
  564. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  565. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  566. begin
  567. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  568. taicpu(p).ops:=2;
  569. taicpu(p).opcode:=A_MOVW;
  570. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  571. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  572. asml.Remove(hp1);
  573. hp1.Free;
  574. asml.Remove(hp2);
  575. hp2.Free;
  576. asml.Remove(hp3);
  577. hp3.Free;
  578. result:=true;
  579. end;
  580. end;
  581. A_MOV:
  582. begin
  583. { turn
  584. mov reg0, reg1
  585. push reg0
  586. dealloc reg0
  587. into
  588. push reg1
  589. }
  590. if (taicpu(p).ops=2) and
  591. (taicpu(p).oper[0]^.typ = top_reg) and
  592. (taicpu(p).oper[1]^.typ = top_reg) and
  593. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  594. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  595. (hp1.typ = ait_instruction) and
  596. (taicpu(hp1).opcode in [A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  597. A_STD,A_ST,
  598. A_OUT,A_IN]) and
  599. RegInInstruction(taicpu(p).oper[0]^.reg, hp1) and
  600. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  601. {(taicpu(hp1).ops=1) and
  602. (taicpu(hp1).oper[0]^.typ = top_reg) and
  603. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  604. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  605. begin
  606. DebugMsg('Peephole MovPush2Push performed', p);
  607. for i := 0 to taicpu(hp1).ops-1 do
  608. if taicpu(hp1).oper[i]^.typ=top_reg then
  609. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  610. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  611. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  612. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  613. if assigned(alloc) and assigned(dealloc) then
  614. begin
  615. asml.Remove(alloc);
  616. alloc.Free;
  617. asml.Remove(dealloc);
  618. dealloc.Free;
  619. end;
  620. GetNextInstruction(p,hp1);
  621. asml.Remove(p);
  622. p.free;
  623. p:=hp1;
  624. result:=true;
  625. end
  626. { remove
  627. mov reg0,reg0
  628. }
  629. else if (taicpu(p).ops=2) and
  630. (taicpu(p).oper[0]^.typ = top_reg) and
  631. (taicpu(p).oper[1]^.typ = top_reg) and
  632. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  633. begin
  634. DebugMsg('Peephole RedundantMov performed', p);
  635. GetNextInstruction(p,hp1);
  636. asml.remove(p);
  637. p.free;
  638. p:=hp1;
  639. result:=true;
  640. end
  641. {
  642. Turn
  643. mov rx,ry
  644. op rx,rz
  645. mov ry, rx
  646. Into
  647. op ry,rz
  648. }
  649. else if (taicpu(p).ops=2) and
  650. (taicpu(p).oper[0]^.typ = top_reg) and
  651. (taicpu(p).oper[1]^.typ = top_reg) and
  652. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  653. (hp1.typ=ait_instruction) and
  654. (taicpu(hp1).ops >= 1) and
  655. (taicpu(hp1).oper[0]^.typ = top_reg) and
  656. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  657. (hp2.typ=ait_instruction) and
  658. (taicpu(hp2).opcode=A_MOV) and
  659. (taicpu(hp2).oper[0]^.typ = top_reg) and
  660. (taicpu(hp2).oper[1]^.typ = top_reg) and
  661. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  662. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  663. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  664. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  665. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  666. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  667. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  668. begin
  669. DebugMsg('Peephole MovOpMov2Op performed', p);
  670. if (taicpu(hp1).ops=2) and
  671. (taicpu(hp1).oper[1]^.typ=top_reg) and
  672. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  673. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  674. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  675. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  676. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  677. if assigned(alloc) and assigned(dealloc) then
  678. begin
  679. asml.Remove(alloc);
  680. alloc.Free;
  681. asml.Remove(dealloc);
  682. dealloc.Free;
  683. end;
  684. GetNextInstruction(p,hp1);
  685. asml.remove(p);
  686. p.free;
  687. asml.remove(hp2);
  688. hp2.free;
  689. p:=hp1;
  690. result:=true;
  691. end
  692. {
  693. Turn
  694. mov rx,ry
  695. op rx,rw
  696. mov rw,rx
  697. Into
  698. op rw,ry
  699. }
  700. else if (taicpu(p).ops=2) and
  701. (taicpu(p).oper[0]^.typ = top_reg) and
  702. (taicpu(p).oper[1]^.typ = top_reg) and
  703. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  704. (hp1.typ=ait_instruction) and
  705. (taicpu(hp1).ops = 2) and
  706. (taicpu(hp1).oper[0]^.typ = top_reg) and
  707. (taicpu(hp1).oper[1]^.typ = top_reg) and
  708. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  709. (hp2.typ=ait_instruction) and
  710. (taicpu(hp2).opcode=A_MOV) and
  711. (taicpu(hp2).oper[0]^.typ = top_reg) and
  712. (taicpu(hp2).oper[1]^.typ = top_reg) and
  713. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  714. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  715. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  716. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  717. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  718. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  719. begin
  720. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  721. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  722. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  723. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  724. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  725. if assigned(alloc) and assigned(dealloc) then
  726. begin
  727. asml.Remove(alloc);
  728. alloc.Free;
  729. asml.Remove(dealloc);
  730. dealloc.Free;
  731. end;
  732. GetNextInstruction(p,hp1);
  733. asml.remove(p);
  734. p.free;
  735. asml.remove(hp2);
  736. hp2.free;
  737. p:=hp1;
  738. result:=true;
  739. end
  740. { fold
  741. mov reg2,reg0
  742. mov reg3,reg1
  743. to
  744. movw reg2,reg0
  745. }
  746. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  747. (taicpu(p).ops=2) and
  748. (taicpu(p).oper[0]^.typ = top_reg) and
  749. (taicpu(p).oper[1]^.typ = top_reg) and
  750. getnextinstruction(p,hp1) and
  751. (hp1.typ = ait_instruction) and
  752. (taicpu(hp1).opcode = A_MOV) and
  753. (taicpu(hp1).ops=2) and
  754. (taicpu(hp1).oper[0]^.typ = top_reg) and
  755. (taicpu(hp1).oper[1]^.typ = top_reg) and
  756. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  757. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  758. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  759. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  760. begin
  761. DebugMsg('Peephole MovMov2Movw performed', p);
  762. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  763. if assigned(alloc) then
  764. begin
  765. asml.Remove(alloc);
  766. asml.InsertBefore(alloc,p);
  767. end;
  768. taicpu(p).opcode:=A_MOVW;
  769. asml.remove(hp1);
  770. hp1.free;
  771. result:=true;
  772. end
  773. {
  774. This removes the first mov from
  775. mov rX,...
  776. mov rX,...
  777. }
  778. else if (hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_MOV) then
  779. while (hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_MOV) and
  780. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  781. { don't remove the first mov if the second is a mov rX,rX }
  782. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  783. begin
  784. DebugMsg('Peephole MovMov2Mov performed', p);
  785. asml.remove(p);
  786. p.free;
  787. p:=hp1;
  788. GetNextInstruction(hp1,hp1);
  789. result:=true;
  790. if not assigned(hp1) then
  791. break;
  792. end;
  793. end;
  794. A_SBIC,
  795. A_SBIS:
  796. begin
  797. {
  798. Turn
  799. sbic/sbis X, y
  800. jmp .L1
  801. op
  802. .L1:
  803. into
  804. sbis/sbic X,y
  805. op
  806. .L1:
  807. }
  808. if GetNextInstruction(p, hp1) and
  809. (hp1.typ=ait_instruction) and
  810. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  811. (taicpu(hp1).ops>0) and
  812. (taicpu(hp1).oper[0]^.typ = top_ref) and
  813. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  814. GetNextInstruction(hp1, hp2) and
  815. (hp2.typ=ait_instruction) and
  816. (not taicpu(hp2).is_jmp) and
  817. GetNextInstruction(hp2, hp3) and
  818. (hp3.typ=ait_label) and
  819. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  820. begin
  821. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  822. if taicpu(p).opcode=A_SBIC then
  823. taicpu(p).opcode:=A_SBIS
  824. else
  825. taicpu(p).opcode:=A_SBIC;
  826. tai_label(hp3).labsym.decrefs;
  827. AsmL.remove(hp1);
  828. taicpu(hp1).Free;
  829. result:=true;
  830. end
  831. {
  832. Turn
  833. sbiX X, y
  834. jmp .L1
  835. jmp .L2
  836. .L1:
  837. op
  838. .L2:
  839. into
  840. sbiX X,y
  841. .L1:
  842. op
  843. .L2:
  844. }
  845. else if GetNextInstruction(p, hp1) and
  846. (hp1.typ=ait_instruction) and
  847. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  848. (taicpu(hp1).ops>0) and
  849. (taicpu(hp1).oper[0]^.typ = top_ref) and
  850. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  851. GetNextInstruction(hp1, hp2) and
  852. (hp2.typ=ait_instruction) and
  853. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  854. (taicpu(hp2).ops>0) and
  855. (taicpu(hp2).oper[0]^.typ = top_ref) and
  856. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  857. GetNextInstruction(hp2, hp3) and
  858. (hp3.typ=ait_label) and
  859. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  860. GetNextInstruction(hp3, hp4) and
  861. (hp4.typ=ait_instruction) and
  862. GetNextInstruction(hp4, hp5) and
  863. (hp3.typ=ait_label) and
  864. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  865. begin
  866. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  867. tai_label(hp3).labsym.decrefs;
  868. tai_label(hp5).labsym.decrefs;
  869. AsmL.remove(hp1);
  870. taicpu(hp1).Free;
  871. AsmL.remove(hp2);
  872. taicpu(hp2).Free;
  873. result:=true;
  874. end;
  875. end;
  876. end;
  877. end;
  878. end;
  879. end;
  880. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  881. begin
  882. end;
  883. begin
  884. casmoptimizer:=TCpuAsmOptimizer;
  885. End.