aoptcpu.pas 16 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Jonas Maebe
  3. This unit contains the peephole optimizer for i386
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit aoptcpu;
  18. {$i fpcdefs.inc}
  19. {$ifdef EXTDEBUG}
  20. {$define DEBUG_AOPTCPU}
  21. {$endif EXTDEBUG}
  22. Interface
  23. uses
  24. cgbase,
  25. cpubase, aopt, aoptx86,
  26. Aasmbase,aasmtai,aasmdata;
  27. Type
  28. TCpuAsmOptimizer = class(TX86AsmOptimizer)
  29. function PrePeepHoleOptsCpu(var p: tai): boolean; override;
  30. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  31. function PeepHoleOptPass2Cpu(var p: tai): boolean; override;
  32. function PostPeepHoleOptsCpu(var p : tai) : boolean; override;
  33. end;
  34. Var
  35. AsmOptimizer : TCpuAsmOptimizer;
  36. Implementation
  37. uses
  38. verbose,globtype,globals,
  39. cpuinfo,
  40. aasmcpu,
  41. aoptutils,
  42. aasmcfi,
  43. procinfo,
  44. cgutils,
  45. { units we should get rid off: }
  46. symsym,symconst;
  47. { Checks if the register is a 32 bit general purpose register }
  48. function isgp32reg(reg: TRegister): boolean;
  49. begin
  50. {$push}{$warnings off}
  51. isgp32reg:=(getregtype(reg)=R_INTREGISTER) and (getsupreg(reg)>=RS_EAX) and (getsupreg(reg)<=RS_EBX);
  52. {$pop}
  53. end;
  54. { returns true if p contains a memory operand with a segment set }
  55. function InsContainsSegRef(p: taicpu): boolean;
  56. var
  57. i: longint;
  58. begin
  59. result:=true;
  60. for i:=0 to p.opercnt-1 do
  61. if (p.oper[i]^.typ=top_ref) and
  62. (p.oper[i]^.ref^.segment<>NR_NO) then
  63. exit;
  64. result:=false;
  65. end;
  66. function TCPUAsmOPtimizer.PrePeepHoleOptsCpu(var p: tai): boolean;
  67. begin
  68. repeat
  69. Result:=False;
  70. case p.typ of
  71. ait_instruction:
  72. begin
  73. if InsContainsSegRef(taicpu(p)) then
  74. begin
  75. p := tai(p.next);
  76. { Nothing's actually changed, so no need to set Result to True,
  77. but try again to see if an instruction immediately follows }
  78. Continue;
  79. end;
  80. case taicpu(p).opcode Of
  81. A_IMUL:
  82. Result:=PrePeepholeOptIMUL(p);
  83. A_SAR,A_SHR:
  84. Result:=PrePeepholeOptSxx(p);
  85. A_AND:
  86. Result:=PrePeepholeOptAND(p);
  87. A_XOR:
  88. begin
  89. if (taicpu(p).oper[0]^.typ = top_reg) and
  90. (taicpu(p).oper[1]^.typ = top_reg) and
  91. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  92. { temporarily change this to 'mov reg,0' to make it easier }
  93. { for the CSE. Will be changed back in pass 2 }
  94. begin
  95. taicpu(p).opcode := A_MOV;
  96. taicpu(p).loadConst(0,0);
  97. Result:=true;
  98. end;
  99. end;
  100. else
  101. { Do nothing };
  102. end;
  103. end;
  104. else
  105. { Do nothing };
  106. end;
  107. Break;
  108. until False;
  109. { If this flag is set, something was optimised ahead of p, so move
  110. ahead by 1 instruction but treat as if Result was set to True }
  111. if aoc_ForceNewIteration in OptsToCheck then
  112. begin
  113. Exclude(OptsToCheck, aoc_ForceNewIteration);
  114. if not Result then
  115. begin
  116. if (p.typ in SkipInstr) then
  117. UpdateUsedRegs(p);
  118. p := tai(p.Next);
  119. Result := True;
  120. end;
  121. end;
  122. end;
  123. function TCPUAsmOPtimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  124. var
  125. hp1 : tai;
  126. begin
  127. result:=False;
  128. case p.Typ Of
  129. ait_instruction:
  130. begin
  131. current_filepos:=taicpu(p).fileinfo;
  132. if InsContainsSegRef(taicpu(p)) then
  133. exit;
  134. case taicpu(p).opcode Of
  135. A_ADD:
  136. Result:=OptPass1ADD(p);
  137. A_AND:
  138. Result:=OptPass1And(p);
  139. A_CMOVcc:
  140. Result:=OptPass1CMOVcc(p);
  141. A_IMUL:
  142. Result:=OptPass1Imul(p);
  143. A_CMP:
  144. Result:=OptPass1Cmp(p);
  145. A_VPXORD,
  146. A_VPXORQ,
  147. A_VXORPS,
  148. A_VXORPD,
  149. A_VPXOR:
  150. Result:=OptPass1VPXor(p);
  151. A_XORPS,
  152. A_XORPD,
  153. A_PXOR:
  154. Result:=OptPass1PXor(p);
  155. A_FLD:
  156. Result:=OptPass1FLD(p);
  157. A_FSTP,A_FISTP:
  158. Result:=OptPass1FSTP(p);
  159. A_LEA:
  160. Result:=OptPass1LEA(p);
  161. A_MOV:
  162. Result:=OptPass1MOV(p);
  163. A_MOVSX,
  164. A_MOVZX :
  165. Result:=OptPass1Movx(p);
  166. A_TEST:
  167. Result:=OptPass1Test(p);
  168. A_PUSH:
  169. begin
  170. if (taicpu(p).opsize = S_W) and
  171. (taicpu(p).oper[0]^.typ = Top_Const) and
  172. GetNextInstruction(p, hp1) and
  173. (tai(hp1).typ = ait_instruction) and
  174. (taicpu(hp1).opcode = A_PUSH) and
  175. (taicpu(hp1).oper[0]^.typ = Top_Const) and
  176. (taicpu(hp1).opsize = S_W) then
  177. begin
  178. taicpu(p).changeopsize(S_L);
  179. taicpu(p).loadConst(0,taicpu(p).oper[0]^.val shl 16 + word(taicpu(hp1).oper[0]^.val));
  180. asml.remove(hp1);
  181. hp1.free;
  182. Result:=true;
  183. end;
  184. end;
  185. A_SHL, A_SAL:
  186. Result:=OptPass1SHLSAL(p);
  187. A_SHR:
  188. Result:=OptPass1SHR(p);
  189. A_SUB:
  190. Result:=OptPass1Sub(p);
  191. A_Jcc:
  192. Result:=OptPass1Jcc(p);
  193. A_MOVDQA,
  194. A_MOVAPD,
  195. A_MOVAPS,
  196. A_MOVUPD,
  197. A_MOVUPS,
  198. A_VMOVAPS,
  199. A_VMOVAPD,
  200. A_VMOVUPS,
  201. A_VMOVUPD:
  202. Result:=OptPass1_V_MOVAP(p);
  203. A_VDIVSD,
  204. A_VDIVSS,
  205. A_VSUBSD,
  206. A_VSUBSS,
  207. A_VMULSD,
  208. A_VMULSS,
  209. A_VADDSD,
  210. A_VADDSS,
  211. A_VANDPD,
  212. A_VANDPS,
  213. A_VORPD,
  214. A_VORPS:
  215. Result:=OptPass1VOP(p);
  216. A_MULSD,
  217. A_MULSS,
  218. A_ADDSD,
  219. A_ADDSS:
  220. Result:=OptPass1OP(p);
  221. A_VMOVSD,
  222. A_VMOVSS,
  223. A_MOVSD,
  224. A_MOVSS:
  225. Result:=OptPass1MOVXX(p);
  226. A_SHRX,
  227. A_SHLX:
  228. Result:=OptPass1SHXX(p);
  229. A_VMOVDQA,
  230. A_VMOVDQU:
  231. Result:=OptPass1VMOVDQ(p);
  232. A_VCVTSS2SD,
  233. A_CVTSS2SD:
  234. Result:=OptPass1_V_Cvtss2sd(p);
  235. A_CLC,
  236. A_STC:
  237. Result:=OptPass1STCCLC(p);
  238. else
  239. ;
  240. end;
  241. end;
  242. else
  243. ;
  244. end;
  245. { If this flag is set, force another run of pass 1 even if p wasn't
  246. changed }
  247. if aoc_ForceNewIteration in OptsToCheck then
  248. begin
  249. Exclude(OptsToCheck, aoc_ForceNewIteration);
  250. if not Result then
  251. begin
  252. if (p.typ in SkipInstr) then
  253. begin
  254. UpdateUsedRegs(p);
  255. p := tai(p.Next);
  256. end
  257. else
  258. begin
  259. p := tai(p.Next);
  260. UpdateUsedRegs(p);
  261. end;
  262. Result := True;
  263. end;
  264. end;
  265. end;
  266. function TCPUAsmOptimizer.PeepHoleOptPass2Cpu(var p: tai): boolean;
  267. begin
  268. Result:=false;
  269. case p.Typ Of
  270. Ait_Instruction:
  271. begin
  272. if InsContainsSegRef(taicpu(p)) then
  273. exit;
  274. case taicpu(p).opcode Of
  275. A_ADD:
  276. Result:=OptPass2ADD(p);
  277. A_CMOVcc:
  278. Result:=OptPass2CMOVcc(p);
  279. A_CMP:
  280. Result:=OptPass2CMP(p);
  281. A_TEST:
  282. Result:=OptPass2TEST(p);
  283. A_Jcc:
  284. Result:=OptPass2Jcc(p);
  285. A_Lea:
  286. Result:=OptPass2Lea(p);
  287. A_FSTP,A_FISTP:
  288. Result:=OptPass1FSTP(p);
  289. A_IMUL:
  290. Result:=OptPass2Imul(p);
  291. A_JMP:
  292. Result:=OptPass2Jmp(p);
  293. A_MOV:
  294. Result:=OptPass2MOV(p);
  295. A_MOVZX:
  296. Result:=OptPass2Movx(p);
  297. A_SUB:
  298. Result:=OptPass2SUB(p);
  299. A_SETcc:
  300. Result:=OptPass2SETcc(p);
  301. A_CLC,
  302. A_STC:
  303. Result:=OptPass2STCCLC(p);
  304. else
  305. ;
  306. end;
  307. end;
  308. else
  309. ;
  310. end;
  311. { If this flag is set, force another run of pass 2 even if p wasn't
  312. changed (-O3 only), but otherwise move p ahead by 1 instruction
  313. and treat as if Result was set to True }
  314. if aoc_ForceNewIteration in OptsToCheck then
  315. begin
  316. Exclude(OptsToCheck, aoc_ForceNewIteration);
  317. if not Result then
  318. begin
  319. if (p.typ in SkipInstr) then
  320. begin
  321. UpdateUsedRegs(p);
  322. p := tai(p.Next);
  323. end
  324. else
  325. begin
  326. p := tai(p.Next);
  327. UpdateUsedRegs(p);
  328. end;
  329. Result := True;
  330. end;
  331. end;
  332. end;
  333. function TCPUAsmOptimizer.PostPeepHoleOptsCpu(var p : tai) : boolean;
  334. var
  335. hp1: tai;
  336. begin
  337. Result:=false;
  338. case p.Typ Of
  339. Ait_Instruction:
  340. begin
  341. if InsContainsSegRef(taicpu(p)) then
  342. Exit;
  343. case taicpu(p).opcode Of
  344. A_CALL:
  345. Result:=PostPeepHoleOptCall(p);
  346. A_LEA:
  347. Result:=PostPeepholeOptLea(p);
  348. A_CMP:
  349. Result:=PostPeepholeOptCmp(p);
  350. A_MOV:
  351. Result:=PostPeepholeOptMov(p);
  352. A_MOVZX:
  353. { if register vars are on, it's possible there is code like }
  354. { "cmpl $3,%eax; movzbl 8(%ebp),%ebx; je .Lxxx" }
  355. { so we can't safely replace the movzx then with xor/mov, }
  356. { since that would change the flags (JM) }
  357. if PostPeepholeOptMovzx(p) then
  358. Result := True
  359. else if not(cs_opt_regvar in current_settings.optimizerswitches) then
  360. begin
  361. if (taicpu(p).oper[1]^.typ = top_reg) then
  362. if (taicpu(p).oper[0]^.typ = top_reg)
  363. then
  364. case taicpu(p).opsize of
  365. S_BL:
  366. begin
  367. if IsGP32Reg(taicpu(p).oper[1]^.reg) and
  368. not(cs_opt_size in current_settings.optimizerswitches) and
  369. (current_settings.optimizecputype = cpu_Pentium) then
  370. {Change "movzbl %reg1, %reg2" to
  371. "xorl %reg2, %reg2; movb %reg1, %reg2" for Pentium and
  372. PentiumMMX}
  373. begin
  374. hp1 := taicpu.op_reg_reg(A_XOR, S_L,
  375. taicpu(p).oper[1]^.reg, taicpu(p).oper[1]^.reg);
  376. InsertLLItem(p.previous, p, hp1);
  377. taicpu(p).opcode := A_MOV;
  378. taicpu(p).changeopsize(S_B);
  379. setsubreg(taicpu(p).oper[1]^.reg,R_SUBL);
  380. Result := True;
  381. end;
  382. end;
  383. else
  384. ;
  385. end
  386. else if (taicpu(p).oper[0]^.typ = top_ref) and
  387. (taicpu(p).oper[0]^.ref^.base <> taicpu(p).oper[1]^.reg) and
  388. (taicpu(p).oper[0]^.ref^.index <> taicpu(p).oper[1]^.reg) and
  389. not(cs_opt_size in current_settings.optimizerswitches) and
  390. IsGP32Reg(taicpu(p).oper[1]^.reg) and
  391. (current_settings.optimizecputype = cpu_Pentium) and
  392. (taicpu(p).opsize = S_BL) then
  393. {changes "movzbl mem, %reg" to "xorl %reg, %reg; movb mem, %reg8" for
  394. Pentium and PentiumMMX}
  395. begin
  396. hp1 := taicpu.Op_reg_reg(A_XOR, S_L, taicpu(p).oper[1]^.reg,
  397. taicpu(p).oper[1]^.reg);
  398. taicpu(p).opcode := A_MOV;
  399. taicpu(p).changeopsize(S_B);
  400. setsubreg(taicpu(p).oper[1]^.reg,R_SUBL);
  401. InsertLLItem(p.previous, p, hp1);
  402. Result := True;
  403. end;
  404. end;
  405. A_TEST, A_OR:
  406. Result:=PostPeepholeOptTestOr(p);
  407. A_AND:
  408. Result:=PostPeepholeOptAnd(p);
  409. A_MOVSX:
  410. Result:=PostPeepholeOptMOVSX(p);
  411. A_SHR:
  412. Result:=PostPeepholeOptShr(p);
  413. A_ADD,
  414. A_SUB:
  415. Result:=PostPeepholeOptADDSUB(p);
  416. A_XOR:
  417. Result:=PostPeepholeOptXor(p);
  418. A_RET:
  419. Result:=PostPeepholeOptRET(p);
  420. A_VPXOR:
  421. Result:=PostPeepholeOptVPXOR(p);
  422. else
  423. ;
  424. end;
  425. { Optimise any reference-type operands (if Result is True, the
  426. instruction will be checked on the next iteration) }
  427. if not Result then
  428. OptimizeRefs(taicpu(p));
  429. end;
  430. else
  431. ;
  432. end;
  433. { If this flag is set, something was optimised ahead of p, so move
  434. ahead by 1 instruction but treat as if Result was set to True }
  435. if aoc_ForceNewIteration in OptsToCheck then
  436. begin
  437. Exclude(OptsToCheck, aoc_ForceNewIteration);
  438. if not Result then
  439. begin
  440. if (p.typ in SkipInstr) then
  441. UpdateUsedRegs(p);
  442. p := tai(p.Next);
  443. Result := True;
  444. end;
  445. end;
  446. end;
  447. begin
  448. casmoptimizer:=TCpuAsmOptimizer;
  449. end.