cgbase.pas 23 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. { since we have only 16bit offsets, we need to be able to specify the high
  56. and lower 16 bits of the address of a symbol of up to 64 bit }
  57. trefaddr = (
  58. addr_no,
  59. addr_full,
  60. addr_pic,
  61. addr_pic_no_got
  62. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS)}
  63. ,
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$IFDEF AVR}
  86. ,addr_lo8
  87. ,addr_hi8
  88. {$ENDIF}
  89. );
  90. {# Generic opcodes, which must be supported by all processors
  91. }
  92. topcg =
  93. (
  94. OP_NONE,
  95. OP_MOVE, { replaced operation with direct load }
  96. OP_ADD, { simple addition }
  97. OP_AND, { simple logical and }
  98. OP_DIV, { simple unsigned division }
  99. OP_IDIV, { simple signed division }
  100. OP_IMUL, { simple signed multiply }
  101. OP_MUL, { simple unsigned multiply }
  102. OP_NEG, { simple negate }
  103. OP_NOT, { simple logical not }
  104. OP_OR, { simple logical or }
  105. OP_SAR, { arithmetic shift-right }
  106. OP_SHL, { logical shift left }
  107. OP_SHR, { logical shift right }
  108. OP_SUB, { simple subtraction }
  109. OP_XOR, { simple exclusive or }
  110. OP_ROL, { rotate left }
  111. OP_ROR { rotate right }
  112. );
  113. {# Generic flag values - used for jump locations }
  114. TOpCmp =
  115. (
  116. OC_NONE,
  117. OC_EQ, { equality comparison }
  118. OC_GT, { greater than (signed) }
  119. OC_LT, { less than (signed) }
  120. OC_GTE, { greater or equal than (signed) }
  121. OC_LTE, { less or equal than (signed) }
  122. OC_NE, { not equal }
  123. OC_BE, { less or equal than (unsigned) }
  124. OC_B, { less than (unsigned) }
  125. OC_AE, { greater or equal than (unsigned) }
  126. OC_A { greater than (unsigned) }
  127. );
  128. { indirect symbol flags }
  129. tindsymflag = (is_data,is_weak);
  130. tindsymflags = set of tindsymflag;
  131. { OS_NO is also used memory references with large data that can
  132. not be loaded in a register directly }
  133. TCgSize = (OS_NO,
  134. { integer registers }
  135. OS_8,OS_16,OS_32,OS_64,OS_128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  136. { single,double,extended,comp,float128 }
  137. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  138. { multi-media sizes: split in byte, word, dword, ... }
  139. { entities, then the signed counterparts }
  140. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,
  141. OS_MS8,OS_MS16,OS_MS32,OS_MS64,OS_MS128,OS_MS256 );
  142. { Register types }
  143. TRegisterType = (
  144. R_INVALIDREGISTER, { = 0 }
  145. R_INTREGISTER, { = 1 }
  146. R_FPUREGISTER, { = 2 }
  147. { used by Intel only }
  148. R_MMXREGISTER, { = 3 }
  149. R_MMREGISTER, { = 4 }
  150. R_SPECIALREGISTER, { = 5 }
  151. R_ADDRESSREGISTER { = 6 }
  152. );
  153. { Sub registers }
  154. TSubRegister = (
  155. R_SUBNONE, { = 0; no sub register possible }
  156. R_SUBL, { = 1; 8 bits, Like AL }
  157. R_SUBH, { = 2; 8 bits, Like AH }
  158. R_SUBW, { = 3; 16 bits, Like AX }
  159. R_SUBD, { = 4; 32 bits, Like EAX }
  160. R_SUBQ, { = 5; 64 bits, Like RAX }
  161. { For Sparc floats that use F0:F1 to store doubles }
  162. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  163. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  164. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  165. R_SUBMMS, { = 9; single scalar in multi media register }
  166. R_SUBMMD, { = 10; double scalar in multi media register }
  167. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  168. { For Intel X86 AVX-Register }
  169. R_SUBMMX, { = 12; 128 BITS }
  170. R_SUBMMY { = 13; 256 BITS }
  171. );
  172. TSubRegisterSet = set of TSubRegister;
  173. TSuperRegister = type word;
  174. {
  175. The new register coding:
  176. SuperRegister (bits 0..15)
  177. Subregister (bits 16..23)
  178. Register type (bits 24..31)
  179. TRegister is defined as an enum to make it incompatible
  180. with TSuperRegister to avoid mixing them
  181. }
  182. TRegister = (
  183. TRegisterLowEnum := Low(longint),
  184. TRegisterHighEnum := High(longint)
  185. );
  186. TRegisterRec=packed record
  187. {$ifdef FPC_BIG_ENDIAN}
  188. regtype : Tregistertype;
  189. subreg : Tsubregister;
  190. supreg : Tsuperregister;
  191. {$else FPC_BIG_ENDIAN}
  192. supreg : Tsuperregister;
  193. subreg : Tsubregister;
  194. regtype : Tregistertype;
  195. {$endif FPC_BIG_ENDIAN}
  196. end;
  197. { A type to store register locations for 64 Bit values. }
  198. {$ifdef cpu64bitalu}
  199. tregister64 = tregister;
  200. tregister128 = record
  201. reglo,reghi : tregister;
  202. end;
  203. {$else cpu64bitalu}
  204. tregister64 = record
  205. reglo,reghi : tregister;
  206. end;
  207. {$endif cpu64bitalu}
  208. Tregistermmxset = record
  209. reg0,reg1,reg2,reg3:Tregister
  210. end;
  211. { Set type definition for registers }
  212. tsuperregisterset = array[byte] of set of byte;
  213. pmmshuffle = ^tmmshuffle;
  214. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  215. passed to an mm operation is nil, it means that the whole location is moved }
  216. tmmshuffle = record
  217. { describes how many shuffles are actually described, if len=0 then
  218. moving the scalar with index 0 to the scalar with index 0 is meant }
  219. len : byte;
  220. { lower nibble of each entry of this array describes index of the source data index while
  221. the upper nibble describes the destination index }
  222. shuffles : array[1..1] of byte;
  223. end;
  224. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  225. Psuperregisterarray=^Tsuperregisterarray;
  226. Tsuperregisterworklist=object
  227. buflength,
  228. buflengthinc,
  229. length:word;
  230. buf:Psuperregisterarray;
  231. constructor init;
  232. constructor copyfrom(const x:Tsuperregisterworklist);
  233. destructor done;
  234. procedure clear;
  235. procedure add(s:tsuperregister);
  236. function addnodup(s:tsuperregister): boolean;
  237. function get:tsuperregister;
  238. function readidx(i:word):tsuperregister;
  239. procedure deleteidx(i:word);
  240. function delete(s:tsuperregister):boolean;
  241. end;
  242. psuperregisterworklist=^tsuperregisterworklist;
  243. const
  244. { alias for easier understanding }
  245. R_SSEREGISTER = R_MMREGISTER;
  246. { Invalid register number }
  247. RS_INVALID = high(tsuperregister);
  248. tcgsize2size : Array[tcgsize] of integer =
  249. { integer values }
  250. (0,1,2,4,8,16,1,2,4,8,16,
  251. { floating point values }
  252. 4,8,10,8,16,
  253. { multimedia values }
  254. 1,2,4,8,16,32,1,2,4,8,16,32);
  255. tfloat2tcgsize: array[tfloattype] of tcgsize =
  256. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  257. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  258. (s32real,s64real,s80real,s64comp);
  259. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  260. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  261. {$if defined(cpu64bitalu)}
  262. { operand size describing an unsigned value in a pair of int registers }
  263. OS_PAIR = OS_128;
  264. { operand size describing an signed value in a pair of int registers }
  265. OS_SPAIR = OS_S128;
  266. {$elseif defined(cpu32bitalu)}
  267. { operand size describing an unsigned value in a pair of int registers }
  268. OS_PAIR = OS_64;
  269. { operand size describing an signed value in a pair of int registers }
  270. OS_SPAIR = OS_S64;
  271. {$elseif defined(cpu16bitalu)}
  272. { operand size describing an unsigned value in a pair of int registers }
  273. OS_PAIR = OS_32;
  274. { operand size describing an signed value in a pair of int registers }
  275. OS_SPAIR = OS_S32;
  276. {$elseif defined(cpu8bitalu)}
  277. { operand size describing an unsigned value in a pair of int registers }
  278. OS_PAIR = OS_16;
  279. { operand size describing an signed value in a pair of int registers }
  280. OS_SPAIR = OS_S16;
  281. {$endif}
  282. { Table to convert tcgsize variables to the correspondending
  283. unsigned types }
  284. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  285. OS_8,OS_16,OS_32,OS_64,OS_128,OS_8,OS_16,OS_32,OS_64,OS_128,
  286. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  287. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  288. OS_M64,OS_M128,OS_M256);
  289. tcgloc2str : array[TCGLoc] of string[12] = (
  290. 'LOC_INVALID',
  291. 'LOC_VOID',
  292. 'LOC_CONST',
  293. 'LOC_JUMP',
  294. 'LOC_FLAGS',
  295. 'LOC_REG',
  296. 'LOC_CREG',
  297. 'LOC_FPUREG',
  298. 'LOC_CFPUREG',
  299. 'LOC_MMXREG',
  300. 'LOC_CMMXREG',
  301. 'LOC_MMREG',
  302. 'LOC_CMMREG',
  303. 'LOC_SSETREG',
  304. 'LOC_CSSETREG',
  305. 'LOC_SSETREF',
  306. 'LOC_CSSETREF',
  307. 'LOC_CREF',
  308. 'LOC_REF'
  309. );
  310. var
  311. mms_movescalar : pmmshuffle;
  312. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  313. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  314. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  315. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  316. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  317. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  318. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  319. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  320. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  321. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  322. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  323. function generic_regname(r:tregister):string;
  324. {# From a constant numeric value, return the abstract code generator
  325. size.
  326. }
  327. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  328. function int_float_cgsize(const a: tcgint): tcgsize;
  329. { return the inverse condition of opcmp }
  330. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  331. { return the opcmp needed when swapping the operands }
  332. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  333. { return whether op is commutative }
  334. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  335. { returns true, if shuffle describes a real shuffle operation and not only a move }
  336. function realshuffle(shuffle : pmmshuffle) : boolean;
  337. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  338. function shufflescalar(shuffle : pmmshuffle) : boolean;
  339. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  340. the source }
  341. procedure removeshuffles(var shuffle : tmmshuffle);
  342. implementation
  343. uses
  344. verbose;
  345. {******************************************************************************
  346. tsuperregisterworklist
  347. ******************************************************************************}
  348. constructor tsuperregisterworklist.init;
  349. begin
  350. length:=0;
  351. buflength:=0;
  352. buflengthinc:=16;
  353. buf:=nil;
  354. end;
  355. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  356. begin
  357. self:=x;
  358. if x.buf<>nil then
  359. begin
  360. getmem(buf,buflength*sizeof(Tsuperregister));
  361. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  362. end;
  363. end;
  364. destructor tsuperregisterworklist.done;
  365. begin
  366. if assigned(buf) then
  367. freemem(buf);
  368. end;
  369. procedure tsuperregisterworklist.add(s:tsuperregister);
  370. begin
  371. inc(length);
  372. { Need to increase buffer length? }
  373. if length>=buflength then
  374. begin
  375. inc(buflength,buflengthinc);
  376. buflengthinc:=buflengthinc*2;
  377. if buflengthinc>256 then
  378. buflengthinc:=256;
  379. reallocmem(buf,buflength*sizeof(Tsuperregister));
  380. end;
  381. buf^[length-1]:=s;
  382. end;
  383. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  384. begin
  385. addnodup := false;
  386. if indexword(buf^,length,s) = -1 then
  387. begin
  388. add(s);
  389. addnodup := true;
  390. end;
  391. end;
  392. procedure tsuperregisterworklist.clear;
  393. begin
  394. length:=0;
  395. end;
  396. procedure tsuperregisterworklist.deleteidx(i:word);
  397. begin
  398. if i>=length then
  399. internalerror(200310144);
  400. buf^[i]:=buf^[length-1];
  401. dec(length);
  402. end;
  403. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  404. begin
  405. if (i >= length) then
  406. internalerror(2005010601);
  407. result := buf^[i];
  408. end;
  409. function tsuperregisterworklist.get:tsuperregister;
  410. begin
  411. if length=0 then
  412. internalerror(200310142);
  413. get:=buf^[0];
  414. buf^[0]:=buf^[length-1];
  415. dec(length);
  416. end;
  417. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  418. var
  419. i:longint;
  420. begin
  421. delete:=false;
  422. { indexword in 1.0.x and 1.9.4 is broken }
  423. i:=indexword(buf^,length,s);
  424. if i<>-1 then
  425. begin
  426. deleteidx(i);
  427. delete := true;
  428. end;
  429. end;
  430. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  431. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  432. begin
  433. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  434. end;
  435. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  436. begin
  437. include(regs[s shr 8],(s and $ff));
  438. end;
  439. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  440. begin
  441. exclude(regs[s shr 8],(s and $ff));
  442. end;
  443. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  444. begin
  445. result:=(s and $ff) in regs[s shr 8];
  446. end;
  447. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  448. begin
  449. tregisterrec(result).regtype:=rt;
  450. tregisterrec(result).supreg:=sr;
  451. tregisterrec(result).subreg:=sb;
  452. end;
  453. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  454. begin
  455. result:=tregisterrec(r).subreg;
  456. end;
  457. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  458. begin
  459. result:=tregisterrec(r).supreg;
  460. end;
  461. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  462. begin
  463. result:=tregisterrec(r).regtype;
  464. end;
  465. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  466. begin
  467. tregisterrec(r).subreg:=sr;
  468. end;
  469. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  470. begin
  471. tregisterrec(r).supreg:=sr;
  472. end;
  473. function generic_regname(r:tregister):string;
  474. var
  475. nr : string[12];
  476. begin
  477. str(getsupreg(r),nr);
  478. case getregtype(r) of
  479. R_INTREGISTER:
  480. result:='ireg'+nr;
  481. R_FPUREGISTER:
  482. result:='freg'+nr;
  483. R_MMREGISTER:
  484. result:='mreg'+nr;
  485. R_MMXREGISTER:
  486. result:='xreg'+nr;
  487. R_ADDRESSREGISTER:
  488. result:='areg'+nr;
  489. R_SPECIALREGISTER:
  490. result:='sreg'+nr;
  491. else
  492. begin
  493. result:='INVALID';
  494. exit;
  495. end;
  496. end;
  497. case getsubreg(r) of
  498. R_SUBNONE:
  499. ;
  500. R_SUBL:
  501. result:=result+'l';
  502. R_SUBH:
  503. result:=result+'h';
  504. R_SUBW:
  505. result:=result+'w';
  506. R_SUBD:
  507. result:=result+'d';
  508. R_SUBQ:
  509. result:=result+'q';
  510. R_SUBFS:
  511. result:=result+'fs';
  512. R_SUBFD:
  513. result:=result+'fd';
  514. R_SUBMMD:
  515. result:=result+'md';
  516. R_SUBMMS:
  517. result:=result+'ms';
  518. R_SUBMMWHOLE:
  519. result:=result+'ma';
  520. else
  521. internalerror(200308252);
  522. end;
  523. end;
  524. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  525. const
  526. size2cgsize : array[0..8] of tcgsize = (
  527. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  528. );
  529. begin
  530. {$ifdef cpu64bitalu}
  531. if a=16 then
  532. result:=OS_128
  533. else
  534. {$endif cpu64bitalu}
  535. if a>8 then
  536. result:=OS_NO
  537. else
  538. result:=size2cgsize[a];
  539. end;
  540. function int_float_cgsize(const a: tcgint): tcgsize;
  541. begin
  542. case a of
  543. 4 :
  544. result:=OS_F32;
  545. 8 :
  546. result:=OS_F64;
  547. 10 :
  548. result:=OS_F80;
  549. 16 :
  550. result:=OS_F128;
  551. else
  552. internalerror(200603211);
  553. end;
  554. end;
  555. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  556. const
  557. list: array[TOpCmp] of TOpCmp =
  558. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  559. OC_B,OC_BE);
  560. begin
  561. inverse_opcmp := list[opcmp];
  562. end;
  563. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  564. const
  565. list: array[TOpCmp] of TOpCmp =
  566. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  567. OC_BE,OC_B);
  568. begin
  569. swap_opcmp := list[opcmp];
  570. end;
  571. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  572. const
  573. list: array[topcg] of boolean =
  574. (true,false,true,true,false,false,true,true,false,false,
  575. true,false,false,false,false,true,false,false);
  576. begin
  577. commutativeop := list[op];
  578. end;
  579. function realshuffle(shuffle : pmmshuffle) : boolean;
  580. var
  581. i : longint;
  582. begin
  583. realshuffle:=true;
  584. if (shuffle=nil) or (shuffle^.len=0) then
  585. realshuffle:=false
  586. else
  587. begin
  588. for i:=1 to shuffle^.len do
  589. begin
  590. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  591. exit;
  592. end;
  593. realshuffle:=false;
  594. end;
  595. end;
  596. function shufflescalar(shuffle : pmmshuffle) : boolean;
  597. begin
  598. result:=shuffle^.len=0;
  599. end;
  600. procedure removeshuffles(var shuffle : tmmshuffle);
  601. var
  602. i : longint;
  603. begin
  604. if shuffle.len=0 then
  605. exit;
  606. for i:=1 to shuffle.len do
  607. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  608. end;
  609. initialization
  610. new(mms_movescalar);
  611. mms_movescalar^.len:=0;
  612. finalization
  613. dispose(mms_movescalar);
  614. end.