n8086add.pas 40 KB

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  1. {
  2. Copyright (c) 2000-2002 by Florian Klaempfl
  3. Code generation for add nodes on the i8086
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit n8086add;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,cpubase,nx86add;
  22. type
  23. { ti8086addnode }
  24. ti8086addnode = class(tx86addnode)
  25. function simplify(forinline: boolean) : tnode;override;
  26. function use_generic_mul32to64: boolean; override;
  27. function first_addpointer: tnode; override;
  28. function first_addhugepointer: tnode;
  29. function first_cmppointer: tnode; override;
  30. function first_cmphugepointer: tnode;
  31. function first_cmpfarpointer: tnode;
  32. procedure second_addordinal; override;
  33. procedure second_add64bit;override;
  34. procedure second_addfarpointer;
  35. procedure second_cmp64bit;override;
  36. procedure second_cmp32bit;
  37. procedure second_cmpfarpointer;
  38. procedure second_cmpordinal;override;
  39. procedure second_mul(unsigned: boolean);
  40. end;
  41. implementation
  42. uses
  43. globtype,systems,
  44. cutils,verbose,globals,constexp,pass_1,
  45. symconst,symdef,symtype,symcpu,paramgr,defutil,
  46. aasmbase,aasmtai,aasmdata,aasmcpu,
  47. cgbase,procinfo,
  48. ncal,ncon,nset,cgutils,tgobj,
  49. cga,ncgutil,cgobj,cg64f32,cgx86,
  50. hlcgobj;
  51. {*****************************************************************************
  52. simplify
  53. *****************************************************************************}
  54. function ti8086addnode.simplify(forinline: boolean): tnode;
  55. var
  56. t : tnode;
  57. lt,rt: tnodetype;
  58. rd,ld: tdef;
  59. rv,lv,v: tconstexprint;
  60. begin
  61. { load easier access variables }
  62. rd:=right.resultdef;
  63. ld:=left.resultdef;
  64. rt:=right.nodetype;
  65. lt:=left.nodetype;
  66. if (
  67. (lt = pointerconstn) and is_farpointer(ld) and
  68. is_constintnode(right) and
  69. (nodetype in [addn,subn])
  70. ) or
  71. (
  72. (rt = pointerconstn) and is_farpointer(rd) and
  73. is_constintnode(left) and
  74. (nodetype=addn)
  75. ) then
  76. begin
  77. t:=nil;
  78. { load values }
  79. case lt of
  80. ordconstn:
  81. lv:=tordconstnode(left).value;
  82. pointerconstn:
  83. lv:=tpointerconstnode(left).value;
  84. niln:
  85. lv:=0;
  86. else
  87. internalerror(2002080202);
  88. end;
  89. case rt of
  90. ordconstn:
  91. rv:=tordconstnode(right).value;
  92. pointerconstn:
  93. rv:=tpointerconstnode(right).value;
  94. niln:
  95. rv:=0;
  96. else
  97. internalerror(2002080203);
  98. end;
  99. case nodetype of
  100. addn:
  101. begin
  102. v:=lv+rv;
  103. if lt=pointerconstn then
  104. t := cpointerconstnode.create((qword(lv) and $FFFF0000) or word(qword(v)),resultdef)
  105. else if rt=pointerconstn then
  106. t := cpointerconstnode.create((qword(rv) and $FFFF0000) or word(qword(v)),resultdef)
  107. else
  108. internalerror(2014040604);
  109. end;
  110. subn:
  111. begin
  112. v:=lv-rv;
  113. if (lt=pointerconstn) then
  114. { pointer-pointer results in an integer }
  115. if (rt=pointerconstn) then
  116. begin
  117. if not(nf_has_pointerdiv in flags) then
  118. internalerror(2008030101);
  119. { todo: implement pointer-pointer as well }
  120. internalerror(2014040607);
  121. //t := cpointerconstnode.create(qword(v),resultdef);
  122. end
  123. else
  124. t := cpointerconstnode.create((qword(lv) and $FFFF0000) or word(qword(v)),resultdef)
  125. else
  126. internalerror(2014040606);
  127. end;
  128. else
  129. internalerror(2014040605);
  130. end;
  131. result:=t;
  132. exit;
  133. end
  134. else
  135. Result:=inherited simplify(forinline);
  136. end;
  137. {*****************************************************************************
  138. use_generic_mul32to64
  139. *****************************************************************************}
  140. function ti8086addnode.use_generic_mul32to64: boolean;
  141. begin
  142. result := True;
  143. end;
  144. { handles all multiplications }
  145. procedure ti8086addnode.second_addordinal;
  146. var
  147. unsigned: boolean;
  148. begin
  149. unsigned:=not(is_signed(left.resultdef)) or
  150. not(is_signed(right.resultdef));
  151. if nodetype=muln then
  152. second_mul(unsigned)
  153. else if is_farpointer(left.resultdef) xor is_farpointer(right.resultdef) then
  154. second_addfarpointer
  155. else
  156. inherited second_addordinal;
  157. end;
  158. {*****************************************************************************
  159. Add64bit
  160. *****************************************************************************}
  161. procedure ti8086addnode.second_add64bit;
  162. var
  163. op : TOpCG;
  164. op1,op2 : TAsmOp;
  165. hregister,
  166. hregister2 : tregister;
  167. hl4 : tasmlabel;
  168. mboverflow,
  169. unsigned:boolean;
  170. r:Tregister;
  171. begin
  172. pass_left_right;
  173. op1:=A_NONE;
  174. op2:=A_NONE;
  175. mboverflow:=false;
  176. unsigned:=((left.resultdef.typ=orddef) and
  177. (torddef(left.resultdef).ordtype=u64bit)) or
  178. ((right.resultdef.typ=orddef) and
  179. (torddef(right.resultdef).ordtype=u64bit));
  180. case nodetype of
  181. addn :
  182. begin
  183. op:=OP_ADD;
  184. mboverflow:=true;
  185. end;
  186. subn :
  187. begin
  188. op:=OP_SUB;
  189. op1:=A_SUB;
  190. op2:=A_SBB;
  191. mboverflow:=true;
  192. end;
  193. xorn:
  194. op:=OP_XOR;
  195. orn:
  196. op:=OP_OR;
  197. andn:
  198. op:=OP_AND;
  199. else
  200. begin
  201. { everything should be handled in pass_1 (JM) }
  202. internalerror(200109051);
  203. end;
  204. end;
  205. { left and right no register? }
  206. { then one must be demanded }
  207. if (left.location.loc<>LOC_REGISTER) then
  208. begin
  209. if (right.location.loc<>LOC_REGISTER) then
  210. begin
  211. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  212. hregister2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  213. cg64.a_load64_loc_reg(current_asmdata.CurrAsmList,left.location,joinreg64(hregister,hregister2));
  214. location_reset(left.location,LOC_REGISTER,left.location.size);
  215. left.location.register64.reglo:=hregister;
  216. left.location.register64.reghi:=hregister2;
  217. end
  218. else
  219. begin
  220. location_swap(left.location,right.location);
  221. toggleflag(nf_swapped);
  222. end;
  223. end;
  224. { at this point, left.location.loc should be LOC_REGISTER }
  225. if right.location.loc=LOC_REGISTER then
  226. begin
  227. { when swapped another result register }
  228. if (nodetype=subn) and (nf_swapped in flags) then
  229. begin
  230. cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,op,location.size,
  231. left.location.register64,
  232. right.location.register64);
  233. location_swap(left.location,right.location);
  234. toggleflag(nf_swapped);
  235. end
  236. else
  237. begin
  238. cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,op,location.size,
  239. right.location.register64,
  240. left.location.register64);
  241. end;
  242. end
  243. else
  244. begin
  245. { right.location<>LOC_REGISTER }
  246. if (nodetype=subn) and (nf_swapped in flags) then
  247. begin
  248. r:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  249. cg64.a_load64low_loc_reg(current_asmdata.CurrAsmList,right.location,r);
  250. emit_reg_reg(op1,S_W,left.location.register64.reglo,r);
  251. emit_reg_reg(op2,S_W,GetNextReg(left.location.register64.reglo),GetNextReg(r));
  252. emit_reg_reg(A_MOV,S_W,r,left.location.register64.reglo);
  253. emit_reg_reg(A_MOV,S_W,GetNextReg(r),GetNextReg(left.location.register64.reglo));
  254. cg64.a_load64high_loc_reg(current_asmdata.CurrAsmList,right.location,r);
  255. { the carry flag is still ok }
  256. emit_reg_reg(op2,S_W,left.location.register64.reghi,r);
  257. emit_reg_reg(op2,S_W,GetNextReg(left.location.register64.reghi),GetNextReg(r));
  258. emit_reg_reg(A_MOV,S_W,r,left.location.register64.reghi);
  259. emit_reg_reg(A_MOV,S_W,GetNextReg(r),GetNextReg(left.location.register64.reghi));
  260. end
  261. else
  262. begin
  263. cg64.a_op64_loc_reg(current_asmdata.CurrAsmList,op,location.size,right.location,
  264. left.location.register64);
  265. end;
  266. location_freetemp(current_asmdata.CurrAsmList,right.location);
  267. end;
  268. { only in case of overflow operations }
  269. { produce overflow code }
  270. { we must put it here directly, because sign of operation }
  271. { is in unsigned VAR!! }
  272. if mboverflow then
  273. begin
  274. if cs_check_overflow in current_settings.localswitches then
  275. begin
  276. current_asmdata.getjumplabel(hl4);
  277. if unsigned then
  278. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_AE,hl4)
  279. else
  280. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NO,hl4);
  281. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
  282. cg.a_label(current_asmdata.CurrAsmList,hl4);
  283. end;
  284. end;
  285. location_copy(location,left.location);
  286. end;
  287. function ti8086addnode.first_addpointer: tnode;
  288. begin
  289. if is_hugepointer(left.resultdef) or is_hugepointer(right.resultdef) then
  290. result:=first_addhugepointer
  291. else
  292. result:=inherited;
  293. end;
  294. function ti8086addnode.first_addhugepointer: tnode;
  295. var
  296. procname:string;
  297. begin
  298. result:=nil;
  299. if (nodetype=subn) and is_hugepointer(left.resultdef) and is_hugepointer(right.resultdef) then
  300. procname:='fpc_hugeptr_sub_hugeptr'
  301. else
  302. begin
  303. case nodetype of
  304. addn:
  305. procname:='fpc_hugeptr_add_longint';
  306. subn:
  307. procname:='fpc_hugeptr_sub_longint';
  308. else
  309. internalerror(2014070301);
  310. end;
  311. if cs_hugeptr_arithmetic_normalization in current_settings.localswitches then
  312. procname:=procname+'_normalized';
  313. end;
  314. if is_hugepointer(left.resultdef) then
  315. result := ccallnode.createintern(procname,
  316. ccallparanode.create(right,
  317. ccallparanode.create(left,nil)))
  318. else
  319. result := ccallnode.createintern(procname,
  320. ccallparanode.create(left,
  321. ccallparanode.create(right,nil)));
  322. left := nil;
  323. right := nil;
  324. firstpass(result);
  325. end;
  326. function ti8086addnode.first_cmppointer: tnode;
  327. begin
  328. if is_hugepointer(left.resultdef) or is_hugepointer(right.resultdef) then
  329. result:=first_cmphugepointer
  330. else if is_farpointer(left.resultdef) or is_farpointer(right.resultdef) then
  331. result:=first_cmpfarpointer
  332. else
  333. result:=inherited;
  334. end;
  335. function ti8086addnode.first_cmphugepointer: tnode;
  336. var
  337. procname:string;
  338. begin
  339. result:=nil;
  340. if not (cs_hugeptr_comparison_normalization in current_settings.localswitches) then
  341. begin
  342. expectloc:=LOC_JUMP;
  343. exit;
  344. end;
  345. case nodetype of
  346. equaln:
  347. procname:='fpc_hugeptr_cmp_normalized_e';
  348. unequaln:
  349. procname:='fpc_hugeptr_cmp_normalized_ne';
  350. ltn:
  351. procname:='fpc_hugeptr_cmp_normalized_b';
  352. lten:
  353. procname:='fpc_hugeptr_cmp_normalized_be';
  354. gtn:
  355. procname:='fpc_hugeptr_cmp_normalized_a';
  356. gten:
  357. procname:='fpc_hugeptr_cmp_normalized_ae';
  358. else
  359. internalerror(2014070401);
  360. end;
  361. result := ccallnode.createintern(procname,
  362. ccallparanode.create(right,
  363. ccallparanode.create(left,nil)));
  364. left := nil;
  365. right := nil;
  366. firstpass(result);
  367. end;
  368. function ti8086addnode.first_cmpfarpointer: tnode;
  369. begin
  370. { = and <> are handled as a 32-bit comparison }
  371. if nodetype in [equaln,unequaln] then
  372. begin
  373. result:=nil;
  374. expectloc:=LOC_JUMP;
  375. end
  376. else
  377. begin
  378. result:=nil;
  379. expectloc:=LOC_FLAGS;
  380. end;
  381. end;
  382. procedure ti8086addnode.second_addfarpointer;
  383. var
  384. tmpreg : tregister;
  385. pointernode: tnode;
  386. begin
  387. pass_left_right;
  388. force_reg_left_right(false,true);
  389. set_result_location_reg;
  390. if (left.resultdef.typ=pointerdef) and (right.resultdef.typ<>pointerdef) then
  391. pointernode:=left
  392. else if (left.resultdef.typ<>pointerdef) and (right.resultdef.typ=pointerdef) then
  393. pointernode:=right
  394. else
  395. internalerror(2014040601);
  396. if not (nodetype in [addn,subn]) then
  397. internalerror(2014040602);
  398. if nodetype=addn then
  399. begin
  400. if (right.location.loc<>LOC_CONSTANT) then
  401. begin
  402. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16,
  403. left.location.register,right.location.register,location.register);
  404. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  405. GetNextReg(pointernode.location.register),GetNextReg(location.register));
  406. end
  407. else
  408. begin
  409. if pointernode=left then
  410. begin
  411. { farptr_reg + int_const }
  412. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16,
  413. right.location.value,left.location.register,location.register);
  414. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  415. GetNextReg(left.location.register),GetNextReg(location.register));
  416. end
  417. else
  418. begin
  419. { int_reg + farptr_const }
  420. tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  421. hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,
  422. right.location.value,tmpreg);
  423. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16,
  424. left.location.register,tmpreg,location.register);
  425. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  426. GetNextReg(tmpreg),GetNextReg(location.register));
  427. end;
  428. end;
  429. end
  430. else { subtract is a special case since its not commutative }
  431. begin
  432. if (nf_swapped in flags) then
  433. swapleftright;
  434. { left can only be a pointer in this case, since (int-pointer) is not supported }
  435. if pointernode<>left then
  436. internalerror(2014040603);
  437. if left.location.loc<>LOC_CONSTANT then
  438. begin
  439. if right.location.loc<>LOC_CONSTANT then
  440. begin
  441. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16,
  442. right.location.register,left.location.register,location.register);
  443. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  444. GetNextReg(pointernode.location.register),GetNextReg(location.register));
  445. end
  446. else
  447. begin
  448. { farptr_reg - int_const }
  449. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16,
  450. right.location.value,left.location.register,location.register);
  451. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  452. GetNextReg(left.location.register),GetNextReg(location.register));
  453. end;
  454. end
  455. else
  456. begin
  457. { farptr_const - int_reg }
  458. tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  459. hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,
  460. left.location.value,tmpreg);
  461. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16,
  462. right.location.register,tmpreg,location.register);
  463. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  464. GetNextReg(tmpreg),GetNextReg(location.register));
  465. end;
  466. end;
  467. end;
  468. procedure ti8086addnode.second_cmp64bit;
  469. var
  470. truelabel,
  471. falselabel : tasmlabel;
  472. hregister,
  473. hregister2 : tregister;
  474. href : treference;
  475. unsigned : boolean;
  476. procedure firstjmp64bitcmp;
  477. var
  478. oldnodetype : tnodetype;
  479. begin
  480. {$ifdef OLDREGVARS}
  481. load_all_regvars(current_asmdata.CurrAsmList);
  482. {$endif OLDREGVARS}
  483. { the jump the sequence is a little bit hairy }
  484. case nodetype of
  485. ltn,gtn:
  486. begin
  487. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),location.truelabel);
  488. { cheat a little bit for the negative test }
  489. toggleflag(nf_swapped);
  490. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),location.falselabel);
  491. toggleflag(nf_swapped);
  492. end;
  493. lten,gten:
  494. begin
  495. oldnodetype:=nodetype;
  496. if nodetype=lten then
  497. nodetype:=ltn
  498. else
  499. nodetype:=gtn;
  500. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),location.truelabel);
  501. { cheat for the negative test }
  502. if nodetype=ltn then
  503. nodetype:=gtn
  504. else
  505. nodetype:=ltn;
  506. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),location.falselabel);
  507. nodetype:=oldnodetype;
  508. end;
  509. equaln:
  510. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
  511. unequaln:
  512. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
  513. end;
  514. end;
  515. procedure middlejmp64bitcmp;
  516. var
  517. oldnodetype : tnodetype;
  518. begin
  519. {$ifdef OLDREGVARS}
  520. load_all_regvars(current_asmdata.CurrAsmList);
  521. {$endif OLDREGVARS}
  522. { the jump the sequence is a little bit hairy }
  523. case nodetype of
  524. ltn,gtn:
  525. begin
  526. { the comparisaion of the low word have to be }
  527. { always unsigned! }
  528. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
  529. { cheat a little bit for the negative test }
  530. toggleflag(nf_swapped);
  531. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.falselabel);
  532. toggleflag(nf_swapped);
  533. end;
  534. lten,gten:
  535. begin
  536. oldnodetype:=nodetype;
  537. if nodetype=lten then
  538. nodetype:=ltn
  539. else
  540. nodetype:=gtn;
  541. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
  542. { cheat for the negative test }
  543. if nodetype=ltn then
  544. nodetype:=gtn
  545. else
  546. nodetype:=ltn;
  547. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.falselabel);
  548. nodetype:=oldnodetype;
  549. end;
  550. equaln:
  551. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
  552. unequaln:
  553. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
  554. end;
  555. end;
  556. procedure lastjmp64bitcmp;
  557. begin
  558. { the jump the sequence is a little bit hairy }
  559. case nodetype of
  560. ltn,gtn,lten,gten:
  561. begin
  562. { the comparisaion of the low word have to be }
  563. { always unsigned! }
  564. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
  565. cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  566. end;
  567. equaln:
  568. begin
  569. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
  570. cg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  571. end;
  572. unequaln:
  573. begin
  574. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
  575. cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  576. end;
  577. end;
  578. end;
  579. begin
  580. truelabel:=nil;
  581. falselabel:=nil;
  582. pass_left_right;
  583. unsigned:=((left.resultdef.typ=orddef) and
  584. (torddef(left.resultdef).ordtype=u64bit)) or
  585. ((right.resultdef.typ=orddef) and
  586. (torddef(right.resultdef).ordtype=u64bit));
  587. { we have LOC_JUMP as result }
  588. current_asmdata.getjumplabel(truelabel);
  589. current_asmdata.getjumplabel(falselabel);
  590. location_reset_jump(location,truelabel,falselabel);
  591. { left and right no register? }
  592. { then one must be demanded }
  593. if (left.location.loc<>LOC_REGISTER) then
  594. begin
  595. if (right.location.loc<>LOC_REGISTER) then
  596. begin
  597. { we can reuse a CREGISTER for comparison }
  598. if (left.location.loc<>LOC_CREGISTER) then
  599. begin
  600. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  601. hregister2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  602. cg64.a_load64_loc_reg(current_asmdata.CurrAsmList,left.location,joinreg64(hregister,hregister2));
  603. location_freetemp(current_asmdata.CurrAsmList,left.location);
  604. location_reset(left.location,LOC_REGISTER,left.location.size);
  605. left.location.register64.reglo:=hregister;
  606. left.location.register64.reghi:=hregister2;
  607. end;
  608. end
  609. else
  610. begin
  611. location_swap(left.location,right.location);
  612. toggleflag(nf_swapped);
  613. end;
  614. end;
  615. { at this point, left.location.loc should be LOC_REGISTER }
  616. if right.location.loc=LOC_REGISTER then
  617. begin
  618. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reghi),GetNextReg(left.location.register64.reghi));
  619. firstjmp64bitcmp;
  620. emit_reg_reg(A_CMP,S_W,right.location.register64.reghi,left.location.register64.reghi);
  621. middlejmp64bitcmp;
  622. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reglo),GetNextReg(left.location.register64.reglo));
  623. middlejmp64bitcmp;
  624. emit_reg_reg(A_CMP,S_W,right.location.register64.reglo,left.location.register64.reglo);
  625. lastjmp64bitcmp;
  626. end
  627. else
  628. begin
  629. case right.location.loc of
  630. LOC_CREGISTER :
  631. begin
  632. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reghi),GetNextReg(left.location.register64.reghi));
  633. firstjmp64bitcmp;
  634. emit_reg_reg(A_CMP,S_W,right.location.register64.reghi,left.location.register64.reghi);
  635. middlejmp64bitcmp;
  636. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reglo),GetNextReg(left.location.register64.reglo));
  637. middlejmp64bitcmp;
  638. emit_reg_reg(A_CMP,S_W,right.location.register64.reglo,left.location.register64.reglo);
  639. lastjmp64bitcmp;
  640. end;
  641. LOC_CREFERENCE,
  642. LOC_REFERENCE :
  643. begin
  644. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,right.location.reference);
  645. href:=right.location.reference;
  646. inc(href.offset,6);
  647. emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register64.reghi));
  648. firstjmp64bitcmp;
  649. dec(href.offset,2);
  650. emit_ref_reg(A_CMP,S_W,href,left.location.register64.reghi);
  651. middlejmp64bitcmp;
  652. dec(href.offset,2);
  653. emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register64.reglo));
  654. middlejmp64bitcmp;
  655. emit_ref_reg(A_CMP,S_W,right.location.reference,left.location.register64.reglo);
  656. lastjmp64bitcmp;
  657. cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  658. location_freetemp(current_asmdata.CurrAsmList,right.location);
  659. end;
  660. LOC_CONSTANT :
  661. begin
  662. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 48) and $FFFF),GetNextReg(left.location.register64.reghi)));
  663. firstjmp64bitcmp;
  664. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 32) and $FFFF),left.location.register64.reghi));
  665. middlejmp64bitcmp;
  666. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 16) and $FFFF),GetNextReg(left.location.register64.reglo)));
  667. middlejmp64bitcmp;
  668. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint(right.location.value64 and $FFFF),left.location.register64.reglo));
  669. lastjmp64bitcmp;
  670. end;
  671. else
  672. internalerror(200203282);
  673. end;
  674. end;
  675. end;
  676. procedure ti8086addnode.second_cmp32bit;
  677. var
  678. truelabel,
  679. falselabel: tasmlabel;
  680. hregister : tregister;
  681. href : treference;
  682. unsigned : boolean;
  683. procedure firstjmp32bitcmp;
  684. var
  685. oldnodetype : tnodetype;
  686. begin
  687. {$ifdef OLDREGVARS}
  688. load_all_regvars(current_asmdata.CurrAsmList);
  689. {$endif OLDREGVARS}
  690. { the jump the sequence is a little bit hairy }
  691. case nodetype of
  692. ltn,gtn:
  693. begin
  694. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),location.truelabel);
  695. { cheat a little bit for the negative test }
  696. toggleflag(nf_swapped);
  697. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),location.falselabel);
  698. toggleflag(nf_swapped);
  699. end;
  700. lten,gten:
  701. begin
  702. oldnodetype:=nodetype;
  703. if nodetype=lten then
  704. nodetype:=ltn
  705. else
  706. nodetype:=gtn;
  707. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),location.truelabel);
  708. { cheat for the negative test }
  709. if nodetype=ltn then
  710. nodetype:=gtn
  711. else
  712. nodetype:=ltn;
  713. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),location.falselabel);
  714. nodetype:=oldnodetype;
  715. end;
  716. equaln:
  717. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
  718. unequaln:
  719. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
  720. end;
  721. end;
  722. procedure secondjmp32bitcmp;
  723. begin
  724. { the jump the sequence is a little bit hairy }
  725. case nodetype of
  726. ltn,gtn,lten,gten:
  727. begin
  728. { the comparisaion of the low dword have to be }
  729. { always unsigned! }
  730. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
  731. cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  732. end;
  733. equaln:
  734. begin
  735. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
  736. cg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  737. end;
  738. unequaln:
  739. begin
  740. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
  741. cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  742. end;
  743. end;
  744. end;
  745. begin
  746. truelabel:=nil;
  747. falselabel:=nil;
  748. pass_left_right;
  749. unsigned:=((left.resultdef.typ=orddef) and
  750. (torddef(left.resultdef).ordtype=u32bit)) or
  751. ((right.resultdef.typ=orddef) and
  752. (torddef(right.resultdef).ordtype=u32bit)) or
  753. is_hugepointer(left.resultdef);
  754. { we have LOC_JUMP as result }
  755. current_asmdata.getjumplabel(truelabel);
  756. current_asmdata.getjumplabel(falselabel);
  757. location_reset_jump(location,truelabel,falselabel);
  758. { left and right no register? }
  759. { then one must be demanded }
  760. if (left.location.loc<>LOC_REGISTER) then
  761. begin
  762. if (right.location.loc<>LOC_REGISTER) then
  763. begin
  764. { we can reuse a CREGISTER for comparison }
  765. if (left.location.loc<>LOC_CREGISTER) then
  766. begin
  767. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  768. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_32,left.location,hregister);
  769. location_freetemp(current_asmdata.CurrAsmList,left.location);
  770. location_reset(left.location,LOC_REGISTER,left.location.size);
  771. left.location.register:=hregister;
  772. end;
  773. end
  774. else
  775. begin
  776. location_swap(left.location,right.location);
  777. toggleflag(nf_swapped);
  778. end;
  779. end;
  780. { at this point, left.location.loc should be LOC_REGISTER }
  781. if right.location.loc=LOC_REGISTER then
  782. begin
  783. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register),GetNextReg(left.location.register));
  784. firstjmp32bitcmp;
  785. emit_reg_reg(A_CMP,S_W,right.location.register,left.location.register);
  786. secondjmp32bitcmp;
  787. end
  788. else
  789. begin
  790. case right.location.loc of
  791. LOC_CREGISTER :
  792. begin
  793. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register),GetNextReg(left.location.register));
  794. firstjmp32bitcmp;
  795. emit_reg_reg(A_CMP,S_W,right.location.register,left.location.register);
  796. secondjmp32bitcmp;
  797. end;
  798. LOC_CREFERENCE,
  799. LOC_REFERENCE :
  800. begin
  801. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,right.location.reference);
  802. href:=right.location.reference;
  803. inc(href.offset,2);
  804. emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register));
  805. firstjmp32bitcmp;
  806. dec(href.offset,2);
  807. emit_ref_reg(A_CMP,S_W,href,left.location.register);
  808. secondjmp32bitcmp;
  809. cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  810. location_freetemp(current_asmdata.CurrAsmList,right.location);
  811. end;
  812. LOC_CONSTANT :
  813. begin
  814. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value shr 16) and $FFFF),GetNextReg(left.location.register)));
  815. firstjmp32bitcmp;
  816. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint(right.location.value and $FFFF),left.location.register));
  817. secondjmp32bitcmp;
  818. end;
  819. else
  820. internalerror(200203282);
  821. end;
  822. end;
  823. end;
  824. procedure ti8086addnode.second_cmpfarpointer;
  825. begin
  826. { handle = and <> as a 32-bit comparison }
  827. if nodetype in [equaln,unequaln] then
  828. begin
  829. second_cmp32bit;
  830. exit;
  831. end;
  832. pass_left_right;
  833. { <, >, <= and >= compare the 16-bit offset only }
  834. if (right.location.loc=LOC_CONSTANT) and
  835. (left.location.loc in [LOC_REFERENCE, LOC_CREFERENCE])
  836. then
  837. begin
  838. emit_const_ref(A_CMP, S_W, word(right.location.value), left.location.reference);
  839. location_freetemp(current_asmdata.CurrAsmList,left.location);
  840. end
  841. else
  842. begin
  843. { left location is not a register? }
  844. if left.location.loc<>LOC_REGISTER then
  845. begin
  846. { if right is register then we can swap the locations }
  847. if right.location.loc=LOC_REGISTER then
  848. begin
  849. location_swap(left.location,right.location);
  850. toggleflag(nf_swapped);
  851. end
  852. else
  853. begin
  854. { maybe we can reuse a constant register when the
  855. operation is a comparison that doesn't change the
  856. value of the register }
  857. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u16inttype,true);
  858. end;
  859. end;
  860. emit_generic_code(A_CMP,OS_16,true,false,false);
  861. location_freetemp(current_asmdata.CurrAsmList,right.location);
  862. location_freetemp(current_asmdata.CurrAsmList,left.location);
  863. end;
  864. location_reset(location,LOC_FLAGS,OS_NO);
  865. location.resflags:=getresflags(true);
  866. end;
  867. procedure ti8086addnode.second_cmpordinal;
  868. begin
  869. if is_farpointer(left.resultdef) then
  870. second_cmpfarpointer
  871. else if is_32bit(left.resultdef) or is_hugepointer(left.resultdef) or is_farprocvar(left.resultdef) then
  872. second_cmp32bit
  873. else
  874. inherited second_cmpordinal;
  875. end;
  876. {*****************************************************************************
  877. x86 MUL
  878. *****************************************************************************}
  879. procedure ti8086addnode.second_mul(unsigned: boolean);
  880. var reg:Tregister;
  881. ref:Treference;
  882. use_ref:boolean;
  883. hl4 : tasmlabel;
  884. const
  885. asmops: array[boolean] of tasmop = (A_IMUL, A_MUL);
  886. begin
  887. reg:=NR_NO;
  888. reference_reset(ref,sizeof(pint));
  889. pass_left_right;
  890. { MUL is faster than IMUL on the 8086 & 8088 (and equal in speed on 286+),
  891. but it's only safe to use in place of IMUL when overflow checking is off
  892. and we're doing a 16-bit>16-bit multiplication }
  893. if not (cs_check_overflow in current_settings.localswitches) and
  894. (not is_32bitint(resultdef)) then
  895. unsigned:=true;
  896. {The location.register will be filled in later (JM)}
  897. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  898. { Mul supports registers and references, so if not register/reference,
  899. load the location into a register. }
  900. use_ref:=false;
  901. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  902. reg:=left.location.register
  903. else if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  904. begin
  905. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,left.location.reference);
  906. ref:=left.location.reference;
  907. use_ref:=true;
  908. end
  909. else
  910. begin
  911. {LOC_CONSTANT for example.}
  912. reg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  913. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,osuinttype,left.location,reg);
  914. end;
  915. {Allocate AX.}
  916. cg.getcpuregister(current_asmdata.CurrAsmList,NR_AX);
  917. {Load the right value.}
  918. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,NR_AX);
  919. {Also allocate DX, since it is also modified by a mul (JM).}
  920. cg.getcpuregister(current_asmdata.CurrAsmList,NR_DX);
  921. if use_ref then
  922. emit_ref(asmops[unsigned],S_W,ref)
  923. else
  924. emit_reg(asmops[unsigned],S_W,reg);
  925. if (cs_check_overflow in current_settings.localswitches) and
  926. { 16->32 bit cannot overflow }
  927. (not is_32bitint(resultdef)) then
  928. begin
  929. current_asmdata.getjumplabel(hl4);
  930. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_AE,hl4);
  931. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
  932. cg.a_label(current_asmdata.CurrAsmList,hl4);
  933. end;
  934. {Free AX,DX}
  935. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_DX);
  936. if is_32bitint(resultdef) then
  937. begin
  938. {Allocate an imaginary 32-bit register, which consists of a pair of
  939. 16-bit registers and store DX:AX into it}
  940. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  941. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_DX,GetNextReg(location.register));
  942. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
  943. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_AX,location.register);
  944. end
  945. else
  946. begin
  947. {Allocate a new register and store the result in AX in it.}
  948. location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  949. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
  950. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_AX,location.register);
  951. end;
  952. location_freetemp(current_asmdata.CurrAsmList,left.location);
  953. location_freetemp(current_asmdata.CurrAsmList,right.location);
  954. end;
  955. begin
  956. caddnode:=ti8086addnode;
  957. end.