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cpuinfo.pas 25 KB

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  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for the ARM
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. ts32real = single;
  17. ts64real = double;
  18. ts80real = type extended;
  19. ts128real = type extended;
  20. ts64comp = comp;
  21. pbestreal=^bestreal;
  22. { possible supported processors for this target }
  23. tcputype =
  24. (cpu_none,
  25. cpu_armv3,
  26. cpu_armv4,
  27. cpu_armv4t,
  28. cpu_armv5,
  29. cpu_armv5t,
  30. cpu_armv6,
  31. cpu_armv7,
  32. cpu_armv7m
  33. );
  34. Const
  35. cpu_arm = [cpu_none,cpu_armv3,cpu_armv4,cpu_armv4t,cpu_armv5];
  36. cpu_thumb = [];
  37. cpu_thumb2 = [cpu_armv7m];
  38. Type
  39. tfputype =
  40. (fpu_none,
  41. fpu_soft,
  42. fpu_libgcc,
  43. fpu_fpa,
  44. fpu_fpa10,
  45. fpu_fpa11,
  46. fpu_vfpv2,
  47. fpu_vfpv3
  48. );
  49. tcontrollertype =
  50. (ct_none,
  51. { Phillips }
  52. ct_lpc2114,
  53. ct_lpc2124,
  54. ct_lpc2194,
  55. ct_lpc1768,
  56. { ATMEL }
  57. ct_at91sam7s256,
  58. ct_at91sam7se256,
  59. ct_at91sam7x256,
  60. ct_at91sam7xc256,
  61. { STMicroelectronics }
  62. ct_stm32f103rb,
  63. ct_stm32f103re,
  64. ct_stm32f103c4t,
  65. { TI - Fury Class - 64 K Flash, 16 K SRAM Devices }
  66. ct_lm3s1110,
  67. ct_lm3s1133,
  68. ct_lm3s1138,
  69. ct_lm3s1150,
  70. ct_lm3s1162,
  71. ct_lm3s1165,
  72. ct_lm3s1166,
  73. ct_lm3s2110,
  74. ct_lm3s2139,
  75. ct_lm3s6100,
  76. ct_lm3s6110,
  77. { TI - Fury Class - 128K Flash, 32K SRAM devices }
  78. ct_lm3s1601,
  79. ct_lm3s1608,
  80. ct_lm3s1620,
  81. ct_lm3s1635,
  82. ct_lm3s1636,
  83. ct_lm3s1637,
  84. ct_lm3s1651,
  85. ct_lm3s2601,
  86. ct_lm3s2608,
  87. ct_lm3s2620,
  88. ct_lm3s2637,
  89. ct_lm3s2651,
  90. ct_lm3s6610,
  91. ct_lm3s6611,
  92. ct_lm3s6618,
  93. ct_lm3s6633,
  94. ct_lm3s6637,
  95. ct_lm3s8630,
  96. { TI - Fury Class - 256K Flash, 64K SRAM devices }
  97. ct_lm3s1911,
  98. ct_lm3s1918,
  99. ct_lm3s1937,
  100. ct_lm3s1958,
  101. ct_lm3s1960,
  102. ct_lm3s1968,
  103. ct_lm3s1969,
  104. ct_lm3s2911,
  105. ct_lm3s2918,
  106. ct_lm3s2919,
  107. ct_lm3s2939,
  108. ct_lm3s2948,
  109. ct_lm3s2950,
  110. ct_lm3s2965,
  111. ct_lm3s6911,
  112. ct_lm3s6918,
  113. ct_lm3s6938,
  114. ct_lm3s6950,
  115. ct_lm3s6952,
  116. ct_lm3s6965,
  117. ct_lm3s8930,
  118. ct_lm3s8933,
  119. ct_lm3s8938,
  120. ct_lm3s8962,
  121. ct_lm3s8970,
  122. ct_lm3s8971,
  123. { TI - Tempest Tempest - 256 K Flash, 64 K SRAM }
  124. ct_lm3s5951,
  125. ct_lm3s5956,
  126. ct_lm3s1b21,
  127. ct_lm3s2b93,
  128. ct_lm3s5b91,
  129. ct_lm3s9b81,
  130. ct_lm3s9b90,
  131. ct_lm3s9b92,
  132. ct_lm3s9b95,
  133. ct_lm3s9b96,
  134. { SAMSUNG }
  135. ct_sc32442b,
  136. // generic Thumb2 target
  137. ct_thumb2bare
  138. );
  139. Const
  140. {# Size of native extended floating point type }
  141. extended_size = 12;
  142. {# Size of a multimedia register }
  143. mmreg_size = 16;
  144. { target cpu string (used by compiler options) }
  145. target_cpu_string = 'arm';
  146. { calling conventions supported by the code generator }
  147. supported_calling_conventions : tproccalloptions = [
  148. pocall_internproc,
  149. pocall_safecall,
  150. pocall_stdcall,
  151. { same as stdcall only different name mangling }
  152. pocall_cdecl,
  153. { same as stdcall only different name mangling }
  154. pocall_cppdecl,
  155. { same as stdcall but floating point numbers are handled like equal sized integers }
  156. pocall_softfloat,
  157. { same as stdcall (requires that all const records are passed by
  158. reference, but that's already done for stdcall) }
  159. pocall_mwpascal,
  160. { used for interrupt handling }
  161. pocall_interrupt
  162. ];
  163. cputypestr : array[tcputype] of string[8] = ('',
  164. 'ARMV3',
  165. 'ARMV4',
  166. 'ARMV4T',
  167. 'ARMV5',
  168. 'ARMV5T',
  169. 'ARMV6',
  170. 'ARMV7',
  171. 'ARMV7M'
  172. );
  173. fputypestr : array[tfputype] of string[6] = ('',
  174. 'SOFT',
  175. 'LIBGCC',
  176. 'FPA',
  177. 'FPA10',
  178. 'FPA11',
  179. 'VFPV2',
  180. 'VFPV3'
  181. );
  182. { We know that there are fields after sramsize
  183. but we don't care about this warning }
  184. {$WARN 3177 OFF}
  185. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  186. ((
  187. controllertypestr:'';
  188. controllerunitstr:'';
  189. interruptvectors:0;
  190. flashbase:0;
  191. flashsize:0;
  192. srambase:0;
  193. sramsize:0
  194. ),
  195. (
  196. controllertypestr:'LPC2114';
  197. controllerunitstr:'LPC21x4';
  198. interruptvectors:8;
  199. flashbase:$00000000;
  200. flashsize:$00040000;
  201. srambase:$40000000;
  202. sramsize:$00004000
  203. ),
  204. (
  205. controllertypestr:'LPC2124';
  206. controllerunitstr:'LPC21x4';
  207. interruptvectors:8;
  208. flashbase:$00000000;
  209. flashsize:$00040000;
  210. srambase:$40000000;
  211. sramsize:$00004000
  212. ),
  213. (
  214. controllertypestr:'LPC2194';
  215. controllerunitstr:'LPC21x4';
  216. interruptvectors:8;
  217. flashbase:$00000000;
  218. flashsize:$00040000;
  219. srambase:$40000000;
  220. sramsize:$00004000
  221. ),
  222. (
  223. controllertypestr:'LPC1768';
  224. controllerunitstr:'LPC1768';
  225. interruptvectors:12;
  226. flashbase:$00000000;
  227. flashsize:$00040000;
  228. srambase:$10000000;
  229. sramsize:$00008000
  230. ),
  231. (
  232. controllertypestr:'AT91SAM7S256';
  233. controllerunitstr:'AT91SAM7x256';
  234. interruptvectors:8;
  235. flashbase:$00000000;
  236. flashsize:$00040000;
  237. srambase:$00200000;
  238. sramsize:$00010000
  239. ),
  240. (
  241. controllertypestr:'AT91SAM7SE256';
  242. controllerunitstr:'AT91SAM7x256';
  243. interruptvectors:8;
  244. flashbase:$00000000;
  245. flashsize:$00040000;
  246. srambase:$00200000;
  247. sramsize:$00010000
  248. ),
  249. (
  250. controllertypestr:'AT91SAM7X256';
  251. controllerunitstr:'AT91SAM7x256';
  252. interruptvectors:8;
  253. flashbase:$00000000;
  254. flashsize:$00040000;
  255. srambase:$00200000;
  256. sramsize:$00010000
  257. ),
  258. (
  259. controllertypestr:'AT91SAM7XC256';
  260. controllerunitstr:'AT91SAM7x256';
  261. interruptvectors:8;
  262. flashbase:$00000000;
  263. flashsize:$00040000;
  264. srambase:$00200000;
  265. sramsize:$00010000
  266. ),
  267. // ct_stm32f103rb,
  268. (
  269. controllertypestr:'STM32F103RB';
  270. controllerunitstr:'STM32F103';
  271. interruptvectors:12;
  272. flashbase:$08000000;
  273. flashsize:$00020000;
  274. srambase:$20000000;
  275. sramsize:$00005000
  276. ),
  277. // ct_stm32f103re,
  278. (
  279. controllertypestr:'STM32F103RE';
  280. controllerunitstr:'STM32F103';
  281. interruptvectors:12;
  282. flashbase:$08000000;
  283. flashsize:$00080000;
  284. srambase:$20000000;
  285. sramsize:$00010000
  286. ),
  287. // ct_stm32f103re,
  288. (
  289. controllertypestr:'STM32F103C4T';
  290. controllerunitstr:'STM32F103';
  291. interruptvectors:12;
  292. flashbase:$08000000;
  293. flashsize:$00004000;
  294. srambase:$20000000;
  295. sramsize:$00001800
  296. ),
  297. { TI - 64 K Flash, 16 K SRAM Devices }
  298. // ct_lm3s1110,
  299. (
  300. controllertypestr:'LM3S1110';
  301. controllerunitstr:'LM3FURY';
  302. interruptvectors:72;
  303. flashbase:$00000000;
  304. flashsize:$00010000;
  305. srambase:$20000000;
  306. sramsize:$00004000
  307. ),
  308. // ct_lm3s1133,
  309. (
  310. controllertypestr:'LM3S1133';
  311. controllerunitstr:'LM3FURY';
  312. interruptvectors:72;
  313. flashbase:$00000000;
  314. flashsize:$00010000;
  315. srambase:$20000000;
  316. sramsize:$00004000
  317. ),
  318. // ct_lm3s1138,
  319. (
  320. controllertypestr:'LM3S1138';
  321. controllerunitstr:'LM3FURY';
  322. interruptvectors:72;
  323. flashbase:$00000000;
  324. flashsize:$00010000;
  325. srambase:$20000000;
  326. sramsize:$00004000
  327. ),
  328. // ct_lm3s1150,
  329. (
  330. controllertypestr:'LM3S1150';
  331. controllerunitstr:'LM3FURY';
  332. interruptvectors:72;
  333. flashbase:$00000000;
  334. flashsize:$00010000;
  335. srambase:$20000000;
  336. sramsize:$00004000
  337. ),
  338. // ct_lm3s1162,
  339. (
  340. controllertypestr:'LM3S1162';
  341. controllerunitstr:'LM3FURY';
  342. interruptvectors:72;
  343. flashbase:$00000000;
  344. flashsize:$00010000;
  345. srambase:$20000000;
  346. sramsize:$00004000
  347. ),
  348. // ct_lm3s1165,
  349. (
  350. controllertypestr:'LM3S1165';
  351. controllerunitstr:'LM3FURY';
  352. interruptvectors:72;
  353. flashbase:$00000000;
  354. flashsize:$00010000;
  355. srambase:$20000000;
  356. sramsize:$00004000
  357. ),
  358. // ct_lm3s1166,
  359. (
  360. controllertypestr:'LM3S1166';
  361. controllerunitstr:'LM3FURY';
  362. interruptvectors:72;
  363. flashbase:$00000000;
  364. flashsize:$00010000;
  365. srambase:$20000000;
  366. sramsize:$00004000
  367. ),
  368. // ct_lm3s2110,
  369. (
  370. controllertypestr:'LM3S2110';
  371. controllerunitstr:'LM3FURY';
  372. interruptvectors:72;
  373. flashbase:$00000000;
  374. flashsize:$00010000;
  375. srambase:$20000000;
  376. sramsize:$00004000
  377. ),
  378. // ct_lm3s2139,
  379. (
  380. controllertypestr:'LM3S2139';
  381. controllerunitstr:'LM3FURY';
  382. interruptvectors:72;
  383. flashbase:$00000000;
  384. flashsize:$00010000;
  385. srambase:$20000000;
  386. sramsize:$00004000
  387. ),
  388. // ct_lm3s6100,
  389. (
  390. controllertypestr:'LM3S6100';
  391. controllerunitstr:'LM3FURY';
  392. interruptvectors:72;
  393. flashbase:$00000000;
  394. flashsize:$00010000;
  395. srambase:$20000000;
  396. sramsize:$00004000
  397. ),
  398. // ct_lm3s6110,
  399. (
  400. controllertypestr:'LM3S6110';
  401. controllerunitstr:'LM3FURY';
  402. interruptvectors:72;
  403. flashbase:$00000000;
  404. flashsize:$00010000;
  405. srambase:$20000000;
  406. sramsize:$00004000
  407. ),
  408. { TI - 128K Flash, 32K SRAM devices }
  409. // ct_lm3s1601,
  410. (
  411. controllertypestr:'LM3S1601';
  412. controllerunitstr:'LM3FURY';
  413. interruptvectors:72;
  414. flashbase:$00000000;
  415. flashsize:$00020000;
  416. srambase:$20000000;
  417. sramsize:$00008000
  418. ),
  419. // ct_lm3s1608,
  420. (
  421. controllertypestr:'LM3S1608';
  422. controllerunitstr:'LM3FURY';
  423. interruptvectors:72;
  424. flashbase:$00000000;
  425. flashsize:$00020000;
  426. srambase:$20000000;
  427. sramsize:$00008000
  428. ),
  429. // ct_lm3s1620,
  430. (
  431. controllertypestr:'LM3S1620';
  432. controllerunitstr:'LM3FURY';
  433. interruptvectors:72;
  434. flashbase:$00000000;
  435. flashsize:$00020000;
  436. srambase:$20000000;
  437. sramsize:$00008000
  438. ),
  439. // ct_lm3s1635,
  440. (
  441. controllertypestr:'LM3S1635';
  442. controllerunitstr:'LM3FURY';
  443. interruptvectors:72;
  444. flashbase:$00000000;
  445. flashsize:$00020000;
  446. srambase:$20000000;
  447. sramsize:$00008000
  448. ),
  449. // ct_lm3s1636,
  450. (
  451. controllertypestr:'LM3S1636';
  452. controllerunitstr:'LM3FURY';
  453. interruptvectors:72;
  454. flashbase:$00000000;
  455. flashsize:$00020000;
  456. srambase:$20000000;
  457. sramsize:$00008000
  458. ),
  459. // ct_lm3s1637,
  460. (
  461. controllertypestr:'LM3S1637';
  462. controllerunitstr:'LM3FURY';
  463. interruptvectors:72;
  464. flashbase:$00000000;
  465. flashsize:$00020000;
  466. srambase:$20000000;
  467. sramsize:$00008000
  468. ),
  469. // ct_lm3s1651,
  470. (
  471. controllertypestr:'LM3S1651';
  472. controllerunitstr:'LM3FURY';
  473. interruptvectors:72;
  474. flashbase:$00000000;
  475. flashsize:$00020000;
  476. srambase:$20000000;
  477. sramsize:$00008000
  478. ),
  479. // ct_lm3s2601,
  480. (
  481. controllertypestr:'LM3S2601';
  482. controllerunitstr:'LM3FURY';
  483. interruptvectors:72;
  484. flashbase:$00000000;
  485. flashsize:$00020000;
  486. srambase:$20000000;
  487. sramsize:$00008000
  488. ),
  489. // ct_lm3s2608,
  490. (
  491. controllertypestr:'LM3S2608';
  492. controllerunitstr:'LM3FURY';
  493. interruptvectors:72;
  494. flashbase:$00000000;
  495. flashsize:$00020000;
  496. srambase:$20000000;
  497. sramsize:$00008000
  498. ),
  499. // ct_lm3s2620,
  500. (
  501. controllertypestr:'LM3S2620';
  502. controllerunitstr:'LM3FURY';
  503. interruptvectors:72;
  504. flashbase:$00000000;
  505. flashsize:$00020000;
  506. srambase:$20000000;
  507. sramsize:$00008000
  508. ),
  509. // ct_lm3s2637,
  510. (
  511. controllertypestr:'LM3S2637';
  512. controllerunitstr:'LM3FURY';
  513. interruptvectors:72;
  514. flashbase:$00000000;
  515. flashsize:$00020000;
  516. srambase:$20000000;
  517. sramsize:$00008000
  518. ),
  519. // ct_lm3s2651,
  520. (
  521. controllertypestr:'LM3S2651';
  522. controllerunitstr:'LM3FURY';
  523. interruptvectors:72;
  524. flashbase:$00000000;
  525. flashsize:$00020000;
  526. srambase:$20000000;
  527. sramsize:$00008000
  528. ),
  529. // ct_lm3s6610,
  530. (
  531. controllertypestr:'LM3S6610';
  532. controllerunitstr:'LM3FURY';
  533. interruptvectors:72;
  534. flashbase:$00000000;
  535. flashsize:$00020000;
  536. srambase:$20000000;
  537. sramsize:$00008000
  538. ),
  539. // ct_lm3s6611,
  540. (
  541. controllertypestr:'LM3S6611';
  542. controllerunitstr:'LM3FURY';
  543. interruptvectors:72;
  544. flashbase:$00000000;
  545. flashsize:$00020000;
  546. srambase:$20000000;
  547. sramsize:$00008000
  548. ),
  549. // ct_lm3s6618,
  550. (
  551. controllertypestr:'LM3S6618';
  552. controllerunitstr:'LM3FURY';
  553. interruptvectors:72;
  554. flashbase:$00000000;
  555. flashsize:$00020000;
  556. srambase:$20000000;
  557. sramsize:$00008000
  558. ),
  559. // ct_lm3s6633,
  560. (
  561. controllertypestr:'LM3S6633';
  562. controllerunitstr:'LM3FURY';
  563. interruptvectors:72;
  564. flashbase:$00000000;
  565. flashsize:$00020000;
  566. srambase:$20000000;
  567. sramsize:$00008000
  568. ),
  569. // ct_lm3s6637,
  570. (
  571. controllertypestr:'LM3S6637';
  572. controllerunitstr:'LM3FURY';
  573. interruptvectors:72;
  574. flashbase:$00000000;
  575. flashsize:$00020000;
  576. srambase:$20000000;
  577. sramsize:$00008000
  578. ),
  579. // ct_lm3s8630,
  580. (
  581. controllertypestr:'LM3S8630';
  582. controllerunitstr:'LM3FURY';
  583. interruptvectors:72;
  584. flashbase:$00000000;
  585. flashsize:$00020000;
  586. srambase:$20000000;
  587. sramsize:$00008000
  588. ),
  589. { TI - 256K Flash, 64K SRAM devices }
  590. // ct_lm3s1911,
  591. (
  592. controllertypestr:'LM3S1911';
  593. controllerunitstr:'LM3FURY';
  594. interruptvectors:72;
  595. flashbase:$00000000;
  596. flashsize:$00040000;
  597. srambase:$20000000;
  598. sramsize:$00010000
  599. ),
  600. // ct_lm3s1918,
  601. (
  602. controllertypestr:'LM3S1918';
  603. controllerunitstr:'LM3FURY';
  604. interruptvectors:72;
  605. flashbase:$00000000;
  606. flashsize:$00040000;
  607. srambase:$20000000;
  608. sramsize:$00010000
  609. ),
  610. // ct_lm3s1937,
  611. (
  612. controllertypestr:'LM3S1937';
  613. controllerunitstr:'LM3FURY';
  614. interruptvectors:72;
  615. flashbase:$00000000;
  616. flashsize:$00040000;
  617. srambase:$20000000;
  618. sramsize:$00010000
  619. ),
  620. // ct_lm3s1958,
  621. (
  622. controllertypestr:'LM3S1958';
  623. controllerunitstr:'LM3FURY';
  624. interruptvectors:72;
  625. flashbase:$00000000;
  626. flashsize:$00040000;
  627. srambase:$20000000;
  628. sramsize:$00010000
  629. ),
  630. // ct_lm3s1960,
  631. (
  632. controllertypestr:'LM3S1960';
  633. controllerunitstr:'LM3FURY';
  634. interruptvectors:72;
  635. flashbase:$00000000;
  636. flashsize:$00040000;
  637. srambase:$20000000;
  638. sramsize:$00010000
  639. ),
  640. // ct_lm3s1968,
  641. (
  642. controllertypestr:'LM3S1968';
  643. controllerunitstr:'LM3FURY';
  644. interruptvectors:72;
  645. flashbase:$00000000;
  646. flashsize:$00040000;
  647. srambase:$20000000;
  648. sramsize:$00010000
  649. ),
  650. // ct_lm3s1969,
  651. (
  652. controllertypestr:'LM3S1969';
  653. controllerunitstr:'LM3FURY';
  654. interruptvectors:72;
  655. flashbase:$00000000;
  656. flashsize:$00040000;
  657. srambase:$20000000;
  658. sramsize:$00010000
  659. ),
  660. // ct_lm3s2911,
  661. (
  662. controllertypestr:'LM3S2911';
  663. controllerunitstr:'LM3FURY';
  664. interruptvectors:72;
  665. flashbase:$00000000;
  666. flashsize:$00040000;
  667. srambase:$20000000;
  668. sramsize:$00010000
  669. ),
  670. // ct_lm3s2918,
  671. (
  672. controllertypestr:'LM3S2918';
  673. controllerunitstr:'LM3FURY';
  674. interruptvectors:72;
  675. flashbase:$00000000;
  676. flashsize:$00040000;
  677. srambase:$20000000;
  678. sramsize:$00010000
  679. ),
  680. // ct_lm3s2919,
  681. (
  682. controllertypestr:'LM3S2919';
  683. controllerunitstr:'LM3FURY';
  684. interruptvectors:72;
  685. flashbase:$00000000;
  686. flashsize:$00040000;
  687. srambase:$20000000;
  688. sramsize:$00010000
  689. ),
  690. // ct_lm3s2939,
  691. (
  692. controllertypestr:'LM3S2939';
  693. controllerunitstr:'LM3FURY';
  694. interruptvectors:72;
  695. flashbase:$00000000;
  696. flashsize:$00040000;
  697. srambase:$20000000;
  698. sramsize:$00010000
  699. ),
  700. // ct_lm3s2948,
  701. (
  702. controllertypestr:'LM3S2948';
  703. controllerunitstr:'LM3FURY';
  704. interruptvectors:72;
  705. flashbase:$00000000;
  706. flashsize:$00040000;
  707. srambase:$20000000;
  708. sramsize:$00010000
  709. ),
  710. // ct_lm3s2950,
  711. (
  712. controllertypestr:'LM3S2950';
  713. controllerunitstr:'LM3FURY';
  714. interruptvectors:72;
  715. flashbase:$00000000;
  716. flashsize:$00040000;
  717. srambase:$20000000;
  718. sramsize:$00010000
  719. ),
  720. // ct_lm3s2965,
  721. (
  722. controllertypestr:'LM3S2965';
  723. controllerunitstr:'LM3FURY';
  724. interruptvectors:72;
  725. flashbase:$00000000;
  726. flashsize:$00040000;
  727. srambase:$20000000;
  728. sramsize:$00010000
  729. ),
  730. // ct_lm3s6911,
  731. (
  732. controllertypestr:'LM3S6911';
  733. controllerunitstr:'LM3FURY';
  734. interruptvectors:72;
  735. flashbase:$00000000;
  736. flashsize:$00040000;
  737. srambase:$20000000;
  738. sramsize:$00010000
  739. ),
  740. // ct_lm3s6918,
  741. (
  742. controllertypestr:'LM3S6918';
  743. controllerunitstr:'LM3FURY';
  744. interruptvectors:72;
  745. flashbase:$00000000;
  746. flashsize:$00040000;
  747. srambase:$20000000;
  748. sramsize:$00010000
  749. ),
  750. // ct_lm3s6938,
  751. (
  752. controllertypestr:'LM3S6938';
  753. controllerunitstr:'LM3FURY';
  754. interruptvectors:72;
  755. flashbase:$00000000;
  756. flashsize:$00040000;
  757. srambase:$20000000;
  758. sramsize:$00010000
  759. ),
  760. // ct_lm3s6950,
  761. (
  762. controllertypestr:'LM3S6950';
  763. controllerunitstr:'LM3FURY';
  764. interruptvectors:72;
  765. flashbase:$00000000;
  766. flashsize:$00040000;
  767. srambase:$20000000;
  768. sramsize:$00010000
  769. ),
  770. // ct_lm3s6952,
  771. (
  772. controllertypestr:'LM3S6952';
  773. controllerunitstr:'LM3FURY';
  774. interruptvectors:72;
  775. flashbase:$00000000;
  776. flashsize:$00040000;
  777. srambase:$20000000;
  778. sramsize:$00010000
  779. ),
  780. // ct_lm3s6965,
  781. (
  782. controllertypestr:'LM3S6965';
  783. controllerunitstr:'LM3FURY';
  784. interruptvectors:72;
  785. flashbase:$00000000;
  786. flashsize:$00040000;
  787. srambase:$20000000;
  788. sramsize:$00010000
  789. ),
  790. // ct_lm3s8930,
  791. (
  792. controllertypestr:'LM3S8930';
  793. controllerunitstr:'LM3FURY';
  794. interruptvectors:72;
  795. flashbase:$00000000;
  796. flashsize:$00040000;
  797. srambase:$20000000;
  798. sramsize:$00010000
  799. ),
  800. // ct_lm3s8933,
  801. (
  802. controllertypestr:'LM3S8933';
  803. controllerunitstr:'LM3FURY';
  804. interruptvectors:72;
  805. flashbase:$00000000;
  806. flashsize:$00040000;
  807. srambase:$20000000;
  808. sramsize:$00010000
  809. ),
  810. // ct_lm3s8938,
  811. (
  812. controllertypestr:'LM3S8938';
  813. controllerunitstr:'LM3FURY';
  814. interruptvectors:72;
  815. flashbase:$00000000;
  816. flashsize:$00040000;
  817. srambase:$20000000;
  818. sramsize:$00010000
  819. ),
  820. // ct_lm3s8962,
  821. (
  822. controllertypestr:'LM3S8962';
  823. controllerunitstr:'LM3FURY';
  824. interruptvectors:72;
  825. flashbase:$00000000;
  826. flashsize:$00040000;
  827. srambase:$20000000;
  828. sramsize:$00010000
  829. ),
  830. // ct_lm3s8970,
  831. (
  832. controllertypestr:'LM3S8970';
  833. controllerunitstr:'LM3FURY';
  834. interruptvectors:72;
  835. flashbase:$00000000;
  836. flashsize:$00040000;
  837. srambase:$20000000;
  838. sramsize:$00010000
  839. ),
  840. // ct_lm3s8971,
  841. (
  842. controllertypestr:'LM3S8971';
  843. controllerunitstr:'LM3FURY';
  844. interruptvectors:72;
  845. flashbase:$00000000;
  846. flashsize:$00040000;
  847. srambase:$20000000;
  848. sramsize:$00010000
  849. ),
  850. { TI - Tempest parts - 256 K Flash, 64 K SRAM }
  851. // ct_lm3s5951,
  852. (
  853. controllertypestr:'LM3S5951';
  854. controllerunitstr:'LM3TEMPEST';
  855. interruptvectors:72;
  856. flashbase:$00000000;
  857. flashsize:$00040000;
  858. srambase:$20000000;
  859. sramsize:$00010000
  860. ),
  861. // ct_lm3s5956,
  862. (
  863. controllertypestr:'LM3S5956';
  864. controllerunitstr:'LM3TEMPEST';
  865. interruptvectors:72;
  866. flashbase:$00000000;
  867. flashsize:$00040000;
  868. srambase:$20000000;
  869. sramsize:$00010000
  870. ),
  871. // ct_lm3s1b21,
  872. (
  873. controllertypestr:'LM3S1B21';
  874. controllerunitstr:'LM3TEMPEST';
  875. interruptvectors:72;
  876. flashbase:$00000000;
  877. flashsize:$00040000;
  878. srambase:$20000000;
  879. sramsize:$00010000
  880. ),
  881. // ct_lm3s2b93,
  882. (
  883. controllertypestr:'LM3S2B93';
  884. controllerunitstr:'LM3TEMPEST';
  885. interruptvectors:72;
  886. flashbase:$00000000;
  887. flashsize:$00040000;
  888. srambase:$20000000;
  889. sramsize:$00010000
  890. ),
  891. // ct_lm3s5b91,
  892. (
  893. controllertypestr:'LM3S5B91';
  894. controllerunitstr:'LM3TEMPEST';
  895. interruptvectors:72;
  896. flashbase:$00000000;
  897. flashsize:$00040000;
  898. srambase:$20000000;
  899. sramsize:$00010000
  900. ),
  901. // ct_lm3s9b81,
  902. (
  903. controllertypestr:'LM3S9B81';
  904. controllerunitstr:'LM3TEMPEST';
  905. interruptvectors:72;
  906. flashbase:$00000000;
  907. flashsize:$00040000;
  908. srambase:$20000000;
  909. sramsize:$00010000
  910. ),
  911. // ct_lm3s9b90,
  912. (
  913. controllertypestr:'LM3S9B90';
  914. controllerunitstr:'LM3TEMPEST';
  915. interruptvectors:72;
  916. flashbase:$00000000;
  917. flashsize:$00040000;
  918. srambase:$20000000;
  919. sramsize:$00010000
  920. ),
  921. // ct_lm3s9b92,
  922. (
  923. controllertypestr:'LM3S9B92';
  924. controllerunitstr:'LM3TEMPEST';
  925. interruptvectors:72;
  926. flashbase:$00000000;
  927. flashsize:$00040000;
  928. srambase:$20000000;
  929. sramsize:$00010000
  930. ),
  931. // ct_lm3s9b95,
  932. (
  933. controllertypestr:'LM3S9B95';
  934. controllerunitstr:'LM3TEMPEST';
  935. interruptvectors:72;
  936. flashbase:$00000000;
  937. flashsize:$00040000;
  938. srambase:$20000000;
  939. sramsize:$00010000
  940. ),
  941. // ct_lm3s9b96,
  942. (
  943. controllertypestr:'LM3S9B96';
  944. controllerunitstr:'LM3TEMPEST';
  945. interruptvectors:72;
  946. flashbase:$00000000;
  947. flashsize:$00040000;
  948. srambase:$20000000;
  949. sramsize:$00010000
  950. ),
  951. //ct_SC32442b,
  952. (
  953. controllertypestr:'SC32442B';
  954. controllerunitstr:'sc32442b';
  955. interruptvectors:7;
  956. flashbase:$00000000;
  957. flashsize:$00000000;
  958. srambase:$00000000;
  959. sramsize:$08000000
  960. ),
  961. // bare bones Thumb2
  962. (
  963. controllertypestr:'THUMB2_BARE';
  964. controllerunitstr:'THUMB2_BARE';
  965. interruptvectors:128;
  966. flashbase:$00000000;
  967. flashsize:$00100000;
  968. srambase:$20000000;
  969. sramsize:$00100000
  970. )
  971. );
  972. vfp_scalar = [fpu_vfpv2,fpu_vfpv3];
  973. { Supported optimizations, only used for information }
  974. supported_optimizerswitches = genericlevel1optimizerswitches+
  975. genericlevel2optimizerswitches+
  976. genericlevel3optimizerswitches-
  977. { no need to write info about those }
  978. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  979. [cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,
  980. cs_opt_stackframe,cs_opt_nodecse];
  981. level1optimizerswitches = genericlevel1optimizerswitches;
  982. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  983. [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse,cs_opt_scheduler];
  984. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
  985. Implementation
  986. end.