cpuinfo.pas 3.6 KB

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  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for the LoongArch64
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. unit CPUInfo;
  11. {$i fpcdefs.inc}
  12. interface
  13. uses
  14. globtype;
  15. type
  16. bestreal = double;
  17. bestrealrec = TDoubleRec;
  18. ts32real = single;
  19. ts64real = double;
  20. ts80real = extended;
  21. ts128real = extended;
  22. ts64comp = comp;
  23. pbestreal = ^bestreal;
  24. { possible supported processors for this target }
  25. tcputype = (cpu_none,
  26. cpu_3a
  27. );
  28. tfputype =
  29. (fpu_none,
  30. fpu_fd
  31. );
  32. tcontrollertype =
  33. (ct_none
  34. );
  35. tcontrollerdatatype = record
  36. controllertypestr, controllerunitstr: string[20];
  37. cputype: tcputype; fputype: tfputype;
  38. flashbase, flashsize, srambase, sramsize, eeprombase, eepromsize, bootbase, bootsize: dword;
  39. end;
  40. Const
  41. { Is there support for dealing with multiple microcontrollers available }
  42. { for this platform? }
  43. ControllerSupport = false;
  44. { We know that there are fields after sramsize
  45. but we don't care about this warning }
  46. {$PUSH}
  47. {$WARN 3177 OFF}
  48. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  49. (
  50. (controllertypestr:''; controllerunitstr:''; cputype:cpu_none; fputype:fpu_none; flashbase:0; flashsize:0; srambase:0; sramsize:0));
  51. {$POP}
  52. { calling conventions supported by the code generator }
  53. supported_calling_conventions: tproccalloptions = [
  54. pocall_internproc,
  55. pocall_safecall,
  56. pocall_stdcall,
  57. { the difference to stdcall is only the name mangling }
  58. pocall_cdecl,
  59. { the difference to stdcall is only the name mangling }
  60. pocall_cppdecl,
  61. { the difference with stdcall is that all const record
  62. parameters are passed by reference }
  63. pocall_mwpascal
  64. ];
  65. cputypestr: array[tcputype] of string[11] = ('',
  66. 'LOONGARCH64'
  67. );
  68. fputypestr: array[tfputype] of string[8] = ('',
  69. 'FD'
  70. );
  71. { Supported optimizations, only used for information }
  72. supported_optimizerswitches = genericlevel1optimizerswitches+
  73. genericlevel2optimizerswitches+
  74. genericlevel3optimizerswitches-
  75. { no need to write info about those }
  76. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  77. [{$ifndef llvm}cs_opt_regvar,{$endif}cs_opt_loopunroll,cs_opt_nodecse,
  78. cs_opt_tailrecursion,cs_opt_reorder_fields,cs_opt_fastmath,
  79. cs_opt_stackframe];
  80. level1optimizerswitches = genericlevel1optimizerswitches;
  81. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  82. [{$ifndef llvm}cs_opt_regvar,{$endif}cs_opt_stackframe,cs_opt_nodecse,cs_opt_tailrecursion];
  83. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches;
  84. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [cs_opt_stackframe];
  85. { TODO Unaligned accesses, hard float. }
  86. type
  87. tcpuflags =
  88. (CPULOONGARCH_HAS_ATOMIC
  89. );
  90. const
  91. cpu_capabilities : array[tcputype] of set of tcpuflags =
  92. ( { cpu_none } [],
  93. { cpu_loongarch3a } [CPULOONGARCH_HAS_ATOMIC]
  94. );
  95. implementation
  96. end.