ncpucnv.pas 9.1 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate LoongArch64 assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncpucnv;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncnv,ncgcnv;
  22. type
  23. tloongarch64typeconvnode = class(tcgtypeconvnode)
  24. protected
  25. { procedure second_int_to_int;override; }
  26. { procedure second_string_to_string;override; }
  27. { procedure second_cstring_to_pchar;override; }
  28. { procedure second_string_to_chararray;override; }
  29. { procedure second_array_to_pointer;override; }
  30. function first_int_to_real: tnode; override;
  31. { procedure second_pointer_to_array;override; }
  32. { procedure second_chararray_to_string;override; }
  33. { procedure second_char_to_string;override; }
  34. procedure second_int_to_real;override;
  35. { procedure second_real_to_real;override; }
  36. { procedure second_cord_to_pointer;override; }
  37. { procedure second_proc_to_procvar;override; }
  38. { procedure second_bool_to_int;override; }
  39. procedure second_int_to_bool;override;
  40. { procedure second_load_smallset;override; }
  41. { procedure second_ansistring_to_pchar;override; }
  42. { procedure second_pchar_to_string;override; }
  43. { procedure second_class_to_intf;override; }
  44. { procedure second_char_to_char;override; }
  45. end;
  46. implementation
  47. uses
  48. verbose,globtype,globals,systems,
  49. symconst,symdef,aasmbase,aasmtai,aasmdata,
  50. defutil, symcpu,
  51. cgbase,cgutils,pass_1,pass_2,
  52. ncon, ncal,procinfo,
  53. ncgutil,
  54. cpubase,aasmcpu,
  55. rgobj,tgobj,cgobj,hlcgobj;
  56. {*****************************************************************************
  57. FirstTypeConv
  58. *****************************************************************************}
  59. function tloongarch64typeconvnode.first_int_to_real: tnode;
  60. var
  61. fname: string[19];
  62. begin
  63. { converting a 64bit integer to a float requires a helper }
  64. if is_64bitint(left.resultdef) or
  65. is_currency(left.resultdef) then
  66. begin
  67. { hack to avoid double division by 10000, as it's
  68. already done by typecheckpass.resultdef_int_to_real }
  69. if is_currency(left.resultdef) then
  70. left.resultdef := s64inttype
  71. else if not is_signed(left.resultdef) then
  72. begin
  73. fname := 'fpc_qword_to_double';
  74. result := ccallnode.createintern(fname,ccallparanode.create(left,nil));
  75. left:=nil;
  76. if (tfloatdef(resultdef).floattype=s32real) then
  77. inserttypeconv(result,s32floattype);
  78. firstpass(result);
  79. exit;
  80. end;
  81. end
  82. else
  83. begin
  84. { Else signed supposed to be 32 bit, or unsigned supposed to be 64 bit }
  85. if is_signed(left.resultdef) then
  86. inserttypeconv(left,s32inttype)
  87. else
  88. inserttypeconv(left,s64inttype);
  89. firstpass(left);
  90. end;
  91. result := nil;
  92. expectloc:=LOC_FPUREGISTER;
  93. end;
  94. {*****************************************************************************
  95. SecondTypeConv
  96. *****************************************************************************}
  97. procedure tloongarch64typeconvnode.second_int_to_real;
  98. var
  99. op, movop: TAsmOp;
  100. restype: tfloattype;
  101. hreg: tregister;
  102. begin
  103. location_reset(location, LOC_FPUREGISTER, def_cgsize(resultdef));
  104. restype:=tfloatdef(resultdef).floattype;
  105. location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, tfloat2tcgsize[restype]);
  106. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  107. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, true);
  108. case left.location.size of
  109. OS_32,OS_64: internalerror(2022111928);
  110. OS_S32:
  111. begin
  112. if restype=s32real then
  113. op:=A_FFINT_S_W
  114. else if restype=s64real then
  115. op:=A_FFINT_D_W
  116. else
  117. internalerror(2022111929);
  118. hreg:=cg.getfpuregister(current_asmdata.CurrAsmList, OS_F32);
  119. movop:=A_MOVGR2FR_W;
  120. end;
  121. OS_S64:
  122. begin
  123. if restype=s32real then
  124. op:=A_FFINT_S_L
  125. else if restype=s64real then
  126. op:=A_FFINT_D_L
  127. else
  128. internalerror(2022111930);
  129. hreg:= cg.getfpuregister(current_asmdata.CurrAsmList, OS_F64);
  130. movop:=A_MOVGR2FR_D;
  131. end;
  132. else
  133. internalerror(2022111931);
  134. end;
  135. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(movop, hreg, left.location.register));
  136. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op, location.register, hreg));
  137. end;
  138. procedure tloongarch64typeconvnode.second_int_to_bool;
  139. var
  140. hreg1, hreg2: tregister;
  141. opsize: tcgsize;
  142. hlabel: tasmlabel;
  143. newsize : tcgsize;
  144. href: treference;
  145. begin
  146. secondpass(left);
  147. if codegenerror then
  148. exit;
  149. { Explicit typecasts from any ordinal type to a boolean type }
  150. { must not change the ordinal value }
  151. if (nf_explicit in flags) and
  152. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  153. begin
  154. location_copy(location,left.location);
  155. newsize:=def_cgsize(resultdef);
  156. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  157. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  158. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  159. hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
  160. else
  161. location.size:=newsize;
  162. exit;
  163. end;
  164. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  165. opsize := def_cgsize(left.resultdef);
  166. if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
  167. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  168. case left.location.loc of
  169. LOC_CREFERENCE, LOC_REFERENCE, LOC_REGISTER, LOC_CREGISTER:
  170. begin
  171. if left.location.loc in [LOC_CREFERENCE, LOC_REFERENCE] then
  172. begin
  173. hreg2 := cg.getintregister(current_asmdata.CurrAsmList, opsize);
  174. cg.a_load_ref_reg(current_asmdata.CurrAsmList, opsize, opsize, left.location.reference, hreg2);
  175. end
  176. else
  177. begin
  178. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  179. cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hreg2);
  180. end;
  181. hreg1 := cg.getintregister(current_asmdata.CurrAsmList, opsize);
  182. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SLTU, hreg1, NR_R0, hreg2));
  183. end;
  184. LOC_JUMP:
  185. begin
  186. hreg1 := cg.getintregister(current_asmdata.CurrAsmList, OS_INT);
  187. current_asmdata.getjumplabel(hlabel);
  188. cg.a_label(current_asmdata.CurrAsmList, left.location.truelabel);
  189. cg.a_load_const_reg(current_asmdata.CurrAsmList, OS_INT, 1, hreg1);
  190. cg.a_jmp_always(current_asmdata.CurrAsmList, hlabel);
  191. cg.a_label(current_asmdata.CurrAsmList, left.location.falselabel);
  192. cg.a_load_const_reg(current_asmdata.CurrAsmList, OS_INT, 0, hreg1);
  193. cg.a_label(current_asmdata.CurrAsmList, hlabel);
  194. end;
  195. LOC_FLAGS:
  196. Internalerror(2022111932);
  197. else
  198. internalerror(2022111933);
  199. end;
  200. { Now hreg1 is either 0 or 1. For C booleans it must be 0 or -1. }
  201. if is_cbool(resultdef) then
  202. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_SINT,hreg1,hreg1);
  203. location.Register := hreg1;
  204. end;
  205. begin
  206. ctypeconvnode := tloongarch64typeconvnode;
  207. end.