cpubase.pas 13 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl and Peter Vreman
  4. Contains the base types for the i386 and x86-64 architecture
  5. * This code was inspired by the NASM sources
  6. The Netwide Assembler is Copyright (c) 1996 Simon Tatham and
  7. Julian Hall. All rights reserved.
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. ****************************************************************************
  20. }
  21. {# Base unit for processor information. This unit contains
  22. enumerations of registers, opcodes, sizes, and other
  23. such things which are processor specific.
  24. }
  25. unit cpubase;
  26. {$i fpcdefs.inc}
  27. interface
  28. uses
  29. cutils,cclasses,
  30. globtype,
  31. cgbase
  32. ;
  33. {*****************************************************************************
  34. Assembler Opcodes
  35. *****************************************************************************}
  36. type
  37. {$ifdef x86_64}
  38. TAsmOp={$i x8664op.inc}
  39. {$else x86_64}
  40. TAsmOp={$i i386op.inc}
  41. {$endif x86_64}
  42. { This should define the array of instructions as string }
  43. op2strtable=array[tasmop] of string[11];
  44. const
  45. { First value of opcode enumeration }
  46. firstop = low(tasmop);
  47. { Last value of opcode enumeration }
  48. lastop = high(tasmop);
  49. {*****************************************************************************
  50. Registers
  51. *****************************************************************************}
  52. const
  53. { Invalid register number }
  54. RS_INVALID = $ff;
  55. { Integer Super registers }
  56. RS_RAX = $00; {EAX}
  57. RS_RCX = $01; {ECX}
  58. RS_RDX = $02; {EDX}
  59. RS_RBX = $03; {EBX}
  60. RS_RSI = $04; {ESI}
  61. RS_RDI = $05; {EDI}
  62. RS_RBP = $06; {EBP}
  63. RS_RSP = $07; {ESP}
  64. RS_R8 = $08; {R8}
  65. RS_R9 = $09; {R9}
  66. RS_R10 = $0a; {R10}
  67. RS_R11 = $0b; {R11}
  68. RS_R12 = $0c; {R12}
  69. RS_R13 = $0d; {R13}
  70. RS_R14 = $0e; {R14}
  71. RS_R15 = $0f; {R15}
  72. { create aliases to allow code sharing between x86-64 and i386 }
  73. RS_EAX = RS_RAX;
  74. RS_EBX = RS_RBX;
  75. RS_ECX = RS_RCX;
  76. RS_EDX = RS_RDX;
  77. RS_ESI = RS_RSI;
  78. RS_EDI = RS_RDI;
  79. RS_EBP = RS_RBP;
  80. RS_ESP = RS_RSP;
  81. { Number of first imaginary register }
  82. first_int_imreg = $10;
  83. { Float Super registers }
  84. RS_ST0 = $00;
  85. RS_ST1 = $01;
  86. RS_ST2 = $02;
  87. RS_ST3 = $03;
  88. RS_ST4 = $04;
  89. RS_ST5 = $05;
  90. RS_ST6 = $06;
  91. RS_ST7 = $07;
  92. { Number of first imaginary register }
  93. first_fpu_imreg = $08;
  94. { MM Super registers }
  95. RS_XMM0 = $00;
  96. RS_XMM1 = $01;
  97. RS_XMM2 = $02;
  98. RS_XMM3 = $03;
  99. RS_XMM4 = $04;
  100. RS_XMM5 = $05;
  101. RS_XMM6 = $06;
  102. RS_XMM7 = $07;
  103. RS_XMM8 = $08;
  104. RS_XMM9 = $09;
  105. RS_XMM10 = $0a;
  106. RS_XMM11 = $0b;
  107. RS_XMM12 = $0c;
  108. RS_XMM13 = $0d;
  109. RS_XMM14 = $0e;
  110. RS_XMM15 = $0f;
  111. { Number of first imaginary register }
  112. {$ifdef x86_64}
  113. first_mm_imreg = $10;
  114. {$else x86_64}
  115. first_mm_imreg = $08;
  116. {$endif x86_64}
  117. { The subregister that specifies the entire register }
  118. {$ifdef x86_64}
  119. R_SUBWHOLE = R_SUBQ; {Hammer}
  120. {$else x86_64}
  121. R_SUBWHOLE = R_SUBD; {i386}
  122. {$endif x86_64}
  123. { Available Registers }
  124. {$ifdef x86_64}
  125. {$i r8664con.inc}
  126. {$else x86_64}
  127. {$i r386con.inc}
  128. {$endif x86_64}
  129. type
  130. { Number of registers used for indexing in tables }
  131. {$ifdef x86_64}
  132. tregisterindex=0..{$i r8664nor.inc}-1;
  133. {$else x86_64}
  134. tregisterindex=0..{$i r386nor.inc}-1;
  135. {$endif x86_64}
  136. const
  137. {$warning TODO Calculate bsstart}
  138. regnumber_count_bsstart = 64;
  139. regnumber_table : array[tregisterindex] of tregister = (
  140. {$ifdef x86_64}
  141. {$i r8664num.inc}
  142. {$else x86_64}
  143. {$i r386num.inc}
  144. {$endif x86_64}
  145. );
  146. regstabs_table : array[tregisterindex] of shortint = (
  147. {$ifdef x86_64}
  148. {$i r8664stab.inc}
  149. {$else x86_64}
  150. {$i r386stab.inc}
  151. {$endif x86_64}
  152. );
  153. regdwarf_table : array[tregisterindex] of shortint = (
  154. {$ifdef x86_64}
  155. {$i r8664dwrf.inc}
  156. {$else x86_64}
  157. {$i r386dwrf.inc}
  158. {$endif x86_64}
  159. );
  160. type
  161. totherregisterset = set of tregisterindex;
  162. {*****************************************************************************
  163. Conditions
  164. *****************************************************************************}
  165. type
  166. TAsmCond=(C_None,
  167. C_A,C_AE,C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_NA,C_NAE,
  168. C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_NO,C_NP,
  169. C_NS,C_NZ,C_O,C_P,C_PE,C_PO,C_S,C_Z
  170. );
  171. const
  172. cond2str:array[TAsmCond] of string[3]=('',
  173. 'a','ae','b','be','c','e','g','ge','l','le','na','nae',
  174. 'nb','nbe','nc','ne','ng','nge','nl','nle','no','np',
  175. 'ns','nz','o','p','pe','po','s','z'
  176. );
  177. inverse_cond:array[TAsmCond] of TAsmCond=(C_None,
  178. C_NA,C_NAE,C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_A,C_AE,
  179. C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_O,C_P,
  180. C_S,C_Z,C_NO,C_NP,C_NP,C_P,C_NS,C_NZ
  181. );
  182. {*****************************************************************************
  183. Flags
  184. *****************************************************************************}
  185. type
  186. TResFlags = (F_E,F_NE,F_G,F_L,F_GE,F_LE,F_C,F_NC,
  187. F_A,F_AE,F_B,F_BE,
  188. F_S,F_NS,F_O,F_NO);
  189. {*****************************************************************************
  190. Constants
  191. *****************************************************************************}
  192. const
  193. { declare aliases }
  194. LOC_SSEREGISTER = LOC_MMREGISTER;
  195. LOC_CSSEREGISTER = LOC_CMMREGISTER;
  196. max_operands = 3;
  197. maxfpuregs = 8;
  198. {*****************************************************************************
  199. CPU Dependent Constants
  200. *****************************************************************************}
  201. {$i cpubase.inc}
  202. {*****************************************************************************
  203. Helpers
  204. *****************************************************************************}
  205. function cgsize2subreg(s:Tcgsize):Tsubregister;
  206. function reg2opsize(r:Tregister):topsize;
  207. function reg_cgsize(const reg: tregister): tcgsize;
  208. function is_calljmp(o:tasmop):boolean;
  209. procedure inverse_flags(var f: TResFlags);
  210. function flags_to_cond(const f: TResFlags) : TAsmCond;
  211. function is_segment_reg(r:tregister):boolean;
  212. function findreg_by_number(r:Tregister):tregisterindex;
  213. function std_regnum_search(const s:string):Tregister;
  214. function std_regname(r:Tregister):string;
  215. implementation
  216. uses
  217. rgbase,verbose;
  218. const
  219. {$ifdef x86_64}
  220. std_regname_table : array[tregisterindex] of string[7] = (
  221. {$i r8664std.inc}
  222. );
  223. regnumber_index : array[tregisterindex] of tregisterindex = (
  224. {$i r8664rni.inc}
  225. );
  226. std_regname_index : array[tregisterindex] of tregisterindex = (
  227. {$i r8664sri.inc}
  228. );
  229. {$else x86_64}
  230. std_regname_table : array[tregisterindex] of string[7] = (
  231. {$i r386std.inc}
  232. );
  233. regnumber_index : array[tregisterindex] of tregisterindex = (
  234. {$i r386rni.inc}
  235. );
  236. std_regname_index : array[tregisterindex] of tregisterindex = (
  237. {$i r386sri.inc}
  238. );
  239. {$endif x86_64}
  240. {*****************************************************************************
  241. Helpers
  242. *****************************************************************************}
  243. function cgsize2subreg(s:Tcgsize):Tsubregister;
  244. begin
  245. case s of
  246. OS_8,OS_S8:
  247. cgsize2subreg:=R_SUBL;
  248. OS_16,OS_S16:
  249. cgsize2subreg:=R_SUBW;
  250. OS_32,OS_S32:
  251. cgsize2subreg:=R_SUBD;
  252. OS_64,OS_S64:
  253. cgsize2subreg:=R_SUBQ;
  254. OS_M64:
  255. cgsize2subreg:=R_SUBNONE;
  256. OS_F32,OS_F64,OS_C64,
  257. OS_M128,OS_MS128:
  258. cgsize2subreg:=R_SUBWHOLE;
  259. else
  260. internalerror(200301231);
  261. end;
  262. end;
  263. function reg_cgsize(const reg: tregister): tcgsize;
  264. const subreg2cgsize:array[Tsubregister] of Tcgsize =
  265. (OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO,OS_NO,OS_NO);
  266. begin
  267. case getregtype(reg) of
  268. R_INTREGISTER :
  269. reg_cgsize:=subreg2cgsize[getsubreg(reg)];
  270. R_FPUREGISTER :
  271. reg_cgsize:=OS_F80;
  272. R_MMXREGISTER:
  273. reg_cgsize:=OS_M64;
  274. R_MMREGISTER:
  275. reg_cgsize:=OS_M128;
  276. R_SPECIALREGISTER :
  277. case reg of
  278. NR_CS,NR_DS,NR_ES,NR_SS,NR_FS,NR_GS:
  279. reg_cgsize:=OS_16
  280. else
  281. reg_cgsize:=OS_32
  282. end
  283. else
  284. internalerror(200303181);
  285. end;
  286. end;
  287. function reg2opsize(r:Tregister):topsize;
  288. const
  289. subreg2opsize : array[tsubregister] of topsize =
  290. (S_NO,S_B,S_B,S_W,S_L,S_Q,S_NO,S_NO,S_NO);
  291. begin
  292. reg2opsize:=S_L;
  293. case getregtype(r) of
  294. R_INTREGISTER :
  295. reg2opsize:=subreg2opsize[getsubreg(r)];
  296. R_FPUREGISTER :
  297. reg2opsize:=S_FL;
  298. R_MMXREGISTER,
  299. R_MMREGISTER :
  300. reg2opsize:=S_MD;
  301. R_SPECIALREGISTER :
  302. begin
  303. case r of
  304. NR_CS,NR_DS,NR_ES,
  305. NR_SS,NR_FS,NR_GS :
  306. reg2opsize:=S_W;
  307. end;
  308. end;
  309. else
  310. internalerror(200303181);
  311. end;
  312. end;
  313. function is_calljmp(o:tasmop):boolean;
  314. begin
  315. case o of
  316. A_CALL,
  317. A_JCXZ,
  318. A_JECXZ,
  319. A_JMP,
  320. A_LOOP,
  321. A_LOOPE,
  322. A_LOOPNE,
  323. A_LOOPNZ,
  324. A_LOOPZ,
  325. A_Jcc :
  326. is_calljmp:=true;
  327. else
  328. is_calljmp:=false;
  329. end;
  330. end;
  331. procedure inverse_flags(var f: TResFlags);
  332. const
  333. inv_flags: array[TResFlags] of TResFlags =
  334. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  335. F_BE,F_B,F_AE,F_A,
  336. F_NS,F_S,F_NO,F_O);
  337. begin
  338. f:=inv_flags[f];
  339. end;
  340. function flags_to_cond(const f: TResFlags) : TAsmCond;
  341. const
  342. flags_2_cond : array[TResFlags] of TAsmCond =
  343. (C_E,C_NE,C_G,C_L,C_GE,C_LE,C_C,C_NC,C_A,C_AE,C_B,C_BE,C_S,C_NS,C_O,C_NO);
  344. begin
  345. result := flags_2_cond[f];
  346. end;
  347. function is_segment_reg(r:tregister):boolean;
  348. begin
  349. result:=false;
  350. case r of
  351. NR_CS,NR_DS,NR_ES,
  352. NR_SS,NR_FS,NR_GS :
  353. result:=true;
  354. end;
  355. end;
  356. function findreg_by_number(r:Tregister):tregisterindex;
  357. begin
  358. result:=findreg_by_number_table(r,regnumber_index);
  359. end;
  360. function std_regnum_search(const s:string):Tregister;
  361. begin
  362. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  363. end;
  364. function std_regname(r:Tregister):string;
  365. var
  366. p : tregisterindex;
  367. begin
  368. p:=findreg_by_number_table(r,regnumber_index);
  369. if p<>0 then
  370. result:=std_regname_table[p]
  371. else
  372. result:=generic_regname(r);
  373. end;
  374. end.
  375. {
  376. $Log$
  377. Revision 1.49 2004-10-31 21:45:04 peter
  378. * generic tlocation
  379. * move tlocation to cgutils
  380. Revision 1.48 2004/10/25 15:36:47 peter
  381. * save standard registers moved to tcgobj
  382. Revision 1.47 2004/10/15 09:22:23 mazen
  383. - remove $IFDEF DELPHI and related code
  384. - remove $IFDEF FPCPROCVAR and related code
  385. Revision 1.46 2004/08/24 21:23:11 florian
  386. * fixed i386 compilation
  387. Revision 1.45 2004/07/09 23:30:13 jonas
  388. * changed first_sse_imreg to first_mm_imreg
  389. Revision 1.44 2004/06/20 08:55:32 florian
  390. * logs truncated
  391. Revision 1.43 2004/06/16 20:07:11 florian
  392. * dwarf branch merged
  393. Revision 1.42.2.5 2004/05/28 20:29:50 florian
  394. * fixed currency trouble on x86-64
  395. Revision 1.42.2.4 2004/05/01 16:02:10 peter
  396. * POINTER_SIZE replaced with sizeof(aint)
  397. * aint,aword,tconst*int moved to globtype
  398. Revision 1.42.2.3 2004/05/01 11:12:24 florian
  399. * spilling of registers with size<>4 fixed
  400. Revision 1.42.2.2 2004/04/27 18:18:26 peter
  401. * aword -> aint
  402. }