rax86.pas 21 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  4. Handles the common x86 assembler reader routines
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {
  19. Contains the common x86 (i386 and x86-64) assembler reader routines.
  20. }
  21. unit rax86;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. aasmbase,aasmtai,aasmcpu,
  26. cpubase,rautils,cclasses;
  27. { Parser helpers }
  28. function is_prefix(t:tasmop):boolean;
  29. function is_override(t:tasmop):boolean;
  30. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  31. Function CheckOverride(overrideop,op:tasmop): Boolean;
  32. Procedure FWaitWarning;
  33. type
  34. Tx86Operand=class(TOperand)
  35. opsize : topsize;
  36. Procedure SetSize(_size:longint;force:boolean);override;
  37. Procedure SetCorrectSize(opcode:tasmop);override;
  38. end;
  39. Tx86Instruction=class(TInstruction)
  40. OpOrder : TOperandOrder;
  41. opsize : topsize;
  42. constructor Create(optype : tcoperand);override;
  43. { Operand sizes }
  44. procedure AddReferenceSizes;
  45. procedure SetInstructionOpsize;
  46. procedure CheckOperandSizes;
  47. procedure CheckNonCommutativeOpcodes;
  48. procedure SwapOperands;
  49. { opcode adding }
  50. function ConcatInstruction(p : taasmoutput) : tai;override;
  51. end;
  52. const
  53. AsmPrefixes = 6;
  54. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  55. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
  56. );
  57. AsmOverrides = 6;
  58. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  59. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  60. );
  61. CondAsmOps=3;
  62. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  63. A_CMOVcc, A_Jcc, A_SETcc
  64. );
  65. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  66. 'CMOV','J','SET'
  67. );
  68. implementation
  69. uses
  70. globtype,globals,systems,verbose,
  71. cpuinfo,cgbase,cgutils,
  72. itcpugas,cgx86;
  73. {$define ATTOP}
  74. {$define INTELOP}
  75. {$ifdef NORA386INT}
  76. {$ifdef NOAG386NSM}
  77. {$ifdef NOAG386INT}
  78. {$undef INTELOP}
  79. {$endif}
  80. {$endif}
  81. {$endif}
  82. {$ifdef NORA386ATT}
  83. {$ifdef NOAG386ATT}
  84. {$undef ATTOP}
  85. {$endif}
  86. {$endif}
  87. {*****************************************************************************
  88. Parser Helpers
  89. *****************************************************************************}
  90. function is_prefix(t:tasmop):boolean;
  91. var
  92. i : longint;
  93. Begin
  94. is_prefix:=false;
  95. for i:=1 to AsmPrefixes do
  96. if t=AsmPrefix[i-1] then
  97. begin
  98. is_prefix:=true;
  99. exit;
  100. end;
  101. end;
  102. function is_override(t:tasmop):boolean;
  103. var
  104. i : longint;
  105. Begin
  106. is_override:=false;
  107. for i:=1 to AsmOverrides do
  108. if t=AsmOverride[i-1] then
  109. begin
  110. is_override:=true;
  111. exit;
  112. end;
  113. end;
  114. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  115. { Checks if the prefix is valid with the following opcode }
  116. { return false if not, otherwise true }
  117. Begin
  118. CheckPrefix := TRUE;
  119. (* Case prefix of
  120. A_REP,A_REPNE,A_REPE:
  121. Case opcode Of
  122. A_SCASB,A_SCASW,A_SCASD,
  123. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  124. Else
  125. Begin
  126. CheckPrefix := FALSE;
  127. exit;
  128. end;
  129. end; { case }
  130. A_LOCK:
  131. Case opcode Of
  132. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  133. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  134. Else
  135. Begin
  136. CheckPrefix := FALSE;
  137. Exit;
  138. end;
  139. end; { case }
  140. A_NONE: exit; { no prefix here }
  141. else
  142. CheckPrefix := FALSE;
  143. end; { end case } *)
  144. end;
  145. Function CheckOverride(overrideop,op:tasmop): Boolean;
  146. { Check if the override is valid, and if so then }
  147. { update the instr variable accordingly. }
  148. Begin
  149. CheckOverride := true;
  150. { Case instr.getinstruction of
  151. A_MOVS,A_XLAT,A_CMPS:
  152. Begin
  153. CheckOverride := TRUE;
  154. Message(assem_e_segment_override_not_supported);
  155. end
  156. end }
  157. end;
  158. Procedure FWaitWarning;
  159. begin
  160. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in aktmoduleswitches) then
  161. Message(asmr_w_fwait_emu_prob);
  162. end;
  163. {*****************************************************************************
  164. TX86Operand
  165. *****************************************************************************}
  166. Procedure Tx86Operand.SetSize(_size:longint;force:boolean);
  167. begin
  168. inherited SetSize(_size,force);
  169. { OS_64 will be set to S_L and be fixed later
  170. in SetCorrectSize }
  171. opsize:=TCGSize2Opsize[size];
  172. end;
  173. Procedure Tx86Operand.SetCorrectSize(opcode:tasmop);
  174. begin
  175. if gas_needsuffix[opcode]=attsufFPU then
  176. begin
  177. case size of
  178. OS_32 : opsize:=S_FS;
  179. OS_64 : opsize:=S_FL;
  180. end;
  181. end
  182. else if gas_needsuffix[opcode]=attsufFPUint then
  183. begin
  184. case size of
  185. OS_16 : opsize:=S_IS;
  186. OS_32 : opsize:=S_IL;
  187. OS_64 : opsize:=S_IQ;
  188. end;
  189. end;
  190. end;
  191. {*****************************************************************************
  192. T386Instruction
  193. *****************************************************************************}
  194. constructor Tx86Instruction.Create(optype : tcoperand);
  195. begin
  196. inherited Create(optype);
  197. Opsize:=S_NO;
  198. end;
  199. procedure Tx86Instruction.SwapOperands;
  200. begin
  201. Inherited SwapOperands;
  202. { mark the correct order }
  203. if OpOrder=op_intel then
  204. OpOrder:=op_att
  205. else
  206. OpOrder:=op_intel;
  207. end;
  208. procedure Tx86Instruction.AddReferenceSizes;
  209. { this will add the sizes for references like [esi] which do not
  210. have the size set yet, it will take only the size if the other
  211. operand is a register }
  212. var
  213. operand2,i : longint;
  214. s : tasmsymbol;
  215. so : aint;
  216. begin
  217. for i:=1 to ops do
  218. begin
  219. operands[i].SetCorrectSize(opcode);
  220. if tx86operand(operands[i]).opsize=S_NO then
  221. begin
  222. case operands[i].Opr.Typ of
  223. OPR_LOCAL,
  224. OPR_REFERENCE :
  225. begin
  226. if i=2 then
  227. operand2:=1
  228. else
  229. operand2:=2;
  230. if operand2<ops then
  231. begin
  232. { Only allow register as operand to take the size from }
  233. if operands[operand2].opr.typ=OPR_REGISTER then
  234. begin
  235. if ((opcode<>A_MOVD) and
  236. (opcode<>A_CVTSI2SS)) then
  237. tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize;
  238. end
  239. else
  240. begin
  241. { if no register then take the opsize (which is available with ATT),
  242. if not availble then give an error }
  243. if opsize<>S_NO then
  244. tx86operand(operands[i]).opsize:=opsize
  245. else
  246. begin
  247. if (m_delphi in aktmodeswitches) then
  248. Message(asmr_w_unable_to_determine_reference_size_using_dword)
  249. else
  250. Message(asmr_e_unable_to_determine_reference_size);
  251. { recovery }
  252. tx86operand(operands[i]).opsize:=S_L;
  253. end;
  254. end;
  255. end
  256. else
  257. begin
  258. if opsize<>S_NO then
  259. tx86operand(operands[i]).opsize:=opsize
  260. end;
  261. end;
  262. OPR_SYMBOL :
  263. begin
  264. { Fix lea which need a reference }
  265. if opcode=A_LEA then
  266. begin
  267. s:=operands[i].opr.symbol;
  268. so:=operands[i].opr.symofs;
  269. operands[i].opr.typ:=OPR_REFERENCE;
  270. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  271. operands[i].opr.ref.symbol:=s;
  272. operands[i].opr.ref.offset:=so;
  273. end;
  274. {$ifdef x86_64}
  275. tx86operand(operands[i]).opsize:=S_Q;
  276. {$else x86_64}
  277. tx86operand(operands[i]).opsize:=S_L;
  278. {$endif x86_64}
  279. end;
  280. end;
  281. end;
  282. end;
  283. end;
  284. procedure Tx86Instruction.SetInstructionOpsize;
  285. begin
  286. if opsize<>S_NO then
  287. exit;
  288. if (OpOrder=op_intel) then
  289. SwapOperands;
  290. case ops of
  291. 0 : ;
  292. 1 :
  293. begin
  294. { "push es" must be stored as a long PM }
  295. if ((opcode=A_PUSH) or
  296. (opcode=A_POP)) and
  297. (operands[1].opr.typ=OPR_REGISTER) and
  298. is_segment_reg(operands[1].opr.reg) then
  299. opsize:=S_L
  300. else
  301. opsize:=tx86operand(operands[1]).opsize;
  302. end;
  303. 2 :
  304. begin
  305. case opcode of
  306. A_MOVZX,A_MOVSX :
  307. begin
  308. case tx86operand(operands[1]).opsize of
  309. S_W :
  310. case tx86operand(operands[2]).opsize of
  311. S_L :
  312. opsize:=S_WL;
  313. end;
  314. S_B :
  315. case tx86operand(operands[2]).opsize of
  316. S_W :
  317. opsize:=S_BW;
  318. S_L :
  319. opsize:=S_BL;
  320. end;
  321. end;
  322. end;
  323. A_MOVD : { movd is a move from a mmx register to a
  324. 32 bit register or memory, so no opsize is correct here PM }
  325. exit;
  326. A_OUT :
  327. opsize:=tx86operand(operands[1]).opsize;
  328. else
  329. opsize:=tx86operand(operands[2]).opsize;
  330. end;
  331. end;
  332. 3 :
  333. opsize:=tx86operand(operands[3]).opsize;
  334. end;
  335. end;
  336. procedure Tx86Instruction.CheckOperandSizes;
  337. var
  338. sizeerr : boolean;
  339. i : longint;
  340. begin
  341. { Check only the most common opcodes here, the others are done in
  342. the assembler pass }
  343. case opcode of
  344. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  345. A_CMP,A_MOV,
  346. A_ADD,A_SUB,A_ADC,A_SBB,
  347. A_AND,A_OR,A_TEST,A_XOR: ;
  348. else
  349. exit;
  350. end;
  351. { Handle the BW,BL,WL separatly }
  352. sizeerr:=false;
  353. { special push/pop selector case }
  354. if ((opcode=A_PUSH) or
  355. (opcode=A_POP)) and
  356. (operands[1].opr.typ=OPR_REGISTER) and
  357. is_segment_reg(operands[1].opr.reg) then
  358. exit;
  359. if opsize in [S_BW,S_BL,S_WL] then
  360. begin
  361. if ops<>2 then
  362. sizeerr:=true
  363. else
  364. begin
  365. case opsize of
  366. S_BW :
  367. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_W);
  368. S_BL :
  369. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_L);
  370. S_WL :
  371. sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_L);
  372. end;
  373. end;
  374. end
  375. else
  376. begin
  377. for i:=1 to ops do
  378. begin
  379. if (operands[i].opr.typ<>OPR_CONSTANT) and
  380. (tx86operand(operands[i]).opsize in [S_B,S_W,S_L]) and
  381. (tx86operand(operands[i]).opsize<>opsize) then
  382. sizeerr:=true;
  383. end;
  384. end;
  385. if sizeerr then
  386. begin
  387. { if range checks are on then generate an error }
  388. if (cs_compilesystem in aktmoduleswitches) or
  389. not (cs_check_range in aktlocalswitches) then
  390. Message(asmr_w_size_suffix_and_dest_dont_match)
  391. else
  392. Message(asmr_e_size_suffix_and_dest_dont_match);
  393. end;
  394. end;
  395. { This check must be done with the operand in ATT order
  396. i.e.after swapping in the intel reader
  397. but before swapping in the NASM and TASM writers PM }
  398. procedure Tx86Instruction.CheckNonCommutativeOpcodes;
  399. begin
  400. if (OpOrder=op_intel) then
  401. SwapOperands;
  402. if (
  403. (ops=2) and
  404. (operands[1].opr.typ=OPR_REGISTER) and
  405. (operands[2].opr.typ=OPR_REGISTER) and
  406. { if the first is ST and the second is also a register
  407. it is necessarily ST1 .. ST7 }
  408. ((operands[1].opr.reg=NR_ST) or
  409. (operands[1].opr.reg=NR_ST0))
  410. ) or
  411. (ops=0) then
  412. if opcode=A_FSUBR then
  413. opcode:=A_FSUB
  414. else if opcode=A_FSUB then
  415. opcode:=A_FSUBR
  416. else if opcode=A_FDIVR then
  417. opcode:=A_FDIV
  418. else if opcode=A_FDIV then
  419. opcode:=A_FDIVR
  420. else if opcode=A_FSUBRP then
  421. opcode:=A_FSUBP
  422. else if opcode=A_FSUBP then
  423. opcode:=A_FSUBRP
  424. else if opcode=A_FDIVRP then
  425. opcode:=A_FDIVP
  426. else if opcode=A_FDIVP then
  427. opcode:=A_FDIVRP;
  428. if (
  429. (ops=1) and
  430. (operands[1].opr.typ=OPR_REGISTER) and
  431. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  432. (operands[1].opr.reg<>NR_ST) and
  433. (operands[1].opr.reg<>NR_ST0)
  434. ) then
  435. if opcode=A_FSUBRP then
  436. opcode:=A_FSUBP
  437. else if opcode=A_FSUBP then
  438. opcode:=A_FSUBRP
  439. else if opcode=A_FDIVRP then
  440. opcode:=A_FDIVP
  441. else if opcode=A_FDIVP then
  442. opcode:=A_FDIVRP;
  443. end;
  444. {*****************************************************************************
  445. opcode Adding
  446. *****************************************************************************}
  447. function Tx86Instruction.ConcatInstruction(p : taasmoutput) : tai;
  448. var
  449. siz : topsize;
  450. i,asize : longint;
  451. ai : taicpu;
  452. begin
  453. if (OpOrder=op_intel) then
  454. SwapOperands;
  455. { Get Opsize }
  456. if (opsize<>S_NO) or (Ops=0) then
  457. siz:=opsize
  458. else
  459. begin
  460. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  461. siz:=tx86operand(operands[1]).opsize
  462. else
  463. siz:=tx86operand(operands[Ops]).opsize;
  464. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  465. if (ops=2) and
  466. (tx86operand(operands[1]).opsize<>S_NO) and
  467. (tx86operand(operands[2]).opsize<>S_NO) and
  468. (tx86operand(operands[1]).opsize<>tx86operand(operands[2]).opsize) then
  469. siz:=S_NO;
  470. end;
  471. if ((opcode=A_MOVD)or
  472. (opcode=A_CVTSI2SS)) and
  473. ((tx86operand(operands[1]).opsize=S_NO) or
  474. (tx86operand(operands[2]).opsize=S_NO)) then
  475. siz:=S_NO;
  476. { NASM does not support FADD without args
  477. as alias of FADDP
  478. and GNU AS interprets FADD without operand differently
  479. for version 2.9.1 and 2.9.5 !! }
  480. if (ops=0) and
  481. ((opcode=A_FADD) or
  482. (opcode=A_FMUL) or
  483. (opcode=A_FSUB) or
  484. (opcode=A_FSUBR) or
  485. (opcode=A_FDIV) or
  486. (opcode=A_FDIVR)) then
  487. begin
  488. if opcode=A_FADD then
  489. opcode:=A_FADDP
  490. else if opcode=A_FMUL then
  491. opcode:=A_FMULP
  492. else if opcode=A_FSUB then
  493. opcode:=A_FSUBP
  494. else if opcode=A_FSUBR then
  495. opcode:=A_FSUBRP
  496. else if opcode=A_FDIV then
  497. opcode:=A_FDIVP
  498. else if opcode=A_FDIVR then
  499. opcode:=A_FDIVRP;
  500. {$ifdef ATTOP}
  501. message1(asmr_w_fadd_to_faddp,gas_op2str[opcode]);
  502. {$else}
  503. {$ifdef INTELOP}
  504. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  505. {$else}
  506. message1(asmr_w_fadd_to_faddp,'fXX');
  507. {$endif INTELOP}
  508. {$endif ATTOP}
  509. end;
  510. { GNU AS interprets FDIV without operand differently
  511. for version 2.9.1 and 2.10
  512. we add explicit args to it !! }
  513. if (ops=0) and
  514. ((opcode=A_FSUBP) or
  515. (opcode=A_FSUBRP) or
  516. (opcode=A_FDIVP) or
  517. (opcode=A_FDIVRP) or
  518. (opcode=A_FSUB) or
  519. (opcode=A_FSUBR) or
  520. (opcode=A_FADD) or
  521. (opcode=A_FADDP) or
  522. (opcode=A_FDIV) or
  523. (opcode=A_FDIVR)) then
  524. begin
  525. {$ifdef ATTOP}
  526. message1(asmr_w_adding_explicit_args_fXX,gas_op2str[opcode]);
  527. {$else}
  528. {$ifdef INTELOP}
  529. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  530. {$else}
  531. message1(asmr_w_adding_explicit_args_fXX,'fXX');
  532. {$endif INTELOP}
  533. {$endif ATTOP}
  534. ops:=2;
  535. operands[1].opr.typ:=OPR_REGISTER;
  536. operands[2].opr.typ:=OPR_REGISTER;
  537. operands[1].opr.reg:=NR_ST0;
  538. operands[2].opr.reg:=NR_ST1;
  539. end;
  540. if (ops=1) and
  541. (
  542. (operands[1].opr.typ=OPR_REGISTER) and
  543. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  544. (operands[1].opr.reg<>NR_ST) and
  545. (operands[1].opr.reg<>NR_ST0)
  546. ) and
  547. (
  548. (opcode=A_FSUBP) or
  549. (opcode=A_FSUBRP) or
  550. (opcode=A_FDIVP) or
  551. (opcode=A_FDIVRP) or
  552. (opcode=A_FADDP) or
  553. (opcode=A_FMULP)
  554. ) then
  555. begin
  556. {$ifdef ATTOP}
  557. message1(asmr_w_adding_explicit_first_arg_fXX,gas_op2str[opcode]);
  558. {$else}
  559. {$ifdef INTELOP}
  560. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  561. {$else}
  562. message1(asmr_w_adding_explicit_first_arg_fXX,'fXX');
  563. {$endif INTELOP}
  564. {$endif ATTOP}
  565. ops:=2;
  566. operands[2].opr.typ:=OPR_REGISTER;
  567. operands[2].opr.reg:=operands[1].opr.reg;
  568. operands[1].opr.reg:=NR_ST0;
  569. end;
  570. if (ops=1) and
  571. (
  572. (operands[1].opr.typ=OPR_REGISTER) and
  573. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  574. (operands[1].opr.reg<>NR_ST) and
  575. (operands[1].opr.reg<>NR_ST0)
  576. ) and
  577. (
  578. (opcode=A_FSUB) or
  579. (opcode=A_FSUBR) or
  580. (opcode=A_FDIV) or
  581. (opcode=A_FDIVR) or
  582. (opcode=A_FADD) or
  583. (opcode=A_FMUL)
  584. ) then
  585. begin
  586. {$ifdef ATTOP}
  587. message1(asmr_w_adding_explicit_second_arg_fXX,gas_op2str[opcode]);
  588. {$else}
  589. {$ifdef INTELOP}
  590. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  591. {$else}
  592. message1(asmr_w_adding_explicit_second_arg_fXX,'fXX');
  593. {$endif INTELOP}
  594. {$endif ATTOP}
  595. ops:=2;
  596. operands[2].opr.typ:=OPR_REGISTER;
  597. operands[2].opr.reg:=NR_ST0;
  598. end;
  599. { I tried to convince Linus Torvalds to add
  600. code to support ENTER instruction
  601. (when raising a stack page fault)
  602. but he replied that ENTER is a bad instruction and
  603. Linux does not need to support it
  604. So I think its at least a good idea to add a warning
  605. if someone uses this in assembler code
  606. FPC itself does not use it at all PM }
  607. if (opcode=A_ENTER) and
  608. (target_info.system in [system_i386_linux,system_i386_FreeBSD]) then
  609. Message(asmr_w_enter_not_supported_by_linux);
  610. ai:=taicpu.op_none(opcode,siz);
  611. ai.SetOperandOrder(OpOrder);
  612. ai.Ops:=Ops;
  613. ai.Allocate_oper(Ops);
  614. for i:=1 to Ops do
  615. begin
  616. case operands[i].opr.typ of
  617. OPR_CONSTANT :
  618. ai.loadconst(i-1,operands[i].opr.val);
  619. OPR_REGISTER:
  620. ai.loadreg(i-1,operands[i].opr.reg);
  621. OPR_SYMBOL:
  622. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  623. OPR_LOCAL :
  624. with operands[i].opr do
  625. ai.loadlocal(i-1,localsym,localsymofs,localindexreg,
  626. localscale,localgetoffset,localforceref);
  627. OPR_REFERENCE:
  628. begin
  629. ai.loadref(i-1,operands[i].opr.ref);
  630. if operands[i].size<>OS_NO then
  631. begin
  632. asize:=0;
  633. case operands[i].size of
  634. OS_8,OS_S8 :
  635. asize:=OT_BITS8;
  636. OS_16,OS_S16 :
  637. asize:=OT_BITS16;
  638. OS_32,OS_S32,OS_F32 :
  639. asize:=OT_BITS32;
  640. OS_64,OS_S64:
  641. begin
  642. { Only FPU operations know about 64bit values, for all
  643. integer operations it is seen as 32bit }
  644. if gas_needsuffix[opcode] in [attsufFPU,attsufFPUint] then
  645. asize:=OT_BITS64
  646. else
  647. asize:=OT_BITS32;
  648. end;
  649. OS_F64,OS_C64 :
  650. asize:=OT_BITS64;
  651. OS_F80 :
  652. asize:=OT_BITS80;
  653. end;
  654. if asize<>0 then
  655. ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
  656. end;
  657. end;
  658. end;
  659. end;
  660. if (opcode=A_CALL) and (opsize=S_FAR) then
  661. opcode:=A_LCALL;
  662. if (opcode=A_JMP) and (opsize=S_FAR) then
  663. opcode:=A_LJMP;
  664. if (opcode=A_LCALL) or (opcode=A_LJMP) then
  665. opsize:=S_FAR;
  666. { Condition ? }
  667. if condition<>C_None then
  668. ai.SetCondition(condition);
  669. { Concat the opcode or give an error }
  670. if assigned(ai) then
  671. begin
  672. { Check the instruction if it's valid }
  673. {$ifndef NOAG386BIN}
  674. {$ifndef x86_64}
  675. ai.CheckIfValid;
  676. {$endif x86_64}
  677. {$endif NOAG386BIN}
  678. p.concat(ai);
  679. end
  680. else
  681. Message(asmr_e_invalid_opcode_and_operand);
  682. result:=ai;
  683. end;
  684. end.
  685. {
  686. $Log$
  687. Revision 1.21 2005-01-31 17:07:50 peter
  688. * fix [regpara] in intel assembler
  689. Revision 1.20 2004/10/31 21:45:04 peter
  690. * generic tlocation
  691. * move tlocation to cgutils
  692. Revision 1.19 2004/06/20 08:55:32 florian
  693. * logs truncated
  694. Revision 1.18 2004/06/16 20:07:11 florian
  695. * dwarf branch merged
  696. Revision 1.17.2.3 2004/05/01 23:36:47 peter
  697. * assembler reader 64bit fixes
  698. Revision 1.17.2.2 2004/05/01 16:02:10 peter
  699. * POINTER_SIZE replaced with sizeof(aint)
  700. * aint,aword,tconst*int moved to globtype
  701. Revision 1.17.2.1 2004/04/27 18:18:26 peter
  702. * aword -> aint
  703. Revision 1.17 2004/01/22 16:29:11 peter
  704. * give warning that DWORD is used as size in delphi mode when no
  705. size was specified
  706. }