ncgmem.pas 47 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cpuinfo,cpubase,
  23. node,nmem;
  24. type
  25. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  26. procedure pass_generate_code;override;
  27. end;
  28. tcgloadparentfpnode = class(tloadparentfpnode)
  29. procedure pass_generate_code;override;
  30. end;
  31. tcgaddrnode = class(taddrnode)
  32. procedure pass_generate_code;override;
  33. end;
  34. tcgderefnode = class(tderefnode)
  35. procedure pass_generate_code;override;
  36. end;
  37. tcgsubscriptnode = class(tsubscriptnode)
  38. procedure pass_generate_code;override;
  39. end;
  40. tcgwithnode = class(twithnode)
  41. procedure pass_generate_code;override;
  42. end;
  43. tcgvecnode = class(tvecnode)
  44. function get_mul_size : aint;
  45. private
  46. procedure rangecheck_array;
  47. procedure rangecheck_string;
  48. protected
  49. {# This routine is used to calculate the address of the reference.
  50. On entry reg contains the index in the array,
  51. and l contains the size of each element in the array.
  52. This routine should update location.reference correctly,
  53. so it points to the correct address.
  54. }
  55. procedure update_reference_reg_mul(maybe_const_reg:tregister;l:aint);virtual;
  56. procedure update_reference_reg_packed(maybe_const_reg:tregister;l:aint);virtual;
  57. procedure second_wideansistring;virtual;
  58. procedure second_dynamicarray;virtual;
  59. public
  60. procedure pass_generate_code;override;
  61. end;
  62. implementation
  63. uses
  64. systems,
  65. cutils,cclasses,verbose,globals,constexp,
  66. symconst,symbase,symtype,symdef,symsym,symtable,defutil,paramgr,
  67. aasmbase,aasmtai,aasmdata,
  68. procinfo,pass_2,parabase,
  69. pass_1,nld,ncon,nadd,ncnv,nutils,
  70. cgutils,cgobj,hlcgobj,
  71. tgobj,ncgutil,objcgutl,
  72. defcmp
  73. ;
  74. {*****************************************************************************
  75. TCGLOADVMTADDRNODE
  76. *****************************************************************************}
  77. procedure tcgloadvmtaddrnode.pass_generate_code;
  78. var
  79. href : treference;
  80. pool : THashSet;
  81. entry : PHashSetItem;
  82. begin
  83. location_reset(location,LOC_REGISTER,OS_ADDR);
  84. if (left.nodetype=typen) then
  85. begin
  86. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  87. if not is_objcclass(left.resultdef) then
  88. begin
  89. reference_reset_symbol(href,
  90. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  91. sizeof(pint));
  92. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,location.register);
  93. end
  94. else
  95. begin
  96. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  97. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  98. if (target_info.system in systems_objc_nfabi) then
  99. begin
  100. { find/add necessary classref/classname pool entries }
  101. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  102. end
  103. else
  104. begin
  105. { find/add necessary classref/classname pool entries }
  106. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  107. end;
  108. reference_reset_symbol(href,tasmlabel(entry^.Data),0,sizeof(pint));
  109. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  110. end;
  111. end
  112. else
  113. begin
  114. { left contains self, load vmt from self }
  115. secondpass(left);
  116. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  117. end;
  118. end;
  119. {*****************************************************************************
  120. TCGLOADPARENTFPNODE
  121. *****************************************************************************}
  122. procedure tcgloadparentfpnode.pass_generate_code;
  123. var
  124. currpi : tprocinfo;
  125. hsym : tparavarsym;
  126. href : treference;
  127. begin
  128. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  129. begin
  130. location_reset(location,LOC_REGISTER,OS_ADDR);
  131. location.register:=current_procinfo.framepointer;
  132. end
  133. else
  134. begin
  135. currpi:=current_procinfo;
  136. location_reset(location,LOC_REGISTER,OS_ADDR);
  137. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  138. { load framepointer of current proc }
  139. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  140. if not assigned(hsym) then
  141. internalerror(200309281);
  142. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,hsym.localloc,location.register);
  143. { walk parents }
  144. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  145. begin
  146. currpi:=currpi.parent;
  147. if not assigned(currpi) then
  148. internalerror(200311201);
  149. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  150. if not assigned(hsym) then
  151. internalerror(200309282);
  152. if hsym.localloc.loc<>LOC_REFERENCE then
  153. internalerror(200309283);
  154. reference_reset_base(href,location.register,hsym.localloc.reference.offset,sizeof(pint));
  155. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  156. end;
  157. end;
  158. end;
  159. {*****************************************************************************
  160. TCGADDRNODE
  161. *****************************************************************************}
  162. procedure tcgaddrnode.pass_generate_code;
  163. begin
  164. secondpass(left);
  165. location_reset(location,LOC_REGISTER,OS_ADDR);
  166. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  167. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  168. { on x86_64-win64, array of chars can be returned in registers, however,
  169. when passing these arrays to other functions, the compiler wants to take
  170. the address of the array so when the addrnode has been created internally,
  171. we have to force the data into memory, see also tw14388.pp
  172. }
  173. if nf_internal in flags then
  174. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  175. else
  176. internalerror(2006111510);
  177. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
  178. end;
  179. {*****************************************************************************
  180. TCGDEREFNODE
  181. *****************************************************************************}
  182. procedure tcgderefnode.pass_generate_code;
  183. var
  184. paraloc1 : tcgpara;
  185. pd : tprocdef;
  186. sym : tsym;
  187. st : tsymtable;
  188. hp : pnode;
  189. hp2 : tnode;
  190. extraoffset : tcgint;
  191. begin
  192. sym:=nil;
  193. { assume natural alignment, except for packed records }
  194. if not(resultdef.typ in [recorddef,objectdef]) or
  195. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  196. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  197. else
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  199. { can we fold an add/sub node into the offset of the deref node? }
  200. extraoffset:=0;
  201. hp:=actualtargetnode(@left);
  202. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  203. begin
  204. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  205. replacenode(hp^,taddnode(hp^).left);
  206. end
  207. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  208. begin
  209. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  210. replacenode(hp^,taddnode(hp^).left);
  211. end
  212. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  213. begin
  214. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  215. replacenode(hp^,taddnode(hp^).right);
  216. end;
  217. secondpass(left);
  218. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  219. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  220. case left.location.loc of
  221. LOC_CREGISTER,
  222. LOC_REGISTER:
  223. begin
  224. maybechangeloadnodereg(current_asmdata.CurrAsmList,left,true);
  225. {$ifdef cpu_uses_separate_address_registers}
  226. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  227. begin
  228. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  229. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  230. location.reference.base);
  231. end
  232. else
  233. {$endif}
  234. location.reference.base := left.location.register;
  235. end;
  236. LOC_CREFERENCE,
  237. LOC_REFERENCE:
  238. begin
  239. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  240. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  241. end;
  242. LOC_CONSTANT:
  243. begin
  244. location.reference.offset:=left.location.value;
  245. end;
  246. else
  247. internalerror(200507031);
  248. end;
  249. location.reference.offset:=location.reference.offset+extraoffset;
  250. if (cs_use_heaptrc in current_settings.globalswitches) and
  251. (cs_checkpointer in current_settings.localswitches) and
  252. not(cs_compilesystem in current_settings.moduleswitches) and
  253. {$ifdef x86}
  254. (tpointerdef(left.resultdef).x86pointertyp = default_x86_data_pointer_type) and
  255. {$endif x86}
  256. not(nf_no_checkpointer in flags) and
  257. { can be NR_NO in case of LOC_CONSTANT }
  258. (location.reference.base<>NR_NO) then
  259. begin
  260. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  261. (sym.typ<>procsym) then
  262. internalerror(2012010601);
  263. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  264. paraloc1.init;
  265. paramanager.getintparaloc(pd,1,paraloc1);
  266. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,resultdef,location.reference.base,paraloc1);
  267. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  268. paraloc1.done;
  269. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  270. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  271. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  272. end;
  273. end;
  274. {*****************************************************************************
  275. TCGSUBSCRIPTNODE
  276. *****************************************************************************}
  277. procedure tcgsubscriptnode.pass_generate_code;
  278. var
  279. asmsym: tasmsymbol;
  280. paraloc1 : tcgpara;
  281. tmpref: treference;
  282. sref: tsubsetreference;
  283. offsetcorrection : aint;
  284. pd : tprocdef;
  285. sym : tsym;
  286. st : tsymtable;
  287. begin
  288. sym:=nil;
  289. secondpass(left);
  290. if codegenerror then
  291. exit;
  292. paraloc1.init;
  293. { several object types must be dereferenced implicitly }
  294. if is_implicit_pointer_object_type(left.resultdef) then
  295. begin
  296. if (not is_managed_type(left.resultdef)) or
  297. (target_info.system in systems_garbage_collected_managed_types) then
  298. begin
  299. { the contents of a class are aligned to a sizeof(pointer) }
  300. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),sizeof(pint));
  301. case left.location.loc of
  302. LOC_CREGISTER,
  303. LOC_REGISTER:
  304. begin
  305. {$ifdef cpu_uses_separate_address_registers}
  306. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  307. begin
  308. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  309. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  310. left.location.register,location.reference.base);
  311. end
  312. else
  313. {$endif}
  314. location.reference.base := left.location.register;
  315. end;
  316. LOC_CREFERENCE,
  317. LOC_REFERENCE,
  318. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  319. LOC_SUBSETREG,
  320. LOC_CSUBSETREG,
  321. LOC_SUBSETREF,
  322. LOC_CSUBSETREF:
  323. begin
  324. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  325. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  326. end;
  327. LOC_CONSTANT:
  328. begin
  329. { can happen with @classtype(pointerconst).field }
  330. location.reference.offset:=left.location.value;
  331. end;
  332. else
  333. internalerror(2009092401);
  334. end;
  335. { implicit deferencing }
  336. if (cs_use_heaptrc in current_settings.globalswitches) and
  337. (cs_checkpointer in current_settings.localswitches) and
  338. not(cs_compilesystem in current_settings.moduleswitches) then
  339. begin
  340. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  341. (sym.typ<>procsym) then
  342. internalerror(2012010602);
  343. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  344. paramanager.getintparaloc(pd,1,paraloc1);
  345. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,resultdef,location.reference.base,paraloc1);
  346. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  347. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  348. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  349. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  350. end;
  351. end
  352. else
  353. { reference-counted implicit pointer object types don't have
  354. fields -> cannot be subscripted (calls are handled via call
  355. nodes) }
  356. internalerror(2011011901);
  357. end
  358. else
  359. begin
  360. location_copy(location,left.location);
  361. { some abi's require that functions return (some) records in }
  362. { registers }
  363. case location.loc of
  364. LOC_REFERENCE,
  365. LOC_CREFERENCE:
  366. ;
  367. LOC_CONSTANT,
  368. LOC_REGISTER,
  369. LOC_CREGISTER,
  370. LOC_MMREGISTER,
  371. LOC_FPUREGISTER:
  372. begin
  373. { in case the result is not something that can be put
  374. into an integer register (e.g.
  375. function_returning_record().non_regable_field, or
  376. a function returning a value > sizeof(intreg))
  377. -> force to memory
  378. }
  379. if not tstoreddef(left.resultdef).is_intregable or
  380. not tstoreddef(resultdef).is_intregable or
  381. { if the field spans multiple registers, we must force the record into
  382. memory as well }
  383. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  384. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  385. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER]) then
  386. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  387. else
  388. begin
  389. if (left.location.loc = LOC_REGISTER) then
  390. location.loc := LOC_SUBSETREG
  391. else
  392. location.loc := LOC_CSUBSETREG;
  393. location.size:=def_cgsize(resultdef);
  394. offsetcorrection:=0;
  395. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  396. begin
  397. if (vs.fieldoffset>=sizeof(aword)) then
  398. begin
  399. location.sreg.subsetreg := left.location.registerhi;
  400. offsetcorrection:=sizeof(aword)*8;
  401. end
  402. else
  403. location.sreg.subsetreg := left.location.register;
  404. location.sreg.subsetregsize := OS_INT;
  405. end
  406. else
  407. begin
  408. location.sreg.subsetreg := left.location.register;
  409. location.sreg.subsetregsize := left.location.size;
  410. end;
  411. if not is_packed_record_or_object(left.resultdef) then
  412. begin
  413. if (target_info.endian = ENDIAN_BIG) then
  414. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  415. else
  416. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  417. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  418. end
  419. else
  420. begin
  421. location.sreg.bitlen := resultdef.packedbitsize;
  422. if (target_info.endian = ENDIAN_BIG) then
  423. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  424. else
  425. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  426. end;
  427. end;
  428. end;
  429. LOC_SUBSETREG,
  430. LOC_CSUBSETREG:
  431. begin
  432. location.size:=def_cgsize(resultdef);
  433. if not is_packed_record_or_object(left.resultdef) then
  434. begin
  435. if (target_info.endian = ENDIAN_BIG) then
  436. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  437. else
  438. inc(location.sreg.startbit, vs.fieldoffset * 8);
  439. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  440. end
  441. else
  442. begin
  443. location.sreg.bitlen := resultdef.packedbitsize;
  444. if (target_info.endian = ENDIAN_BIG) then
  445. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  446. else
  447. inc(location.sreg.startbit, vs.fieldoffset);
  448. end;
  449. end;
  450. else
  451. internalerror(2006031901);
  452. end;
  453. end;
  454. if is_objc_class_or_protocol(left.resultdef) and
  455. (target_info.system in systems_objc_nfabi) then
  456. begin
  457. if (location.loc<>LOC_REFERENCE) or
  458. (location.reference.index<>NR_NO) then
  459. internalerror(2009092402);
  460. { the actual field offset is stored in memory (to solve the
  461. "fragile base class" problem: this way the layout of base
  462. classes can be changed without breaking programs compiled against
  463. earlier versions)
  464. }
  465. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  466. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  467. location.reference.index:=cg.getaddressregister(current_asmdata.CurrAsmList);
  468. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpref,location.reference.index);
  469. { always packrecords C -> natural alignment }
  470. location.reference.alignment:=vs.vardef.alignment;
  471. end
  472. else if is_java_class_or_interface(left.resultdef) or
  473. ((target_info.system in systems_jvm) and
  474. (left.resultdef.typ=recorddef)) then
  475. begin
  476. if (location.loc<>LOC_REFERENCE) or
  477. (location.reference.index<>NR_NO) or
  478. assigned(location.reference.symbol) then
  479. internalerror(2011011301);
  480. location.reference.symbol:=current_asmdata.RefAsmSymbol(vs.mangledname);
  481. end
  482. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  483. begin
  484. if not is_packed_record_or_object(left.resultdef) then
  485. begin
  486. inc(location.reference.offset,vs.fieldoffset);
  487. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  488. end
  489. else if (vs.fieldoffset mod 8 = 0) and
  490. (resultdef.packedbitsize mod 8 = 0) and
  491. { is different in case of e.g. packenum 2 and an enum }
  492. { which fits in 8 bits }
  493. (resultdef.size*8 = resultdef.packedbitsize) then
  494. begin
  495. inc(location.reference.offset,vs.fieldoffset div 8);
  496. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  497. end
  498. else
  499. begin
  500. sref.ref:=location.reference;
  501. sref.ref.alignment:=1;
  502. sref.bitindexreg:=NR_NO;
  503. inc(sref.ref.offset,vs.fieldoffset div 8);
  504. sref.startbit:=vs.fieldoffset mod 8;
  505. sref.bitlen:=resultdef.packedbitsize;
  506. if (left.location.loc=LOC_REFERENCE) then
  507. location.loc:=LOC_SUBSETREF
  508. else
  509. location.loc:=LOC_CSUBSETREF;
  510. location.sref:=sref;
  511. end;
  512. { also update the size of the location }
  513. location.size:=def_cgsize(resultdef);
  514. end;
  515. paraloc1.done;
  516. end;
  517. {*****************************************************************************
  518. TCGWITHNODE
  519. *****************************************************************************}
  520. procedure tcgwithnode.pass_generate_code;
  521. begin
  522. location_reset(location,LOC_VOID,OS_NO);
  523. if assigned(left) then
  524. secondpass(left);
  525. end;
  526. {*****************************************************************************
  527. TCGVECNODE
  528. *****************************************************************************}
  529. function tcgvecnode.get_mul_size : aint;
  530. begin
  531. if nf_memindex in flags then
  532. get_mul_size:=1
  533. else
  534. begin
  535. if (left.resultdef.typ=arraydef) then
  536. if not is_packed_array(left.resultdef) then
  537. get_mul_size:=tarraydef(left.resultdef).elesize
  538. else
  539. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  540. else
  541. get_mul_size:=resultdef.size;
  542. end
  543. end;
  544. { this routine must, like any other routine, not change the contents }
  545. { of base/index registers of references, as these may be regvars. }
  546. { The register allocator can coalesce one LOC_REGISTER being moved }
  547. { into another (as their live ranges won't overlap), but not a }
  548. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  549. { the live range of the LOC_CREGISTER will most likely overlap the }
  550. { the live range of the target LOC_(C)REGISTER) }
  551. { The passed register may be a LOC_CREGISTER as well. }
  552. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg:tregister;l:aint);
  553. var
  554. hreg: tregister;
  555. begin
  556. if l<>1 then
  557. begin
  558. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  559. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  560. maybe_const_reg:=hreg;
  561. end;
  562. if location.reference.base=NR_NO then
  563. location.reference.base:=maybe_const_reg
  564. else if location.reference.index=NR_NO then
  565. location.reference.index:=maybe_const_reg
  566. else
  567. begin
  568. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  569. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  570. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  571. { insert new index register }
  572. location.reference.index:=maybe_const_reg;
  573. end;
  574. { update alignment }
  575. if (location.reference.alignment=0) then
  576. internalerror(2009020704);
  577. location.reference.alignment:=newalignment(location.reference.alignment,l);
  578. end;
  579. { see remarks for tcgvecnode.update_reference_reg_mul above }
  580. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg:tregister;l:aint);
  581. var
  582. sref: tsubsetreference;
  583. offsetreg, hreg: tregister;
  584. alignpower: aint;
  585. temp : longint;
  586. begin
  587. { only orddefs are bitpacked. Even then we only need special code in }
  588. { case the bitpacked *byte size* is not a power of two, otherwise }
  589. { everything can be handled using the the regular array code. }
  590. if ((l mod 8) = 0) and
  591. (ispowerof2(l div 8,temp) or
  592. not is_ordinal(resultdef)
  593. {$ifndef cpu64bitalu}
  594. or is_64bitint(resultdef)
  595. {$endif not cpu64bitalu}
  596. ) then
  597. begin
  598. update_reference_reg_mul(maybe_const_reg,l div 8);
  599. exit;
  600. end;
  601. if (l > 8*sizeof(aint)) then
  602. internalerror(200608051);
  603. sref.ref := location.reference;
  604. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  605. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  606. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  607. { keep alignment for index }
  608. sref.ref.alignment := left.resultdef.alignment;
  609. if not ispowerof2(sref.ref.alignment,temp) then
  610. internalerror(2006081201);
  611. alignpower:=temp;
  612. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  613. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  614. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  615. if (sref.ref.base = NR_NO) then
  616. sref.ref.base := offsetreg
  617. else if (sref.ref.index = NR_NO) then
  618. sref.ref.index := offsetreg
  619. else
  620. begin
  621. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  622. sref.ref.base := offsetreg;
  623. end;
  624. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  625. sref.bitindexreg := hreg;
  626. sref.startbit := 0;
  627. sref.bitlen := resultdef.packedbitsize;
  628. if (left.location.loc = LOC_REFERENCE) then
  629. location.loc := LOC_SUBSETREF
  630. else
  631. location.loc := LOC_CSUBSETREF;
  632. location.sref := sref;
  633. end;
  634. procedure tcgvecnode.second_wideansistring;
  635. begin
  636. end;
  637. procedure tcgvecnode.second_dynamicarray;
  638. begin
  639. end;
  640. procedure tcgvecnode.rangecheck_array;
  641. var
  642. hightree : tnode;
  643. poslabel,
  644. neglabel : tasmlabel;
  645. hreg : tregister;
  646. paraloc1,paraloc2 : tcgpara;
  647. pd : tprocdef;
  648. begin
  649. { omit range checking when this is an array access to a pointer which has been
  650. typecasted from an array }
  651. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  652. exit;
  653. paraloc1.init;
  654. paraloc2.init;
  655. if is_open_array(left.resultdef) or
  656. is_array_of_const(left.resultdef) then
  657. begin
  658. { cdecl functions don't have high() so we can not check the range }
  659. { (can't use current_procdef, since it may be a nested procedure) }
  660. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(left).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  661. begin
  662. { Get high value }
  663. hightree:=load_high_value_node(tparavarsym(tloadnode(left).symtableentry));
  664. { it must be available }
  665. if not assigned(hightree) then
  666. internalerror(200212201);
  667. firstpass(hightree);
  668. secondpass(hightree);
  669. { generate compares }
  670. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  671. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  672. else
  673. begin
  674. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  675. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  676. end;
  677. current_asmdata.getjumplabel(neglabel);
  678. current_asmdata.getjumplabel(poslabel);
  679. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  680. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  681. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  682. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  683. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  684. { release hightree }
  685. hightree.free;
  686. end;
  687. end
  688. else
  689. if is_dynamic_array(left.resultdef) then
  690. begin
  691. pd:=search_system_proc('fpc_dynarray_rangecheck');
  692. paramanager.getintparaloc(pd,1,paraloc1);
  693. paramanager.getintparaloc(pd,2,paraloc2);
  694. if pd.is_pushleftright then
  695. begin
  696. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  697. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  698. end
  699. else
  700. begin
  701. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  702. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  703. end;
  704. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  705. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  706. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  707. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  708. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  709. end;
  710. { for regular arrays, we don't have to do anything because the index has been
  711. type converted to the index type, which already inserted a range check if
  712. necessary }
  713. paraloc1.done;
  714. paraloc2.done;
  715. end;
  716. procedure tcgvecnode.rangecheck_string;
  717. var
  718. paraloc1,
  719. paraloc2: tcgpara;
  720. helpername: TIDString;
  721. pd: tprocdef;
  722. begin
  723. paraloc1.init;
  724. paraloc2.init;
  725. case tstringdef(left.resultdef).stringtype of
  726. { it's the same for ansi- and wide strings }
  727. st_unicodestring,
  728. st_widestring,
  729. st_ansistring:
  730. begin
  731. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  732. pd:=search_system_proc(helpername);
  733. paramanager.getintparaloc(pd,1,paraloc1);
  734. paramanager.getintparaloc(pd,2,paraloc2);
  735. if pd.is_pushleftright then
  736. begin
  737. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  738. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  739. end
  740. else
  741. begin
  742. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  743. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  744. end;
  745. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  746. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  747. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  748. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  749. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  750. end;
  751. st_shortstring:
  752. begin
  753. {!!!!!!!!!!!!!!!!!}
  754. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  755. end;
  756. st_longstring:
  757. begin
  758. {!!!!!!!!!!!!!!!!!}
  759. end;
  760. end;
  761. paraloc1.done;
  762. paraloc2.done;
  763. end;
  764. procedure tcgvecnode.pass_generate_code;
  765. var
  766. offsetdec,
  767. extraoffset : aint;
  768. rightp : pnode;
  769. otl,ofl : tasmlabel;
  770. newsize : tcgsize;
  771. mulsize,
  772. bytemulsize,
  773. alignpow : aint;
  774. isjump : boolean;
  775. paraloc1,
  776. paraloc2 : tcgpara;
  777. subsetref : tsubsetreference;
  778. temp : longint;
  779. begin
  780. paraloc1.init;
  781. paraloc2.init;
  782. mulsize:=get_mul_size;
  783. if not is_packed_array(left.resultdef) then
  784. bytemulsize:=mulsize
  785. else
  786. bytemulsize:=mulsize div 8;
  787. newsize:=def_cgsize(resultdef);
  788. secondpass(left);
  789. if left.location.loc=LOC_CREFERENCE then
  790. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  791. else
  792. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  793. { an ansistring needs to be dereferenced }
  794. if is_ansistring(left.resultdef) or
  795. is_wide_or_unicode_string(left.resultdef) then
  796. begin
  797. if nf_callunique in flags then
  798. internalerror(200304236);
  799. {DM!!!!!}
  800. case left.location.loc of
  801. LOC_REGISTER,
  802. LOC_CREGISTER :
  803. begin
  804. {$ifdef m68k}
  805. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  806. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  807. {$else m68k}
  808. location.reference.base:=left.location.register;
  809. {$endif m68k}
  810. end;
  811. LOC_CREFERENCE,
  812. LOC_REFERENCE :
  813. begin
  814. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  815. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.reference,location.reference.base);
  816. end;
  817. else
  818. internalerror(2002032218);
  819. end;
  820. if is_ansistring(left.resultdef) then
  821. offsetdec:=1
  822. else
  823. offsetdec:=2;
  824. location.reference.alignment:=offsetdec;
  825. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  826. if not(cs_zerobasedstrings in current_settings.localswitches) then
  827. dec(location.reference.offset,offsetdec);
  828. end
  829. else if is_dynamic_array(left.resultdef) then
  830. begin
  831. case left.location.loc of
  832. LOC_REGISTER,
  833. LOC_CREGISTER :
  834. location.reference.base:=left.location.register;
  835. LOC_REFERENCE,
  836. LOC_CREFERENCE :
  837. begin
  838. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  839. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,
  840. left.location.reference,location.reference.base);
  841. end;
  842. else
  843. internalerror(2002032219);
  844. end;
  845. { a dynarray points to the start of a memory block, which
  846. we assume to be always aligned to a multiple of the
  847. pointer size
  848. }
  849. location.reference.alignment:=sizeof(pint);
  850. end
  851. else
  852. begin
  853. { may happen in case of function results }
  854. case left.location.loc of
  855. LOC_CREGISTER,
  856. LOC_CMMREGISTER,
  857. LOC_REGISTER,
  858. LOC_MMREGISTER:
  859. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  860. end;
  861. location_copy(location,left.location);
  862. end;
  863. { location must be memory }
  864. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  865. internalerror(200411013);
  866. { offset can only differ from 0 if arraydef }
  867. if (left.resultdef.typ=arraydef) and
  868. not(is_dynamic_array(left.resultdef)) and
  869. (not(is_packed_array(left.resultdef)) or
  870. ((mulsize mod 8 = 0) and
  871. ispowerof2(mulsize div 8,temp)) or
  872. { only orddefs are bitpacked }
  873. not is_ordinal(resultdef)
  874. {$ifndef cpu64bitalu}
  875. or is_64bitint(resultdef)
  876. {$endif not cpu64bitalu}
  877. ) then
  878. dec(location.reference.offset,bytemulsize*tarraydef(left.resultdef).lowrange);
  879. if right.nodetype=ordconstn then
  880. begin
  881. { offset can only differ from 0 if arraydef }
  882. if cs_check_range in current_settings.localswitches then
  883. begin
  884. secondpass(right);
  885. case left.resultdef.typ of
  886. arraydef :
  887. rangecheck_array;
  888. stringdef :
  889. rangecheck_string;
  890. end;
  891. end;
  892. if not(is_packed_array(left.resultdef)) or
  893. ((mulsize mod 8 = 0) and
  894. (ispowerof2(mulsize div 8,temp) or
  895. { only orddefs are bitpacked }
  896. not is_ordinal(resultdef))) then
  897. begin
  898. extraoffset:=bytemulsize*tordconstnode(right).value.svalue;
  899. inc(location.reference.offset,extraoffset);
  900. { adjust alignment after to this change }
  901. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset);
  902. { don't do this for floats etc.; needed to properly set the }
  903. { size for bitpacked arrays (e.g. a bitpacked array of }
  904. { enums who are size 2 but fit in one byte -> in the array }
  905. { they will be one byte and have to be stored like that) }
  906. if is_packed_array(left.resultdef) and
  907. (tcgsize2size[newsize] <> bytemulsize) then
  908. newsize:=int_cgsize(bytemulsize);
  909. end
  910. else
  911. begin
  912. subsetref.ref := location.reference;
  913. subsetref.ref.alignment := left.resultdef.alignment;
  914. if not ispowerof2(subsetref.ref.alignment,temp) then
  915. internalerror(2006081212);
  916. alignpow:=temp;
  917. inc(subsetref.ref.offset,((mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow)) shl alignpow);
  918. subsetref.bitindexreg := NR_NO;
  919. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  920. subsetref.bitlen := resultdef.packedbitsize;
  921. if (left.location.loc = LOC_REFERENCE) then
  922. location.loc := LOC_SUBSETREF
  923. else
  924. location.loc := LOC_CSUBSETREF;
  925. location.sref := subsetref;
  926. end;
  927. end
  928. else
  929. { not nodetype=ordconstn }
  930. begin
  931. if (cs_opt_level1 in current_settings.optimizerswitches) and
  932. { if we do range checking, we don't }
  933. { need that fancy code (it would be }
  934. { buggy) }
  935. not(cs_check_range in current_settings.localswitches) and
  936. (left.resultdef.typ=arraydef) and
  937. not is_packed_array(left.resultdef) then
  938. begin
  939. extraoffset:=0;
  940. rightp:=actualtargetnode(@right);
  941. if rightp^.nodetype=addn then
  942. begin
  943. if taddnode(rightp^).right.nodetype=ordconstn then
  944. begin
  945. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  946. replacenode(rightp^,taddnode(rightp^).left);
  947. end
  948. else if taddnode(rightp^).left.nodetype=ordconstn then
  949. begin
  950. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  951. replacenode(rightp^,taddnode(rightp^).right);
  952. end;
  953. end
  954. else if rightp^.nodetype=subn then
  955. begin
  956. if taddnode(rightp^).right.nodetype=ordconstn then
  957. begin
  958. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  959. replacenode(rightp^,taddnode(rightp^).left);
  960. end;
  961. end;
  962. inc(location.reference.offset,
  963. mulsize*extraoffset);
  964. end;
  965. { calculate from left to right }
  966. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  967. internalerror(200304237);
  968. isjump:=(right.expectloc=LOC_JUMP);
  969. otl:=nil;
  970. ofl:=nil;
  971. if isjump then
  972. begin
  973. otl:=current_procinfo.CurrTrueLabel;
  974. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  975. ofl:=current_procinfo.CurrFalseLabel;
  976. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  977. end;
  978. secondpass(right);
  979. { if mulsize = 1, we won't have to modify the index }
  980. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or (right.location.size<>OS_ADDR) then
  981. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  982. if isjump then
  983. begin
  984. current_procinfo.CurrTrueLabel:=otl;
  985. current_procinfo.CurrFalseLabel:=ofl;
  986. end
  987. else if (right.location.loc = LOC_JUMP) then
  988. internalerror(2006010801);
  989. { produce possible range check code: }
  990. if cs_check_range in current_settings.localswitches then
  991. begin
  992. if left.resultdef.typ=arraydef then
  993. rangecheck_array
  994. else if (left.resultdef.typ=stringdef) then
  995. rangecheck_string;
  996. end;
  997. { insert the register and the multiplication factor in the
  998. reference }
  999. if not is_packed_array(left.resultdef) then
  1000. update_reference_reg_mul(right.location.register,mulsize)
  1001. else
  1002. update_reference_reg_packed(right.location.register,mulsize);
  1003. end;
  1004. location.size:=newsize;
  1005. paraloc1.done;
  1006. paraloc2.done;
  1007. end;
  1008. begin
  1009. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1010. cloadparentfpnode:=tcgloadparentfpnode;
  1011. caddrnode:=tcgaddrnode;
  1012. cderefnode:=tcgderefnode;
  1013. csubscriptnode:=tcgsubscriptnode;
  1014. cwithnode:=tcgwithnode;
  1015. cvecnode:=tcgvecnode;
  1016. end.