m68k.inc 17 KB

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  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 1999-2000 by Carl-Eric Codere,
  4. member of the Free Pascal development team.
  5. See the file COPYING.FPC, included in this distribution,
  6. for details about the copyright.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  10. **********************************************************************}
  11. {****************************************************************************
  12. m68k.inc : Processor dependent implementation of system unit
  13. For Motorola 680x0 Processor.
  14. *****************************************************************************}
  15. {****************************************************************************}
  16. { Credit where credit is due: }
  17. { -Some of the copy routines taken from the Atari dlib source code: }
  18. { Dale Schumacher (alias: Dalnefre') [email protected] }
  19. { 399 Beacon Ave. St. Paul, MN 55104,USA }
  20. { -Some of the routines taken from the freeware ATARI Sozobon C compiler }
  21. { 1988 by Sozobon, Limited. Author: Johann Ruegg (freeware) }
  22. { Thanks to all these people wherever they maybe today! }
  23. {****************************************************************************}
  24. {$IF DEFINED(FPU68881) OR DEFINED(FPUCOLDFIRE)}
  25. function GetFPCR: DWord; assembler; nostackframe;
  26. asm
  27. fmove.l fpcr,d0
  28. end;
  29. function GetFPSR: DWord; assembler; nostackframe;
  30. asm
  31. fmove.l fpsr, d0
  32. end;
  33. procedure SetFPCR(x: DWord); assembler; nostackframe;
  34. asm
  35. fmove.l x, fpcr
  36. end;
  37. procedure SetFPSR(x: DWord); assembler; nostackframe;
  38. asm
  39. fmove.l x, fpsr
  40. end;
  41. {$DEFINE FPC_SYSTEM_HAS_SYSRESETFPU}
  42. procedure SysResetFPU;
  43. begin
  44. SetFPCR(Default68KFPCR);
  45. SetFPSR(0);
  46. end;
  47. {$DEFINE FPC_SYSTEM_HAS_SYSINITFPU}
  48. procedure SysInitFPU;
  49. begin
  50. end;
  51. procedure fpc_cpuinit;
  52. begin
  53. if IsLibrary then
  54. begin
  55. Default68kFPCR:=GetFPCR;
  56. end;
  57. SysResetFPU;
  58. end;
  59. {$ELSE}
  60. procedure fpc_cpuinit;
  61. begin
  62. SysResetFPU;
  63. if (not IsLibrary) then
  64. SysInitFPU;
  65. end;
  66. {$ENDIF}
  67. {$ifndef INTERNAL_BACKTRACE}
  68. {$define FPC_SYSTEM_HAS_GET_FRAME}
  69. function get_frame : pointer; assembler;nostackframe;
  70. asm
  71. move.l fp,d0
  72. end;
  73. {$endif not INTERNAL_BACKTRACE}
  74. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  75. function get_caller_addr(framebp : pointer;addr:pointer=nil) : pointer; assembler;
  76. asm
  77. move.l framebp,d0
  78. tst.l d0
  79. beq @Lnul_address
  80. move.l d0,a0
  81. move.l 4(a0),d0
  82. @Lnul_address:
  83. end;
  84. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  85. function get_caller_frame(framebp : pointer;addr:pointer=nil) : pointer; assembler;
  86. asm
  87. move.l framebp,d0
  88. tst.l d0
  89. beq @Lnul_frame
  90. move.l d0,a0
  91. move.l (a0),d0
  92. @Lnul_frame:
  93. end;
  94. {$define FPC_SYSTEM_HAS_SPTR}
  95. function Sptr : pointer; assembler;nostackframe;
  96. asm
  97. move.l sp,d0
  98. end;
  99. {$define FPC_SYSTEM_HAS_GET_PC_ADDR}
  100. function get_pc_addr : pointer;assembler;nostackframe;
  101. asm
  102. move.l (sp),d0
  103. end;
  104. {$define FPC_SYSTEM_HAS_FILLCHAR}
  105. procedure FillChar(var x; count : longint; value : byte); assembler;
  106. asm
  107. move.l x, a0 { destination }
  108. move.b value, d1 { fill data }
  109. move.l count, d0 { number of bytes to fill }
  110. ble @LMEMSET5 { anything to fill at all? }
  111. {$ifdef CPUM68K_HAS_DBRA}
  112. { FIXME: Any reason why not always just use DBRA mode on
  113. CPUs which support it? (KB)
  114. - DBRA does only 16-bit decrements, so handling more than 65535 bytes
  115. requires additional code anyway (Sergei) }
  116. cmpi.l #65535, d0 { check, if this is a word move }
  117. ble @LMEMSET3 { use fast dbra mode }
  118. {$endif CPUM68K_HAS_DBRA}
  119. bra @LMEMSET2
  120. @LMEMSET1:
  121. move.b d1,(a0)+
  122. @LMEMSET2:
  123. subq.l #1,d0
  124. bpl @LMEMSET1
  125. bra @LMEMSET5 { finished slow mode , exit }
  126. {$ifdef CPUM68K_HAS_DBRA}
  127. @LMEMSET4: { fast loop mode section 68010+ }
  128. move.b d1,(a0)+
  129. @LMEMSET3:
  130. dbra d0,@LMEMSET4
  131. {$endif CPUM68K_HAS_DBRA}
  132. @LMEMSET5:
  133. end;
  134. {$ifdef dummy}
  135. { procedure strcopy(dstr,sstr : pointer;len : longint);[public,alias: 'STRCOPY'];}
  136. procedure strcopy; assembler;[public,alias: 'FPC_STRCOPY'];
  137. {---------------------------------------------------}
  138. { Low-level routine to copy a string to another }
  139. { string with maximum length. Never call directly! }
  140. { On Entry: }
  141. { a1.l = string to copy to }
  142. { a0.l = source string }
  143. { d0.l = maximum length of copy }
  144. { registers destroyed: a0,a1,d0,d1 }
  145. {---------------------------------------------------}
  146. asm
  147. { move.l sstr,a0
  148. move.l dstr,a1
  149. move.l len,d1 }
  150. move.l d0,d1
  151. move.b (a0)+,d0 { Get source length }
  152. and.w #$ff,d0
  153. cmp.w d1,d0 { This is a signed comparison! }
  154. ble @LM4
  155. move.b d1,d0 { If longer than maximum size of target, cut
  156. source length }
  157. @LM4:
  158. andi.l #$ff,d0 { zero extend d0-byte }
  159. move.l d0,d1 { save length to copy }
  160. move.b d0,(a1)+ { save new length }
  161. { Check if copying length is zero - if so then }
  162. { exit without copying anything. }
  163. tst.b d1
  164. beq @Lend
  165. bra @LMSTRCOPY55
  166. @LMSTRCOPY56: { 68010 Fast loop mode }
  167. move.b (a0)+,(a1)+
  168. @LMSTRCOPY55:
  169. {$ifndef CPUM68K_HAS_DBRA}
  170. sub.l #1,d1
  171. bpl @LMSTRCOPY56
  172. {$else CPUM68K_HAS_DBRA}
  173. dbra d1,@LMSTRCOPY56
  174. {$endif CPUM68K_HAS_DBRA}
  175. @Lend:
  176. end;
  177. { Concatenate Strings }
  178. { PARAMETERS ARE REVERSED COMPARED TO NORMAL! }
  179. { therefore online assembler may not parse the params as normal }
  180. procedure strconcat(s1,s2 : pointer);[public,alias: 'STRCONCAT'];
  181. begin
  182. asm
  183. move.b #255,d0
  184. move.l s1,a0 { a0 = destination }
  185. move.l s2,a1 { a1 = source }
  186. sub.b (a0),d0 { copyl:= 255 -length(s1) }
  187. move.b (a1),d6
  188. and.w #$ff,d0 { Sign flags are checked! }
  189. and.w #$ff,d6
  190. cmp.w d6,d0 { if copyl > length(s2) then }
  191. ble @Lcontinue
  192. move.b (a1),d0 { copyl:=length(s2) }
  193. @Lcontinue:
  194. move.b (a0),d6
  195. and.l #$ff,d6
  196. lea 1(a0,d6),a0 { s1[length(s1)+1] }
  197. add.l #1,a1 { s2[1] }
  198. move.b d0,d6
  199. { Check if copying length is zero - if so then }
  200. { exit without copying anything. }
  201. tst.b d6
  202. beq @Lend
  203. bra @ALoop
  204. @Loop:
  205. move.b (a1)+,(a0)+ { s1[i] := s2[i]; }
  206. @ALoop:
  207. {$ifndef CPUM68K_HAS_DBRA}
  208. sub.l #1,d6
  209. bpl @Loop
  210. {$else CPUM68K_HAS_DBRA}
  211. dbra d6,@Loop
  212. {$endif CPUM68K_HAS_DBRA}
  213. move.l s1,a0
  214. add.b d0,(a0) { change to new string length }
  215. @Lend:
  216. end ['d0','d1','a0','a1','d6'];
  217. end;
  218. { Compares strings }
  219. { DO NOT CALL directly. }
  220. { a0 = pointer to first string to compare }
  221. { a1 = pointer to second string to compare }
  222. { ALL FLAGS are set appropriately. }
  223. { ZF = strings are equal }
  224. { REGISTERS DESTROYED: a0, a1, d0, d1, d6 }
  225. procedure strcmp; assembler;[public,alias:'FPC_STRCMP'];
  226. asm
  227. move.b (a0)+,d0 { Get length of first string }
  228. move.b (a1)+,d6 { Get length of 2nd string }
  229. move.b d6,d1 { Save length of string for final compare }
  230. cmp.b d0,d6 { Get shortest string length }
  231. ble @LSTRCONCAT1
  232. move.b d0,d6 { Set length to shortest string }
  233. @LSTRCONCAT1:
  234. tst.b d6 { Both strings have a length of zero, exit }
  235. beq @LSTRCONCAT2
  236. andi.l #$ff,d6
  237. subq.l #1,d6 { subtract first attempt }
  238. { if value is -1 then don't loop and just compare lengths of }
  239. { both strings before exiting. }
  240. bmi @LSTRCONCAT2
  241. or.l d0,d0 { Make sure to set Zerfo flag to 0 }
  242. @LSTRCONCAT5:
  243. { Workaroung for GAS v.134 bug }
  244. { old: cmp.b (a1)+,(a0)+ }
  245. cmpm.b (a1)+,(a0)+
  246. @LSTRCONCAT4:
  247. dbne d6,@LSTRCONCAT5 { Repeat until not equal }
  248. bne @LSTRCONCAT3
  249. @LSTRCONCAT2:
  250. { If length of both string are equal }
  251. { Then set zero flag }
  252. cmp.b d1,d0 { Compare length - set flag if equal length strings }
  253. @LSTRCONCAT3:
  254. end;
  255. {$endif dummy}
  256. {$define FPC_SYSTEM_HAS_MOVE}
  257. procedure move(const source;var dest;count : longint); assembler;
  258. { base pointer+8 = source }
  259. { base pointer+12 = destination }
  260. { base pointer+16 = number of bytes to move}
  261. asm
  262. move.l count, d0 { number of bytes }
  263. ble @LMOVE5 { anything to copy at all? }
  264. move.l dest, a1 { destination }
  265. move.l source, a0 { source }
  266. {$ifdef CPUM68K_HAS_DBRA}
  267. cmpi.l #65535, d0 { check, if this is a word move }
  268. ble @LMEMSET00 { use fast dbra mode 68010+ }
  269. {$endif CPUM68K_HAS_DBRA}
  270. cmp.l a0,a1 { check copy direction }
  271. bls @LMOVE3
  272. add.l d0,a0 { move pointers to end }
  273. add.l d0,a1
  274. @LMOVE1:
  275. move.b -(a0),-(a1) { (s < d) copy loop }
  276. subq.l #1,d0
  277. bne @LMOVE1
  278. bra @LMOVE5
  279. @LMOVE3:
  280. move.b (a0)+,(a1)+ { (s >= d) copy loop }
  281. subq.l #1,d0
  282. bne @LMOVE3
  283. bra @LMOVE5
  284. {$ifdef CPUM68K_HAS_DBRA}
  285. @LMEMSET00: { use fast loop mode 68010+ }
  286. cmp.l a0,a1 { check copy direction }
  287. bls @LMOVE04
  288. add.l d0,a0 { move pointers to end }
  289. add.l d0,a1
  290. bra @LMOVE02
  291. @LMOVE01:
  292. move.b -(a0),-(a1) { (s < d) copy loop }
  293. @LMOVE02:
  294. dbra d0,@LMOVE01
  295. bra @LMOVE5
  296. @LMOVE03:
  297. move.b (a0)+,(a1)+ { (s >= d) copy loop }
  298. @LMOVE04:
  299. dbra d0,@LMOVE03
  300. {$endif CPUM68K_HAS_DBRA}
  301. { end fast loop mode }
  302. @LMOVE5:
  303. end;
  304. {$ifdef CPUM68K_HAS_UNALIGNED}
  305. {$define FPC_SYSTEM_HAS_FILLWORD}
  306. procedure FillWord(var x; count : longint; value : word); assembler;
  307. asm
  308. move.l x, a0 { destination }
  309. move.w value, d1 { fill data }
  310. move.l count, d0 { number of bytes to fill }
  311. ble @LMEMSET3 { anything to fill at all? }
  312. bra @LMEMSET21
  313. @LMEMSET11:
  314. move.w d1,(a0)+
  315. @LMEMSET21:
  316. subq.l #1,d0
  317. bpl @LMEMSET11
  318. @LMEMSET3:
  319. end;
  320. {$endif}
  321. {$IFNDEF FPC_SYSTEM_HAS_INTERLOCKEDFUNCS}
  322. function InterLockedDecrement (var Target: longint) : longint;
  323. {$IFDEF CPUM68K_HAS_CAS}
  324. register; assembler;
  325. asm
  326. move.l (a0), d0
  327. @loop:
  328. move.l d0, d1
  329. subq.l #1, d1
  330. cas.l d0, d1, (a0)
  331. bne @loop
  332. move.l d1, d0
  333. end;
  334. {$ELSE}
  335. begin
  336. {$warning FIX ME}
  337. Dec(Target);
  338. Result := Target;
  339. end;
  340. {$ENDIF}
  341. function InterLockedIncrement (var Target: longint) : longint;
  342. {$IFDEF CPUM68K_HAS_CAS}
  343. register; assembler;
  344. asm
  345. move.l (a0), d0
  346. @loop:
  347. move.l d0, d1
  348. addq.l #1, d1
  349. cas.l d0, d1, (a0)
  350. bne @loop
  351. move.l d1, d0
  352. end;
  353. {$ELSE}
  354. begin
  355. {$warning FIX ME}
  356. Inc(Target);
  357. Result := Target;
  358. end;
  359. {$ENDIF}
  360. function InterLockedExchange (var Target: longint;Source : longint) : longint;
  361. {$IFDEF CPUM68K_HAS_CAS}
  362. register; assembler;
  363. asm
  364. move.l Source, d1
  365. move.l (a0), d0
  366. @loop:
  367. cas.l d0, d1, (a0)
  368. bne @loop
  369. end;
  370. {$ELSE}
  371. begin
  372. {$warning FIX ME}
  373. Result := Target;
  374. Target := Source;
  375. end;
  376. {$ENDIF}
  377. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint;
  378. {$IFDEF CPUM68K_HAS_CAS}
  379. register; assembler;
  380. asm
  381. move.l Source, a1
  382. move.l (a0), d0
  383. @loop:
  384. move.l a1, d1
  385. add.l d0, d1
  386. cas.l d0, d1, (a0)
  387. bne @loop
  388. end;
  389. {$ELSE}
  390. begin
  391. {$warning FIX ME}
  392. Result := Target;
  393. Target := Target + Source;
  394. end;
  395. {$ENDIF}
  396. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint;
  397. {$IFDEF CPUM68K_HAS_CAS}
  398. register; assembler;
  399. asm
  400. // Target = a0, NewValue = d0, Comperand = d1
  401. exg.l d0, d1
  402. cas.l d0, d1, (a0)
  403. end;
  404. {$ELSE}
  405. begin
  406. {$warning FIX ME}
  407. Result := Target;
  408. if Target = Comperand then
  409. Target := NewValue;
  410. end;
  411. {$ENDIF}
  412. {$ENDIF FPC_SYSTEM_HAS_INTERLOCKEDFUNCS}
  413. {$ifndef FPC_SYSTEM_HAS_TEST68K}
  414. procedure Test68k(var CPU: byte; var FPU: byte);
  415. begin
  416. {$warning Implement me!}
  417. CPU:=0;
  418. FPU:=0;
  419. end;
  420. {$endif}
  421. {$if defined(CPUM68K_HAS_BYTEREV) or defined(CPUM68K_HAS_ROLROR)}
  422. { Disabled for now, because not all cases below were tested. (KB) }
  423. {.$define FPC_SYSTEM_HAS_SWAPENDIAN}
  424. {$endif}
  425. {$if defined(FPC_SYSTEM_HAS_SWAPENDIAN)}
  426. function SwapEndian(const AValue: SmallInt): SmallInt; assembler; nostackframe;
  427. asm
  428. {$if defined(CPUM68K_HAS_ROLROR)}
  429. move.w avalue, d0
  430. ror.w #8, d0
  431. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  432. move.w avalue, d0
  433. byterev d0
  434. swap d0
  435. {$else}
  436. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  437. clr.l d0
  438. move.w avalue, d0
  439. move.w d0, d1
  440. lsr.l #8, d0
  441. lsl.l #8, d1
  442. or.l d1, d0
  443. {$endif}
  444. end;
  445. function SwapEndian(const AValue: Word): Word; assembler; nostackframe;
  446. asm
  447. {$if defined(CPUM68K_HAS_ROLROR)}
  448. move.w avalue, d0
  449. ror.w #8, d0
  450. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  451. move.w avalue, d0
  452. byterev d0
  453. swap d0
  454. {$else}
  455. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  456. clr.l d0
  457. move.w avalue, d0
  458. move.w d0, d1
  459. lsr.l #8, d0
  460. lsl.l #8, d1
  461. or.l d1, d0
  462. {$endif}
  463. end;
  464. function SwapEndian(const AValue: LongInt): LongInt; assembler; nostackframe;
  465. asm
  466. {$if defined(CPUM68K_HAS_ROLROR)}
  467. move.l avalue, d0
  468. ror.w #8, d0
  469. swap d0
  470. ror.w #8, d0
  471. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  472. move.l avalue, d0
  473. byterev d0
  474. {$else}
  475. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  476. move.l avalue, d0
  477. move.l d0, d1
  478. andi.l #$ff00ff00, d0
  479. andi.l #$00ff00ff, d1
  480. lsr.l #8, d0
  481. lsl.l #8, d1
  482. or.l d1, d0
  483. swap d0
  484. {$endif}
  485. end;
  486. function SwapEndian(const AValue: DWord): DWord; assembler; nostackframe;
  487. asm
  488. {$if defined(CPUM68K_HAS_ROLROR)}
  489. move.l avalue, d0
  490. ror.w #8, d0
  491. swap d0
  492. ror.w #8, d0
  493. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  494. move.l avalue, d0
  495. byterev d0
  496. {$else}
  497. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  498. move.l avalue, d0
  499. move.l d0, d1
  500. andi.l #$ff00ff00, d0
  501. andi.l #$00ff00ff, d1
  502. lsr.l #8, d0
  503. lsl.l #8, d1
  504. or.l d1, d0
  505. swap d0
  506. {$endif}
  507. end;
  508. function SwapEndian(const AValue: Int64): Int64; assembler; nostackframe;
  509. asm
  510. {$if defined(CPUM68K_HAS_ROLROR)}
  511. move.l avalue+4, d0
  512. ror.w #8, d0
  513. swap d0
  514. ror.w #8, d0
  515. move.l avalue, d1
  516. ror.w #8, d1
  517. swap d1
  518. ror.w #8, d1
  519. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  520. move.l avalue+4, d0
  521. move.l avalue, d1
  522. byterev d0
  523. byterev d1
  524. {$else}
  525. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  526. move.l d2, -(sp)
  527. move.l avalue+4, d0
  528. move.l d0, d1
  529. andi.l #$ff00ff00, d0
  530. andi.l #$00ff00ff, d1
  531. lsr.l #8, d0
  532. lsl.l #8, d1
  533. or.l d1, d0
  534. swap d0
  535. move.l avalue, d1
  536. move.l d1, d2
  537. andi.l #$ff00ff00, d1
  538. andi.l #$00ff00ff, d2
  539. lsr.l #8, d1
  540. lsl.l #8, d2
  541. or.l d2, d1
  542. swap d1
  543. move.l (sp)+, d2
  544. {$endif}
  545. end;
  546. function SwapEndian(const AValue: QWord): QWord; assembler; nostackframe;
  547. asm
  548. {$if defined(CPUM68K_HAS_ROLROR)}
  549. move.l avalue+4, d0
  550. ror.w #8, d0
  551. swap d0
  552. ror.w #8, d0
  553. move.l avalue, d1
  554. ror.w #8, d1
  555. swap d1
  556. ror.w #8, d1
  557. {$elseif defined(CPUM68K_HAS_BYTEREV)}
  558. move.l avalue+4, d0
  559. move.l avalue, d1
  560. byterev d0
  561. byterev d1
  562. {$else}
  563. // only ISA A/B ColdFire can end in this branch, so use long ops everywhere
  564. move.l d2, -(sp)
  565. move.l avalue+4, d0
  566. move.l d0, d1
  567. andi.l #$ff00ff00, d0
  568. andi.l #$00ff00ff, d1
  569. lsr.l #8, d0
  570. lsl.l #8, d1
  571. or.l d1, d0
  572. swap d0
  573. move.l avalue, d1
  574. move.l d1, d2
  575. andi.l #$ff00ff00, d1
  576. andi.l #$00ff00ff, d2
  577. lsr.l #8, d1
  578. lsl.l #8, d2
  579. or.l d2, d1
  580. swap d1
  581. move.l (sp)+, d2
  582. {$endif}
  583. end;
  584. {$endif FPC_SYSTEM_HAS_SWAPENDIAN}
  585. procedure fpc_cpucodeinit;
  586. begin
  587. Test68k(Test68000,Test68881);
  588. end;