cgbase.pas 16 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Some basic types and constants for the code generation
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# This unit exports some types which are used across the code generator }
  19. unit cgbase;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. cpuinfo,
  24. symconst;
  25. type
  26. { Location types where value can be stored }
  27. TCGLoc=(
  28. LOC_INVALID, { added for tracking problems}
  29. LOC_VOID, { no value is available }
  30. LOC_CONSTANT, { constant value }
  31. LOC_JUMP, { boolean results only, jump to false or true label }
  32. LOC_FLAGS, { boolean results only, flags are set }
  33. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  34. LOC_REFERENCE, { in memory value }
  35. LOC_REGISTER, { in a processor register }
  36. LOC_CREGISTER, { Constant register which shouldn't be modified }
  37. LOC_FPUREGISTER, { FPU stack }
  38. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  39. LOC_MMXREGISTER, { MMX register }
  40. { MMX register variable }
  41. LOC_CMMXREGISTER,
  42. LOC_SSEREGISTER,
  43. LOC_CSSEREGISTER,
  44. { multimedia register }
  45. LOC_MMREGISTER,
  46. { Constant multimedia reg which shouldn't be modified }
  47. LOC_CMMREGISTER
  48. );
  49. {# Generic opcodes, which must be supported by all processors
  50. }
  51. topcg =
  52. (
  53. OP_NONE,
  54. OP_ADD, { simple addition }
  55. OP_AND, { simple logical and }
  56. OP_DIV, { simple unsigned division }
  57. OP_IDIV, { simple signed division }
  58. OP_IMUL, { simple signed multiply }
  59. OP_MUL, { simple unsigned multiply }
  60. OP_NEG, { simple negate }
  61. OP_NOT, { simple logical not }
  62. OP_OR, { simple logical or }
  63. OP_SAR, { arithmetic shift-right }
  64. OP_SHL, { logical shift left }
  65. OP_SHR, { logical shift right }
  66. OP_SUB, { simple subtraction }
  67. OP_XOR { simple exclusive or }
  68. );
  69. {# Generic flag values - used for jump locations }
  70. TOpCmp =
  71. (
  72. OC_NONE,
  73. OC_EQ, { equality comparison }
  74. OC_GT, { greater than (signed) }
  75. OC_LT, { less than (signed) }
  76. OC_GTE, { greater or equal than (signed) }
  77. OC_LTE, { less or equal than (signed) }
  78. OC_NE, { not equal }
  79. OC_BE, { less or equal than (unsigned) }
  80. OC_B, { less than (unsigned) }
  81. OC_AE, { greater or equal than (unsigned) }
  82. OC_A { greater than (unsigned) }
  83. );
  84. { OS_NO is also used memory references with large data that can
  85. not be loaded in a register directly }
  86. TCgSize = (OS_NO,
  87. { integer registers }
  88. OS_8,OS_16,OS_32,OS_64,OS_S8,OS_S16,OS_S32,OS_S64,
  89. { single,double,extended,comp,float128 }
  90. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  91. { multi-media sizes: split in byte, word, dword, ... }
  92. { entities, then the signed counterparts }
  93. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_MS8,OS_MS16,OS_MS32,
  94. OS_MS64,OS_MS128);
  95. { Register types }
  96. TRegisterType = (
  97. R_INVALIDREGISTER, { = 0 }
  98. R_INTREGISTER, { = 1 }
  99. R_FPUREGISTER, { = 2 }
  100. { used by Intel only }
  101. R_MMXREGISTER, { = 3 }
  102. R_MMREGISTER, { = 4 }
  103. R_SPECIALREGISTER, { = 5 }
  104. R_ADDRESSREGISTER { = 6 }
  105. );
  106. { Sub registers }
  107. TSubRegister = (
  108. R_SUBNONE, { = 0; no sub register possible }
  109. R_SUBL, { = 1; 8 bits, Like AL }
  110. R_SUBH, { = 2; 8 bits, Like AH }
  111. R_SUBW, { = 3; 16 bits, Like AX }
  112. R_SUBD, { = 4; 32 bits, Like EAX }
  113. R_SUBQ, { = 5; 64 bits, Like RAX }
  114. R_SUBFD { = 6; Float that allocates 2 FPU registers }
  115. );
  116. TSuperRegister = type word;
  117. {
  118. The new register coding:
  119. SuperRegister (bits 0..7)
  120. Unused (bits 8..15)
  121. Subregister (bits 16..23)
  122. Register type (bits 24..31)
  123. }
  124. TRegister = type cardinal;
  125. TRegisterRec=packed record
  126. {$ifdef FPC_BIG_ENDIAN}
  127. regtype : Tregistertype;
  128. subreg : Tsubregister;
  129. supreg : Tsuperregister;
  130. {$else FPC_BIG_ENDIAN}
  131. supreg : Tsuperregister;
  132. subreg : Tsubregister;
  133. regtype : Tregistertype;
  134. {$endif FPC_BIG_ENDIAN}
  135. end;
  136. { A type to store register locations for 64 Bit values. }
  137. {$ifdef cpu64bit}
  138. tregister64 = tregister;
  139. {$else cpu64bit}
  140. tregister64 = packed record
  141. reglo,reghi : tregister;
  142. end;
  143. {$endif cpu64bit}
  144. { Set type definition for registers }
  145. tcpuregisterset = set of byte;
  146. tsuperregisterset = array[byte] of set of byte;
  147. { Temp types }
  148. ttemptype = (tt_none,
  149. tt_free,tt_normal,tt_persistent,
  150. tt_noreuse,tt_freenoreuse);
  151. pmmshuffle = ^tmmshuffle;
  152. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  153. passed to an mm operation is nil, it means that the whole location is moved }
  154. tmmshuffle = record
  155. { describes how many shuffles are actually described, if len=0 then
  156. moving the scalar with index 0 to the scalar with index 0 is meant }
  157. len : byte;
  158. { lower nibble of each entry of this array describes index of the source data index while
  159. the upper nibble describes the destination index }
  160. shuffles : array[1..1] of byte;
  161. end;
  162. const
  163. { alias for easier understanding }
  164. R_SSEREGISTER = R_MMREGISTER;
  165. { Invalid register number }
  166. RS_INVALID = high(tsuperregister);
  167. { Maximum number of cpu registers per register type,
  168. this must fit in tcpuregisterset }
  169. maxcpuregister = 32;
  170. tcgsize2size : Array[tcgsize] of integer =
  171. { integer values }
  172. (0,1,2,4,8,1,2,4,8,
  173. { floating point values }
  174. 4,8,EXTENDED_SIZE,8,16,
  175. { multimedia values }
  176. 1,2,4,8,16,1,2,4,8,16);
  177. tfloat2tcgsize: array[tfloattype] of tcgsize =
  178. (OS_F32,OS_F64,OS_F80,OS_C64,OS_C64,OS_F128);
  179. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  180. (s32real,s64real,s80real,s64comp);
  181. { Table to convert tcgsize variables to the correspondending
  182. unsigned types }
  183. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  184. OS_8,OS_16,OS_32,OS_64,OS_8,OS_16,OS_32,OS_64,
  185. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  186. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M8,OS_M16,OS_M32,
  187. OS_M64,OS_M128);
  188. tcgloc2str : array[TCGLoc] of string[11] = (
  189. 'LOC_INVALID',
  190. 'LOC_VOID',
  191. 'LOC_CONST',
  192. 'LOC_JUMP',
  193. 'LOC_FLAGS',
  194. 'LOC_CREF',
  195. 'LOC_REF',
  196. 'LOC_REG',
  197. 'LOC_CREG',
  198. 'LOC_FPUREG',
  199. 'LOC_CFPUREG',
  200. 'LOC_MMXREG',
  201. 'LOC_CMMXREG',
  202. 'LOC_SSEREG',
  203. 'LOC_CSSEREG',
  204. 'LOC_MMREG',
  205. 'LOC_CMMREG');
  206. var
  207. mms_movescalar : pmmshuffle;
  208. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean);{$ifdef USEINLINE}inline;{$endif}
  209. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  210. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  211. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  212. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  213. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  214. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  215. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  216. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  217. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  218. function generic_regname(r:tregister):string;
  219. {# From a constant numeric value, return the abstract code generator
  220. size.
  221. }
  222. function int_cgsize(const a: aword): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  223. { return the inverse condition of opcmp }
  224. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  225. { return whether op is commutative }
  226. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  227. { returns true, if shuffle describes a real shuffle operation and not only a move }
  228. function realshuffle(shuffle : pmmshuffle) : boolean;
  229. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  230. the source }
  231. procedure removeshuffles(var shuffle : tmmshuffle);
  232. implementation
  233. uses
  234. verbose;
  235. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean);{$ifdef USEINLINE}inline;{$endif}
  236. var
  237. b : byte;
  238. begin
  239. if setall then
  240. b:=$ff
  241. else
  242. b:=0;
  243. fillchar(regs,sizeof(regs),b);
  244. end;
  245. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  246. begin
  247. include(regs[s shr 8],(s and $ff));
  248. end;
  249. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  250. begin
  251. exclude(regs[s shr 8],(s and $ff));
  252. end;
  253. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  254. begin
  255. result:=(s and $ff) in regs[s shr 8];
  256. end;
  257. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  258. begin
  259. tregisterrec(result).regtype:=rt;
  260. tregisterrec(result).supreg:=sr;
  261. tregisterrec(result).subreg:=sb;
  262. end;
  263. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  264. begin
  265. result:=tregisterrec(r).subreg;
  266. end;
  267. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  268. begin
  269. result:=tregisterrec(r).supreg;
  270. end;
  271. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  272. begin
  273. result:=tregisterrec(r).regtype;
  274. end;
  275. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  276. begin
  277. tregisterrec(r).subreg:=sr;
  278. end;
  279. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  280. begin
  281. tregisterrec(r).supreg:=sr;
  282. end;
  283. function generic_regname(r:tregister):string;
  284. var
  285. t,sub : char;
  286. nr : string[12];
  287. begin
  288. case getregtype(r) of
  289. R_INTREGISTER:
  290. t:='i';
  291. R_FPUREGISTER:
  292. t:='f';
  293. R_MMXREGISTER:
  294. t:='x';
  295. R_MMREGISTER:
  296. t:='m';
  297. else
  298. begin
  299. result:='INVALID';
  300. exit;
  301. end;
  302. end;
  303. str(getsupreg(r),nr);
  304. case getsubreg(r) of
  305. R_SUBNONE:
  306. sub:=' ';
  307. R_SUBL:
  308. sub:='l';
  309. R_SUBH:
  310. sub:='h';
  311. R_SUBW:
  312. sub:='w';
  313. R_SUBD:
  314. sub:='d';
  315. R_SUBQ:
  316. sub:='q';
  317. R_SUBFD:
  318. sub:='f';
  319. else
  320. internalerror(200308252);
  321. end;
  322. if sub<>' ' then
  323. result:=t+'reg'+nr+sub
  324. else
  325. result:=t+'reg'+nr;
  326. end;
  327. function int_cgsize(const a: aword): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  328. const
  329. size2cgsize : array[0..8] of tcgsize = (
  330. OS_NO,OS_8,OS_16,OS_32,OS_32,OS_64,OS_64,OS_64,OS_64
  331. );
  332. begin
  333. if a>8 then
  334. result:=OS_NO
  335. else
  336. result:=size2cgsize[a];
  337. end;
  338. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  339. const
  340. list: array[TOpCmp] of TOpCmp =
  341. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  342. OC_B,OC_BE);
  343. begin
  344. inverse_opcmp := list[opcmp];
  345. end;
  346. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  347. const
  348. list: array[topcg] of boolean =
  349. (true,true,true,false,false,true,true,false,false,
  350. true,false,false,false,false,true);
  351. begin
  352. commutativeop := list[op];
  353. end;
  354. function realshuffle(shuffle : pmmshuffle) : boolean;
  355. var
  356. i : longint;
  357. begin
  358. realshuffle:=true;
  359. if (shuffle=nil) or (shuffle^.len=0) then
  360. realshuffle:=false
  361. else
  362. begin
  363. for i:=1 to shuffle^.len do
  364. begin
  365. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 8) then
  366. exit;
  367. end;
  368. realshuffle:=false;
  369. end;
  370. end;
  371. procedure removeshuffles(var shuffle : tmmshuffle);
  372. var
  373. i : longint;
  374. begin
  375. if shuffle.len=0 then
  376. exit;
  377. for i:=1 to shuffle.len do
  378. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f0) or ((shuffle.shuffles[i] and $f0) shr 8);
  379. end;
  380. initialization
  381. new(mms_movescalar);
  382. mms_movescalar^.len:=0;
  383. finalization
  384. dispose(mms_movescalar);
  385. end.
  386. {
  387. $Log$
  388. Revision 1.77 2003-11-04 15:35:13 peter
  389. * fix for referencecounted temps
  390. Revision 1.76 2003/11/03 17:48:04 peter
  391. * int_cgsize returned garbage for a=0
  392. Revision 1.75 2003/10/31 15:51:11 peter
  393. * USEINLINE directive added (not enabled yet)
  394. Revision 1.74 2003/10/30 14:56:40 mazen
  395. + add support for double float register vars
  396. Revision 1.73 2003/10/29 15:07:01 mazen
  397. * 32 registers are available
  398. Revision 1.72 2003/10/24 15:21:31 peter
  399. * renamed R_SUBF64 to R_SUBFD
  400. Revision 1.71 2003/10/17 14:38:32 peter
  401. * 64k registers supported
  402. * fixed some memory leaks
  403. Revision 1.70 2003/10/13 01:10:01 florian
  404. * some ideas for mm support implemented
  405. Revision 1.69 2003/10/11 16:06:42 florian
  406. * fixed some MMX<->SSE
  407. * started to fix ppc, needs an overhaul
  408. + stabs info improve for spilling, not sure if it works correctly/completly
  409. - MMX_SUPPORT removed from Makefile.fpc
  410. Revision 1.68 2003/10/09 21:31:37 daniel
  411. * Register allocator splitted, ans abstract now
  412. Revision 1.67 2003/10/01 20:34:48 peter
  413. * procinfo unit contains tprocinfo
  414. * cginfo renamed to cgbase
  415. * moved cgmessage to verbose
  416. * fixed ppc and sparc compiles
  417. }