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nppcinl.pas 4.9 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Generate i386 inline nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit nppcinl;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. node,ninl,ncginl;
  23. type
  24. tppcinlinenode = class(tcginlinenode)
  25. { first pass override
  26. so that the code generator will actually generate
  27. these nodes.
  28. }
  29. function first_abs_real: tnode; override;
  30. function first_sqr_real: tnode; override;
  31. procedure second_abs_real; override;
  32. procedure second_sqr_real; override;
  33. private
  34. procedure load_fpu_location;
  35. end;
  36. implementation
  37. uses
  38. cutils,globals,
  39. aasmtai,aasmcpu,
  40. symconst,symdef,
  41. defutil,
  42. cgbase,pass_2,
  43. cpubase,ncgutil,
  44. cgobj,rgobj;
  45. {*****************************************************************************
  46. TPPCINLINENODE
  47. *****************************************************************************}
  48. function tppcinlinenode.first_abs_real : tnode;
  49. begin
  50. expectloc:=LOC_FPUREGISTER;
  51. registers32:=left.registers32;
  52. registersfpu:=max(left.registersfpu,1);
  53. {$ifdef SUPPORT_MMX}
  54. registersmmx:=left.registersmmx;
  55. {$endif SUPPORT_MMX}
  56. first_abs_real := nil;
  57. end;
  58. function tppcinlinenode.first_sqr_real : tnode;
  59. begin
  60. expectloc:=LOC_FPUREGISTER;
  61. registers32:=left.registers32;
  62. registersfpu:=max(left.registersfpu,1);
  63. {$ifdef SUPPORT_MMX}
  64. registersmmx:=left.registersmmx;
  65. {$endif SUPPORT_MMX}
  66. first_sqr_real := nil;
  67. end;
  68. { load the FPU into the an fpu register }
  69. procedure tppcinlinenode.load_fpu_location;
  70. begin
  71. location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
  72. secondpass(left);
  73. location_force_fpureg(exprasmlist,left.location,true);
  74. location_copy(location,left.location);
  75. if (location.loc = LOC_CFPUREGISTER) then
  76. begin
  77. location.loc := LOC_FPUREGISTER;
  78. location.register := cg.getfpuregister(exprasmlist,OS_F64);
  79. end;
  80. end;
  81. procedure tppcinlinenode.second_abs_real;
  82. begin
  83. location.loc:=LOC_FPUREGISTER;
  84. load_fpu_location;
  85. exprasmlist.concat(taicpu.op_reg_reg(A_FABS,location.register,
  86. left.location.register));
  87. end;
  88. procedure tppcinlinenode.second_sqr_real;
  89. begin
  90. location.loc:=LOC_FPUREGISTER;
  91. load_fpu_location;
  92. exprasmlist.concat(taicpu.op_reg_reg_reg(A_FMUL,location.register,
  93. location.register,left.location.register));
  94. end;
  95. begin
  96. cinlinenode:=tppcinlinenode;
  97. end.
  98. {
  99. $Log$
  100. Revision 1.11 2003-10-17 01:22:08 florian
  101. * compilation of the powerpc compiler fixed
  102. Revision 1.10 2003/10/01 20:34:49 peter
  103. * procinfo unit contains tprocinfo
  104. * cginfo renamed to cgbase
  105. * moved cgmessage to verbose
  106. * fixed ppc and sparc compiles
  107. Revision 1.9 2003/08/08 19:01:02 jonas
  108. * fixed bug in load_fpu_location found by Olle
  109. Revision 1.8 2003/06/13 17:03:38 jonas
  110. * fixed bugs in case the left node was a LOC_(C)REFERENCE
  111. Revision 1.7 2003/06/01 21:38:06 peter
  112. * getregisterfpu size parameter added
  113. * op_const_reg size parameter added
  114. * sparc updates
  115. Revision 1.6 2003/05/24 13:39:32 jonas
  116. * fsqrt is an optional instruction in the ppc architecture and isn't
  117. implemented by any current ppc afaik, so use the generic sqrt routine
  118. instead (adapted so it works with compilerproc)
  119. Revision 1.5 2003/04/23 12:35:35 florian
  120. * fixed several issues with powerpc
  121. + applied a patch from Jonas for nested function calls (PowerPC only)
  122. * ...
  123. Revision 1.4 2002/11/25 17:43:28 peter
  124. * splitted defbase in defutil,symutil,defcmp
  125. * merged isconvertable and is_equal into compare_defs(_ext)
  126. * made operator search faster by walking the list only once
  127. Revision 1.3 2002/09/18 09:19:37 jonas
  128. * fixed LOC_REFERENCE/LOC_CREFERENCE problems
  129. Revision 1.2 2002/08/19 17:35:42 jonas
  130. * fixes
  131. Revision 1.1 2002/08/10 17:15:00 jonas
  132. + abs, sqr, sqrt implementations
  133. }