rax86.pas 25 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  4. Handles the common x86 assembler reader routines
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {
  19. Contains the common x86 (i386 and x86-64) assembler reader routines.
  20. }
  21. unit rax86;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. aasmbase,aasmtai,aasmcpu,
  26. cpubase,rautils,cclasses;
  27. { Parser helpers }
  28. function is_prefix(t:tasmop):boolean;
  29. function is_override(t:tasmop):boolean;
  30. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  31. Function CheckOverride(overrideop,op:tasmop): Boolean;
  32. Procedure FWaitWarning;
  33. type
  34. T386Operand=class(TOperand)
  35. opsize : topsize;
  36. Procedure SetSize(_size:longint;force:boolean);override;
  37. Procedure SetCorrectSize(opcode:tasmop);override;
  38. end;
  39. T386Instruction=class(TInstruction)
  40. OpOrder : TOperandOrder;
  41. opsize : topsize;
  42. constructor Create;
  43. { Operand sizes }
  44. procedure AddReferenceSizes;
  45. procedure SetInstructionOpsize;
  46. procedure CheckOperandSizes;
  47. procedure CheckNonCommutativeOpcodes;
  48. procedure SwapOperands;
  49. { opcode adding }
  50. procedure ConcatInstruction(p : taasmoutput);override;
  51. end;
  52. tstr2opentry = class(Tnamedindexitem)
  53. op: TAsmOp;
  54. end;
  55. const
  56. AsmPrefixes = 6;
  57. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  58. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
  59. );
  60. AsmOverrides = 6;
  61. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  62. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  63. );
  64. CondAsmOps=3;
  65. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  66. A_CMOVcc, A_Jcc, A_SETcc
  67. );
  68. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  69. 'CMOV','J','SET'
  70. );
  71. implementation
  72. uses
  73. globtype,globals,systems,verbose,
  74. cpuinfo,cgbase,
  75. itx86att,cgx86;
  76. {$define ATTOP}
  77. {$define INTELOP}
  78. {$ifdef NORA386INT}
  79. {$ifdef NOAG386NSM}
  80. {$ifdef NOAG386INT}
  81. {$undef INTELOP}
  82. {$endif}
  83. {$endif}
  84. {$endif}
  85. {$ifdef NORA386ATT}
  86. {$ifdef NOAG386ATT}
  87. {$undef ATTOP}
  88. {$endif}
  89. {$endif}
  90. {*****************************************************************************
  91. Parser Helpers
  92. *****************************************************************************}
  93. function is_prefix(t:tasmop):boolean;
  94. var
  95. i : longint;
  96. Begin
  97. is_prefix:=false;
  98. for i:=1 to AsmPrefixes do
  99. if t=AsmPrefix[i-1] then
  100. begin
  101. is_prefix:=true;
  102. exit;
  103. end;
  104. end;
  105. function is_override(t:tasmop):boolean;
  106. var
  107. i : longint;
  108. Begin
  109. is_override:=false;
  110. for i:=1 to AsmOverrides do
  111. if t=AsmOverride[i-1] then
  112. begin
  113. is_override:=true;
  114. exit;
  115. end;
  116. end;
  117. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  118. { Checks if the prefix is valid with the following opcode }
  119. { return false if not, otherwise true }
  120. Begin
  121. CheckPrefix := TRUE;
  122. (* Case prefix of
  123. A_REP,A_REPNE,A_REPE:
  124. Case opcode Of
  125. A_SCASB,A_SCASW,A_SCASD,
  126. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  127. Else
  128. Begin
  129. CheckPrefix := FALSE;
  130. exit;
  131. end;
  132. end; { case }
  133. A_LOCK:
  134. Case opcode Of
  135. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  136. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  137. Else
  138. Begin
  139. CheckPrefix := FALSE;
  140. Exit;
  141. end;
  142. end; { case }
  143. A_NONE: exit; { no prefix here }
  144. else
  145. CheckPrefix := FALSE;
  146. end; { end case } *)
  147. end;
  148. Function CheckOverride(overrideop,op:tasmop): Boolean;
  149. { Check if the override is valid, and if so then }
  150. { update the instr variable accordingly. }
  151. Begin
  152. CheckOverride := true;
  153. { Case instr.getinstruction of
  154. A_MOVS,A_XLAT,A_CMPS:
  155. Begin
  156. CheckOverride := TRUE;
  157. Message(assem_e_segment_override_not_supported);
  158. end
  159. end }
  160. end;
  161. Procedure FWaitWarning;
  162. begin
  163. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in aktmoduleswitches) then
  164. Message(asmr_w_fwait_emu_prob);
  165. end;
  166. {*****************************************************************************
  167. T386Operand
  168. *****************************************************************************}
  169. Procedure T386Operand.SetSize(_size:longint;force:boolean);
  170. begin
  171. inherited SetSize(_size,force);
  172. { OS_64 will be set to S_L and be fixed later
  173. in SetCorrectSize }
  174. opsize:=TCGSize2Opsize[size];
  175. end;
  176. Procedure T386Operand.SetCorrectSize(opcode:tasmop);
  177. begin
  178. if gas_needsuffix[opcode]=attsufFPU then
  179. begin
  180. case size of
  181. OS_32 : opsize:=S_FS;
  182. OS_64 : opsize:=S_FL;
  183. end;
  184. end
  185. else if gas_needsuffix[opcode]=attsufFPUint then
  186. begin
  187. case size of
  188. OS_16 : opsize:=S_IS;
  189. OS_32 : opsize:=S_IL;
  190. OS_64 : opsize:=S_IQ;
  191. end;
  192. end;
  193. end;
  194. {*****************************************************************************
  195. T386Instruction
  196. *****************************************************************************}
  197. constructor T386Instruction.Create;
  198. begin
  199. inherited Create;
  200. Opsize:=S_NO;
  201. end;
  202. procedure T386Instruction.SwapOperands;
  203. begin
  204. Inherited SwapOperands;
  205. { mark the correct order }
  206. if OpOrder=op_intel then
  207. OpOrder:=op_att
  208. else
  209. OpOrder:=op_intel;
  210. end;
  211. procedure T386Instruction.AddReferenceSizes;
  212. { this will add the sizes for references like [esi] which do not
  213. have the size set yet, it will take only the size if the other
  214. operand is a register }
  215. var
  216. operand2,i : longint;
  217. s : tasmsymbol;
  218. so : longint;
  219. begin
  220. for i:=1to ops do
  221. begin
  222. operands[i].SetCorrectSize(opcode);
  223. if t386operand(operands[i]).opsize=S_NO then
  224. begin
  225. case operands[i].Opr.Typ of
  226. OPR_LOCAL,
  227. OPR_REFERENCE :
  228. begin
  229. if i=2 then
  230. operand2:=1
  231. else
  232. operand2:=2;
  233. if operand2<ops then
  234. begin
  235. { Only allow register as operand to take the size from }
  236. if operands[operand2].opr.typ=OPR_REGISTER then
  237. begin
  238. if ((opcode<>A_MOVD) and
  239. (opcode<>A_CVTSI2SS)) then
  240. t386operand(operands[i]).opsize:=t386operand(operands[operand2]).opsize;
  241. end
  242. else
  243. begin
  244. { if no register then take the opsize (which is available with ATT),
  245. if not availble then give an error }
  246. if opsize<>S_NO then
  247. t386operand(operands[i]).opsize:=opsize
  248. else
  249. begin
  250. Message(asmr_e_unable_to_determine_reference_size);
  251. { recovery }
  252. t386operand(operands[i]).opsize:=S_L;
  253. end;
  254. end;
  255. end
  256. else
  257. begin
  258. if opsize<>S_NO then
  259. t386operand(operands[i]).opsize:=opsize
  260. end;
  261. end;
  262. OPR_SYMBOL :
  263. begin
  264. { Fix lea which need a reference }
  265. if opcode=A_LEA then
  266. begin
  267. s:=operands[i].opr.symbol;
  268. so:=operands[i].opr.symofs;
  269. operands[i].opr.typ:=OPR_REFERENCE;
  270. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  271. operands[i].opr.ref.symbol:=s;
  272. operands[i].opr.ref.offset:=so;
  273. end;
  274. t386operand(operands[i]).opsize:=S_L;
  275. end;
  276. end;
  277. end;
  278. end;
  279. end;
  280. procedure T386Instruction.SetInstructionOpsize;
  281. begin
  282. if opsize<>S_NO then
  283. exit;
  284. if (OpOrder=op_intel) then
  285. SwapOperands;
  286. case ops of
  287. 0 : ;
  288. 1 :
  289. begin
  290. { "push es" must be stored as a long PM }
  291. if ((opcode=A_PUSH) or
  292. (opcode=A_POP)) and
  293. (operands[1].opr.typ=OPR_REGISTER) and
  294. is_segment_reg(operands[1].opr.reg) then
  295. opsize:=S_L
  296. else
  297. opsize:=t386operand(operands[1]).opsize;
  298. end;
  299. 2 :
  300. begin
  301. case opcode of
  302. A_MOVZX,A_MOVSX :
  303. begin
  304. case t386operand(operands[1]).opsize of
  305. S_W :
  306. case t386operand(operands[2]).opsize of
  307. S_L :
  308. opsize:=S_WL;
  309. end;
  310. S_B :
  311. case t386operand(operands[2]).opsize of
  312. S_W :
  313. opsize:=S_BW;
  314. S_L :
  315. opsize:=S_BL;
  316. end;
  317. end;
  318. end;
  319. A_MOVD : { movd is a move from a mmx register to a
  320. 32 bit register or memory, so no opsize is correct here PM }
  321. exit;
  322. A_OUT :
  323. opsize:=t386operand(operands[1]).opsize;
  324. else
  325. opsize:=t386operand(operands[2]).opsize;
  326. end;
  327. end;
  328. 3 :
  329. opsize:=t386operand(operands[3]).opsize;
  330. end;
  331. end;
  332. procedure T386Instruction.CheckOperandSizes;
  333. var
  334. sizeerr : boolean;
  335. i : longint;
  336. begin
  337. { Check only the most common opcodes here, the others are done in
  338. the assembler pass }
  339. case opcode of
  340. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  341. A_CMP,A_MOV,
  342. A_ADD,A_SUB,A_ADC,A_SBB,
  343. A_AND,A_OR,A_TEST,A_XOR: ;
  344. else
  345. exit;
  346. end;
  347. { Handle the BW,BL,WL separatly }
  348. sizeerr:=false;
  349. { special push/pop selector case }
  350. if ((opcode=A_PUSH) or
  351. (opcode=A_POP)) and
  352. (operands[1].opr.typ=OPR_REGISTER) and
  353. is_segment_reg(operands[1].opr.reg) then
  354. exit;
  355. if opsize in [S_BW,S_BL,S_WL] then
  356. begin
  357. if ops<>2 then
  358. sizeerr:=true
  359. else
  360. begin
  361. case opsize of
  362. S_BW :
  363. sizeerr:=(t386operand(operands[1]).opsize<>S_B) or (t386operand(operands[2]).opsize<>S_W);
  364. S_BL :
  365. sizeerr:=(t386operand(operands[1]).opsize<>S_B) or (t386operand(operands[2]).opsize<>S_L);
  366. S_WL :
  367. sizeerr:=(t386operand(operands[1]).opsize<>S_W) or (t386operand(operands[2]).opsize<>S_L);
  368. end;
  369. end;
  370. end
  371. else
  372. begin
  373. for i:=1 to ops do
  374. begin
  375. if (operands[i].opr.typ<>OPR_CONSTANT) and
  376. (t386operand(operands[i]).opsize in [S_B,S_W,S_L]) and
  377. (t386operand(operands[i]).opsize<>opsize) then
  378. sizeerr:=true;
  379. end;
  380. end;
  381. if sizeerr then
  382. begin
  383. { if range checks are on then generate an error }
  384. if (cs_compilesystem in aktmoduleswitches) or
  385. not (cs_check_range in aktlocalswitches) then
  386. Message(asmr_w_size_suffix_and_dest_dont_match)
  387. else
  388. Message(asmr_e_size_suffix_and_dest_dont_match);
  389. end;
  390. end;
  391. { This check must be done with the operand in ATT order
  392. i.e.after swapping in the intel reader
  393. but before swapping in the NASM and TASM writers PM }
  394. procedure T386Instruction.CheckNonCommutativeOpcodes;
  395. begin
  396. if (OpOrder=op_intel) then
  397. SwapOperands;
  398. if (
  399. (ops=2) and
  400. (operands[1].opr.typ=OPR_REGISTER) and
  401. (operands[2].opr.typ=OPR_REGISTER) and
  402. { if the first is ST and the second is also a register
  403. it is necessarily ST1 .. ST7 }
  404. ((operands[1].opr.reg=NR_ST) or
  405. (operands[1].opr.reg=NR_ST0))
  406. ) or
  407. (ops=0) then
  408. if opcode=A_FSUBR then
  409. opcode:=A_FSUB
  410. else if opcode=A_FSUB then
  411. opcode:=A_FSUBR
  412. else if opcode=A_FDIVR then
  413. opcode:=A_FDIV
  414. else if opcode=A_FDIV then
  415. opcode:=A_FDIVR
  416. else if opcode=A_FSUBRP then
  417. opcode:=A_FSUBP
  418. else if opcode=A_FSUBP then
  419. opcode:=A_FSUBRP
  420. else if opcode=A_FDIVRP then
  421. opcode:=A_FDIVP
  422. else if opcode=A_FDIVP then
  423. opcode:=A_FDIVRP;
  424. if (
  425. (ops=1) and
  426. (operands[1].opr.typ=OPR_REGISTER) and
  427. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  428. (operands[1].opr.reg<>NR_ST) and
  429. (operands[1].opr.reg<>NR_ST0)
  430. ) then
  431. if opcode=A_FSUBRP then
  432. opcode:=A_FSUBP
  433. else if opcode=A_FSUBP then
  434. opcode:=A_FSUBRP
  435. else if opcode=A_FDIVRP then
  436. opcode:=A_FDIVP
  437. else if opcode=A_FDIVP then
  438. opcode:=A_FDIVRP;
  439. end;
  440. {*****************************************************************************
  441. opcode Adding
  442. *****************************************************************************}
  443. procedure T386Instruction.ConcatInstruction(p : taasmoutput);
  444. var
  445. siz : topsize;
  446. i,asize : longint;
  447. ai : taicpu;
  448. begin
  449. if (OpOrder=op_intel) then
  450. SwapOperands;
  451. { Get Opsize }
  452. if (opsize<>S_NO) or (Ops=0) then
  453. siz:=opsize
  454. else
  455. begin
  456. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  457. siz:=t386operand(operands[1]).opsize
  458. else
  459. siz:=t386operand(operands[Ops]).opsize;
  460. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  461. if (ops=2) and
  462. (t386operand(operands[1]).opsize<>S_NO) and
  463. (t386operand(operands[2]).opsize<>S_NO) and
  464. (t386operand(operands[1]).opsize<>t386operand(operands[2]).opsize) then
  465. siz:=S_NO;
  466. end;
  467. if ((opcode=A_MOVD)or
  468. (opcode=A_CVTSI2SS)) and
  469. ((t386operand(operands[1]).opsize=S_NO) or
  470. (t386operand(operands[2]).opsize=S_NO)) then
  471. siz:=S_NO;
  472. { NASM does not support FADD without args
  473. as alias of FADDP
  474. and GNU AS interprets FADD without operand differently
  475. for version 2.9.1 and 2.9.5 !! }
  476. if (ops=0) and
  477. ((opcode=A_FADD) or
  478. (opcode=A_FMUL) or
  479. (opcode=A_FSUB) or
  480. (opcode=A_FSUBR) or
  481. (opcode=A_FDIV) or
  482. (opcode=A_FDIVR)) then
  483. begin
  484. if opcode=A_FADD then
  485. opcode:=A_FADDP
  486. else if opcode=A_FMUL then
  487. opcode:=A_FMULP
  488. else if opcode=A_FSUB then
  489. opcode:=A_FSUBP
  490. else if opcode=A_FSUBR then
  491. opcode:=A_FSUBRP
  492. else if opcode=A_FDIV then
  493. opcode:=A_FDIVP
  494. else if opcode=A_FDIVR then
  495. opcode:=A_FDIVRP;
  496. {$ifdef ATTOP}
  497. message1(asmr_w_fadd_to_faddp,gas_op2str[opcode]);
  498. {$else}
  499. {$ifdef INTELOP}
  500. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  501. {$else}
  502. message1(asmr_w_fadd_to_faddp,'fXX');
  503. {$endif INTELOP}
  504. {$endif ATTOP}
  505. end;
  506. { GNU AS interprets FDIV without operand differently
  507. for version 2.9.1 and 2.10
  508. we add explicit args to it !! }
  509. if (ops=0) and
  510. ((opcode=A_FSUBP) or
  511. (opcode=A_FSUBRP) or
  512. (opcode=A_FDIVP) or
  513. (opcode=A_FDIVRP) or
  514. (opcode=A_FSUB) or
  515. (opcode=A_FSUBR) or
  516. (opcode=A_FADD) or
  517. (opcode=A_FADDP) or
  518. (opcode=A_FDIV) or
  519. (opcode=A_FDIVR)) then
  520. begin
  521. {$ifdef ATTOP}
  522. message1(asmr_w_adding_explicit_args_fXX,gas_op2str[opcode]);
  523. {$else}
  524. {$ifdef INTELOP}
  525. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  526. {$else}
  527. message1(asmr_w_adding_explicit_args_fXX,'fXX');
  528. {$endif INTELOP}
  529. {$endif ATTOP}
  530. ops:=2;
  531. operands[1].opr.typ:=OPR_REGISTER;
  532. operands[2].opr.typ:=OPR_REGISTER;
  533. operands[1].opr.reg:=NR_ST0;
  534. operands[2].opr.reg:=NR_ST1;
  535. end;
  536. if (ops=1) and
  537. (
  538. (operands[1].opr.typ=OPR_REGISTER) and
  539. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  540. (operands[1].opr.reg<>NR_ST) and
  541. (operands[1].opr.reg<>NR_ST0)
  542. ) and
  543. (
  544. (opcode=A_FSUBP) or
  545. (opcode=A_FSUBRP) or
  546. (opcode=A_FDIVP) or
  547. (opcode=A_FDIVRP) or
  548. (opcode=A_FADDP) or
  549. (opcode=A_FMULP)
  550. ) then
  551. begin
  552. {$ifdef ATTOP}
  553. message1(asmr_w_adding_explicit_first_arg_fXX,gas_op2str[opcode]);
  554. {$else}
  555. {$ifdef INTELOP}
  556. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  557. {$else}
  558. message1(asmr_w_adding_explicit_first_arg_fXX,'fXX');
  559. {$endif INTELOP}
  560. {$endif ATTOP}
  561. ops:=2;
  562. operands[2].opr.typ:=OPR_REGISTER;
  563. operands[2].opr.reg:=operands[1].opr.reg;
  564. operands[1].opr.reg:=NR_ST0;
  565. end;
  566. if (ops=1) and
  567. (
  568. (operands[1].opr.typ=OPR_REGISTER) and
  569. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  570. (operands[1].opr.reg<>NR_ST) and
  571. (operands[1].opr.reg<>NR_ST0)
  572. ) and
  573. (
  574. (opcode=A_FSUB) or
  575. (opcode=A_FSUBR) or
  576. (opcode=A_FDIV) or
  577. (opcode=A_FDIVR) or
  578. (opcode=A_FADD) or
  579. (opcode=A_FMUL)
  580. ) then
  581. begin
  582. {$ifdef ATTOP}
  583. message1(asmr_w_adding_explicit_second_arg_fXX,gas_op2str[opcode]);
  584. {$else}
  585. {$ifdef INTELOP}
  586. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  587. {$else}
  588. message1(asmr_w_adding_explicit_second_arg_fXX,'fXX');
  589. {$endif INTELOP}
  590. {$endif ATTOP}
  591. ops:=2;
  592. operands[2].opr.typ:=OPR_REGISTER;
  593. operands[2].opr.reg:=NR_ST0;
  594. end;
  595. { I tried to convince Linus Torvalds to add
  596. code to support ENTER instruction
  597. (when raising a stack page fault)
  598. but he replied that ENTER is a bad instruction and
  599. Linux does not need to support it
  600. So I think its at least a good idea to add a warning
  601. if someone uses this in assembler code
  602. FPC itself does not use it at all PM }
  603. if (opcode=A_ENTER) and
  604. (target_info.system in [system_i386_linux,system_i386_FreeBSD]) then
  605. Message(asmr_w_enter_not_supported_by_linux);
  606. ai:=taicpu.op_none(opcode,siz);
  607. ai.SetOperandOrder(OpOrder);
  608. ai.Ops:=Ops;
  609. ai.Allocate_oper(Ops);
  610. for i:=1to Ops do
  611. begin
  612. case operands[i].opr.typ of
  613. OPR_CONSTANT :
  614. ai.loadconst(i-1,aword(operands[i].opr.val));
  615. OPR_REGISTER:
  616. ai.loadreg(i-1,operands[i].opr.reg);
  617. OPR_SYMBOL:
  618. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  619. OPR_LOCAL :
  620. ai.loadlocal(i-1,operands[i].opr.localsym,operands[i].opr.localsymofs,operands[i].opr.localindexreg,
  621. operands[i].opr.localscale,operands[i].opr.localgetoffset);
  622. OPR_REFERENCE:
  623. begin
  624. ai.loadref(i-1,operands[i].opr.ref);
  625. if operands[i].size<>OS_NO then
  626. begin
  627. asize:=0;
  628. case operands[i].size of
  629. OS_8,OS_S8 :
  630. asize:=OT_BITS8;
  631. OS_16,OS_S16 :
  632. asize:=OT_BITS16;
  633. OS_32,OS_S32,OS_F32 :
  634. asize:=OT_BITS32;
  635. OS_64,OS_S64:
  636. begin
  637. { Only FPU operations know about 64bit values, for all
  638. integer operations it is seen as 32bit }
  639. if gas_needsuffix[opcode] in [attsufFPU,attsufFPUint] then
  640. asize:=OT_BITS64
  641. else
  642. asize:=OT_BITS32;
  643. end;
  644. OS_F64,OS_C64 :
  645. asize:=OT_BITS64;
  646. OS_F80 :
  647. asize:=OT_BITS80;
  648. end;
  649. if asize<>0 then
  650. ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
  651. end;
  652. end;
  653. end;
  654. end;
  655. if (opcode=A_CALL) and (opsize=S_FAR) then
  656. opcode:=A_LCALL;
  657. if (opcode=A_JMP) and (opsize=S_FAR) then
  658. opcode:=A_LJMP;
  659. if (opcode=A_LCALL) or (opcode=A_LJMP) then
  660. opsize:=S_FAR;
  661. { Condition ? }
  662. if condition<>C_None then
  663. ai.SetCondition(condition);
  664. { Concat the opcode or give an error }
  665. if assigned(ai) then
  666. begin
  667. { Check the instruction if it's valid }
  668. {$ifndef NOAG386BIN}
  669. ai.CheckIfValid;
  670. {$endif NOAG386BIN}
  671. p.concat(ai);
  672. end
  673. else
  674. Message(asmr_e_invalid_opcode_and_operand);
  675. end;
  676. end.
  677. {
  678. $Log$
  679. Revision 1.13 2003-10-30 19:59:00 peter
  680. * support scalefactor for opr_local
  681. * support reference with opr_local set, fixes tw2631
  682. Revision 1.12 2003/10/29 15:40:20 peter
  683. * support indexing and offset retrieval for locals
  684. Revision 1.11 2003/10/21 15:15:36 peter
  685. * taicpu_abstract.oper[] changed to pointers
  686. Revision 1.10 2003/10/01 20:34:51 peter
  687. * procinfo unit contains tprocinfo
  688. * cginfo renamed to cgbase
  689. * moved cgmessage to verbose
  690. * fixed ppc and sparc compiles
  691. Revision 1.9 2003/09/23 17:56:06 peter
  692. * locals and paras are allocated in the code generation
  693. * tvarsym.localloc contains the location of para/local when
  694. generating code for the current procedure
  695. Revision 1.8 2003/09/03 15:55:02 peter
  696. * NEWRA branch merged
  697. Revision 1.7.2.4 2003/08/31 16:18:05 peter
  698. * more fixes
  699. Revision 1.7.2.3 2003/08/29 17:29:00 peter
  700. * next batch of updates
  701. Revision 1.7.2.2 2003/08/28 18:35:08 peter
  702. * tregister changed to cardinal
  703. Revision 1.7.2.1 2003/08/27 21:06:34 peter
  704. * more updates
  705. Revision 1.7 2003/08/26 12:42:45 peter
  706. * fix wrong registers in reference
  707. Revision 1.6 2003/06/20 12:57:15 pierre
  708. * fix a bug preventing correct reading of intel 'mov [edi],al'
  709. Revision 1.5 2003/06/07 10:23:50 peter
  710. * 32bit operands need ofcourse 32bit size
  711. Revision 1.4 2003/05/31 16:22:28 peter
  712. * fixed opsize and operand size setting for 64bit values
  713. Revision 1.3 2003/05/30 23:57:08 peter
  714. * more sparc cleanup
  715. * accumulator removed, splitted in function_return_reg (called) and
  716. function_result_reg (caller)
  717. Revision 1.2 2003/05/22 21:33:31 peter
  718. * removed some unit dependencies
  719. Revision 1.1 2003/04/30 15:45:35 florian
  720. * merged more x86-64/i386 code
  721. Revision 1.30 2003/04/25 12:04:31 florian
  722. * merged agx64att and ag386att to x86/agx86att
  723. Revision 1.29 2003/02/19 22:00:16 daniel
  724. * Code generator converted to new register notation
  725. - Horribily outdated todo.txt removed
  726. Revision 1.28 2003/02/03 22:47:14 daniel
  727. - Removed reg_2_opsize array
  728. Revision 1.27 2003/01/08 18:43:57 daniel
  729. * Tregister changed into a record
  730. Revision 1.26 2002/11/15 01:58:58 peter
  731. * merged changes from 1.0.7 up to 04-11
  732. - -V option for generating bug report tracing
  733. - more tracing for option parsing
  734. - errors for cdecl and high()
  735. - win32 import stabs
  736. - win32 records<=8 are returned in eax:edx (turned off by default)
  737. - heaptrc update
  738. - more info for temp management in .s file with EXTDEBUG
  739. Revision 1.25 2002/10/31 13:28:32 pierre
  740. * correct last wrong fix for tw2158
  741. Revision 1.24 2002/10/30 17:10:00 pierre
  742. * merge of fix for tw2158 bug
  743. Revision 1.23 2002/07/26 21:15:44 florian
  744. * rewrote the system handling
  745. Revision 1.22 2002/07/01 18:46:34 peter
  746. * internal linker
  747. * reorganized aasm layer
  748. Revision 1.21 2002/05/18 13:34:25 peter
  749. * readded missing revisions
  750. Revision 1.20 2002/05/16 19:46:52 carl
  751. + defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand
  752. + try to fix temp allocation (still in ifdef)
  753. + generic constructor calls
  754. + start of tassembler / tmodulebase class cleanup
  755. Revision 1.18 2002/05/12 16:53:18 peter
  756. * moved entry and exitcode to ncgutil and cgobj
  757. * foreach gets extra argument for passing local data to the
  758. iterator function
  759. * -CR checks also class typecasts at runtime by changing them
  760. into as
  761. * fixed compiler to cycle with the -CR option
  762. * fixed stabs with elf writer, finally the global variables can
  763. be watched
  764. * removed a lot of routines from cga unit and replaced them by
  765. calls to cgobj
  766. * u32bit-s32bit updates for and,or,xor nodes. When one element is
  767. u32bit then the other is typecasted also to u32bit without giving
  768. a rangecheck warning/error.
  769. * fixed pascal calling method with reversing also the high tree in
  770. the parast, detected by tcalcst3 test
  771. Revision 1.17 2002/04/15 19:12:09 carl
  772. + target_info.size_of_pointer -> pointer_size
  773. + some cleanup of unused types/variables
  774. * move several constants from cpubase to their specific units
  775. (where they are used)
  776. + att_Reg2str -> gas_reg2str
  777. + int_reg2str -> std_reg2str
  778. Revision 1.16 2002/04/04 19:06:13 peter
  779. * removed unused units
  780. * use tlocation.size in cg.a_*loc*() routines
  781. Revision 1.15 2002/04/02 17:11:39 peter
  782. * tlocation,treference update
  783. * LOC_CONSTANT added for better constant handling
  784. * secondadd splitted in multiple routines
  785. * location_force_reg added for loading a location to a register
  786. of a specified size
  787. * secondassignment parses now first the right and then the left node
  788. (this is compatible with Kylix). This saves a lot of push/pop especially
  789. with string operations
  790. * adapted some routines to use the new cg methods
  791. Revision 1.14 2002/01/24 18:25:53 peter
  792. * implicit result variable generation for assembler routines
  793. * removed m_tp modeswitch, use m_tp7 or not(m_fpc) instead
  794. }