cpubase.inc 6.8 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl and Peter Vreman
  4. Contains the basic declarations for the x86-64 architecture
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. { This include file contains the basic declarations for the x86-64 architecture.
  19. }
  20. {*****************************************************************************
  21. Operand Sizes
  22. *****************************************************************************}
  23. type
  24. topsize = (S_NO,
  25. S_B,S_W,S_L,S_BW,S_BL,S_WL,S_BQ,S_WQ,S_LQ,
  26. S_IS,S_IL,S_IQ,
  27. S_FS,S_FL,S_FX,S_D,S_Q,S_FV,S_FXX,
  28. S_NEAR,S_FAR,S_SHORT
  29. );
  30. {*****************************************************************************
  31. Registers
  32. *****************************************************************************}
  33. const
  34. { Standard opcode string table (for each tasmop enumeration). The
  35. opcode strings should conform to the names as defined by the
  36. processor manufacturer.
  37. }
  38. std_op2str:op2strtable={$i x86_64in.inc}
  39. {*****************************************************************************
  40. Constants
  41. *****************************************************************************}
  42. const
  43. firstsaveintreg = RS_RAX;
  44. lastsaveintreg = RS_R15;
  45. firstsavefpureg = RS_INVALID;
  46. lastsavefpureg = RS_INVALID;
  47. firstsavemmreg = RS_MM0;
  48. lastsavemmreg = RS_MM15;
  49. general_registers = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
  50. general_superregisters = [RS_RAX,RS_RBX,RS_RCX,RS_RDX];
  51. usableregsint = [first_int_imreg..last_int_imreg];
  52. c_countusableregsint = 4;
  53. maxaddrregs = 0;
  54. usableregsaddr = [];
  55. c_countusableregsaddr = 0;
  56. maxvarregs = 4;
  57. varregs : array[1..maxvarregs] of tsuperregister =
  58. (RS_EBX,RS_EDX,RS_ECX,RS_EAX);
  59. maxfpuvarregs = 8;
  60. fpuvarregs : Array [1..maxfpuvarregs] of Tsuperregister =
  61. (RS_MM8,RS_MM9,RS_MM10,RS_MM11,RS_MM12,RS_MM13,RS_MM14,RS_MM15);
  62. {*****************************************************************************
  63. GDB Information
  64. *****************************************************************************}
  65. {# Register indexes for stabs information, when some
  66. parameters or variables are stored in registers.
  67. Taken from i386.c (dbx_register_map) and i386.h
  68. (FIXED_REGISTERS) from GCC 3.x source code
  69. }
  70. stab_regindex : array[tregisterindex] of shortint = (
  71. {$i r8664stab.inc}
  72. );
  73. {*****************************************************************************
  74. Default generic sizes
  75. *****************************************************************************}
  76. { Defines the default address size for a processor, }
  77. OS_ADDR = OS_64;
  78. { the natural int size for a processor, }
  79. OS_INT = OS_64;
  80. { the maximum float size for a processor, }
  81. OS_FLOAT = OS_F80;
  82. { the size of a vector register for a processor }
  83. OS_VECTOR = OS_M64;
  84. {*****************************************************************************
  85. Generic Register names
  86. *****************************************************************************}
  87. {# Stack pointer register }
  88. RS_STACK_POINTER_REG = RS_RSP;
  89. NR_STACK_POINTER_REG = NR_RSP;
  90. {# Frame pointer register }
  91. RS_FRAME_POINTER_REG = RS_EBP;
  92. NR_FRAME_POINTER_REG = NR_RBP;
  93. { Register for addressing absolute data in a position independant way,
  94. such as in PIC code. The exact meaning is ABI specific. For
  95. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  96. }
  97. NR_PIC_OFFSET_REG = NR_EBX;
  98. { Results are returned in this register (both 32 and 64 bits }
  99. NR_FUNCTION_RETURN_REG = NR_RAX;
  100. RS_FUNCTION_RETURN_REG = RS_RAX;
  101. { The value returned from a function is available in this register }
  102. NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
  103. RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
  104. { WARNING: don't change to R_ST0!! See comments above implementation of }
  105. { a_loadfpu* methods in rgcpu (JM) }
  106. NR_FPU_RESULT_REG = NR_ST;
  107. NR_MM_RESULT_REG = NR_MM0;
  108. { Offset where the parent framepointer is pushed }
  109. PARENT_FRAMEPOINTER_OFFSET = 16;
  110. {*****************************************************************************
  111. GCC /ABI linking information
  112. *****************************************************************************}
  113. const
  114. { Registers which must be saved when calling a routine declared as
  115. cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
  116. saved should be the ones as defined in the target ABI and / or GCC.
  117. This value can be deduced from the CALLED_USED_REGISTERS array in the
  118. GCC source.
  119. }
  120. std_saved_registers = [RS_ESI,RS_EDI,RS_EBX];
  121. { Required parameter alignment when calling a routine declared as
  122. stdcall and cdecl. The alignment value should be the one defined
  123. by GCC or the target ABI.
  124. The value of this constant is equal to the constant
  125. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  126. }
  127. std_param_align = 8;
  128. {
  129. $Log$
  130. Revision 1.8 2003-09-25 13:13:32 florian
  131. * more x86-64 fixes
  132. Revision 1.7 2003/09/24 17:12:02 florian
  133. * several fixes for new reg allocator
  134. Revision 1.6 2003/06/03 13:01:59 daniel
  135. * Register allocator finished
  136. Revision 1.5 2003/05/31 15:05:28 peter
  137. * FUNCTION_RESULT64_LOW/HIGH_REG added for int64 results
  138. Revision 1.4 2003/05/30 23:57:08 peter
  139. * more sparc cleanup
  140. * accumulator removed, splitted in function_return_reg (called) and
  141. function_result_reg (caller)
  142. Revision 1.3 2003/04/30 15:45:35 florian
  143. * merged more x86-64/i386 code
  144. Revision 1.2 2002/04/25 16:12:09 florian
  145. * fixed more problems with cpubase and x86-64
  146. Revision 1.1 2003/04/25 11:12:09 florian
  147. * merged i386/cpubase and x86_64/cpubase to x86/cpubase;
  148. different stuff went to cpubase.inc
  149. }