aoptcpu.pas 32 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses
  22. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai, aasmcpu;
  23. Type
  24. TAsmOpSet = set of TAsmOp;
  25. TCpuAsmOptimizer = class(TAsmOptimizer)
  26. function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
  27. function GetNextInstructionUsingReg(Current: tai;
  28. var Next: tai; reg: TRegister): Boolean;
  29. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  30. function TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  31. function TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2; override;
  34. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  35. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  36. End;
  37. Implementation
  38. uses
  39. cutils,globtype,globals,aasmbase,cpuinfo,verbose;
  40. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  41. begin
  42. result :=
  43. (instr.typ = ait_instruction) and
  44. (taicpu(instr).opcode = op);
  45. end;
  46. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  47. begin
  48. result:=(oper.typ=top_reg) and (oper.reg=reg);
  49. end;
  50. function IsSameReg(this,next: taicpu): boolean;
  51. begin
  52. result:=(next.oper[0]^.typ=top_reg) and
  53. (next.oper[1]^.typ=top_reg) and
  54. (next.oper[0]^.reg=next.oper[1]^.reg) and
  55. (next.oper[0]^.reg=this.oper[0]^.reg);
  56. end;
  57. function CanBeCMOV(p: tai; condreg: tregister): boolean;
  58. begin
  59. result:=assigned(p) and (p.typ=ait_instruction) and
  60. ((taicpu(p).opcode in [A_MOV_D,A_MOV_S]) or
  61. (
  62. { register with condition must not be overwritten }
  63. (taicpu(p).opcode=A_MOVE) and
  64. (taicpu(p).oper[0]^.reg<>condreg)
  65. ));
  66. end;
  67. procedure ChangeToCMOV(p: taicpu; cond: tasmcond; reg: tregister);
  68. begin
  69. case cond of
  70. C_COP1TRUE:
  71. case p.opcode of
  72. A_MOV_D: p.opcode:=A_MOVT_D;
  73. A_MOV_S: p.opcode:=A_MOVT_S;
  74. A_MOVE: p.opcode:=A_MOVT;
  75. else
  76. InternalError(2014061701);
  77. end;
  78. C_COP1FALSE:
  79. case p.opcode of
  80. A_MOV_D: p.opcode:=A_MOVF_D;
  81. A_MOV_S: p.opcode:=A_MOVF_S;
  82. A_MOVE: p.opcode:=A_MOVF;
  83. else
  84. InternalError(2014061702);
  85. end;
  86. C_EQ:
  87. case p.opcode of
  88. A_MOV_D: p.opcode:=A_MOVZ_D;
  89. A_MOV_S: p.opcode:=A_MOVZ_S;
  90. A_MOVE: p.opcode:=A_MOVZ;
  91. else
  92. InternalError(2014061703);
  93. end;
  94. C_NE:
  95. case p.opcode of
  96. A_MOV_D: p.opcode:=A_MOVN_D;
  97. A_MOV_S: p.opcode:=A_MOVN_S;
  98. A_MOVE: p.opcode:=A_MOVN;
  99. else
  100. InternalError(2014061704);
  101. end;
  102. else
  103. InternalError(2014061705);
  104. end;
  105. p.ops:=3;
  106. p.loadreg(2,reg);
  107. end;
  108. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  109. var
  110. p: taicpu;
  111. i: longint;
  112. begin
  113. result:=false;
  114. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  115. exit;
  116. p:=taicpu(hp);
  117. i:=1;
  118. while(i<p.ops) do
  119. begin
  120. case p.oper[I]^.typ of
  121. top_reg:
  122. result:=(p.oper[I]^.reg=reg) and (I<2);
  123. top_ref:
  124. result:=
  125. (p.oper[I]^.ref^.base=reg) or
  126. (p.oper[I]^.ref^.index=reg);
  127. end;
  128. if result then exit; {Bailout if we found something}
  129. Inc(I);
  130. end;
  131. end;
  132. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  133. var
  134. p: taicpu;
  135. begin
  136. p:=taicpu(hp);
  137. result:=false;
  138. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  139. exit;
  140. case p.opcode of
  141. { These instructions do not write into a register at all }
  142. A_NOP,
  143. A_C_EQ_D,A_C_EQ_S,A_C_LE_D,A_C_LE_S,A_C_LT_D,A_C_LT_S,
  144. A_BA,A_BC,
  145. A_SB,A_SH,A_SW,A_SWL,A_SWR,A_SWC1,A_SDC1:
  146. exit;
  147. end;
  148. result:=(p.ops>0) and (p.oper[0]^.typ=top_reg) and
  149. (p.oper[0]^.reg=reg);
  150. end;
  151. function TCpuAsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
  152. var
  153. i : Longint;
  154. begin
  155. result:=false;
  156. for i:=0 to taicpu(p1).ops-1 do
  157. if (taicpu(p1).oper[i]^.typ=top_reg) and (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
  158. begin
  159. result:=true;
  160. exit;
  161. end;
  162. end;
  163. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  164. var Next: tai; reg: TRegister): Boolean;
  165. begin
  166. Next:=Current;
  167. repeat
  168. Result:=GetNextInstruction(Next,Next);
  169. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  170. (is_calljmp(taicpu(Next).opcode));
  171. if Result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  172. begin
  173. result:=false;
  174. next:=nil;
  175. end;
  176. end;
  177. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  178. var
  179. next,hp1: tai;
  180. alloc,dealloc: tai_regalloc;
  181. begin
  182. { Fold
  183. op $reg1,...
  184. opcode $reg2,$reg1
  185. dealloc $reg1
  186. into
  187. op $reg2,...
  188. opcode may be A_MOVE, A_MOV_s, A_MOV_d, etc.
  189. }
  190. result:=false;
  191. if (taicpu(p).ops>0) and
  192. GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  193. MatchInstruction(next,opcode) and
  194. MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  195. { the destination register of mov cannot be used between p and next }
  196. (not RegUsedBetween(taicpu(next).oper[0]^.reg,p,next)) then
  197. begin
  198. dealloc:=FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.Next));
  199. if assigned(dealloc) then
  200. begin
  201. { taicpu(p).oper[0]^.reg is not used anymore, try to find its allocation
  202. and remove it if possible }
  203. GetLastInstruction(p,hp1);
  204. asml.Remove(dealloc);
  205. alloc:=FindRegAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  206. if assigned(alloc) then
  207. begin
  208. asml.Remove(alloc);
  209. alloc.free;
  210. dealloc.free;
  211. end
  212. else
  213. asml.InsertAfter(dealloc,p);
  214. { try to move the allocation of the target register }
  215. GetLastInstruction(next,hp1);
  216. alloc:=FindRegAlloc(taicpu(next).oper[0]^.reg,tai(hp1.Next));
  217. if assigned(alloc) then
  218. begin
  219. asml.Remove(alloc);
  220. asml.InsertBefore(alloc,p);
  221. { adjust used regs }
  222. IncludeRegInUsedRegs(taicpu(next).oper[0]^.reg,UsedRegs);
  223. end;
  224. { finally get rid of the mov }
  225. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  226. asml.remove(next);
  227. next.free;
  228. result:=true;
  229. end
  230. else // no dealloc found
  231. begin
  232. { try to optimize the typical call sequence
  233. lw $reg, (whatever)
  234. <alloc volatile registers>
  235. move $t9,$reg
  236. jalr $t9
  237. Do not do so if the used register might contain a
  238. register variable. }
  239. if (opcode=A_MOVE) and
  240. not(cs_opt_regvar in current_settings.optimizerswitches) and
  241. (taicpu(next).oper[0]^.reg=NR_R25) and
  242. GetNextInstruction(next,hp1) and
  243. MatchInstruction(hp1,A_JALR) and
  244. MatchOperand(taicpu(hp1).oper[0]^,NR_R25) then
  245. begin
  246. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  247. asml.remove(next);
  248. next.free;
  249. result:=true;
  250. end;
  251. end;
  252. end;
  253. end;
  254. function TCpuAsmOptimizer.TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  255. begin
  256. result:=(next.opcode in storeops) and
  257. MatchOperand(next.oper[0]^,taicpu(p).oper[0]^.reg) and
  258. { Ry cannot be modified between move and store }
  259. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  260. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  261. if result then
  262. begin
  263. next.loadreg(0,taicpu(p).oper[1]^.reg);
  264. asml.remove(p);
  265. p.free;
  266. p:=next;
  267. end;
  268. end;
  269. function TCpuAsmOptimizer.TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  270. begin
  271. result:=(next.ops>1) and
  272. (next.oper[1]^.typ=top_ref) and
  273. (next.oper[1]^.ref^.refaddr<>addr_full) and
  274. (next.oper[1]^.ref^.base=taicpu(p).oper[0]^.reg) and
  275. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  276. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  277. if result then
  278. begin
  279. next.oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  280. asml.remove(p);
  281. p.free;
  282. p:=next;
  283. end;
  284. end;
  285. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  286. var
  287. next,next2: tai;
  288. begin
  289. result:=false;
  290. case p.typ of
  291. ait_instruction:
  292. begin
  293. case taicpu(p).opcode of
  294. A_SEH:
  295. begin
  296. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  297. MatchInstruction(next,A_SH) and
  298. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
  299. (not RegUsedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  300. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  301. begin
  302. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  303. asml.remove(p);
  304. p.free;
  305. p:=next;
  306. end
  307. else
  308. TryRemoveMov(p,A_MOVE);
  309. end;
  310. A_SEB:
  311. { TODO: can be handled similar to A_SEH, but it's almost never encountered }
  312. TryRemoveMov(p,A_MOVE);
  313. A_SLL:
  314. begin
  315. { if this is a sign extension... }
  316. if (taicpu(p).oper[2]^.typ=top_const) and
  317. GetNextInstruction(p,next) and
  318. MatchInstruction(next,A_SRA) and
  319. IsSameReg(taicpu(p),taicpu(next)) and
  320. (taicpu(next).oper[2]^.typ=top_const) and
  321. (taicpu(next).oper[2]^.val=taicpu(p).oper[2]^.val) and
  322. (taicpu(next).oper[2]^.val=16) and
  323. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  324. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[0]^.reg) and
  325. MatchInstruction(next2,A_SH) and
  326. (taicpu(next2).oper[0]^.typ=top_reg) and
  327. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  328. { the initial register may not be reused }
  329. (not RegUsedBetween(taicpu(p).oper[1]^.reg,next,next2)) then
  330. begin
  331. if Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next2.next))) then
  332. begin
  333. taicpu(next2).loadreg(0,taicpu(p).oper[1]^.reg);
  334. asml.remove(p);
  335. asml.remove(next);
  336. p.free;
  337. next.free;
  338. p:=next2;
  339. end;
  340. end
  341. else
  342. TryRemoveMov(p,A_MOVE);
  343. end;
  344. A_SRL:
  345. begin
  346. { TODO: also kill sign-extensions that follow, both SLL+SRA and SEB/SEH versions }
  347. { Remove 'andi' in sequences
  348. srl Rx,Ry,16
  349. andi Rx,Rx,65535
  350. srl Rx,Ry,24
  351. andi Rx,Rx,255
  352. since 'srl' clears all relevant upper bits }
  353. if (taicpu(p).oper[2]^.typ=top_const) and
  354. GetNextInstruction(p,next) and
  355. MatchInstruction(next,A_ANDI) and
  356. IsSameReg(taicpu(p),taicpu(next)) and
  357. (taicpu(next).oper[2]^.typ=top_const) and
  358. ((
  359. (taicpu(p).oper[2]^.val>=16) and
  360. (taicpu(next).oper[2]^.val=65535)
  361. ) or (
  362. (taicpu(p).oper[2]^.val>=24) and
  363. (taicpu(next).oper[2]^.val=255)
  364. )) then
  365. begin
  366. asml.remove(next);
  367. next.free;
  368. end
  369. else
  370. TryRemoveMov(p,A_MOVE);
  371. end;
  372. A_ANDI:
  373. begin
  374. { Remove sign extension after 'andi' if bit 7/15 of const operand is clear }
  375. if (taicpu(p).oper[2]^.typ=top_const) and
  376. GetNextInstruction(p,next) and
  377. MatchInstruction(next,A_SLL) and
  378. GetNextInstruction(next,next2) and
  379. MatchInstruction(next2,A_SRA) and
  380. IsSameReg(taicpu(p),taicpu(next)) and
  381. IsSameReg(taicpu(p),taicpu(next2)) and
  382. (taicpu(next).oper[2]^.typ=top_const) and
  383. (taicpu(next2).oper[2]^.typ=top_const) and
  384. (taicpu(next).oper[2]^.val=taicpu(next2).oper[2]^.val) and
  385. ((
  386. (taicpu(p).oper[2]^.val<=$7fff) and
  387. (taicpu(next).oper[2]^.val=16)
  388. ) or (
  389. (taicpu(p).oper[2]^.val<=$7f) and
  390. (taicpu(next).oper[2]^.val=24)
  391. )) then
  392. begin
  393. asml.remove(next);
  394. asml.remove(next2);
  395. next.free;
  396. next2.free;
  397. end
  398. { Remove zero extension if register is used only for byte/word memory store }
  399. else if (taicpu(p).oper[2]^.typ=top_const) and
  400. GetNextInstruction(p,next) and
  401. ((taicpu(p).oper[2]^.val=255) and MatchInstruction(next,A_SB)) or
  402. ((taicpu(p).oper[2]^.val=65535) and MatchInstruction(next,A_SH)) and
  403. (taicpu(next).oper[0]^.typ=top_reg) and
  404. (taicpu(next).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  405. assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  406. begin
  407. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  408. asml.remove(p);
  409. p.free;
  410. p:=next;
  411. end
  412. else
  413. TryRemoveMov(p,A_MOVE);
  414. end;
  415. A_MOV_S:
  416. begin
  417. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  418. (next.typ=ait_instruction) then
  419. begin
  420. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SWC1]) then
  421. { optimization successful };
  422. end;
  423. end;
  424. A_MOV_D:
  425. begin
  426. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  427. (next.typ=ait_instruction) then
  428. begin
  429. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SDC1]) then
  430. { optimization successful };
  431. end;
  432. end;
  433. A_MOVE:
  434. begin
  435. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  436. (next.typ=ait_instruction) and
  437. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  438. begin
  439. { MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
  440. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
  441. { optimization successful }
  442. else if TryRemoveMovToRefIndex(p,taicpu(next)) then
  443. { successful as well }
  444. { MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
  445. MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
  446. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU]) and
  447. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  448. begin
  449. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  450. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  451. begin
  452. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  453. asml.remove(p);
  454. p.free;
  455. p:=next;
  456. end
  457. { TODO: if Ry=NR_R0, this effectively changes instruction into MOVE,
  458. providing further optimization possibilities }
  459. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) and
  460. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  461. begin
  462. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  463. asml.remove(p);
  464. p.free;
  465. p:=next;
  466. end;
  467. end
  468. { MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
  469. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU,A_DIV,A_DIVU]) and
  470. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  471. begin
  472. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  473. begin
  474. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  475. asml.remove(p);
  476. p.free;
  477. p:=next;
  478. end
  479. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  480. begin
  481. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  482. asml.remove(p);
  483. p.free;
  484. p:=next;
  485. end;
  486. end
  487. { MULT[U] must be handled separately due to different operand numbers }
  488. else if (taicpu(next).opcode in [A_MULT,A_MULTU]) and
  489. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  490. begin
  491. if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  492. begin
  493. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  494. asml.remove(p);
  495. p.free;
  496. p:=next;
  497. end
  498. else if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  499. begin
  500. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  501. asml.remove(p);
  502. p.free;
  503. p:=next;
  504. end;
  505. end
  506. else if TryRemoveMov(p,A_MOVE) then
  507. begin
  508. { Ended up with move between same register? Suicide then. }
  509. if (taicpu(p).oper[0]^.reg=taicpu(p).oper[1]^.reg) then
  510. begin
  511. GetNextInstruction(p,next);
  512. asml.remove(p);
  513. p.free;
  514. p:=next;
  515. end;
  516. end;
  517. { TODO: MOVE Rx,Ry; Bcc Rx,Rz,label; dealloc Rx ==> Bcc Ry,Rz,label }
  518. end;
  519. end;
  520. A_ADDIU:
  521. begin
  522. { ADDIU Rx,Ry,const; load/store Rz,(Rx); dealloc Rx ==> load/store Rz,const(Ry)
  523. ADDIU Rx,Ry,%lo(sym); load/store Rz,(Rx); dealloc Rx ==> load/store Rz,%lo(sym)(Ry)
  524. ADDIU Rx,Ry,const; load Rx,(Rx) ==> load Rx,const(Ry)
  525. ADDIU Rx,Ry,%lo(sym); load Rx,(Rx) ==> load Rx,%lo(sym)(Ry) }
  526. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  527. (next.typ=ait_instruction) and
  528. (taicpu(next).opcode in [A_LB,A_LBU,A_LH,A_LHU,A_LW,A_SB,A_SH,A_SW]) and
  529. (taicpu(p).oper[0]^.reg=taicpu(next).oper[1]^.ref^.base) and
  530. (taicpu(next).oper[1]^.ref^.offset=0) and
  531. (taicpu(next).oper[1]^.ref^.symbol=nil) and
  532. (
  533. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) or
  534. (
  535. (taicpu(p).oper[0]^.reg=taicpu(next).oper[0]^.reg) and
  536. (taicpu(next).opcode in [A_LB,A_LBU,A_LH,A_LHU,A_LW])
  537. )
  538. ) and
  539. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  540. begin
  541. case taicpu(p).oper[2]^.typ of
  542. top_const:
  543. taicpu(next).oper[1]^.ref^.offset:=taicpu(p).oper[2]^.val;
  544. top_ref:
  545. taicpu(next).oper[1]^.ref^:=taicpu(p).oper[2]^.ref^;
  546. else
  547. InternalError(2014100401);
  548. end;
  549. taicpu(next).oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  550. asml.remove(p);
  551. p.free;
  552. p:=next;
  553. result:=true;
  554. end
  555. else
  556. result:=TryRemoveMov(p,A_MOVE);
  557. end;
  558. A_LB,A_LBU,A_LH,A_LHU,A_LW,
  559. A_ADD,A_ADDU,
  560. A_ADDI,
  561. A_SUB,A_SUBU,
  562. A_SRA,A_SRAV,
  563. A_SRLV,
  564. A_SLLV,
  565. A_MFLO,A_MFHI,
  566. A_AND,A_OR,A_XOR,A_ORI,A_XORI:
  567. TryRemoveMov(p,A_MOVE);
  568. A_LWC1,
  569. A_ADD_s, A_SUB_s, A_MUL_s, A_DIV_s,
  570. A_ABS_s, A_NEG_s, A_SQRT_s,
  571. A_CVT_s_w, A_CVT_s_l, A_CVT_s_d:
  572. TryRemoveMov(p,A_MOV_s);
  573. A_LDC1,
  574. A_ADD_d, A_SUB_d, A_MUL_d, A_DIV_d,
  575. A_ABS_d, A_NEG_d, A_SQRT_d,
  576. A_CVT_d_w, A_CVT_d_l, A_CVT_d_s:
  577. TryRemoveMov(p,A_MOV_d);
  578. end;
  579. end;
  580. end;
  581. end;
  582. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  583. var
  584. p: tai;
  585. l: longint;
  586. hp1,hp2,hp3: tai;
  587. condition: tasmcond;
  588. condreg: tregister;
  589. begin
  590. { Currently, everything below is mips4+ }
  591. if (current_settings.cputype<cpu_mips4) then
  592. exit;
  593. p:=BlockStart;
  594. ClearUsedRegs;
  595. while (p<>BlockEnd) Do
  596. begin
  597. UpdateUsedRegs(tai(p.next));
  598. case p.typ of
  599. ait_instruction:
  600. begin
  601. case taicpu(p).opcode of
  602. A_BC:
  603. begin
  604. condreg:=NR_NO;
  605. if (taicpu(p).condition in [C_COP1TRUE,C_COP1FALSE]) then
  606. { TODO: must be taken from "p" if/when codegen makes use of multiple %fcc }
  607. condreg:=NR_FCC0
  608. else if (taicpu(p).condition in [C_EQ,C_NE]) then
  609. begin
  610. if (taicpu(p).oper[0]^.reg=NR_R0) then
  611. condreg:=taicpu(p).oper[1]^.reg
  612. else if (taicpu(p).oper[1]^.reg=NR_R0) then
  613. condreg:=taicpu(p).oper[0]^.reg
  614. end;
  615. if (condreg<>NR_NO) then
  616. begin
  617. { check for
  618. bCC xxx
  619. <several movs>
  620. xxx:
  621. }
  622. l:=0;
  623. GetNextInstruction(p, hp1);
  624. while CanBeCMOV(hp1,condreg) do // CanBeCMOV returns False for nil or labels
  625. begin
  626. inc(l);
  627. GetNextInstruction(hp1,hp1);
  628. end;
  629. if assigned(hp1) then
  630. begin
  631. if FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  632. begin
  633. if (l<=4) and (l>0) then
  634. begin
  635. condition:=inverse_cond(taicpu(p).condition);
  636. hp2:=p;
  637. GetNextInstruction(p,hp1);
  638. p:=hp1;
  639. repeat
  640. ChangeToCMOV(taicpu(hp1),condition,condreg);
  641. GetNextInstruction(hp1,hp1);
  642. until not CanBeCMOV(hp1,condreg);
  643. { wait with removing else GetNextInstruction could
  644. ignore the label if it was the only usage in the
  645. jump moved away }
  646. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  647. RemoveDelaySlot(hp2);
  648. asml.remove(hp2);
  649. hp2.free;
  650. continue;
  651. end;
  652. end
  653. else
  654. begin
  655. { check further for
  656. bCC xxx
  657. <several movs 1>
  658. b yyy
  659. xxx:
  660. <several movs 2>
  661. yyy:
  662. }
  663. { hp2 points to jmp yyy }
  664. hp2:=hp1;
  665. { skip hp1 to xxx }
  666. GetNextInstruction(hp1, hp1);
  667. if assigned(hp2) and
  668. assigned(hp1) and
  669. (l<=3) and
  670. (hp2.typ=ait_instruction) and
  671. (taicpu(hp2).opcode=A_BA) and
  672. { real label and jump, no further references to the
  673. label are allowed }
  674. (tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol).getrefs<=2) and
  675. FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  676. begin
  677. l:=0;
  678. { skip hp1 to <several moves 2> }
  679. GetNextInstruction(hp1, hp1);
  680. while CanBeCMOV(hp1,condreg) do
  681. begin
  682. inc(l);
  683. GetNextInstruction(hp1, hp1);
  684. end;
  685. { hp1 points to yyy: }
  686. if assigned(hp1) and (l<=3) and
  687. FindLabel(tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol),hp1) then
  688. begin
  689. condition:=inverse_cond(taicpu(p).condition);
  690. GetNextInstruction(p,hp1);
  691. hp3:=p;
  692. p:=hp1;
  693. while CanBeCMOV(hp1,condreg) do
  694. begin
  695. ChangeToCMOV(taicpu(hp1),condition,condreg);
  696. GetNextInstruction(hp1,hp1);
  697. end;
  698. { hp2 is still at b yyy }
  699. GetNextInstruction(hp2,hp1);
  700. { hp2 is now at xxx: }
  701. condition:=inverse_cond(condition);
  702. GetNextInstruction(hp1,hp1);
  703. { hp1 is now at <several movs 2> }
  704. while CanBeCMOV(hp1,condreg) do
  705. begin
  706. ChangeToCMOV(taicpu(hp1),condition,condreg);
  707. GetNextInstruction(hp1,hp1);
  708. end;
  709. { remove bCC }
  710. tasmlabel(taicpu(hp3).oper[taicpu(hp3).ops-1]^.ref^.symbol).decrefs;
  711. RemoveDelaySlot(hp3);
  712. asml.remove(hp3);
  713. hp3.free;
  714. { remove jmp }
  715. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  716. RemoveDelaySlot(hp2);
  717. asml.remove(hp2);
  718. hp2.free;
  719. continue;
  720. end;
  721. end;
  722. end;
  723. end;
  724. end;
  725. end;
  726. end;
  727. end;
  728. end;
  729. UpdateUsedRegs(p);
  730. p:=tai(p.next);
  731. end;
  732. end;
  733. begin
  734. casmoptimizer:=TCpuAsmOptimizer;
  735. end.