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aasmcpu.pas
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71e492db1b
made arm-linux system unit compilable on anything but Thumb2 after r26161
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%!s(int64=11) %!d(string=hai) anos |
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agarmgas.pas
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d4968e054b
+ arm: tsettings.instructionset
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%!s(int64=12) %!d(string=hai) anos |
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aoptcpu.pas
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d24cbbf9f5
Changed debug information to dwarf for ARM_embedded, and set local minimum alignment to 4.
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%!s(int64=11) %!d(string=hai) anos |
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aoptcpub.pas
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7e5b8584cf
* set MaxOps to 4 for the optimizer because fpc generates now mla instructions
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%!s(int64=13) %!d(string=hai) anos |
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aoptcpuc.pas
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790a4fe2d3
* log and id tags removed
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%!s(int64=20) %!d(string=hai) anos |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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%!s(int64=20) %!d(string=hai) anos |
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armatt.inc
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b67e4fb8b3
added the ADR ARM pseudo instruction to instruction list
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%!s(int64=11) %!d(string=hai) anos |
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armatts.inc
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b67e4fb8b3
added the ADR ARM pseudo instruction to instruction list
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%!s(int64=11) %!d(string=hai) anos |
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armins.dat
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b67e4fb8b3
added the ADR ARM pseudo instruction to instruction list
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%!s(int64=11) %!d(string=hai) anos |
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armnop.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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%!s(int64=13) %!d(string=hai) anos |
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armop.inc
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b67e4fb8b3
added the ADR ARM pseudo instruction to instruction list
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%!s(int64=11) %!d(string=hai) anos |
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armreg.dat
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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armtab.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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%!s(int64=13) %!d(string=hai) anos |
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cgcpu.pas
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3ab665e554
Try to split constant XORs into two shiftimms on ARM.
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%!s(int64=11) %!d(string=hai) anos |
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cpubase.pas
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fb52392e20
Reformat and comment is_thumb32_imm
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%!s(int64=11) %!d(string=hai) anos |
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cpuelf.pas
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97a706c672
+ Add definitions for ELF header flags.
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%!s(int64=11) %!d(string=hai) anos |
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cpuinfo.pas
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e5b3d89a5d
Add CPUARM_HAS_UMULL flag
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%!s(int64=11) %!d(string=hai) anos |
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cpunode.pas
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638d0d49c0
+ take advantage of the mla instruction when calculating array offsets
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%!s(int64=13) %!d(string=hai) anos |
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cpupara.pas
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de3a116a28
* handle records with size 0 as function results correctly
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%!s(int64=11) %!d(string=hai) anos |
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cpupi.pas
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123742647c
Fixed problem in estimation of stack size for thumb targets. Types passed by value were not handled properly.
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%!s(int64=11) %!d(string=hai) anos |
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cputarg.pas
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d26f0552a0
* Sync with trunk r23404.
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%!s(int64=12) %!d(string=hai) anos |
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hlcgcpu.pas
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72e9cfee24
* create/destroy also the high level code generator for all architectures,
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%!s(int64=14) %!d(string=hai) anos |
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itcpugas.pas
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47d43750e4
* remove unused units from uses statements
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%!s(int64=12) %!d(string=hai) anos |
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narmadd.pas
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a3efd9e1df
+ Added method taddnode.use_generic_mul64bit, allowing it to inline full 64-bit multiplications, and fixed ARM to comply (it was not checking for possible 32x32 to 64 optimization after detecting a 64-bit operand, so recently added code for 32x32 to 64 bit optimization was inactive).
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%!s(int64=11) %!d(string=hai) anos |
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narmcal.pas
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8b8a786823
* moved ARM/x86 ifdef'ed code from ncgcal to virtual methods
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%!s(int64=12) %!d(string=hai) anos |
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narmcnv.pas
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5051453806
+ support for LOC_(C)MMREGISTER in hlcg
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%!s(int64=12) %!d(string=hai) anos |
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narmcon.pas
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47d43750e4
* remove unused units from uses statements
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%!s(int64=12) %!d(string=hai) anos |
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narminl.pas
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2c49af3191
added missing closing parentheses
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%!s(int64=12) %!d(string=hai) anos |
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narmmat.pas
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d24cbbf9f5
Changed debug information to dwarf for ARM_embedded, and set local minimum alignment to 4.
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%!s(int64=11) %!d(string=hai) anos |
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narmmem.pas
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d4968e054b
+ arm: tsettings.instructionset
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%!s(int64=12) %!d(string=hai) anos |
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narmset.pas
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24d88edf37
* fixes arm building after 26004
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%!s(int64=11) %!d(string=hai) anos |
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pp.lpi.template
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1f032375c3
* improved template with help from Mattias Gaertner
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%!s(int64=19) %!d(string=hai) anos |
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raarm.pas
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780e75bfac
o patch by Jeppe Johansen to fix mantis #17472:
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%!s(int64=14) %!d(string=hai) anos |
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raarmgas.pas
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628149d923
support label offsets for ARM like GAS, allows things like ADR r4, .label + 256
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%!s(int64=11) %!d(string=hai) anos |
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rarmcon.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rarmdwa.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rarmnor.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rarmnum.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rarmrni.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rarmsri.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rarmsta.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rarmstd.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rarmsup.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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%!s(int64=13) %!d(string=hai) anos |
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rgcpu.pas
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d4968e054b
+ arm: tsettings.instructionset
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%!s(int64=12) %!d(string=hai) anos |
sergei
a3efd9e1df
+ Added method taddnode.use_generic_mul64bit, allowing it to inline full 64-bit multiplications, and fixed ARM to comply (it was not checking for possible 32x32 to 64 optimization after detecting a 64-bit operand, so recently added code for 32x32 to 64 bit optimization was inactive).