cg386mat.pas 42 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Generate i386 assembler for math nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cg386mat;
  19. interface
  20. uses
  21. tree;
  22. procedure secondmoddiv(var p : ptree);
  23. procedure secondshlshr(var p : ptree);
  24. procedure secondunaryminus(var p : ptree);
  25. procedure secondnot(var p : ptree);
  26. implementation
  27. uses
  28. globtype,systems,
  29. cutils,cobjects,verbose,globals,
  30. symconst,symtable,aasm,types,
  31. hcodegen,temp_gen,pass_2,
  32. cpubase,cpuasm,
  33. {$ifdef dummy}
  34. end { this overcomes the annoying highlighting problem in my TP IDE,
  35. the IDE assumes i386asm start a asm block (FK) }
  36. {$endif}
  37. cgai386,tgeni386;
  38. {*****************************************************************************
  39. SecondModDiv
  40. *****************************************************************************}
  41. procedure secondmoddiv(var p : ptree);
  42. var
  43. hreg1 : tregister;
  44. hreg2 : tregister;
  45. shrdiv, andmod, pushed,popeax,popedx : boolean;
  46. power : longint;
  47. hl : pasmlabel;
  48. hloc : tlocation;
  49. pushedreg : tpushed;
  50. typename,opname : string[6];
  51. begin
  52. shrdiv := false;
  53. andmod := false;
  54. secondpass(p^.left);
  55. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  56. secondpass(p^.right);
  57. if pushed then
  58. restore(p^.left,is_64bitint(p^.left^.resulttype));
  59. set_location(p^.location,p^.left^.location);
  60. if is_64bitint(p^.resulttype) then
  61. begin
  62. { save p^.lcoation, because we change it now }
  63. set_location(hloc,p^.location);
  64. release_qword_loc(p^.location);
  65. release_qword_loc(p^.right^.location);
  66. p^.location.registerlow:=getexplicitregister32(R_EAX);
  67. p^.location.registerhigh:=getexplicitregister32(R_EDX);
  68. pushusedregisters(pushedreg,$ff
  69. and not($80 shr byte(p^.location.registerlow))
  70. and not($80 shr byte(p^.location.registerhigh)));
  71. { the left operand is in hloc, because the
  72. location of left is p^.location but p^.location
  73. is already destroyed
  74. }
  75. emit_pushq_loc(hloc);
  76. clear_location(hloc);
  77. emit_pushq_loc(p^.right^.location);
  78. if porddef(p^.resulttype)^.typ=u64bit then
  79. typename:='QWORD'
  80. else
  81. typename:='INT64';
  82. if p^.treetype=divn then
  83. opname:='DIV_'
  84. else
  85. opname:='MOD_';
  86. emitcall('FPC_'+opname+typename);
  87. emit_reg_reg(A_MOV,S_L,R_EAX,p^.location.registerlow);
  88. emit_reg_reg(A_MOV,S_L,R_EDX,p^.location.registerhigh);
  89. popusedregisters(pushedreg);
  90. p^.location.loc:=LOC_REGISTER;
  91. end
  92. else
  93. begin
  94. { put numerator in register }
  95. if p^.left^.location.loc<>LOC_REGISTER then
  96. begin
  97. if p^.left^.location.loc=LOC_CREGISTER then
  98. begin
  99. hreg1:=getregister32;
  100. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,hreg1);
  101. end
  102. else
  103. begin
  104. del_reference(p^.left^.location.reference);
  105. hreg1:=getregister32;
  106. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  107. hreg1);
  108. end;
  109. clear_location(p^.left^.location);
  110. p^.left^.location.loc:=LOC_REGISTER;
  111. p^.left^.location.register:=hreg1;
  112. end
  113. else hreg1:=p^.left^.location.register;
  114. if (p^.treetype=divn) and (p^.right^.treetype=ordconstn) and
  115. ispowerof2(p^.right^.value,power) then
  116. Begin
  117. shrdiv := true;
  118. {for signed numbers, the numerator must be adjusted before the
  119. shift instruction, but not wih unsigned numbers! Otherwise,
  120. "Cardinal($ffffffff) div 16" overflows! (JM)}
  121. If is_signed(p^.left^.resulttype) Then
  122. Begin
  123. If (aktOptProcessor <> class386) and
  124. not(CS_LittleSize in aktglobalswitches) then
  125. { use a sequence without jumps, saw this in
  126. comp.compilers (JM) }
  127. begin
  128. { no jumps, but more operations }
  129. if (hreg1 = R_EAX) and
  130. (R_EDX in unused) then
  131. begin
  132. hreg2 := getexplicitregister32(R_EDX);
  133. emit_none(A_CDQ,S_NO);
  134. end
  135. else
  136. begin
  137. {$ifndef noAllocEdi}
  138. getexplicitregister32(R_EDI);
  139. {$endif noAllocEdi}
  140. hreg2 := R_EDI;
  141. emit_reg_reg(A_MOV,S_L,hreg1,R_EDI);
  142. { if the left value is signed, R_EDI := $ffffffff,
  143. otherwise 0 }
  144. emit_const_reg(A_SAR,S_L,31,R_EDI);
  145. { if signed, R_EDI := right value-1, otherwise 0 }
  146. end;
  147. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg2);
  148. { add to the left value }
  149. emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
  150. { release EDX if we used it }
  151. {$ifndef noAllocEdi}
  152. { also releas EDI }
  153. ungetregister32(hreg2);
  154. {$else noAllocEdi}
  155. if (hreg2 = R_EDX) then
  156. ungetregister32(hreg2);
  157. {$endif noAllocEdi}
  158. { do the shift }
  159. emit_const_reg(A_SAR,S_L,power,hreg1);
  160. end
  161. else
  162. begin
  163. { a jump, but less operations }
  164. emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
  165. getlabel(hl);
  166. emitjmp(C_NS,hl);
  167. if power=1 then
  168. emit_reg(A_INC,S_L,hreg1)
  169. else
  170. emit_const_reg(A_ADD,S_L,p^.right^.value-1,hreg1);
  171. emitlab(hl);
  172. emit_const_reg(A_SAR,S_L,power,hreg1);
  173. end
  174. End
  175. Else
  176. emit_const_reg(A_SHR,S_L,power,hreg1);
  177. End
  178. else
  179. if (p^.treetype=modn) and (p^.right^.treetype=ordconstn) and
  180. ispowerof2(p^.right^.value,power) and Not(is_signed(p^.left^.resulttype)) Then
  181. {is there a similar trick for MOD'ing signed numbers? (JM)}
  182. Begin
  183. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg1);
  184. andmod := true;
  185. End
  186. else
  187. begin
  188. { bring denominator to EDI }
  189. { EDI is always free, it's }
  190. { only used for temporary }
  191. { purposes }
  192. {$ifndef noAllocEdi}
  193. getexplicitregister32(R_EDI);
  194. {$endif noAllocEdi}
  195. if (p^.right^.location.loc<>LOC_REGISTER) and
  196. (p^.right^.location.loc<>LOC_CREGISTER) then
  197. begin
  198. del_reference(p^.right^.location.reference);
  199. p^.left^.location.loc:=LOC_REGISTER;
  200. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),R_EDI);
  201. end
  202. else
  203. begin
  204. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,R_EDI);
  205. ungetregister32(p^.right^.location.register);
  206. end;
  207. popedx:=false;
  208. popeax:=false;
  209. if hreg1=R_EDX then
  210. begin
  211. if not(R_EAX in unused) then
  212. begin
  213. emit_reg(A_PUSH,S_L,R_EAX);
  214. popeax:=true;
  215. end;
  216. emit_reg_reg(A_MOV,S_L,R_EDX,R_EAX);
  217. end
  218. else
  219. begin
  220. if not(R_EDX in unused) then
  221. begin
  222. emit_reg(A_PUSH,S_L,R_EDX);
  223. popedx:=true;
  224. end;
  225. if hreg1<>R_EAX then
  226. begin
  227. if not(R_EAX in unused) then
  228. begin
  229. emit_reg(A_PUSH,S_L,R_EAX);
  230. popeax:=true;
  231. end;
  232. emit_reg_reg(A_MOV,S_L,hreg1,R_EAX);
  233. end;
  234. end;
  235. { sign extension depends on the left type }
  236. if porddef(p^.left^.resulttype)^.typ=u32bit then
  237. emit_reg_reg(A_XOR,S_L,R_EDX,R_EDX)
  238. else
  239. emit_none(A_CDQ,S_NO);
  240. { division depends on the right type }
  241. if porddef(p^.right^.resulttype)^.typ=u32bit then
  242. emit_reg(A_DIV,S_L,R_EDI)
  243. else
  244. emit_reg(A_IDIV,S_L,R_EDI);
  245. {$ifndef noAllocEdi}
  246. ungetregister32(R_EDI);
  247. {$endif noAllocEdi}
  248. if p^.treetype=divn then
  249. begin
  250. { if result register is busy then copy }
  251. if popeax then
  252. begin
  253. if hreg1=R_EAX then
  254. internalerror(112);
  255. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1)
  256. end
  257. else
  258. if hreg1<>R_EAX then
  259. Begin
  260. ungetregister32(hreg1);
  261. hreg1 := getexplicitregister32(R_EAX);
  262. { I don't think it's possible that now hreg1 <> R_EAX
  263. since popeax is false, but for all certainty I do
  264. support that situation (JM)}
  265. if hreg1 <> R_EAX then
  266. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1);
  267. end;
  268. end
  269. else
  270. {if we did the mod by an "and", the result is in hreg1 and
  271. EDX certainly hasn't been pushed (JM)}
  272. if not(andmod) Then
  273. if popedx then
  274. {the mod was done by an (i)div (so the result is now in
  275. edx), but edx was occupied prior to the division, so
  276. move the result into a safe place (JM)}
  277. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1)
  278. else
  279. Begin
  280. {Get rid of the unnecessary hreg1 if possible (same as with
  281. EAX in divn) (JM)}
  282. ungetregister32(hreg1);
  283. hreg1 := getexplicitregister32(R_EDX);
  284. if hreg1 <> R_EDX then
  285. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1);;
  286. End;
  287. if popeax then
  288. emit_reg(A_POP,S_L,R_EAX);
  289. if popedx then
  290. emit_reg(A_POP,S_L,R_EDX);
  291. end;
  292. If not(andmod or shrdiv) then
  293. {andmod and shrdiv only use hreg1 (which is already in usedinproc,
  294. since it was acquired with getregister), the others also use both
  295. EAX and EDX (JM)}
  296. Begin
  297. usedinproc:=usedinproc or ($80 shr byte(R_EAX));
  298. usedinproc:=usedinproc or ($80 shr byte(R_EDX));
  299. End;
  300. clear_location(p^.location);
  301. p^.location.loc:=LOC_REGISTER;
  302. p^.location.register:=hreg1;
  303. end;
  304. end;
  305. {*****************************************************************************
  306. SecondShlShr
  307. *****************************************************************************}
  308. procedure secondshlshr(var p : ptree);
  309. var
  310. hregister1,hregister2,hregister3,
  311. hregisterhigh,hregisterlow : tregister;
  312. pushed,popecx : boolean;
  313. op : tasmop;
  314. l1,l2,l3 : pasmlabel;
  315. begin
  316. popecx:=false;
  317. secondpass(p^.left);
  318. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  319. secondpass(p^.right);
  320. if pushed then
  321. restore(p^.left,is_64bitint(p^.left^.resulttype));
  322. if is_64bitint(p^.left^.resulttype) then
  323. begin
  324. { load left operator in a register }
  325. if p^.left^.location.loc<>LOC_REGISTER then
  326. begin
  327. if p^.left^.location.loc=LOC_CREGISTER then
  328. begin
  329. hregisterlow:=getregister32;
  330. hregisterhigh:=getregister32;
  331. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,
  332. hregisterlow);
  333. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,
  334. hregisterlow);
  335. end
  336. else
  337. begin
  338. del_reference(p^.left^.location.reference);
  339. hregisterlow:=getregister32;
  340. hregisterhigh:=getregister32;
  341. emit_mov_ref_reg64(p^.left^.location.reference,
  342. hregisterlow,
  343. hregisterhigh);
  344. end;
  345. end
  346. else
  347. begin
  348. hregisterlow:=p^.left^.location.registerlow;
  349. hregisterhigh:=p^.left^.location.registerhigh;
  350. end;
  351. { shifting by a constant directly coded: }
  352. if (p^.right^.treetype=ordconstn) then
  353. begin
  354. { shrd/shl works only for values <=31 !! }
  355. if p^.right^.value>31 then
  356. begin
  357. if p^.treetype=shln then
  358. begin
  359. emit_reg_reg(A_XOR,S_L,hregisterhigh,
  360. hregisterhigh);
  361. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  362. hregisterlow);
  363. end
  364. else
  365. begin
  366. emit_reg_reg(A_XOR,S_L,hregisterlow,
  367. hregisterlow);
  368. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  369. hregisterhigh);
  370. end;
  371. p^.location.registerhigh:=hregisterlow;
  372. p^.location.registerlow:=hregisterhigh;
  373. end
  374. else
  375. begin
  376. if p^.treetype=shln then
  377. begin
  378. emit_const_reg_reg(A_SHLD,S_L,p^.right^.value and 31,
  379. hregisterlow,hregisterhigh);
  380. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  381. hregisterlow);
  382. end
  383. else
  384. begin
  385. emit_const_reg_reg(A_SHRD,S_L,p^.right^.value and 31,
  386. hregisterhigh,hregisterlow);
  387. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  388. hregisterhigh);
  389. end;
  390. p^.location.registerlow:=hregisterlow;
  391. p^.location.registerhigh:=hregisterhigh;
  392. end;
  393. p^.location.loc:=LOC_REGISTER;
  394. end
  395. else
  396. begin
  397. { load right operators in a register }
  398. if p^.right^.location.loc<>LOC_REGISTER then
  399. begin
  400. if p^.right^.location.loc=LOC_CREGISTER then
  401. begin
  402. hregister2:=getexplicitregister32(R_ECX);
  403. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  404. hregister2);
  405. end
  406. else
  407. begin
  408. del_reference(p^.right^.location.reference);
  409. hregister2:=getexplicitregister32(R_ECX);
  410. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  411. hregister2);
  412. end;
  413. end
  414. else
  415. hregister2:=p^.right^.location.register;
  416. { left operator is already in a register }
  417. { hence are both in a register }
  418. { is it in the case ECX ? }
  419. if (hregisterlow=R_ECX) then
  420. begin
  421. { then only swap }
  422. emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
  423. hregister3:=hregisterlow;
  424. hregisterlow:=hregister2;
  425. hregister2:=hregister3;
  426. end
  427. else if (hregisterhigh=R_ECX) then
  428. begin
  429. { then only swap }
  430. emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
  431. hregister3:=hregisterhigh;
  432. hregisterhigh:=hregister2;
  433. hregister2:=hregister3;
  434. end
  435. { if second operator not in ECX ? }
  436. else if (hregister2<>R_ECX) then
  437. begin
  438. { ECX occupied then push it }
  439. if not (R_ECX in unused) then
  440. begin
  441. popecx:=true;
  442. emit_reg(A_PUSH,S_L,R_ECX);
  443. end;
  444. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  445. end;
  446. if hregister2 <> R_ECX then
  447. ungetregister32(hregister2);
  448. { the damned shift instructions work only til a count of 32 }
  449. { so we've to do some tricks here }
  450. if p^.treetype=shln then
  451. begin
  452. getlabel(l1);
  453. getlabel(l2);
  454. getlabel(l3);
  455. emit_const_reg(A_CMP,S_L,64,R_ECX);
  456. emitjmp(C_L,l1);
  457. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  458. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  459. emitjmp(C_None,l3);
  460. emitlab(l1);
  461. emit_const_reg(A_CMP,S_L,32,R_ECX);
  462. emitjmp(C_L,l2);
  463. emit_const_reg(A_SUB,S_L,32,R_ECX);
  464. emit_reg_reg(A_SHL,S_L,R_CL,
  465. hregisterlow);
  466. emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
  467. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  468. emitjmp(C_None,l3);
  469. emitlab(l2);
  470. emit_reg_reg_reg(A_SHLD,S_L,R_CL,
  471. hregisterlow,hregisterhigh);
  472. emit_reg_reg(A_SHL,S_L,R_CL,
  473. hregisterlow);
  474. emitlab(l3);
  475. end
  476. else
  477. begin
  478. getlabel(l1);
  479. getlabel(l2);
  480. getlabel(l3);
  481. emit_const_reg(A_CMP,S_L,64,R_ECX);
  482. emitjmp(C_L,l1);
  483. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  484. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  485. emitjmp(C_None,l3);
  486. emitlab(l1);
  487. emit_const_reg(A_CMP,S_L,32,R_ECX);
  488. emitjmp(C_L,l2);
  489. emit_const_reg(A_SUB,S_L,32,R_ECX);
  490. emit_reg_reg(A_SHR,S_L,R_CL,
  491. hregisterhigh);
  492. emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
  493. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  494. emitjmp(C_None,l3);
  495. emitlab(l2);
  496. emit_reg_reg_reg(A_SHRD,S_L,R_CL,
  497. hregisterhigh,hregisterlow);
  498. emit_reg_reg(A_SHR,S_L,R_CL,
  499. hregisterhigh);
  500. emitlab(l3);
  501. end;
  502. { maybe put ECX back }
  503. if popecx then
  504. emit_reg(A_POP,S_L,R_ECX)
  505. else ungetregister32(R_ECX);
  506. p^.location.registerlow:=hregisterlow;
  507. p^.location.registerhigh:=hregisterhigh;
  508. end;
  509. end
  510. else
  511. begin
  512. { load left operators in a register }
  513. if p^.left^.location.loc<>LOC_REGISTER then
  514. begin
  515. if p^.left^.location.loc=LOC_CREGISTER then
  516. begin
  517. hregister1:=getregister32;
  518. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,
  519. hregister1);
  520. end
  521. else
  522. begin
  523. del_reference(p^.left^.location.reference);
  524. hregister1:=getregister32;
  525. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  526. hregister1);
  527. end;
  528. end
  529. else
  530. hregister1:=p^.left^.location.register;
  531. { determine operator }
  532. if p^.treetype=shln then
  533. op:=A_SHL
  534. else
  535. op:=A_SHR;
  536. { shifting by a constant directly coded: }
  537. if (p^.right^.treetype=ordconstn) then
  538. begin
  539. { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
  540. if p^.right^.value<=31 then
  541. }
  542. emit_const_reg(op,S_L,p^.right^.value and 31,
  543. hregister1);
  544. {
  545. else
  546. emit_reg_reg(A_XOR,S_L,hregister1,
  547. hregister1);
  548. }
  549. p^.location.loc:=LOC_REGISTER;
  550. p^.location.register:=hregister1;
  551. end
  552. else
  553. begin
  554. { load right operators in a register }
  555. if p^.right^.location.loc<>LOC_REGISTER then
  556. begin
  557. if p^.right^.location.loc=LOC_CREGISTER then
  558. begin
  559. hregister2:=getexplicitregister32(R_ECX);
  560. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  561. hregister2);
  562. end
  563. else
  564. begin
  565. del_reference(p^.right^.location.reference);
  566. hregister2:=getexplicitregister32(R_ECX);
  567. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  568. hregister2);
  569. end;
  570. end
  571. else
  572. hregister2:=p^.right^.location.register;
  573. { left operator is already in a register }
  574. { hence are both in a register }
  575. { is it in the case ECX ? }
  576. if (hregister1=R_ECX) then
  577. begin
  578. { then only swap }
  579. emit_reg_reg(A_XCHG,S_L,hregister1,hregister2);
  580. hregister3:=hregister1;
  581. hregister1:=hregister2;
  582. hregister2:=hregister3;
  583. end
  584. { if second operator not in ECX ? }
  585. else if (hregister2<>R_ECX) then
  586. begin
  587. { ECX occupied then push it }
  588. if not (R_ECX in unused) then
  589. begin
  590. popecx:=true;
  591. emit_reg(A_PUSH,S_L,R_ECX);
  592. end;
  593. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  594. end;
  595. ungetregister32(hregister2);
  596. { right operand is in ECX }
  597. emit_reg_reg(op,S_L,R_CL,hregister1);
  598. { maybe ECX back }
  599. if popecx then
  600. emit_reg(A_POP,S_L,R_ECX);
  601. p^.location.register:=hregister1;
  602. end;
  603. end;
  604. end;
  605. {*****************************************************************************
  606. SecondUnaryMinus
  607. *****************************************************************************}
  608. procedure secondunaryminus(var p : ptree);
  609. {$ifdef SUPPORT_MMX}
  610. procedure do_mmx_neg;
  611. var
  612. op : tasmop;
  613. begin
  614. p^.location.loc:=LOC_MMXREGISTER;
  615. if cs_mmx_saturation in aktlocalswitches then
  616. case mmx_type(p^.resulttype) of
  617. mmxs8bit:
  618. op:=A_PSUBSB;
  619. mmxu8bit:
  620. op:=A_PSUBUSB;
  621. mmxs16bit,mmxfixed16:
  622. op:=A_PSUBSW;
  623. mmxu16bit:
  624. op:=A_PSUBUSW;
  625. end
  626. else
  627. case mmx_type(p^.resulttype) of
  628. mmxs8bit,mmxu8bit:
  629. op:=A_PSUBB;
  630. mmxs16bit,mmxu16bit,mmxfixed16:
  631. op:=A_PSUBW;
  632. mmxs32bit,mmxu32bit:
  633. op:=A_PSUBD;
  634. end;
  635. emit_reg_reg(op,S_NO,p^.location.register,R_MM7);
  636. emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
  637. end;
  638. {$endif}
  639. begin
  640. if is_64bitint(p^.left^.resulttype) then
  641. begin
  642. secondpass(p^.left);
  643. clear_location(p^.location);
  644. p^.location.loc:=LOC_REGISTER;
  645. case p^.left^.location.loc of
  646. LOC_REGISTER :
  647. begin
  648. p^.location.registerlow:=p^.left^.location.registerlow;
  649. p^.location.registerhigh:=p^.left^.location.registerhigh;
  650. end;
  651. LOC_CREGISTER :
  652. begin
  653. p^.location.registerlow:=getregister32;
  654. p^.location.registerhigh:=getregister32;
  655. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  656. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  657. end;
  658. LOC_REFERENCE,LOC_MEM :
  659. begin
  660. del_reference(p^.left^.location.reference);
  661. p^.location.registerlow:=getregister32;
  662. p^.location.registerhigh:=getregister32;
  663. emit_mov_ref_reg64(p^.left^.location.reference,
  664. p^.location.registerlow,
  665. p^.location.registerhigh);
  666. end;
  667. end;
  668. {
  669. emit_reg(A_NEG,S_L,p^.location.registerlow);
  670. emit_const_reg(A_ADC,S_L,0,p^.location.registerhigh);
  671. emit_reg(A_NEG,S_L,p^.location.registerhigh);
  672. }
  673. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  674. emit_reg(A_NEG,S_L,p^.location.registerlow);
  675. emit_const_reg(A_SBB,S_L,-1,p^.location.registerhigh);
  676. end
  677. else
  678. begin
  679. secondpass(p^.left);
  680. p^.location.loc:=LOC_REGISTER;
  681. case p^.left^.location.loc of
  682. LOC_REGISTER:
  683. begin
  684. p^.location.register:=p^.left^.location.register;
  685. emit_reg(A_NEG,S_L,p^.location.register);
  686. end;
  687. LOC_CREGISTER:
  688. begin
  689. p^.location.register:=getregister32;
  690. emit_reg_reg(A_MOV,S_L,p^.location.register,
  691. p^.location.register);
  692. emit_reg(A_NEG,S_L,p^.location.register);
  693. end;
  694. {$ifdef SUPPORT_MMX}
  695. LOC_MMXREGISTER:
  696. begin
  697. set_location(p^.location,p^.left^.location);
  698. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  699. do_mmx_neg;
  700. end;
  701. LOC_CMMXREGISTER:
  702. begin
  703. p^.location.register:=getregistermmx;
  704. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  705. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,
  706. p^.location.register);
  707. do_mmx_neg;
  708. end;
  709. {$endif SUPPORT_MMX}
  710. LOC_REFERENCE,LOC_MEM:
  711. begin
  712. del_reference(p^.left^.location.reference);
  713. if (p^.left^.resulttype^.deftype=floatdef) and
  714. (pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
  715. begin
  716. p^.location.loc:=LOC_FPU;
  717. floatload(pfloatdef(p^.left^.resulttype)^.typ,
  718. p^.left^.location.reference);
  719. emit_none(A_FCHS,S_NO);
  720. end
  721. {$ifdef SUPPORT_MMX}
  722. else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  723. begin
  724. p^.location.register:=getregistermmx;
  725. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  726. emit_ref_reg(A_MOVQ,S_NO,
  727. newreference(p^.left^.location.reference),
  728. p^.location.register);
  729. do_mmx_neg;
  730. end
  731. {$endif SUPPORT_MMX}
  732. else
  733. begin
  734. p^.location.register:=getregister32;
  735. emit_ref_reg(A_MOV,S_L,
  736. newreference(p^.left^.location.reference),
  737. p^.location.register);
  738. emit_reg(A_NEG,S_L,p^.location.register);
  739. end;
  740. end;
  741. LOC_FPU:
  742. begin
  743. p^.location.loc:=LOC_FPU;
  744. emit_none(A_FCHS,S_NO);
  745. end;
  746. LOC_CFPUREGISTER:
  747. begin
  748. emit_reg(A_FLD,S_NO,
  749. correct_fpuregister(p^.left^.location.register,fpuvaroffset));
  750. inc(fpuvaroffset);
  751. p^.location.loc:=LOC_FPU;
  752. emit_none(A_FCHS,S_NO);
  753. end;
  754. end;
  755. end;
  756. { Here was a problem... }
  757. { Operand to be negated always }
  758. { seems to be converted to signed }
  759. { 32-bit before doing neg!! }
  760. { So this is useless... }
  761. { that's not true: -2^31 gives an overflow error if it is negaded (FK) }
  762. { emitoverflowcheck(p);}
  763. end;
  764. {*****************************************************************************
  765. SecondNot
  766. *****************************************************************************}
  767. procedure secondnot(var p : ptree);
  768. const
  769. flagsinvers : array[F_E..F_BE] of tresflags =
  770. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  771. F_BE,F_B,F_AE,F_A);
  772. var
  773. hl : pasmlabel;
  774. opsize : topsize;
  775. begin
  776. if is_boolean(p^.resulttype) then
  777. begin
  778. opsize:=def_opsize(p^.resulttype);
  779. { the second pass could change the location of left }
  780. { if it is a register variable, so we've to do }
  781. { this before the case statement }
  782. if p^.left^.location.loc in [LOC_REFERENCE,LOC_MEM,
  783. LOC_FLAGS,LOC_REGISTER,LOC_CREGISTER] then
  784. secondpass(p^.left);
  785. case p^.left^.location.loc of
  786. LOC_JUMP :
  787. begin
  788. hl:=truelabel;
  789. truelabel:=falselabel;
  790. falselabel:=hl;
  791. secondpass(p^.left);
  792. maketojumpbool(p^.left);
  793. hl:=truelabel;
  794. truelabel:=falselabel;
  795. falselabel:=hl;
  796. end;
  797. LOC_FLAGS :
  798. p^.location.resflags:=flagsinvers[p^.left^.location.resflags];
  799. LOC_REGISTER :
  800. begin
  801. {p^.location.register:=p^.left^.location.register;
  802. emit_const_reg(A_XOR,opsize,1,p^.location.register);}
  803. p^.location.loc:=LOC_FLAGS;
  804. p^.location.resflags:=F_E;
  805. emit_reg_reg(A_TEST,opsize,
  806. p^.left^.location.register,p^.left^.location.register);
  807. ungetregister(p^.left^.location.register);
  808. end;
  809. LOC_CREGISTER :
  810. begin
  811. clear_location(p^.location);
  812. p^.location.loc:=LOC_REGISTER;
  813. p^.location.register:=def_getreg(p^.resulttype);
  814. emit_reg_reg(A_MOV,opsize,p^.left^.location.register,p^.location.register);
  815. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  816. ungetregister(p^.location.register);
  817. p^.location.loc:=LOC_FLAGS;
  818. p^.location.resflags:=F_E;
  819. end;
  820. LOC_REFERENCE,
  821. LOC_MEM :
  822. begin
  823. clear_location(p^.location);
  824. p^.location.loc:=LOC_REGISTER;
  825. del_reference(p^.left^.location.reference);
  826. { this was placed before del_ref => internaalerror(10) }
  827. p^.location.register:=def_getreg(p^.resulttype);
  828. emit_ref_reg(A_MOV,opsize,
  829. newreference(p^.left^.location.reference),p^.location.register);
  830. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  831. ungetregister(p^.location.register);
  832. p^.location.loc:=LOC_FLAGS;
  833. p^.location.resflags:=F_E;
  834. end;
  835. end;
  836. end
  837. {$ifdef SUPPORT_MMX}
  838. else
  839. if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  840. begin
  841. secondpass(p^.left);
  842. p^.location.loc:=LOC_MMXREGISTER;
  843. { prepare EDI }
  844. {$ifndef noAllocEdi}
  845. getexplicitregister32(R_EDI);
  846. {$endif noAllocEdi}
  847. emit_const_reg(A_MOV,S_L,$ffffffff,R_EDI);
  848. { load operand }
  849. case p^.left^.location.loc of
  850. LOC_MMXREGISTER:
  851. set_location(p^.location,p^.left^.location);
  852. LOC_CMMXREGISTER:
  853. begin
  854. p^.location.register:=getregistermmx;
  855. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,p^.location.register);
  856. end;
  857. LOC_REFERENCE,LOC_MEM:
  858. begin
  859. del_reference(p^.left^.location.reference);
  860. p^.location.register:=getregistermmx;
  861. emit_ref_reg(A_MOVQ,S_NO,
  862. newreference(p^.left^.location.reference),p^.location.register);
  863. end;
  864. end;
  865. { load mask }
  866. emit_reg_reg(A_MOVD,S_NO,R_EDI,R_MM7);
  867. {$ifndef noAllocEdi}
  868. ungetregister32(R_EDI);
  869. {$endif noAllocEdi}
  870. { lower 32 bit }
  871. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  872. { shift mask }
  873. emit_const_reg(A_PSLLQ,S_NO,32,R_MM7);
  874. { higher 32 bit }
  875. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  876. end
  877. {$endif SUPPORT_MMX}
  878. else if is_64bitint(p^.left^.resulttype) then
  879. begin
  880. secondpass(p^.left);
  881. clear_location(p^.location);
  882. p^.location.loc:=LOC_REGISTER;
  883. case p^.left^.location.loc of
  884. LOC_REGISTER :
  885. begin
  886. p^.location.registerlow:=p^.left^.location.registerlow;
  887. p^.location.registerhigh:=p^.left^.location.registerhigh;
  888. emit_reg(A_NOT,S_L,p^.location.registerlow);
  889. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  890. end;
  891. LOC_CREGISTER :
  892. begin
  893. p^.location.registerlow:=getregister32;
  894. p^.location.registerhigh:=getregister32;
  895. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  896. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  897. emit_reg(A_NOT,S_L,p^.location.registerlow);
  898. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  899. end;
  900. LOC_REFERENCE,LOC_MEM :
  901. begin
  902. del_reference(p^.left^.location.reference);
  903. p^.location.registerlow:=getregister32;
  904. p^.location.registerhigh:=getregister32;
  905. emit_mov_ref_reg64(p^.left^.location.reference,
  906. p^.location.registerlow,
  907. p^.location.registerhigh);
  908. emit_reg(A_NOT,S_L,p^.location.registerlow);
  909. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  910. end;
  911. end;
  912. end
  913. else
  914. begin
  915. secondpass(p^.left);
  916. clear_location(p^.location);
  917. p^.location.loc:=LOC_REGISTER;
  918. case p^.left^.location.loc of
  919. LOC_REGISTER :
  920. begin
  921. p^.location.register:=p^.left^.location.register;
  922. emit_reg(A_NOT,S_L,p^.location.register);
  923. end;
  924. LOC_CREGISTER :
  925. begin
  926. p^.location.register:=getregister32;
  927. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,p^.location.register);
  928. emit_reg(A_NOT,S_L,p^.location.register);
  929. end;
  930. LOC_REFERENCE,LOC_MEM :
  931. begin
  932. del_reference(p^.left^.location.reference);
  933. p^.location.register:=getregister32;
  934. emit_ref_reg(A_MOV,S_L,
  935. newreference(p^.left^.location.reference),p^.location.register);
  936. emit_reg(A_NOT,S_L,p^.location.register);
  937. end;
  938. end;
  939. end;
  940. end;
  941. end.
  942. {
  943. $Log$
  944. Revision 1.6 2000-09-18 10:15:48 jonas
  945. * fixed bug in flagsinvers array for unsigned flags (fixed web bug
  946. 1139, not 1135 like I mentioned in the fixes branch) (merged from fixes)
  947. Revision 1.5 2000/08/27 16:11:49 peter
  948. * moved some util functions from globals,cobjects to cutils
  949. * splitted files into finput,fmodule
  950. Revision 1.4 2000/07/28 13:28:25 jonas
  951. * fixed bug in secondshlshr where ecx was released too soon in some
  952. cases causing a combination of -Or and -dnewoptimizations to generate
  953. wrong code
  954. (merged from fixes branch and since in 1.1 -dnewoptimizations has
  955. been released, it always generated wrong code here when using -O2 or
  956. higher)
  957. Revision 1.3 2000/07/14 05:11:48 michael
  958. + Patch to 1.1
  959. Revision 1.2 2000/07/13 11:32:35 michael
  960. + removed logs
  961. }