aoptcpurv.pas 25 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the common RiscV optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpurv;
  19. interface
  20. {$I fpcdefs.inc}
  21. { $define DEBUG_AOPTCPU}
  22. uses
  23. cpubase,
  24. globals, globtype,
  25. cgbase,
  26. aoptobj, aoptcpub, aopt,
  27. aasmtai, aasmcpu;
  28. type
  29. TRVCpuAsmOptimizer = class(TAsmOptimizer)
  30. function InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean; override;
  31. function RegLoadedWithNewValue(reg: tregister; hp: tai): boolean; override;
  32. function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
  33. Function GetNextInstructionUsingReg(Current: tai; Out Next: tai; reg: TRegister): Boolean;
  34. { outputs a debug message into the assembler file }
  35. procedure DebugMsg(const s: string; p: tai);
  36. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  37. function OptPass1OP(var p: tai): boolean;
  38. function OptPass1FOP(var p: tai;mvop: tasmop): boolean;
  39. function OptPass1Add(var p: tai): boolean;
  40. procedure RemoveInstr(var orig: tai; moveback: boolean=true);
  41. end;
  42. implementation
  43. uses
  44. cutils,
  45. verbose;
  46. function MatchInstruction(const instr: tai; const op: TCommonAsmOps; const AConditions: TAsmConds = []): boolean;
  47. begin
  48. result :=
  49. (instr.typ = ait_instruction) and
  50. (taicpu(instr).opcode in op) and
  51. ((AConditions=[]) or (taicpu(instr).condition in AConditions));
  52. end;
  53. function MatchInstruction(const instr: tai; const op: TAsmOp; const AConditions: TAsmConds = []): boolean;
  54. begin
  55. result :=
  56. (instr.typ = ait_instruction) and
  57. (taicpu(instr).opcode = op) and
  58. ((AConditions=[]) or (taicpu(instr).condition in AConditions));
  59. end;
  60. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  61. begin
  62. result := oper1.typ = oper2.typ;
  63. if result then
  64. case oper1.typ of
  65. top_const:
  66. Result:=oper1.val = oper2.val;
  67. top_reg:
  68. Result:=oper1.reg = oper2.reg;
  69. {top_ref:
  70. Result:=RefsEqual(oper1.ref^, oper2.ref^);}
  71. else Result:=false;
  72. end
  73. end;
  74. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  75. begin
  76. result := (oper.typ = top_reg) and (oper.reg = reg);
  77. end;
  78. {$ifdef DEBUG_AOPTCPU}
  79. procedure TRVCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  80. begin
  81. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  82. end;
  83. {$else DEBUG_AOPTCPU}
  84. procedure TRVCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  85. begin
  86. end;
  87. {$endif DEBUG_AOPTCPU}
  88. function TRVCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  89. var
  90. p: taicpu;
  91. i: longint;
  92. begin
  93. result:=false;
  94. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  95. exit;
  96. p:=taicpu(hp);
  97. i:=0;
  98. while(i<p.ops) do
  99. begin
  100. case p.oper[I]^.typ of
  101. top_reg:
  102. result:=(p.oper[I]^.reg=reg) and (p.spilling_get_operation_type(i)<>operand_write);
  103. top_ref:
  104. result:=
  105. (p.oper[I]^.ref^.base=reg);
  106. else
  107. ;
  108. end;
  109. if result then exit; {Bailout if we found something}
  110. Inc(I);
  111. end;
  112. end;
  113. function TRVCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  114. begin
  115. result:=
  116. (hp.typ=ait_instruction) and
  117. (taicpu(hp).ops>1) and
  118. (taicpu(hp).oper[0]^.typ=top_reg) and
  119. (taicpu(hp).oper[0]^.reg=reg) and
  120. (taicpu(hp).spilling_get_operation_type(0)<>operand_read);
  121. end;
  122. function TRVCpuAsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
  123. var
  124. i : Longint;
  125. begin
  126. result:=false;
  127. for i:=0 to taicpu(p1).ops-1 do
  128. case taicpu(p1).oper[i]^.typ of
  129. top_reg:
  130. if (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
  131. exit(true);
  132. else
  133. ;
  134. end;
  135. end;
  136. function TRVCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai; out Next: tai; reg: TRegister): Boolean;
  137. begin
  138. Next:=Current;
  139. repeat
  140. Result:=GetNextInstruction(Next,Next);
  141. until not (Result) or
  142. not(cs_opt_level3 in current_settings.optimizerswitches) or
  143. (Next.typ<>ait_instruction) or
  144. RegInInstruction(reg,Next) or
  145. is_calljmp(taicpu(Next).opcode);
  146. end;
  147. function TRVCpuAsmOptimizer.OptPass1OP(var p : tai) : boolean;
  148. var
  149. hp1 : tai;
  150. begin
  151. result:=false;
  152. { replace
  153. <Op> %reg3,%reg2,%reg1
  154. addi %reg4,%reg3,0
  155. dealloc %reg3
  156. by
  157. <Op> %reg4,%reg2,%reg1
  158. ?
  159. }
  160. if GetNextInstruction(p,hp1) and
  161. MatchInstruction(hp1,A_ADDI) and
  162. (taicpu(hp1).oper[2]^.val=0) and
  163. MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^) then
  164. begin
  165. TransferUsedRegs(TmpUsedRegs);
  166. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  167. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg,hp1,TmpUsedRegs)) then
  168. begin
  169. taicpu(p).loadoper(0,taicpu(hp1).oper[0]^);
  170. DebugMsg('Peephole OpAddi02Op done',p);
  171. RemoveInstruction(hp1);
  172. result:=true;
  173. end;
  174. end;
  175. end;
  176. function TRVCpuAsmOptimizer.OptPass1FOP(var p: tai;mvop: tasmop) : boolean;
  177. var
  178. hp1 : tai;
  179. begin
  180. result:=false;
  181. { replace
  182. <FOp> %reg3,%reg2,%reg1
  183. <mvop> %reg4,%reg3,%reg3
  184. dealloc %reg3
  185. by
  186. <FOp> %reg4,%reg2,%reg1
  187. ?
  188. }
  189. if GetNextInstruction(p,hp1) and
  190. MatchInstruction(hp1,mvop) and
  191. MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^) and
  192. MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[2]^) then
  193. begin
  194. TransferUsedRegs(TmpUsedRegs);
  195. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  196. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg,hp1,TmpUsedRegs)) then
  197. begin
  198. taicpu(p).loadoper(0,taicpu(hp1).oper[0]^);
  199. DebugMsg('Peephole FOpFsgnj02FOp done',p);
  200. RemoveInstruction(hp1);
  201. result:=true;
  202. end;
  203. end;
  204. end;
  205. procedure TRVCpuAsmOptimizer.RemoveInstr(var orig: tai; moveback: boolean = true);
  206. var
  207. n: tai;
  208. begin
  209. if moveback and (not GetLastInstruction(orig,n)) then
  210. GetNextInstruction(orig,n);
  211. AsmL.Remove(orig);
  212. orig.Free;
  213. orig:=n;
  214. end;
  215. function TRVCpuAsmOptimizer.OptPass1Add(var p: tai): boolean;
  216. var
  217. hp1: tai;
  218. begin
  219. result:=false;
  220. {
  221. Changes
  222. addi x, y, #
  223. addi/addiw z, x, #
  224. dealloc x
  225. To
  226. addi z, y, #+#
  227. }
  228. if (taicpu(p).ops=3) and
  229. (taicpu(p).oper[2]^.typ=top_const) and
  230. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  231. MatchInstruction(hp1,[A_ADDI{$ifdef riscv64},A_ADDIW{$endif}]) and
  232. (taicpu(hp1).ops=3) and
  233. MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^) and
  234. (taicpu(hp1).oper[2]^.typ=top_const) and
  235. is_imm12(taicpu(p).oper[2]^.val+taicpu(hp1).oper[2]^.val) and
  236. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  237. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  238. begin
  239. taicpu(hp1).loadreg(1,taicpu(p).oper[1]^.reg);
  240. taicpu(hp1).loadconst(2, taicpu(p).oper[2]^.val+taicpu(hp1).oper[2]^.val);
  241. DebugMsg('Peephole AddiAddi2Addi performed', hp1);
  242. RemoveInstr(p);
  243. result:=true;
  244. end
  245. {
  246. Changes
  247. addi x, z, (ref)
  248. ld/sd y, 0(x)
  249. dealloc x
  250. To
  251. ld/sd y, 0(ref)(x)
  252. }
  253. else if (taicpu(p).ops=3) and
  254. (taicpu(p).oper[2]^.typ=top_ref) and
  255. MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) and
  256. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  257. MatchInstruction(hp1, [A_LB,A_LBU,A_LH,A_LHU,A_LW,
  258. A_SB,A_SH,A_SW{$ifdef riscv64},A_LD,A_LWU,A_SD{$endif}]) and
  259. (taicpu(hp1).ops=2) and
  260. (taicpu(hp1).oper[1]^.typ=top_ref) and
  261. (taicpu(hp1).oper[1]^.ref^.base=taicpu(p).oper[0]^.reg) and
  262. (taicpu(hp1).oper[1]^.ref^.offset=0) and
  263. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  264. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  265. begin
  266. taicpu(hp1).loadref(1,taicpu(p).oper[2]^.ref^);
  267. taicpu(hp1).oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  268. DebugMsg('Peephole AddiMem2Mem performed', hp1);
  269. RemoveInstr(p);
  270. result:=true;
  271. end
  272. {
  273. Changes
  274. addi x, z, #w
  275. ld/sd y, 0(x)
  276. dealloc x
  277. To
  278. ld/sd y, #w(z)
  279. }
  280. else if (taicpu(p).ops=3) and
  281. (taicpu(p).oper[2]^.typ=top_const) and
  282. //MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) and
  283. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  284. MatchInstruction(hp1, [A_LB,A_LBU,A_LH,A_LHU,A_LW,
  285. A_SB,A_SH,A_SW{$ifdef riscv64},A_LWU,A_LD,A_SD{$endif}]) and
  286. (taicpu(hp1).ops=2) and
  287. (taicpu(hp1).oper[1]^.typ=top_ref) and
  288. (taicpu(hp1).oper[1]^.ref^.base=taicpu(p).oper[0]^.reg) and
  289. (taicpu(hp1).oper[1]^.ref^.offset=0) and
  290. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  291. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  292. begin
  293. //taicpu(hp1).loadconst(1,taicpu(p).oper[2]^.ref^);
  294. taicpu(hp1).oper[1]^.ref^.offset:=taicpu(p).oper[2]^.val;
  295. taicpu(hp1).oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  296. DebugMsg('Peephole AddiMem2Mem performed', hp1);
  297. RemoveInstr(p);
  298. result:=true;
  299. end
  300. {
  301. Changes
  302. addi w, z, 0
  303. op x, y, w
  304. dealloc w
  305. To
  306. op x, y, z
  307. }
  308. else if (taicpu(p).ops=3) and
  309. (taicpu(p).oper[2]^.typ=top_const) and
  310. (taicpu(p).oper[2]^.val=0) and
  311. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  312. MatchInstruction(hp1, [A_SUB,A_ADD,A_SLL,A_SRL,A_SLT,A_AND,A_OR,
  313. A_ADDI,A_ANDI,A_ORI,A_SRAI,A_SRLI,A_SLLI,A_XORI
  314. {$ifdef riscv64},A_ADDIW,A_SLLIW,A_SRLIW,A_SRAIW,
  315. A_ADDW,A_SLLW,A_SRLW,A_SUBW,A_SRAW{$endif}]
  316. ) and
  317. (taicpu(hp1).ops=3) and
  318. (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[2]^) or MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)) and
  319. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  320. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  321. begin
  322. if MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[2]^) then
  323. taicpu(hp1).loadreg(2,taicpu(p).oper[1]^.reg);
  324. if MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^) then
  325. taicpu(hp1).loadreg(1,taicpu(p).oper[1]^.reg);
  326. DebugMsg('Peephole Addi0Op2Op performed', hp1);
  327. RemoveInstr(p);
  328. result:=true;
  329. end
  330. else
  331. result:=OptPass1OP(p);
  332. end;
  333. function TRVCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  334. var
  335. hp1: tai;
  336. begin
  337. result:=false;
  338. case p.typ of
  339. ait_instruction:
  340. begin
  341. case taicpu(p).opcode of
  342. A_ADDI:
  343. result:=OptPass1Add(p);
  344. A_SUB:
  345. begin
  346. {
  347. Turn
  348. sub x,y,z
  349. bgeu X0,x,...
  350. dealloc x
  351. Into
  352. bne y,x,...
  353. }
  354. if (taicpu(p).ops=3) and
  355. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  356. MatchInstruction(hp1,A_Bxx,[C_GEU,C_EQ]) and
  357. (taicpu(hp1).ops=3) and
  358. MatchOperand(taicpu(hp1).oper[0]^,NR_X0) and
  359. MatchOperand(taicpu(hp1).oper[1]^,taicpu(p).oper[0]^) and
  360. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  361. (not RegModifiedBetween(taicpu(p).oper[2]^.reg, p,hp1)) and
  362. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  363. begin
  364. taicpu(hp1).loadreg(0,taicpu(p).oper[1]^.reg);
  365. taicpu(hp1).loadreg(1,taicpu(p).oper[2]^.reg);
  366. taicpu(hp1).condition:=C_EQ;
  367. DebugMsg('Peephole SubBxx2Beq performed', hp1);
  368. RemoveInstr(p);
  369. result:=true;
  370. end
  371. else
  372. result:=OptPass1OP(p);
  373. end;
  374. A_ANDI:
  375. begin
  376. {
  377. Changes
  378. andi x, y, #
  379. andi z, x, #
  380. dealloc x
  381. To
  382. andi z, y, # and #
  383. }
  384. if (taicpu(p).ops=3) and
  385. (taicpu(p).oper[2]^.typ=top_const) and
  386. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) then
  387. begin
  388. if MatchInstruction(hp1,A_ANDI) and
  389. (taicpu(hp1).ops=3) and
  390. MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^) and
  391. (taicpu(hp1).oper[2]^.typ=top_const) and
  392. is_imm12(taicpu(p).oper[2]^.val and taicpu(hp1).oper[2]^.val) and
  393. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  394. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  395. begin
  396. taicpu(hp1).loadreg(1,taicpu(p).oper[1]^.reg);
  397. taicpu(hp1).loadconst(2, taicpu(p).oper[2]^.val and taicpu(hp1).oper[2]^.val);
  398. DebugMsg('Peephole AndiAndi2Andi performed', hp1);
  399. RemoveInstr(p);
  400. result:=true;
  401. end
  402. {$ifndef RISCV32}
  403. else if MatchInstruction(hp1,A_ADDIW) and
  404. (taicpu(hp1).ops=3) and
  405. MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^) and
  406. (taicpu(hp1).oper[2]^.typ=top_const) and
  407. (taicpu(hp1).oper[2]^.val=0) and
  408. is_imm12(taicpu(p).oper[2]^.val) and
  409. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  410. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  411. begin
  412. taicpu(p).loadreg(0,taicpu(hp1).oper[0]^.reg);
  413. DebugMsg('Peephole AndiAddwi02Andi performed', hp1);
  414. RemoveInstr(hp1);
  415. result:=true;
  416. end
  417. {$endif RISCV32}
  418. else
  419. result:=OptPass1OP(p);
  420. end
  421. else
  422. result:=OptPass1OP(p);
  423. end;
  424. A_SLT,
  425. A_SLTU:
  426. begin
  427. {
  428. Turn
  429. sltu x,X0,y
  430. beq/bne x, X0, ...
  431. dealloc x
  432. Into
  433. bltu/geu X0, y, ...
  434. }
  435. if (taicpu(p).ops=3) and
  436. MatchOperand(taicpu(p).oper[1]^,NR_X0) and
  437. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  438. MatchInstruction(hp1,A_Bxx,[C_NE,C_EQ]) and
  439. (taicpu(hp1).ops=3) and
  440. MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[0]^) and
  441. MatchOperand(taicpu(hp1).oper[1]^,NR_X0) and
  442. (not RegModifiedBetween(taicpu(p).oper[2]^.reg, p,hp1)) and
  443. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  444. begin
  445. taicpu(hp1).loadreg(0,NR_X0);
  446. taicpu(hp1).loadreg(1,taicpu(p).oper[2]^.reg);
  447. if taicpu(p).opcode=A_SLTU then
  448. begin
  449. if taicpu(hp1).condition=C_NE then
  450. taicpu(hp1).condition:=C_LTU
  451. else
  452. taicpu(hp1).condition:=C_GEU;
  453. end
  454. else
  455. begin
  456. if taicpu(hp1).condition=C_NE then
  457. taicpu(hp1).condition:=C_LT
  458. else
  459. taicpu(hp1).condition:=C_GE;
  460. end;
  461. DebugMsg('Peephole SltuB2B performed', hp1);
  462. RemoveInstr(p);
  463. result:=true;
  464. end
  465. {
  466. Turn
  467. sltu x,y,z
  468. beq/bne x, X0, ...
  469. dealloc x
  470. Into
  471. bltu/geu y, z, ...
  472. }
  473. else if (taicpu(p).ops=3) and
  474. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  475. MatchInstruction(hp1,A_Bxx,[C_NE,C_EQ]) and
  476. (taicpu(hp1).ops=3) and
  477. MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[0]^) and
  478. MatchOperand(taicpu(hp1).oper[1]^,NR_X0) and
  479. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  480. (not RegModifiedBetween(taicpu(p).oper[2]^.reg, p,hp1)) and
  481. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  482. begin
  483. taicpu(hp1).loadreg(0,taicpu(p).oper[1]^.reg);
  484. taicpu(hp1).loadreg(1,taicpu(p).oper[2]^.reg);
  485. if taicpu(p).opcode=A_SLTU then
  486. begin
  487. if taicpu(hp1).condition=C_NE then
  488. taicpu(hp1).condition:=C_LTU
  489. else
  490. taicpu(hp1).condition:=C_GEU;
  491. end
  492. else
  493. begin
  494. if taicpu(hp1).condition=C_NE then
  495. taicpu(hp1).condition:=C_LT
  496. else
  497. taicpu(hp1).condition:=C_GE;
  498. end;
  499. DebugMsg('Peephole SltuB2B performed', hp1);
  500. RemoveInstr(p);
  501. result:=true;
  502. end;
  503. end;
  504. A_SLTIU:
  505. begin
  506. {
  507. Turn
  508. sltiu x,y,1
  509. beq/ne x,x0,...
  510. dealloc x
  511. Into
  512. bne y,x0,...
  513. }
  514. if (taicpu(p).ops=3) and
  515. (taicpu(p).oper[2]^.typ=top_const) and
  516. (taicpu(p).oper[2]^.val=1) and
  517. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  518. MatchInstruction(hp1,A_Bxx,[C_NE,C_EQ]) and
  519. (taicpu(hp1).ops=3) and
  520. MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[0]^) and
  521. MatchOperand(taicpu(hp1).oper[1]^,NR_X0) and
  522. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  523. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  524. begin
  525. taicpu(hp1).loadreg(0,taicpu(p).oper[1]^.reg);
  526. taicpu(hp1).condition:=inverse_cond(taicpu(hp1).condition);
  527. DebugMsg('Peephole Sltiu0B2B performed', hp1);
  528. RemoveInstr(p);
  529. result:=true;
  530. end;
  531. end;
  532. A_LUI,
  533. A_LB,
  534. A_LBU,
  535. A_LH,
  536. A_LHU,
  537. A_LW,
  538. {$ifdef riscv64}
  539. A_LWU,
  540. A_LD,
  541. {$endif riscv64}
  542. A_ADD,
  543. A_DIV,
  544. A_DIVU,
  545. {$ifdef riscv64}
  546. A_DIVW,
  547. A_DIVUW,
  548. {$endif riscv64}
  549. A_REM,
  550. A_REMU,
  551. {$ifdef riscv64}
  552. A_REMW,
  553. A_REMUW,
  554. {$endif riscv64}
  555. A_MUL,
  556. A_MULH,
  557. A_MULHSU,
  558. A_MULHU,
  559. A_XORI,
  560. A_ORI,
  561. A_AND,
  562. A_OR,
  563. A_XOR,
  564. A_SLL,
  565. A_SRL,
  566. A_SRA,
  567. A_NEG,
  568. A_NOT:
  569. result:=OptPass1OP(p);
  570. A_SRAI,
  571. A_SRLI,
  572. A_SLLI:
  573. begin
  574. if (taicpu(p).oper[2]^.val=0) and
  575. MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
  576. begin
  577. DebugMsg('Peephole S*LI x,x,0 to nop performed', p);
  578. RemoveInstr(p);
  579. result:=true;
  580. end
  581. else if (taicpu(p).oper[2]^.val=0) then
  582. begin
  583. { this enables further optimizations }
  584. DebugMsg('Peephole S*LI x,y,0 to addi performed', p);
  585. taicpu(p).opcode:=A_ADDI;
  586. result:=true;
  587. end
  588. else
  589. result:=OptPass1OP(p);
  590. end;
  591. A_SLTI:
  592. begin
  593. {
  594. Turn
  595. slti x,y,0
  596. beq/ne x,x0,...
  597. dealloc x
  598. Into
  599. bge/lt y,x0,...
  600. }
  601. if (taicpu(p).ops=3) and
  602. (taicpu(p).oper[2]^.typ=top_const) and
  603. (taicpu(p).oper[2]^.val=0) and
  604. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  605. (hp1.typ=ait_instruction) and
  606. (taicpu(hp1).opcode=A_Bxx) and
  607. (taicpu(hp1).ops=3) and
  608. (taicpu(hp1).oper[0]^.typ=top_reg) and
  609. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  610. (taicpu(hp1).oper[1]^.typ=top_reg) and
  611. (taicpu(hp1).oper[1]^.reg=NR_X0) and
  612. (taicpu(hp1).condition in [C_NE,C_EQ]) and
  613. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
  614. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(hp1)) then
  615. begin
  616. taicpu(hp1).loadreg(0,taicpu(p).oper[1]^.reg);
  617. taicpu(hp1).loadreg(1,NR_X0);
  618. if taicpu(hp1).condition=C_NE then
  619. taicpu(hp1).condition:=C_LT
  620. else
  621. taicpu(hp1).condition:=C_GE;
  622. DebugMsg('Peephole Slti0B2B performed', hp1);
  623. RemoveInstr(p);
  624. result:=true;
  625. end;
  626. end;
  627. A_FADD_S,
  628. A_FSUB_S,
  629. A_FMUL_S,
  630. A_FDIV_S,
  631. A_FSQRT_S,
  632. A_FNEG_S,
  633. A_FLW,
  634. A_FCVT_D_S,
  635. A_FMADD_S,A_FMSUB_S,A_FNMSUB_S,A_FNMADD_S:
  636. result:=OptPass1FOP(p,A_FSGNJ_S);
  637. A_FADD_D,
  638. A_FSUB_D,
  639. A_FMUL_D,
  640. A_FDIV_D,
  641. A_FSQRT_D,
  642. A_FNEG_D,
  643. A_FLD,
  644. A_FCVT_S_D,
  645. A_FMADD_D,A_FMSUB_D,A_FNMSUB_D,A_FNMADD_D:
  646. result:=OptPass1FOP(p,A_FSGNJ_D);
  647. else
  648. ;
  649. end;
  650. end;
  651. else
  652. ;
  653. end;
  654. end;
  655. end.