ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : aint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. function valid_index_size(size: tcgsize): boolean;virtual;
  65. public
  66. procedure pass_generate_code;override;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. cutils,cclasses,verbose,globals,constexp,
  72. symconst,symbase,symdef,symsym,symcpu,symtable,defutil,paramgr,
  73. aasmbase,aasmtai,aasmdata,
  74. procinfo,pass_2,parabase,
  75. pass_1,nld,ncon,nadd,ncnv,nutils,
  76. cgobj,hlcgobj,
  77. tgobj,ncgutil,objcgutl,
  78. defcmp
  79. ;
  80. {*****************************************************************************
  81. TCGLOADVMTADDRNODE
  82. *****************************************************************************}
  83. procedure tcgloadvmtaddrnode.pass_generate_code;
  84. var
  85. href : treference;
  86. pool : THashSet;
  87. entry : PHashSetItem;
  88. begin
  89. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  90. if (left.nodetype=typen) then
  91. begin
  92. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  93. if not is_objcclass(left.resultdef) then
  94. begin
  95. reference_reset_symbol(href,
  96. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  97. voidpointertype.size);
  98. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,resultdef,href,location.register);
  99. end
  100. else
  101. begin
  102. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  103. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  104. if (target_info.system in systems_objc_nfabi) then
  105. begin
  106. { find/add necessary classref/classname pool entries }
  107. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  108. end
  109. else
  110. begin
  111. { find/add necessary classref/classname pool entries }
  112. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  113. end;
  114. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  115. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  116. end;
  117. end
  118. else
  119. { should be handled in pass 1 }
  120. internalerror(2015052801);
  121. end;
  122. {*****************************************************************************
  123. TCGLOADPARENTFPNODE
  124. *****************************************************************************}
  125. procedure tcgloadparentfpnode.pass_generate_code;
  126. var
  127. currpi : tprocinfo;
  128. hsym : tparavarsym;
  129. href : treference;
  130. begin
  131. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  132. begin
  133. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  134. location.register:=current_procinfo.framepointer;
  135. end
  136. else
  137. begin
  138. currpi:=current_procinfo;
  139. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  140. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  141. { load framepointer of current proc }
  142. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  143. if not assigned(hsym) then
  144. internalerror(200309281);
  145. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  146. { walk parents }
  147. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  148. begin
  149. currpi:=currpi.parent;
  150. if not assigned(currpi) then
  151. internalerror(200311201);
  152. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  153. if not assigned(hsym) then
  154. internalerror(200309282);
  155. if hsym.localloc.loc<>LOC_REFERENCE then
  156. internalerror(200309283);
  157. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  158. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  159. end;
  160. end;
  161. end;
  162. {*****************************************************************************
  163. TCGADDRNODE
  164. *****************************************************************************}
  165. procedure tcgaddrnode.pass_generate_code;
  166. begin
  167. secondpass(left);
  168. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  169. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  170. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  171. { on x86_64-win64, array of chars can be returned in registers, however,
  172. when passing these arrays to other functions, the compiler wants to take
  173. the address of the array so when the addrnode has been created internally,
  174. we have to force the data into memory, see also tw14388.pp
  175. }
  176. if nf_internal in flags then
  177. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  178. else
  179. internalerror(2006111510);
  180. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  181. end;
  182. {*****************************************************************************
  183. TCGDEREFNODE
  184. *****************************************************************************}
  185. procedure tcgderefnode.pass_generate_code;
  186. var
  187. paraloc1 : tcgpara;
  188. pd : tprocdef;
  189. sym : tsym;
  190. st : tsymtable;
  191. hp : pnode;
  192. extraoffset : tcgint;
  193. begin
  194. sym:=nil;
  195. { assume natural alignment, except for packed records }
  196. if not(resultdef.typ in [recorddef,objectdef]) or
  197. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  199. else
  200. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  201. { can we fold an add/sub node into the offset of the deref node? }
  202. extraoffset:=0;
  203. hp:=actualtargetnode(@left);
  204. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  205. begin
  206. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  207. replacenode(hp^,taddnode(hp^).left);
  208. end
  209. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  210. begin
  211. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  212. replacenode(hp^,taddnode(hp^).left);
  213. end
  214. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  215. begin
  216. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  217. replacenode(hp^,taddnode(hp^).right);
  218. end;
  219. secondpass(left);
  220. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  221. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  222. case left.location.loc of
  223. LOC_CREGISTER,
  224. LOC_REGISTER:
  225. begin
  226. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  227. {$ifdef cpu_uses_separate_address_registers}
  228. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  229. begin
  230. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  231. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  232. location.reference.base);
  233. end
  234. else
  235. {$endif}
  236. location.reference.base := left.location.register;
  237. end;
  238. LOC_CREFERENCE,
  239. LOC_REFERENCE:
  240. begin
  241. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  242. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  243. end;
  244. LOC_CONSTANT:
  245. begin
  246. location.reference.offset:=left.location.value;
  247. end;
  248. else
  249. internalerror(200507031);
  250. end;
  251. location.reference.offset:=location.reference.offset+extraoffset;
  252. if (cs_use_heaptrc in current_settings.globalswitches) and
  253. (cs_checkpointer in current_settings.localswitches) and
  254. not(cs_compilesystem in current_settings.moduleswitches) and
  255. tpointerdef(left.resultdef).compatible_with_pointerdef_size(tpointerdef(voidpointertype)) and
  256. not(nf_no_checkpointer in flags) and
  257. { can be NR_NO in case of LOC_CONSTANT }
  258. (location.reference.base<>NR_NO) then
  259. begin
  260. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  261. (sym.typ<>procsym) then
  262. internalerror(2012010601);
  263. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  264. paraloc1.init;
  265. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  266. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  267. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  268. paraloc1.done;
  269. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  270. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  271. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  272. end;
  273. end;
  274. {*****************************************************************************
  275. TCGSUBSCRIPTNODE
  276. *****************************************************************************}
  277. function tcgsubscriptnode.handle_platform_subscript: boolean;
  278. begin
  279. result:=false;
  280. end;
  281. procedure tcgsubscriptnode.pass_generate_code;
  282. var
  283. asmsym: tasmsymbol;
  284. paraloc1 : tcgpara;
  285. tmpref: treference;
  286. sref: tsubsetreference;
  287. offsetcorrection : aint;
  288. pd : tprocdef;
  289. sym : tsym;
  290. st : tsymtable;
  291. begin
  292. sym:=nil;
  293. secondpass(left);
  294. if codegenerror then
  295. exit;
  296. paraloc1.init;
  297. { several object types must be dereferenced implicitly }
  298. if is_implicit_pointer_object_type(left.resultdef) then
  299. begin
  300. if (not is_managed_type(left.resultdef)) or
  301. (target_info.system in systems_garbage_collected_managed_types) then
  302. begin
  303. { the contents of a class are aligned to a sizeof(pointer) }
  304. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  305. case left.location.loc of
  306. LOC_CREGISTER,
  307. LOC_REGISTER:
  308. begin
  309. {$ifdef cpu_uses_separate_address_registers}
  310. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  311. begin
  312. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  313. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  314. left.location.register,location.reference.base);
  315. end
  316. else
  317. {$endif}
  318. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  319. end;
  320. LOC_CREFERENCE,
  321. LOC_REFERENCE,
  322. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  323. LOC_SUBSETREG,
  324. LOC_CSUBSETREG,
  325. LOC_SUBSETREF,
  326. LOC_CSUBSETREF:
  327. begin
  328. hlcg.reference_reset_base(location.reference,left.resultdef,
  329. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  330. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  331. end;
  332. LOC_CONSTANT:
  333. begin
  334. { can happen with @classtype(pointerconst).field }
  335. location.reference.offset:=left.location.value;
  336. end;
  337. else
  338. internalerror(2009092401);
  339. end;
  340. { implicit deferencing }
  341. if (cs_use_heaptrc in current_settings.globalswitches) and
  342. (cs_checkpointer in current_settings.localswitches) and
  343. not(cs_compilesystem in current_settings.moduleswitches) then
  344. begin
  345. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  346. (sym.typ<>procsym) then
  347. internalerror(2012010602);
  348. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  349. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  350. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  351. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  352. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  353. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  354. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  355. end;
  356. end
  357. else
  358. { reference-counted implicit pointer object types don't have
  359. fields -> cannot be subscripted (calls are handled via call
  360. nodes) }
  361. internalerror(2011011901);
  362. end
  363. else
  364. begin
  365. location_copy(location,left.location);
  366. { some abi's require that functions return (some) records in }
  367. { registers }
  368. case location.loc of
  369. LOC_REFERENCE,
  370. LOC_CREFERENCE:
  371. ;
  372. LOC_CONSTANT,
  373. LOC_REGISTER,
  374. LOC_CREGISTER,
  375. { if a floating point value is casted into a record, it
  376. can happen that we get here an fpu or mm register }
  377. LOC_MMREGISTER,
  378. LOC_FPUREGISTER,
  379. LOC_CMMREGISTER,
  380. LOC_CFPUREGISTER:
  381. begin
  382. { in case the result is not something that can be put
  383. into an integer register (e.g.
  384. function_returning_record().non_regable_field, or
  385. a function returning a value > sizeof(intreg))
  386. -> force to memory
  387. }
  388. if not tstoreddef(left.resultdef).is_intregable or
  389. not tstoreddef(resultdef).is_intregable or
  390. { if the field spans multiple registers, we must force the record into
  391. memory as well }
  392. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  393. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  394. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  395. { actually, we should be able to "subscript" a constant, but this would require some code
  396. which enables dumping and reading constants from a temporary memory buffer. This
  397. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  398. }
  399. LOC_CONSTANT]) then
  400. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  401. else
  402. begin
  403. if (left.location.loc = LOC_REGISTER) then
  404. location.loc := LOC_SUBSETREG
  405. else
  406. location.loc := LOC_CSUBSETREG;
  407. location.size:=def_cgsize(resultdef);
  408. offsetcorrection:=0;
  409. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  410. begin
  411. if (vs.fieldoffset>=sizeof(aword)) xor (target_info.endian=endian_big) then
  412. location.sreg.subsetreg := left.location.registerhi
  413. else
  414. location.sreg.subsetreg := left.location.register;
  415. if (vs.fieldoffset>=sizeof(aword)) then
  416. offsetcorrection:=sizeof(aword)*8;
  417. location.sreg.subsetregsize := OS_INT;
  418. end
  419. else
  420. begin
  421. location.sreg.subsetreg := left.location.register;
  422. location.sreg.subsetregsize := left.location.size;
  423. end;
  424. if not is_packed_record_or_object(left.resultdef) then
  425. begin
  426. if (target_info.endian = ENDIAN_BIG) then
  427. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  428. else
  429. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  430. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  431. end
  432. else
  433. begin
  434. location.sreg.bitlen := resultdef.packedbitsize;
  435. if (target_info.endian = ENDIAN_BIG) then
  436. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  437. else
  438. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  439. end;
  440. end;
  441. end;
  442. LOC_SUBSETREG,
  443. LOC_CSUBSETREG:
  444. begin
  445. location.size:=def_cgsize(resultdef);
  446. if not is_packed_record_or_object(left.resultdef) then
  447. begin
  448. if (target_info.endian = ENDIAN_BIG) then
  449. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  450. else
  451. inc(location.sreg.startbit, vs.fieldoffset * 8);
  452. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  453. end
  454. else
  455. begin
  456. location.sreg.bitlen := resultdef.packedbitsize;
  457. if (target_info.endian = ENDIAN_BIG) then
  458. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  459. else
  460. inc(location.sreg.startbit, vs.fieldoffset);
  461. end;
  462. end;
  463. else
  464. internalerror(2006031901);
  465. end;
  466. end;
  467. if is_objc_class_or_protocol(left.resultdef) and
  468. (target_info.system in systems_objc_nfabi) then
  469. begin
  470. if (location.loc<>LOC_REFERENCE) or
  471. (location.reference.index<>NR_NO) then
  472. internalerror(2009092402);
  473. { the actual field offset is stored in memory (to solve the
  474. "fragile base class" problem: this way the layout of base
  475. classes can be changed without breaking programs compiled against
  476. earlier versions)
  477. }
  478. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  479. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  480. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  481. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  482. { always packrecords C -> natural alignment }
  483. location.reference.alignment:=vs.vardef.alignment;
  484. end
  485. else if handle_platform_subscript then
  486. begin
  487. { done }
  488. end
  489. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  490. begin
  491. if not is_packed_record_or_object(left.resultdef) then
  492. begin
  493. inc(location.reference.offset,vs.fieldoffset);
  494. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  495. end
  496. else if (vs.fieldoffset mod 8 = 0) and
  497. (resultdef.packedbitsize mod 8 = 0) and
  498. { is different in case of e.g. packenum 2 and an enum }
  499. { which fits in 8 bits }
  500. (resultdef.size*8 = resultdef.packedbitsize) then
  501. begin
  502. inc(location.reference.offset,vs.fieldoffset div 8);
  503. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  504. end
  505. else
  506. begin
  507. sref.ref:=location.reference;
  508. sref.ref.alignment:=1;
  509. sref.bitindexreg:=NR_NO;
  510. inc(sref.ref.offset,vs.fieldoffset div 8);
  511. sref.startbit:=vs.fieldoffset mod 8;
  512. sref.bitlen:=resultdef.packedbitsize;
  513. if (left.location.loc=LOC_REFERENCE) then
  514. location.loc:=LOC_SUBSETREF
  515. else
  516. location.loc:=LOC_CSUBSETREF;
  517. location.sref:=sref;
  518. end;
  519. { also update the size of the location }
  520. location.size:=def_cgsize(resultdef);
  521. end;
  522. paraloc1.done;
  523. end;
  524. {*****************************************************************************
  525. TCGWITHNODE
  526. *****************************************************************************}
  527. procedure tcgwithnode.pass_generate_code;
  528. begin
  529. location_reset(location,LOC_VOID,OS_NO);
  530. if assigned(left) then
  531. secondpass(left);
  532. end;
  533. {*****************************************************************************
  534. TCGVECNODE
  535. *****************************************************************************}
  536. function tcgvecnode.get_mul_size : aint;
  537. begin
  538. if nf_memindex in flags then
  539. get_mul_size:=1
  540. else
  541. begin
  542. if (left.resultdef.typ=arraydef) then
  543. if not is_packed_array(left.resultdef) then
  544. get_mul_size:=tarraydef(left.resultdef).elesize
  545. else
  546. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  547. else
  548. get_mul_size:=resultdef.size;
  549. end
  550. end;
  551. { this routine must, like any other routine, not change the contents }
  552. { of base/index registers of references, as these may be regvars. }
  553. { The register allocator can coalesce one LOC_REGISTER being moved }
  554. { into another (as their live ranges won't overlap), but not a }
  555. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  556. { the live range of the LOC_CREGISTER will most likely overlap the }
  557. { the live range of the target LOC_(C)REGISTER) }
  558. { The passed register may be a LOC_CREGISTER as well. }
  559. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  560. var
  561. hreg: tregister;
  562. begin
  563. if l<>1 then
  564. begin
  565. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  566. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  567. maybe_const_reg:=hreg;
  568. end;
  569. if location.reference.base=NR_NO then
  570. location.reference.base:=maybe_const_reg
  571. else if location.reference.index=NR_NO then
  572. location.reference.index:=maybe_const_reg
  573. else
  574. begin
  575. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  576. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  577. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  578. { insert new index register }
  579. location.reference.index:=maybe_const_reg;
  580. end;
  581. { update alignment }
  582. if (location.reference.alignment=0) then
  583. internalerror(2009020704);
  584. location.reference.alignment:=newalignment(location.reference.alignment,l);
  585. end;
  586. { see remarks for tcgvecnode.update_reference_reg_mul above }
  587. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  588. var
  589. sref: tsubsetreference;
  590. offsetreg, hreg: tregister;
  591. alignpower: aint;
  592. temp : longint;
  593. begin
  594. { only orddefs are bitpacked. Even then we only need special code in }
  595. { case the bitpacked *byte size* is not a power of two, otherwise }
  596. { everything can be handled using the the regular array code. }
  597. if ((l mod 8) = 0) and
  598. (ispowerof2(l div 8,temp) or
  599. not is_ordinal(resultdef)
  600. {$ifndef cpu64bitalu}
  601. or is_64bitint(resultdef)
  602. {$endif not cpu64bitalu}
  603. ) then
  604. begin
  605. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  606. exit;
  607. end;
  608. if (l > 8*sizeof(aint)) then
  609. internalerror(200608051);
  610. sref.ref := location.reference;
  611. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  612. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_ADDR,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  613. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,hreg);
  614. { keep alignment for index }
  615. sref.ref.alignment := left.resultdef.alignment;
  616. if not ispowerof2(packedbitsloadsize(l),temp) then
  617. internalerror(2006081201);
  618. alignpower:=temp;
  619. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  620. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  621. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  622. if (sref.ref.base = NR_NO) then
  623. sref.ref.base := offsetreg
  624. else if (sref.ref.index = NR_NO) then
  625. sref.ref.index := offsetreg
  626. else
  627. begin
  628. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  629. sref.ref.base := offsetreg;
  630. end;
  631. { the if expression below is a constant evaluated at compile time, so disable the unreachable code
  632. warning }
  633. {$push}
  634. {$warn 6018 off}
  635. { we can reuse hreg only if OS_INT and OS_ADDR have the same size/type }
  636. if OS_INT<>OS_ADDR then
  637. begin
  638. sref.bitindexreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  639. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_INT,hreg,sref.bitindexreg);
  640. end
  641. else
  642. sref.bitindexreg:=hreg;
  643. {$pop}
  644. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,sref.bitindexreg);
  645. sref.startbit := 0;
  646. sref.bitlen := resultdef.packedbitsize;
  647. if (left.location.loc = LOC_REFERENCE) then
  648. location.loc := LOC_SUBSETREF
  649. else
  650. location.loc := LOC_CSUBSETREF;
  651. location.sref := sref;
  652. end;
  653. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  654. begin
  655. inc(ref.offset,index*mulsize);
  656. end;
  657. procedure tcgvecnode.second_wideansistring;
  658. begin
  659. end;
  660. procedure tcgvecnode.second_dynamicarray;
  661. begin
  662. end;
  663. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  664. begin
  665. result:=
  666. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  667. end;
  668. procedure tcgvecnode.rangecheck_array;
  669. var
  670. hightree : tnode;
  671. poslabel,
  672. neglabel : tasmlabel;
  673. hreg : tregister;
  674. paraloc1,paraloc2 : tcgpara;
  675. pd : tprocdef;
  676. begin
  677. { omit range checking when this is an array access to a pointer which has been
  678. typecasted from an array }
  679. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  680. exit;
  681. paraloc1.init;
  682. paraloc2.init;
  683. if is_open_array(left.resultdef) or
  684. is_array_of_const(left.resultdef) then
  685. begin
  686. { cdecl functions don't have high() so we can not check the range }
  687. { (can't use current_procdef, since it may be a nested procedure) }
  688. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  689. begin
  690. { Get high value }
  691. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  692. { it must be available }
  693. if not assigned(hightree) then
  694. internalerror(200212201);
  695. firstpass(hightree);
  696. secondpass(hightree);
  697. { generate compares }
  698. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  699. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  700. else
  701. begin
  702. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  703. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  704. end;
  705. current_asmdata.getjumplabel(neglabel);
  706. current_asmdata.getjumplabel(poslabel);
  707. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  708. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  709. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  710. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  711. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  712. { release hightree }
  713. hightree.free;
  714. end;
  715. end
  716. else
  717. if is_dynamic_array(left.resultdef) then
  718. begin
  719. pd:=search_system_proc('fpc_dynarray_rangecheck');
  720. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  721. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  722. if pd.is_pushleftright then
  723. begin
  724. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  725. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  726. end
  727. else
  728. begin
  729. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  730. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  731. end;
  732. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  733. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  734. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  735. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  736. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  737. end;
  738. { for regular arrays, we don't have to do anything because the index has been
  739. type converted to the index type, which already inserted a range check if
  740. necessary }
  741. paraloc1.done;
  742. paraloc2.done;
  743. end;
  744. procedure tcgvecnode.rangecheck_string;
  745. var
  746. paraloc1,
  747. paraloc2: tcgpara;
  748. helpername: TIDString;
  749. pd: tprocdef;
  750. begin
  751. paraloc1.init;
  752. paraloc2.init;
  753. case tstringdef(left.resultdef).stringtype of
  754. { it's the same for ansi- and wide strings }
  755. st_unicodestring,
  756. st_widestring,
  757. st_ansistring:
  758. begin
  759. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  760. pd:=search_system_proc(helpername);
  761. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  762. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  763. if pd.is_pushleftright then
  764. begin
  765. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  766. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  767. end
  768. else
  769. begin
  770. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  771. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  772. end;
  773. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  774. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  775. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  776. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  777. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  778. end;
  779. st_shortstring:
  780. begin
  781. {!!!!!!!!!!!!!!!!!}
  782. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  783. end;
  784. st_longstring:
  785. begin
  786. {!!!!!!!!!!!!!!!!!}
  787. end;
  788. end;
  789. paraloc1.done;
  790. paraloc2.done;
  791. end;
  792. procedure tcgvecnode.pass_generate_code;
  793. var
  794. offsetdec,
  795. extraoffset : aint;
  796. rightp : pnode;
  797. newsize : tcgsize;
  798. mulsize,
  799. bytemulsize,
  800. alignpow : aint;
  801. paraloc1,
  802. paraloc2 : tcgpara;
  803. subsetref : tsubsetreference;
  804. temp : longint;
  805. indexdef : tdef;
  806. begin
  807. paraloc1.init;
  808. paraloc2.init;
  809. mulsize:=get_mul_size;
  810. if not is_packed_array(left.resultdef) then
  811. bytemulsize:=mulsize
  812. else
  813. bytemulsize:=mulsize div 8;
  814. newsize:=def_cgsize(resultdef);
  815. secondpass(left);
  816. if left.location.loc=LOC_CREFERENCE then
  817. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  818. else
  819. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  820. { an ansistring needs to be dereferenced }
  821. if is_ansistring(left.resultdef) or
  822. is_wide_or_unicode_string(left.resultdef) then
  823. begin
  824. if nf_callunique in flags then
  825. internalerror(200304236);
  826. {DM!!!!!}
  827. case left.location.loc of
  828. LOC_REGISTER,
  829. LOC_CREGISTER :
  830. begin
  831. {$ifdef m68k}
  832. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  833. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  834. {$else m68k}
  835. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  836. {$endif m68k}
  837. end;
  838. LOC_CREFERENCE,
  839. LOC_REFERENCE :
  840. begin
  841. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  842. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  843. end;
  844. LOC_CONSTANT:
  845. begin
  846. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  847. end;
  848. else
  849. internalerror(2002032218);
  850. end;
  851. if is_ansistring(left.resultdef) then
  852. offsetdec:=1
  853. else
  854. offsetdec:=2;
  855. location.reference.alignment:=offsetdec;
  856. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  857. if not(cs_zerobasedstrings in current_settings.localswitches) then
  858. update_reference_offset(location.reference,-1,offsetdec);
  859. end
  860. else if is_dynamic_array(left.resultdef) then
  861. begin
  862. case left.location.loc of
  863. LOC_REGISTER,
  864. LOC_CREGISTER :
  865. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  866. LOC_REFERENCE,
  867. LOC_CREFERENCE :
  868. begin
  869. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  870. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  871. left.location.reference,location.reference.base);
  872. end;
  873. else
  874. internalerror(2002032219);
  875. end;
  876. { a dynarray points to the start of a memory block, which
  877. we assume to be always aligned to a multiple of the
  878. pointer size
  879. }
  880. location.reference.alignment:=voidpointertype.size;
  881. end
  882. else
  883. begin
  884. { may happen in case of function results }
  885. case left.location.loc of
  886. LOC_CREGISTER,
  887. LOC_CMMREGISTER,
  888. LOC_REGISTER,
  889. LOC_MMREGISTER:
  890. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  891. end;
  892. location_copy(location,left.location);
  893. end;
  894. { location must be memory }
  895. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  896. internalerror(200411013);
  897. { offset can only differ from 0 if arraydef }
  898. if (left.resultdef.typ=arraydef) and
  899. not(is_dynamic_array(left.resultdef)) and
  900. (not(is_packed_array(left.resultdef)) or
  901. ((mulsize mod 8 = 0) and
  902. ispowerof2(mulsize div 8,temp)) or
  903. { only orddefs are bitpacked }
  904. not is_ordinal(resultdef)
  905. {$ifndef cpu64bitalu}
  906. or is_64bitint(resultdef)
  907. {$endif not cpu64bitalu}
  908. ) then
  909. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  910. if right.nodetype=ordconstn then
  911. begin
  912. { offset can only differ from 0 if arraydef }
  913. if cs_check_range in current_settings.localswitches then
  914. begin
  915. secondpass(right);
  916. case left.resultdef.typ of
  917. arraydef :
  918. rangecheck_array;
  919. stringdef :
  920. rangecheck_string;
  921. end;
  922. end;
  923. if not(is_packed_array(left.resultdef)) or
  924. ((mulsize mod 8 = 0) and
  925. (ispowerof2(mulsize div 8,temp) or
  926. { only orddefs are bitpacked }
  927. not is_ordinal(resultdef))) then
  928. begin
  929. extraoffset:=tordconstnode(right).value.svalue;
  930. update_reference_offset(location.reference,extraoffset,bytemulsize);
  931. { adjust alignment after this change }
  932. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  933. { don't do this for floats etc.; needed to properly set the }
  934. { size for bitpacked arrays (e.g. a bitpacked array of }
  935. { enums who are size 2 but fit in one byte -> in the array }
  936. { they will be one byte and have to be stored like that) }
  937. if is_packed_array(left.resultdef) and
  938. (tcgsize2size[newsize] <> bytemulsize) then
  939. newsize:=int_cgsize(bytemulsize);
  940. end
  941. else
  942. begin
  943. subsetref.ref := location.reference;
  944. subsetref.ref.alignment := left.resultdef.alignment;
  945. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  946. internalerror(2006081212);
  947. alignpow:=temp;
  948. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  949. subsetref.bitindexreg := NR_NO;
  950. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  951. subsetref.bitlen := resultdef.packedbitsize;
  952. if (left.location.loc = LOC_REFERENCE) then
  953. location.loc := LOC_SUBSETREF
  954. else
  955. location.loc := LOC_CSUBSETREF;
  956. location.sref := subsetref;
  957. end;
  958. end
  959. else
  960. { not nodetype=ordconstn }
  961. begin
  962. if (cs_opt_level1 in current_settings.optimizerswitches) and
  963. { if we do range checking, we don't }
  964. { need that fancy code (it would be }
  965. { buggy) }
  966. not(cs_check_range in current_settings.localswitches) and
  967. (left.resultdef.typ=arraydef) and
  968. not is_packed_array(left.resultdef) then
  969. begin
  970. extraoffset:=0;
  971. rightp:=actualtargetnode(@right);
  972. if rightp^.nodetype=addn then
  973. begin
  974. if taddnode(rightp^).right.nodetype=ordconstn then
  975. begin
  976. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  977. replacenode(rightp^,taddnode(rightp^).left);
  978. end
  979. else if taddnode(rightp^).left.nodetype=ordconstn then
  980. begin
  981. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  982. replacenode(rightp^,taddnode(rightp^).right);
  983. end;
  984. end
  985. else if rightp^.nodetype=subn then
  986. begin
  987. if taddnode(rightp^).right.nodetype=ordconstn then
  988. begin
  989. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  990. replacenode(rightp^,taddnode(rightp^).left);
  991. end;
  992. end;
  993. update_reference_offset(location.reference,extraoffset,mulsize);
  994. end;
  995. { calculate from left to right }
  996. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  997. internalerror(200304237);
  998. secondpass(right);
  999. if (right.expectloc=LOC_JUMP)<>
  1000. (right.location.loc=LOC_JUMP) then
  1001. internalerror(2006010801);
  1002. { if mulsize = 1, we won't have to modify the index }
  1003. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  1004. not valid_index_size(right.location.size) then
  1005. begin
  1006. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1007. indexdef:=ptruinttype
  1008. end
  1009. else
  1010. indexdef:=right.resultdef;
  1011. { produce possible range check code: }
  1012. if cs_check_range in current_settings.localswitches then
  1013. begin
  1014. if left.resultdef.typ=arraydef then
  1015. rangecheck_array
  1016. else if (left.resultdef.typ=stringdef) then
  1017. rangecheck_string;
  1018. end;
  1019. { insert the register and the multiplication factor in the
  1020. reference }
  1021. if not is_packed_array(left.resultdef) then
  1022. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  1023. else
  1024. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  1025. end;
  1026. location.size:=newsize;
  1027. paraloc1.done;
  1028. paraloc2.done;
  1029. end;
  1030. begin
  1031. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1032. cloadparentfpnode:=tcgloadparentfpnode;
  1033. caddrnode:=tcgaddrnode;
  1034. cderefnode:=tcgderefnode;
  1035. csubscriptnode:=tcgsubscriptnode;
  1036. cwithnode:=tcgwithnode;
  1037. cvecnode:=tcgvecnode;
  1038. end.