| .. |
|
aasmcpu.pas
|
e7cd5319f0
* Put under {$ifndef x86_64} more cases of instructions that do not exist in 64-bit mode.
|
11 years ago |
|
agx86att.pas
|
045f161012
Separate out nasm assembler for i8086, i386 and x86_64 cpus, also separte based on target object format
|
11 years ago |
|
agx86int.pas
|
7cfd7a66cd
+ create a special 'heap' segment with reserved space equal to heapsize (i.e.
|
11 years ago |
|
agx86nsm.pas
|
36d6fb7868
* don't add the stack segment declaration at the beginning of each object file
|
11 years ago |
|
cga.pas
|
d88d644925
+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.
|
11 years ago |
|
cgx86.pas
|
ae627a4ba8
* tcgx86.a_op_const_reg_reg: optimize trivial cases before considering more complex ones.
|
11 years ago |
|
cpubase.pas
|
07e90aaa24
+ Implemented IEEE 754-compliant checking for unordered results of floating-point compares on x86 targets. Mantis #9362.
|
11 years ago |
|
hlcgx86.pas
|
71deda6f50
+ added interface to ncgutil.gen_load_loc_cgpara() to hlcgobj + generic
|
14 years ago |
|
itcpugas.pas
|
926dd1b41e
* command line compilation of i8086 fixed
|
12 years ago |
|
itx86int.pas
|
0e41df598e
* merge i8086 branch by Nikolay Nikolov
|
12 years ago |
|
ni86mem.pas
|
4a79481c51
* isolated segment-related functionality of tabsolutevarsym into i386/i8086-
|
11 years ago |
|
nx86add.pas
|
2ee0c8de45
* i386: For integer comparisons with zero, emit "test $-1,%reg" instead of "test %reg,%reg". It is more spilling-friendly, because it transforms into "test $-1,spilltemp" and does not require a register.
|
11 years ago |
|
nx86cal.pas
|
9c1f917e3a
* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.
|
11 years ago |
|
nx86cnv.pas
|
d613ab8578
* x86: improve x87 qword to float conversion, using single-precision constants saves space and removes need in separate load on FPU stack. No precision loss occurs because 2**64 is representable exactly even in single precision.
|
11 years ago |
|
nx86con.pas
|
45f60bc4b5
* small changes (copyright, typo, readability)
|
12 years ago |
|
nx86inl.pas
|
8207e0ef22
+ make use of vfnmsub*/vfmsub*/vfnmadd* instructions if possible
|
11 years ago |
|
nx86mat.pas
|
05ecd3cec1
* One more fix of operand size, likely harmless because shift amount is taken modulo bit-width anyway.
|
11 years ago |
|
nx86mem.pas
|
198960b17c
* preserve the segment of the reference in tx86vecnode.update_reference_reg_mul
|
11 years ago |
|
nx86set.pas
|
5e8f8f4755
* Use GOT-relative constants for i386 PIC jump tables, they don't need runtime relocations. Now almost ABI-compliant on Linux/BSD (Darwin targets unchanged). Also clean up i8086-specific stuff: using tai_const.create_type_sym(aitconst_ptr,...) generates near pointers on i8086, which is the desired goal.
|
11 years ago |
|
rax86.pas
|
aa107b914c
* merged avx2 branch, developed by Torsten Grundke
|
11 years ago |
|
rax86att.pas
|
d6180b1e70
* properly propagate PIC-related suffixes from the x86 assembler reader in
|
12 years ago |
|
rax86int.pas
|
9b560ffd64
* x86 intel syntax inline asm: allow a segment override (segcs,segds,seges,etc.)
|
11 years ago |
|
rgx86.pas
|
e7cd5319f0
* Put under {$ifndef x86_64} more cases of instructions that do not exist in 64-bit mode.
|
11 years ago |
|
symi86.pas
|
fc71081b74
* i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to
|
11 years ago |
|
symx86.pas
|
8364232049
+ symx86 unit, forgot to commit (part of r27397)
|
11 years ago |
|
x86ins.dat
|
842e027a9f
+ prove of concept how FMA4 could be supported in inline assembler
|
11 years ago |
|
x86reg.dat
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 years ago |
nickysn
9b560ffd64
* x86 intel syntax inline asm: allow a segment override (segcs,segds,seges,etc.)