aasmcpu.pas 30 KB

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  1. {
  2. Copyright (c) 1999-2008 by Mazen Neifer and Florian Klaempfl
  3. Contains the assembler object for the Z80
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit aasmcpu;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. cclasses,
  22. globtype,globals,verbose,
  23. aasmbase,aasmtai,aasmdata,aasmsym,
  24. cgbase,cgutils,cpubase,cpuinfo,
  25. ogbase;
  26. const
  27. { "mov reg,reg" source operand number }
  28. O_MOV_SOURCE = 1;
  29. { "mov reg,reg" source operand number }
  30. O_MOV_DEST = 0;
  31. instabentries = {$i z80nop.inc}
  32. maxinfolen = 18;
  33. type
  34. { Operand types }
  35. toperandtype=(
  36. OT_NONE,
  37. OT_IMM3, { 3-bit immediate value (bit number: [0..7]) }
  38. OT_IMM8, { 8-bit immediate value }
  39. OT_IMM16, { 16-bit immediate value }
  40. OT_IMM_VAL0, { the immediate value 0 }
  41. OT_IMM_VAL1, { the immediate value 1 }
  42. OT_IMM_VAL2, { the immediate value 2 }
  43. OT_IMM_RST, { immediate value in [$00,$08,$10,$18,$20,$28,$30,$38] }
  44. OT_IMM_PORT, { 8-bit immediate port number for the IN and OUT instructions }
  45. OT_REG8, { 8-bit register: A/B/C/D/E/H/L }
  46. OT_REG8_A, { register A }
  47. OT_REG8_I, { register I }
  48. OT_REG8_R, { register R }
  49. OT_REG8_C_PORT, { implied parameter of the IN and OUT instructions }
  50. OT_REG16_IX, { register IX }
  51. OT_REG16_IY, { register IY }
  52. OT_REG16_SP, { register SP }
  53. OT_REG16_BC_DE_HL_SP, { 16-bit register pair: BC/DE/HL/SP }
  54. OT_REG16_BC_DE_HL_AF, { 16-bit register pair: BC/DE/HL/AF }
  55. OT_REG16_BC_DE_IX_SP, { 16-bit register pair: BC/DE/IX/SP }
  56. OT_REG16_BC_DE_IY_SP, { 16-bit register pair: BC/DE/IY/SP }
  57. OT_REG16_DE, { 16-bit register pair DE }
  58. OT_REG16_HL, { 16-bit register pair HL }
  59. OT_REG16_AF, { 16-bit register pair AF }
  60. OT_REG16_AF_, { alternate register set, 16-bit register pair AF' }
  61. OT_RELJMP8, { 8-bit relative jump offset }
  62. OT_COND, { condition: NZ/Z/NC/C/PO/PE/P/M }
  63. OT_COND_C, { condition C }
  64. OT_COND_NC, { condition NC }
  65. OT_COND_Z, { condition Z }
  66. OT_COND_NZ, { condition NZ }
  67. OT_REF_ADDR16, { memory contents at address (nn = 16-bit immediate address) }
  68. OT_REF_BC, { memory contents at address in register BC }
  69. OT_REF_DE, { memory contents at address in register DE }
  70. OT_REF_HL, { memory contents at address in register HL }
  71. OT_REF_SP, { memory contents at address in register SP }
  72. OT_REF_IX, { memory contents at address in register IX }
  73. OT_REF_IY, { memory contents at address in register IY }
  74. OT_REF_IX_d, { memory contents at address in register IX+d, d is in [-128..127] }
  75. OT_REF_IY_d); { memory contents at address in register IY+d, d is in [-128..127] }
  76. timmoperandtype = OT_IMM3..OT_IMM_PORT;
  77. tregoperandtype = OT_REG8..OT_REG16_AF_;
  78. treg8operandtype = OT_REG8..OT_REG8_C_PORT;
  79. treg16operandtype = OT_REG16_IX..OT_REG16_AF_;
  80. tcondoperandtype = OT_COND..OT_COND_NZ;
  81. trefoperandtype = OT_REF_ADDR16..OT_REF_IY_d;
  82. trefoperandtypes = set of trefoperandtype;
  83. tinsentry = record
  84. opcode : tasmop;
  85. ops : byte;
  86. optypes : array[0..max_operands-1] of toperandtype;
  87. code : array[0..maxinfolen] of char;
  88. flags : longint;
  89. end;
  90. pinsentry=^tinsentry;
  91. { taicpu }
  92. taicpu = class(tai_cpu_abstract_sym)
  93. private
  94. { next fields are filled in pass1, so pass2 is faster }
  95. insentry : PInsEntry;
  96. inssize : shortint;
  97. insoffset : longint;
  98. LastInsOffset : longint;
  99. function Matches(p:PInsEntry):boolean;
  100. function FindInsentry(objdata:TObjData):boolean;
  101. function calcsize(p:PInsEntry):shortint;
  102. public
  103. constructor op_none(op : tasmop);
  104. constructor op_reg(op : tasmop;_op1 : tregister);
  105. constructor op_const(op : tasmop;_op1 : LongInt);
  106. constructor op_ref(op : tasmop;const _op1 : treference);
  107. constructor op_reg_reg(op : tasmop;_op1,_op2 : tregister);
  108. constructor op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
  109. constructor op_reg_const(op:tasmop; _op1: tregister; _op2: LongInt);
  110. constructor op_const_reg(op:tasmop; _op1: LongInt; _op2: tregister);
  111. constructor op_ref_reg(op : tasmop;const _op1 : treference;_op2 : tregister);
  112. constructor op_ref_const(op:tasmop; _op1: treference; _op2: LongInt);
  113. { this is for Jmp instructions }
  114. constructor op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
  115. constructor op_sym(op : tasmop;_op1 : tasmsymbol);
  116. constructor op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
  117. procedure loadbool(opidx:longint;_b:boolean);
  118. { register allocation }
  119. function is_same_reg_move(regtype: Tregistertype):boolean; override;
  120. { register spilling code }
  121. function spilling_get_operation_type(opnr: longint): topertype;override;
  122. procedure ResetPass1;override;
  123. procedure ResetPass2;override;
  124. function Pass1(objdata:TObjData):longint;override;
  125. procedure Pass2(objdata:TObjData);override;
  126. function CheckIfValid:boolean;
  127. function GetString:string;
  128. end;
  129. tai_align = class(tai_align_abstract)
  130. { nothing to add }
  131. end;
  132. procedure InitAsm;
  133. procedure DoneAsm;
  134. function spilling_create_load(const ref:treference;r:tregister):Taicpu;
  135. function spilling_create_store(r:tregister; const ref:treference):Taicpu;
  136. function is_ref_addr16(const ref:treference): Boolean;
  137. function is_ref_bc(const ref:treference): Boolean;
  138. function is_ref_de(const ref:treference): Boolean;
  139. function is_ref_hl(const ref:treference): Boolean;
  140. function is_ref_sp(const ref:treference): Boolean;
  141. function is_ref_ix(const ref:treference): Boolean;
  142. function is_ref_iy(const ref:treference): Boolean;
  143. function is_ref_ix_d(const ref:treference): Boolean;
  144. function is_ref_iy_d(const ref:treference): Boolean;
  145. function is_ref_opertype(const ref:treference;opertype:toperandtype): Boolean;
  146. function is_ref_in_opertypes(const ref:treference;const refopertypes:trefoperandtypes): Boolean;
  147. implementation
  148. {****************************************************************************
  149. Instruction table
  150. *****************************************************************************}
  151. type
  152. TInsTabCache=array[TasmOp] of longint;
  153. PInsTabCache=^TInsTabCache;
  154. const
  155. InsTab:array[0..instabentries-1] of TInsEntry={$i z80tab.inc}
  156. var
  157. InsTabCache : PInsTabCache;
  158. {*****************************************************************************
  159. taicpu Constructors
  160. *****************************************************************************}
  161. procedure taicpu.loadbool(opidx:longint;_b:boolean);
  162. begin
  163. if opidx>=ops then
  164. ops:=opidx+1;
  165. with oper[opidx]^ do
  166. begin
  167. if typ=top_ref then
  168. dispose(ref);
  169. b:=_b;
  170. typ:=top_bool;
  171. end;
  172. end;
  173. function taicpu.Matches(p: PInsEntry): boolean;
  174. function OperandsMatch(const oper: toper; const ot: toperandtype): boolean;
  175. begin
  176. case ot of
  177. OT_IMM3:
  178. result:=(oper.typ=top_const) and (oper.val>=0) and (oper.val<=7);
  179. OT_IMM8:
  180. result:=((oper.typ=top_const) and (oper.val>=0) and (oper.val<=255)) or
  181. ((oper.typ=top_ref) and
  182. (oper.ref^.refaddr in [addr_hi8,addr_lo8]) and assigned(oper.ref^.symbol) and
  183. (oper.ref^.base=NR_NO) and (oper.ref^.index=NR_NO));
  184. OT_IMM16:
  185. result:=((oper.typ=top_const) and (oper.val>=-32768) and (oper.val<=65535)) or
  186. ((oper.typ=top_ref) and
  187. (oper.ref^.refaddr=addr_full) and assigned(oper.ref^.symbol) and
  188. (oper.ref^.base=NR_NO) and (oper.ref^.index=NR_NO));
  189. OT_IMM_VAL0:
  190. result:=(oper.typ=top_const) and (oper.val=0);
  191. OT_IMM_VAL1:
  192. result:=(oper.typ=top_const) and (oper.val=1);
  193. OT_IMM_VAL2:
  194. result:=(oper.typ=top_const) and (oper.val=2);
  195. OT_IMM_RST:
  196. result:=(oper.typ=top_const) and ((oper.val=$00) or (oper.val=$08) or
  197. (oper.val=$10) or (oper.val=$18) or
  198. (oper.val=$20) or (oper.val=$28) or
  199. (oper.val=$30) or (oper.val=$38));
  200. OT_IMM_PORT:
  201. result:=(oper.typ=top_ref) and
  202. (oper.ref^.symbol=nil) and (oper.ref^.relsymbol=nil) and
  203. (oper.ref^.base=NR_NO) and (oper.ref^.index=NR_NO) and
  204. (oper.ref^.offset>=0) and (oper.ref^.offset<=255);
  205. OT_REG8:
  206. result:=(oper.typ=top_reg) and ((oper.reg=NR_A) or (oper.reg=NR_B) or
  207. (oper.reg=NR_C) or (oper.reg=NR_D) or
  208. (oper.reg=NR_E) or (oper.reg=NR_H) or
  209. (oper.reg=NR_L));
  210. OT_REG8_A:
  211. result:=(oper.typ=top_reg) and (oper.reg=NR_A);
  212. OT_REG8_I:
  213. result:=(oper.typ=top_reg) and (oper.reg=NR_I);
  214. OT_REG8_R:
  215. result:=(oper.typ=top_reg) and (oper.reg=NR_R);
  216. OT_REG8_C_PORT:
  217. result:=(oper.typ=top_ref) and
  218. (((oper.ref^.base=NR_C) and (oper.ref^.index=NR_NO)) or
  219. ((oper.ref^.base=NR_NO) and (oper.ref^.index=NR_C))) and
  220. (oper.ref^.symbol=nil) and (oper.ref^.relsymbol=nil) and
  221. (oper.ref^.offset=0);
  222. OT_REG16_IX:
  223. result:=(oper.typ=top_reg) and (oper.reg=NR_IX);
  224. OT_REG16_IY:
  225. result:=(oper.typ=top_reg) and (oper.reg=NR_IY);
  226. OT_REG16_SP:
  227. result:=(oper.typ=top_reg) and (oper.reg=NR_SP);
  228. OT_REG16_BC_DE_HL_SP:
  229. result:=(oper.typ=top_reg) and ((oper.reg=NR_BC) or (oper.reg=NR_DE) or (oper.reg=NR_HL) or (oper.reg=NR_SP));
  230. OT_REG16_BC_DE_HL_AF:
  231. result:=(oper.typ=top_reg) and ((oper.reg=NR_BC) or (oper.reg=NR_DE) or (oper.reg=NR_HL) or (oper.reg=NR_AF));
  232. OT_REG16_BC_DE_IX_SP:
  233. result:=(oper.typ=top_reg) and ((oper.reg=NR_BC) or (oper.reg=NR_DE) or (oper.reg=NR_IX) or (oper.reg=NR_SP));
  234. OT_REG16_BC_DE_IY_SP:
  235. result:=(oper.typ=top_reg) and ((oper.reg=NR_BC) or (oper.reg=NR_DE) or (oper.reg=NR_IY) or (oper.reg=NR_SP));
  236. OT_REG16_DE:
  237. result:=(oper.typ=top_reg) and (oper.reg=NR_DE);
  238. OT_REG16_HL:
  239. result:=(oper.typ=top_reg) and (oper.reg=NR_HL);
  240. OT_REG16_AF:
  241. result:=(oper.typ=top_reg) and (oper.reg=NR_AF);
  242. OT_REG16_AF_:
  243. result:=(oper.typ=top_reg) and (oper.reg=NR_AF_);
  244. OT_RELJMP8:
  245. result:=(oper.typ=top_ref) and
  246. (oper.ref^.refaddr=addr_full) and assigned(oper.ref^.symbol) and
  247. (oper.ref^.base=NR_NO) and (oper.ref^.index=NR_NO);
  248. OT_REF_ADDR16,
  249. OT_REF_BC,
  250. OT_REF_DE,
  251. OT_REF_HL,
  252. OT_REF_SP,
  253. OT_REF_IX,
  254. OT_REF_IY,
  255. OT_REF_IX_d,
  256. OT_REF_IY_d:
  257. result:=(oper.typ=top_ref) and is_ref_opertype(oper.ref^,ot);
  258. else
  259. internalerror(2020042901);
  260. end;
  261. end;
  262. var
  263. i: Integer;
  264. begin
  265. result:=false;
  266. { Check the opcode }
  267. if p^.opcode<>opcode then
  268. exit;
  269. { The opcode doesn't support conditions, but we have a condition?
  270. That's an invalid instruction, don't match it against anything. }
  271. if (condition<>C_NONE) and not (opcode in cond_instructions) then
  272. exit;
  273. { if our opcode supports a condition, but our operation doesn't have
  274. one, and we're matching it with an instruction entry 'p' that has a
  275. condition, then it doesn't match }
  276. if (opcode in cond_instructions) and (condition=C_None) and
  277. (p^.ops>0) and (p^.optypes[0] in [OT_COND..OT_COND_NZ]) then
  278. exit;
  279. { instruction has a condition? }
  280. if (opcode in cond_instructions) and (condition<>C_None) then
  281. begin
  282. { Check the operand count }
  283. if p^.ops<>(ops+1) then
  284. exit;
  285. { Check the condition }
  286. case p^.optypes[0] of
  287. OT_COND:
  288. { any condition accepted };
  289. OT_COND_C:
  290. if condition<>C_C then
  291. exit;
  292. OT_COND_NC:
  293. if condition<>C_NC then
  294. exit;
  295. OT_COND_Z:
  296. if condition<>C_Z then
  297. exit;
  298. OT_COND_NZ:
  299. if condition<>C_NZ then
  300. exit;
  301. else
  302. { no condition in 'p'? Then it's not a match! }
  303. exit;
  304. end;
  305. { Check the operands }
  306. for i:=1 to p^.ops-1 do
  307. if not OperandsMatch(oper[i-1]^,p^.optypes[i]) then
  308. exit;
  309. end
  310. else
  311. { no condition }
  312. begin
  313. { Check the operand count }
  314. if p^.ops<>ops then
  315. exit;
  316. { Check the operands }
  317. for i:=0 to p^.ops-1 do
  318. if not OperandsMatch(oper[i]^,p^.optypes[i]) then
  319. exit;
  320. end;
  321. result:=true;
  322. end;
  323. function taicpu.FindInsentry(objdata: TObjData): boolean;
  324. var
  325. i : longint;
  326. begin
  327. result:=false;
  328. { Things which may only be done once, not when a second pass is done to
  329. optimize }
  330. if (Insentry=nil) {or (IF_PASS2 in InsEntry^.flags)} then
  331. begin
  332. { set the file postion }
  333. current_filepos:=fileinfo;
  334. end
  335. else
  336. begin
  337. { we've already an insentry so it's valid }
  338. result:=true;
  339. exit;
  340. end;
  341. { Lookup opcode in the table }
  342. InsSize:=-1;
  343. i:=instabcache^[opcode];
  344. if i=-1 then
  345. begin
  346. Message1(asmw_e_opcode_not_in_table,std_op2str[opcode]);
  347. exit;
  348. end;
  349. insentry:=@instab[i];
  350. while (insentry^.opcode=opcode) do
  351. begin
  352. if matches(insentry) then
  353. begin
  354. result:=true;
  355. exit;
  356. end;
  357. inc(insentry);
  358. end;
  359. Message1(asmw_e_invalid_opcode_and_operands,GetString);
  360. { No instruction found, set insentry to nil and inssize to -1 }
  361. insentry:=nil;
  362. inssize:=-1;
  363. end;
  364. function taicpu.calcsize(p: PInsEntry): shortint;
  365. var
  366. c: Char;
  367. begin
  368. result:=1;
  369. for c in p^.code do
  370. if c=',' then
  371. inc(result);
  372. end;
  373. constructor taicpu.op_none(op : tasmop);
  374. begin
  375. inherited create(op);
  376. end;
  377. constructor taicpu.op_reg(op : tasmop;_op1 : tregister);
  378. begin
  379. inherited create(op);
  380. ops:=1;
  381. loadreg(0,_op1);
  382. end;
  383. constructor taicpu.op_ref(op : tasmop;const _op1 : treference);
  384. begin
  385. inherited create(op);
  386. ops:=1;
  387. loadref(0,_op1);
  388. end;
  389. constructor taicpu.op_const(op : tasmop;_op1 : LongInt);
  390. begin
  391. inherited create(op);
  392. ops:=1;
  393. loadconst(0,_op1);
  394. end;
  395. constructor taicpu.op_reg_reg(op : tasmop;_op1,_op2 : tregister);
  396. begin
  397. inherited create(op);
  398. ops:=2;
  399. loadreg(0,_op1);
  400. loadreg(1,_op2);
  401. end;
  402. constructor taicpu.op_reg_const(op:tasmop; _op1: tregister; _op2: LongInt);
  403. begin
  404. inherited create(op);
  405. ops:=2;
  406. loadreg(0,_op1);
  407. loadconst(1,_op2);
  408. end;
  409. constructor taicpu.op_const_reg(op:tasmop; _op1: LongInt; _op2: tregister);
  410. begin
  411. inherited create(op);
  412. ops:=2;
  413. loadconst(0,_op1);
  414. loadreg(1,_op2);
  415. end;
  416. constructor taicpu.op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
  417. begin
  418. inherited create(op);
  419. ops:=2;
  420. loadreg(0,_op1);
  421. loadref(1,_op2);
  422. end;
  423. constructor taicpu.op_ref_reg(op : tasmop;const _op1 : treference;_op2 : tregister);
  424. begin
  425. inherited create(op);
  426. ops:=2;
  427. loadref(0,_op1);
  428. loadreg(1,_op2);
  429. end;
  430. constructor taicpu.op_ref_const(op: tasmop; _op1: treference; _op2: LongInt);
  431. begin
  432. inherited create(op);
  433. ops:=2;
  434. loadref(0,_op1);
  435. loadconst(1,_op2);
  436. end;
  437. constructor taicpu.op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
  438. begin
  439. inherited create(op);
  440. is_jmp:=op in jmp_instructions;
  441. condition:=cond;
  442. ops:=1;
  443. loadsymbol(0,_op1,0);
  444. end;
  445. constructor taicpu.op_sym(op : tasmop;_op1 : tasmsymbol);
  446. begin
  447. inherited create(op);
  448. is_jmp:=op in jmp_instructions;
  449. ops:=1;
  450. loadsymbol(0,_op1,0);
  451. end;
  452. constructor taicpu.op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
  453. begin
  454. inherited create(op);
  455. ops:=1;
  456. loadsymbol(0,_op1,_op1ofs);
  457. end;
  458. function taicpu.is_same_reg_move(regtype: Tregistertype):boolean;
  459. begin
  460. result:=(
  461. ((opcode in [A_LD]) and (regtype = R_INTREGISTER))
  462. ) and
  463. (ops=2) and
  464. (oper[0]^.typ=top_reg) and
  465. (oper[1]^.typ=top_reg) and
  466. (oper[0]^.reg=oper[1]^.reg);
  467. end;
  468. function taicpu.spilling_get_operation_type(opnr: longint): topertype;
  469. begin
  470. result:=operand_read;
  471. case opcode of
  472. A_LD,
  473. A_POP:
  474. if opnr=0 then
  475. result:=operand_write;
  476. A_PUSH,
  477. A_BIT,
  478. A_CP,
  479. A_DJNZ,
  480. A_JR,
  481. A_JP,
  482. A_CALL,
  483. A_RET,
  484. A_RETI,
  485. A_RETN,
  486. A_RST,
  487. A_IM:
  488. ;
  489. A_SET,
  490. A_RES:
  491. if opnr=1 then
  492. result:=operand_readwrite;
  493. A_EX:
  494. result:=operand_readwrite;
  495. else
  496. begin
  497. if opnr=0 then
  498. result:=operand_readwrite;
  499. end;
  500. end;
  501. end;
  502. procedure taicpu.ResetPass1;
  503. begin
  504. { we need to reset everything here, because the choosen insentry
  505. can be invalid for a new situation where the previously optimized
  506. insentry is not correct }
  507. InsEntry:=nil;
  508. InsSize:=0;
  509. LastInsOffset:=-1;
  510. end;
  511. procedure taicpu.ResetPass2;
  512. begin
  513. { we are here in a second pass, check if the instruction can be optimized }
  514. {if assigned(InsEntry) and
  515. (IF_PASS2 in InsEntry^.flags) then
  516. begin
  517. InsEntry:=nil;
  518. InsSize:=0;
  519. end;}
  520. LastInsOffset:=-1;
  521. end;
  522. function taicpu.Pass1(objdata: TObjData): longint;
  523. begin
  524. Pass1:=0;
  525. { Save the old offset and set the new offset }
  526. InsOffset:=ObjData.CurrObjSec.Size;
  527. { Error? }
  528. if (Insentry=nil) and (InsSize=-1) then
  529. exit;
  530. { set the file postion }
  531. current_filepos:=fileinfo;
  532. { Get InsEntry }
  533. if FindInsEntry(ObjData) then
  534. begin
  535. { Calculate instruction size }
  536. InsSize:=calcsize(insentry);
  537. LastInsOffset:=InsOffset;
  538. Pass1:=InsSize;
  539. exit;
  540. end;
  541. LastInsOffset:=-1;
  542. end;
  543. procedure taicpu.Pass2(objdata: TObjData);
  544. begin
  545. inherited Pass2(objdata);
  546. end;
  547. function taicpu.CheckIfValid: boolean;
  548. begin
  549. result:=FindInsEntry(nil);
  550. end;
  551. function taicpu.GetString: string;
  552. var
  553. i : longint;
  554. s : string;
  555. first: Boolean;
  556. begin
  557. s:='['+std_op2str[opcode];
  558. for i:=0 to ops-1 do
  559. begin
  560. with oper[i]^ do
  561. begin
  562. if i=0 then
  563. begin
  564. s:=s+' ';
  565. if condition<>C_None then
  566. s:=s+cond2str[condition]+',';
  567. end
  568. else
  569. s:=s+',';
  570. case typ of
  571. top_reg:
  572. s:=s+std_regname(reg);
  573. top_const:
  574. s:=s+'const';
  575. top_ref:
  576. case ref^.refaddr of
  577. addr_full:
  578. s:=s+'addr16';
  579. addr_lo8:
  580. s:=s+'addr_lo8';
  581. addr_hi8:
  582. s:=s+'addr_hi8';
  583. addr_no:
  584. begin
  585. s:=s+'(';
  586. first:=true;
  587. if ref^.base<>NR_NO then
  588. begin
  589. first:=false;
  590. s:=s+std_regname(ref^.base);
  591. end;
  592. if ref^.index<>NR_NO then
  593. begin
  594. if not first then
  595. s:=s+'+';
  596. first:=false;
  597. s:=s+std_regname(ref^.index);
  598. end;
  599. if assigned(ref^.symbol) then
  600. begin
  601. if not first then
  602. s:=s+'+';
  603. first:=false;
  604. s:=s+'addr16';
  605. end;
  606. if ref^.offset<>0 then
  607. begin
  608. if not first then
  609. s:=s+'+';
  610. if (ref^.offset>=-128) and (ref^.offset<=127) then
  611. s:=s+'const8'
  612. else
  613. s:=s+'const16';
  614. end;
  615. s:=s+')';
  616. end;
  617. else
  618. ;
  619. end;
  620. else
  621. ;
  622. end;
  623. end;
  624. end;
  625. GetString:=s+']';
  626. end;
  627. function spilling_create_load(const ref:treference;r:tregister):Taicpu;
  628. begin
  629. case getregtype(r) of
  630. R_INTREGISTER :
  631. result:=taicpu.op_reg_ref(A_LD,r,ref)
  632. else
  633. internalerror(200401041);
  634. end;
  635. end;
  636. function spilling_create_store(r:tregister; const ref:treference):Taicpu;
  637. begin
  638. case getregtype(r) of
  639. R_INTREGISTER :
  640. result:=taicpu.op_ref_reg(A_LD,ref,r);
  641. else
  642. internalerror(200401041);
  643. end;
  644. end;
  645. function is_ref_addr16(const ref: treference): Boolean;
  646. begin
  647. result:=(ref.base=NR_NO) and (ref.index=NR_NO);
  648. end;
  649. function is_ref_bc(const ref: treference): Boolean;
  650. begin
  651. result:=(((ref.base=NR_BC) and (ref.index=NR_NO)) or
  652. ((ref.base=NR_NO) and (ref.index=NR_BC))) and
  653. (ref.offset=0) and (ref.scalefactor<=1) and
  654. (ref.symbol=nil) and (ref.relsymbol=nil);
  655. end;
  656. function is_ref_de(const ref: treference): Boolean;
  657. begin
  658. result:=(((ref.base=NR_DE) and (ref.index=NR_NO)) or
  659. ((ref.base=NR_NO) and (ref.index=NR_DE))) and
  660. (ref.offset=0) and (ref.scalefactor<=1) and
  661. (ref.symbol=nil) and (ref.relsymbol=nil);
  662. end;
  663. function is_ref_hl(const ref: treference): Boolean;
  664. begin
  665. result:=(((ref.base=NR_HL) and (ref.index=NR_NO)) or
  666. ((ref.base=NR_NO) and (ref.index=NR_HL))) and
  667. (ref.offset=0) and (ref.scalefactor<=1) and
  668. (ref.symbol=nil) and (ref.relsymbol=nil);
  669. end;
  670. function is_ref_sp(const ref: treference): Boolean;
  671. begin
  672. result:=(((ref.base=NR_SP) and (ref.index=NR_NO)) or
  673. ((ref.base=NR_NO) and (ref.index=NR_SP))) and
  674. (ref.offset=0) and (ref.scalefactor<=1) and
  675. (ref.symbol=nil) and (ref.relsymbol=nil);
  676. end;
  677. function is_ref_ix(const ref: treference): Boolean;
  678. begin
  679. result:=(((ref.base=NR_IX) and (ref.index=NR_NO)) or
  680. ((ref.base=NR_NO) and (ref.index=NR_IX))) and
  681. (ref.offset=0) and (ref.scalefactor<=1) and
  682. (ref.symbol=nil) and (ref.relsymbol=nil);
  683. end;
  684. function is_ref_iy(const ref: treference): Boolean;
  685. begin
  686. result:=(((ref.base=NR_IY) and (ref.index=NR_NO)) or
  687. ((ref.base=NR_NO) and (ref.index=NR_IY))) and
  688. (ref.offset=0) and (ref.scalefactor<=1) and
  689. (ref.symbol=nil) and (ref.relsymbol=nil);
  690. end;
  691. function is_ref_ix_d(const ref: treference): Boolean;
  692. begin
  693. result:=(((ref.base=NR_IX) and (ref.index=NR_NO)) or
  694. ((ref.base=NR_NO) and (ref.index=NR_IX))) and
  695. (ref.offset>=-128) and (ref.offset<=127) and (ref.scalefactor<=1) and
  696. (ref.symbol=nil) and (ref.relsymbol=nil);
  697. end;
  698. function is_ref_iy_d(const ref: treference): Boolean;
  699. begin
  700. result:=(((ref.base=NR_IY) and (ref.index=NR_NO)) or
  701. ((ref.base=NR_NO) and (ref.index=NR_IY))) and
  702. (ref.offset>=-128) and (ref.offset<=127) and (ref.scalefactor<=1) and
  703. (ref.symbol=nil) and (ref.relsymbol=nil);
  704. end;
  705. function is_ref_opertype(const ref: treference; opertype: toperandtype): Boolean;
  706. begin
  707. case opertype of
  708. OT_REF_ADDR16:
  709. result:=is_ref_addr16(ref);
  710. OT_REF_BC:
  711. result:=is_ref_bc(ref);
  712. OT_REF_DE:
  713. result:=is_ref_de(ref);
  714. OT_REF_HL:
  715. result:=is_ref_hl(ref);
  716. OT_REF_SP:
  717. result:=is_ref_sp(ref);
  718. OT_REF_IX:
  719. result:=is_ref_ix(ref);
  720. OT_REF_IY:
  721. result:=is_ref_iy(ref);
  722. OT_REF_IX_d:
  723. result:=is_ref_ix_d(ref);
  724. OT_REF_IY_d:
  725. result:=is_ref_iy_d(ref);
  726. else
  727. internalerror(2020041801);
  728. end;
  729. end;
  730. function is_ref_in_opertypes(const ref: treference; const refopertypes: trefoperandtypes): Boolean;
  731. var
  732. ot: trefoperandtype;
  733. begin
  734. result:=true;
  735. for ot:=low(trefoperandtypes) to high(trefoperandtypes) do
  736. if (ot in refopertypes) and is_ref_opertype(ref,ot) then
  737. exit;
  738. result:=false;
  739. end;
  740. {****************************************************************************
  741. Instruction table
  742. *****************************************************************************}
  743. procedure BuildInsTabCache;
  744. var
  745. i : longint;
  746. begin
  747. new(instabcache);
  748. FillChar(instabcache^,sizeof(tinstabcache),$ff);
  749. i:=0;
  750. while (i<InsTabEntries) do
  751. begin
  752. if InsTabCache^[InsTab[i].OPcode]=-1 then
  753. InsTabCache^[InsTab[i].OPcode]:=i;
  754. inc(i);
  755. end;
  756. end;
  757. procedure InitAsm;
  758. begin
  759. if not assigned(instabcache) then
  760. BuildInsTabCache;
  761. end;
  762. procedure DoneAsm;
  763. begin
  764. if assigned(instabcache) then
  765. begin
  766. dispose(instabcache);
  767. instabcache:=nil;
  768. end;
  769. end;
  770. begin
  771. cai_cpu:=taicpu;
  772. cai_align:=tai_align;
  773. end.