cgobj.pas 187 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. should be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. { how many times is this current code executed }
  48. executionweight : longint;
  49. alignment : talignment;
  50. rg : array[tregistertype] of trgobj;
  51. {$ifdef flowgraph}
  52. aktflownode:word;
  53. {$endif}
  54. {************************************************}
  55. { basic routines }
  56. constructor create;
  57. {# Initialize the register allocators needed for the codegenerator.}
  58. procedure init_register_allocators;virtual;
  59. {# Clean up the register allocators needed for the codegenerator.}
  60. procedure done_register_allocators;virtual;
  61. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  62. procedure set_regalloc_live_range_direction(dir: TRADirection);
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:TAsmList):Tregister;virtual;
  71. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. procedure allocallcpuregisters(list:TAsmList);virtual;
  87. procedure deallocallcpuregisters(list:TAsmList);virtual;
  88. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  89. procedure translate_register(var reg : tregister);
  90. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : TAsmList;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  97. { Synchronize register, make sure it is still valid }
  98. procedure a_reg_sync(list : TAsmList;r : tregister);
  99. {# Pass a parameter, which is located in a register, to a routine.
  100. This routine should push/send the parameter to the routine, as
  101. required by the specific processor ABI and routine modifiers.
  102. It must generate register allocation information for the cgpara in
  103. case it consists of cpuregisters.
  104. @param(size size of the operand in the register)
  105. @param(r register source of the operand)
  106. @param(cgpara where the parameter will be stored)
  107. }
  108. procedure a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  109. {# Pass a parameter, which is a constant, to a routine.
  110. A generic version is provided. This routine should
  111. be overriden for optimization purposes if the cpu
  112. permits directly sending this type of parameter.
  113. It must generate register allocation information for the cgpara in
  114. case it consists of cpuregisters.
  115. @param(size size of the operand in constant)
  116. @param(a value of constant to send)
  117. @param(cgpara where the parameter will be stored)
  118. }
  119. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  120. {# Pass the value of a parameter, which is located in memory, to a routine.
  121. A generic version is provided. This routine should
  122. be overriden for optimization purposes if the cpu
  123. permits directly sending this type of parameter.
  124. It must generate register allocation information for the cgpara in
  125. case it consists of cpuregisters.
  126. @param(size size of the operand in constant)
  127. @param(r Memory reference of value to send)
  128. @param(cgpara where the parameter will be stored)
  129. }
  130. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  131. {# Pass the value of a parameter, which can be located either in a register or memory location,
  132. to a routine.
  133. A generic version is provided.
  134. @param(l location of the operand to send)
  135. @param(nr parameter number (starting from one) of routine (from left to right))
  136. @param(cgpara where the parameter will be stored)
  137. }
  138. procedure a_load_loc_cgpara(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  139. {# Pass the address of a reference to a routine. This routine
  140. will calculate the address of the reference, and pass this
  141. calculated address as a parameter.
  142. It must generate register allocation information for the cgpara in
  143. case it consists of cpuregisters.
  144. A generic version is provided. This routine should
  145. be overriden for optimization purposes if the cpu
  146. permits directly sending this type of parameter.
  147. @param(r reference to get address from)
  148. @param(nr parameter number (starting from one) of routine (from left to right))
  149. }
  150. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  151. {# Load a cgparaloc into a memory reference.
  152. It must generate register allocation information for the cgpara in
  153. case it consists of cpuregisters.
  154. @param(paraloc the source parameter sublocation)
  155. @param(ref the destination reference)
  156. @param(sizeleft indicates the total number of bytes left in all of
  157. the remaining sublocations of this parameter (the current
  158. sublocation and all of the sublocations coming after it).
  159. In case this location is also a reference, it is assumed
  160. to be the final part sublocation of the parameter and that it
  161. contains all of the "sizeleft" bytes).)
  162. @param(align the alignment of the paraloc in case it's a reference)
  163. }
  164. procedure a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : aint;align : longint);
  165. {# Load a cgparaloc into any kind of register (int, fp, mm).
  166. @param(regsize the size of the destination register)
  167. @param(paraloc the source parameter sublocation)
  168. @param(reg the destination register)
  169. @param(align the alignment of the paraloc in case it's a reference)
  170. }
  171. procedure a_load_cgparaloc_anyreg(list : TAsmList;regsize : tcgsize;const paraloc : TCGParaLocation;reg : tregister;align : longint);
  172. { Remarks:
  173. * If a method specifies a size you have only to take care
  174. of that number of bits, i.e. load_const_reg with OP_8 must
  175. only load the lower 8 bit of the specified register
  176. the rest of the register can be undefined
  177. if necessary the compiler will call a method
  178. to zero or sign extend the register
  179. * The a_load_XX_XX with OP_64 needn't to be
  180. implemented for 32 bit
  181. processors, the code generator takes care of that
  182. * the addr size is for work with the natural pointer
  183. size
  184. * the procedures without fpu/mm are only for integer usage
  185. * normally the first location is the source and the
  186. second the destination
  187. }
  188. {# Emits instruction to call the method specified by symbol name.
  189. This routine must be overriden for each new target cpu.
  190. There is no a_call_ref because loading the reference will use
  191. a temp register on most cpu's resulting in conflicts with the
  192. registers used for the parameters (PFV)
  193. }
  194. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  195. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  196. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  197. { same as a_call_name, might be overriden on certain architectures to emit
  198. static calls without usage of a got trampoline }
  199. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  200. { move instructions }
  201. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  202. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  203. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  204. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  205. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  206. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  207. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  208. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  209. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  210. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  211. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  212. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  213. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  214. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  215. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  216. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  217. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  218. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  219. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  220. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  221. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  222. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  223. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  224. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  225. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  226. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  227. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  228. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  229. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  230. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  231. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  232. { bit test instructions }
  233. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  234. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  235. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  236. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  237. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  238. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  239. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  240. { bit set/clear instructions }
  241. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  242. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  243. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  244. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  245. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  246. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  247. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  248. { fpu move instructions }
  249. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  250. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  251. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  252. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  253. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  254. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  255. procedure a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  256. procedure a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  257. { vector register move instructions }
  258. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  259. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  260. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  261. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  262. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  263. procedure a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  264. procedure a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  265. procedure a_loadmm_loc_cgpara(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  266. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  267. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  268. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  269. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  270. procedure a_loadmm_intreg_reg(list: TAsmList; fromsize, tosize : tcgsize; intreg, mmreg: tregister; shuffle: pmmshuffle); virtual;
  271. procedure a_loadmm_reg_intreg(list: TAsmList; fromsize, tosize : tcgsize; mmreg, intreg: tregister; shuffle : pmmshuffle); virtual;
  272. { basic arithmetic operations }
  273. { note: for operators which require only one argument (not, neg), use }
  274. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  275. { that in this case the *second* operand is used as both source and }
  276. { destination (JM) }
  277. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  278. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  279. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  280. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  281. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  282. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  283. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  284. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  285. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  286. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  287. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  288. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  289. { trinary operations for processors that support them, 'emulated' }
  290. { on others. None with "ref" arguments since I don't think there }
  291. { are any processors that support it (JM) }
  292. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  293. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  294. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  295. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  296. { comparison operations }
  297. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  298. l : tasmlabel);virtual; abstract;
  299. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  300. l : tasmlabel); virtual;
  301. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  302. l : tasmlabel);
  303. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  304. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  305. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  306. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  307. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  308. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  309. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  310. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  311. l : tasmlabel);
  312. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  313. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  314. {$ifdef cpuflags}
  315. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  316. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  317. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  318. }
  319. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  320. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  321. {$endif cpuflags}
  322. {
  323. This routine tries to optimize the op_const_reg/ref opcode, and should be
  324. called at the start of a_op_const_reg/ref. It returns the actual opcode
  325. to emit, and the constant value to emit. This function can opcode OP_NONE to
  326. remove the opcode and OP_MOVE to replace it with a simple load
  327. @param(op The opcode to emit, returns the opcode which must be emitted)
  328. @param(a The constant which should be emitted, returns the constant which must
  329. be emitted)
  330. }
  331. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  332. {#
  333. This routine is used in exception management nodes. It should
  334. save the exception reason currently in the FUNCTION_RETURN_REG. The
  335. save should be done either to a temp (pointed to by href).
  336. or on the stack (pushing the value on the stack).
  337. The size of the value to save is OS_S32. The default version
  338. saves the exception reason to a temp. memory area.
  339. }
  340. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  341. {#
  342. This routine is used in exception management nodes. It should
  343. save the exception reason constant. The
  344. save should be done either to a temp (pointed to by href).
  345. or on the stack (pushing the value on the stack).
  346. The size of the value to save is OS_S32. The default version
  347. saves the exception reason to a temp. memory area.
  348. }
  349. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  350. {#
  351. This routine is used in exception management nodes. It should
  352. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  353. should either be in the temp. area (pointed to by href , href should
  354. *NOT* be freed) or on the stack (the value should be popped).
  355. The size of the value to save is OS_S32. The default version
  356. saves the exception reason to a temp. memory area.
  357. }
  358. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  359. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  360. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  361. {# This should emit the opcode to copy len bytes from the source
  362. to destination.
  363. It must be overriden for each new target processor.
  364. @param(source Source reference of copy)
  365. @param(dest Destination reference of copy)
  366. }
  367. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  368. {# This should emit the opcode to copy len bytes from the an unaligned source
  369. to destination.
  370. It must be overriden for each new target processor.
  371. @param(source Source reference of copy)
  372. @param(dest Destination reference of copy)
  373. }
  374. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  375. {# This should emit the opcode to a shortrstring from the source
  376. to destination.
  377. @param(source Source reference of copy)
  378. @param(dest Destination reference of copy)
  379. }
  380. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  381. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  382. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  383. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  384. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  385. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  386. {# Generates range checking code. It is to note
  387. that this routine does not need to be overriden,
  388. as it takes care of everything.
  389. @param(p Node which contains the value to check)
  390. @param(todef Type definition of node to range check)
  391. }
  392. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  393. {# Generates overflow checking code for a node }
  394. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  395. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  396. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  397. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  398. {# Emits instructions when compilation is done in profile
  399. mode (this is set as a command line option). The default
  400. behavior does nothing, should be overriden as required.
  401. }
  402. procedure g_profilecode(list : TAsmList);virtual;
  403. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  404. @param(size Number of bytes to allocate)
  405. }
  406. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  407. {# Emits instruction for allocating the locals in entry
  408. code of a routine. This is one of the first
  409. routine called in @var(genentrycode).
  410. @param(localsize Number of bytes to allocate as locals)
  411. }
  412. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  413. {# Emits instructions for returning from a subroutine.
  414. Should also restore the framepointer and stack.
  415. @param(parasize Number of bytes of parameters to deallocate from stack)
  416. }
  417. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  418. {# This routine is called when generating the code for the entry point
  419. of a routine. It should save all registers which are not used in this
  420. routine, and which should be declared as saved in the std_saved_registers
  421. set.
  422. This routine is mainly used when linking to code which is generated
  423. by ABI-compliant compilers (like GCC), to make sure that the reserved
  424. registers of that ABI are not clobbered.
  425. @param(usedinproc Registers which are used in the code of this routine)
  426. }
  427. procedure g_save_registers(list:TAsmList);virtual;
  428. {# This routine is called when generating the code for the exit point
  429. of a routine. It should restore all registers which were previously
  430. saved in @var(g_save_standard_registers).
  431. @param(usedinproc Registers which are used in the code of this routine)
  432. }
  433. procedure g_restore_registers(list:TAsmList);virtual;
  434. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  435. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  436. function g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;virtual;
  437. { generate a stub which only purpose is to pass control the given external method,
  438. setting up any additional environment before doing so (if required).
  439. The default implementation issues a jump instruction to the external name. }
  440. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  441. { initialize the pic/got register }
  442. procedure g_maybe_got_init(list: TAsmList); virtual;
  443. protected
  444. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  445. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  446. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister); virtual;
  447. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  448. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  449. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  450. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  451. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  452. end;
  453. {$ifndef cpu64bitalu}
  454. {# @abstract(Abstract code generator for 64 Bit operations)
  455. This class implements an abstract code generator class
  456. for 64 Bit operations.
  457. }
  458. tcg64 = class
  459. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  460. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  461. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  462. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  463. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  464. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  465. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  466. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  467. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  468. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  469. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  470. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  471. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  472. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  473. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  474. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  475. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  476. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  477. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  478. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  479. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  480. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  481. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  482. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  483. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  484. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  485. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  486. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  487. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  488. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  489. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  490. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  491. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  492. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  493. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  494. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  495. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  496. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  497. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  498. procedure a_load64_reg_cgpara(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  499. procedure a_load64_const_cgpara(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  500. procedure a_load64_ref_cgpara(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  501. procedure a_load64_loc_cgpara(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  502. procedure a_loadmm_intreg64_reg(list: TAsmList; mmsize: tcgsize; intreg: tregister64; mmreg: tregister); virtual;abstract;
  503. procedure a_loadmm_reg_intreg64(list: TAsmList; mmsize: tcgsize; mmreg: tregister; intreg: tregister64); virtual;abstract;
  504. {
  505. This routine tries to optimize the const_reg opcode, and should be
  506. called at the start of a_op64_const_reg. It returns the actual opcode
  507. to emit, and the constant value to emit. If this routine returns
  508. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  509. @param(op The opcode to emit, returns the opcode which must be emitted)
  510. @param(a The constant which should be emitted, returns the constant which must
  511. be emitted)
  512. @param(reg The register to emit the opcode with, returns the register with
  513. which the opcode will be emitted)
  514. }
  515. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  516. { override to catch 64bit rangechecks }
  517. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  518. end;
  519. {$endif cpu64bitalu}
  520. var
  521. {# Main code generator class }
  522. cg : tcg;
  523. {$ifndef cpu64bitalu}
  524. {# Code generator class for all operations working with 64-Bit operands }
  525. cg64 : tcg64;
  526. {$endif cpu64bitalu}
  527. procedure destroy_codegen;
  528. implementation
  529. uses
  530. globals,options,systems,
  531. verbose,defutil,paramgr,symsym,
  532. tgobj,cutils,procinfo,
  533. ncgrtti;
  534. {*****************************************************************************
  535. basic functionallity
  536. ******************************************************************************}
  537. constructor tcg.create;
  538. begin
  539. end;
  540. {*****************************************************************************
  541. register allocation
  542. ******************************************************************************}
  543. procedure tcg.init_register_allocators;
  544. begin
  545. fillchar(rg,sizeof(rg),0);
  546. add_reg_instruction_hook:=@add_reg_instruction;
  547. executionweight:=1;
  548. end;
  549. procedure tcg.done_register_allocators;
  550. begin
  551. { Safety }
  552. fillchar(rg,sizeof(rg),0);
  553. add_reg_instruction_hook:=nil;
  554. end;
  555. {$ifdef flowgraph}
  556. procedure Tcg.init_flowgraph;
  557. begin
  558. aktflownode:=0;
  559. end;
  560. procedure Tcg.done_flowgraph;
  561. begin
  562. end;
  563. {$endif}
  564. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  565. begin
  566. if not assigned(rg[R_INTREGISTER]) then
  567. internalerror(200312122);
  568. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  569. end;
  570. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  571. begin
  572. if not assigned(rg[R_FPUREGISTER]) then
  573. internalerror(200312123);
  574. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  575. end;
  576. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  577. begin
  578. if not assigned(rg[R_MMREGISTER]) then
  579. internalerror(2003121214);
  580. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  581. end;
  582. function tcg.getaddressregister(list:TAsmList):Tregister;
  583. begin
  584. if assigned(rg[R_ADDRESSREGISTER]) then
  585. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  586. else
  587. begin
  588. if not assigned(rg[R_INTREGISTER]) then
  589. internalerror(200312121);
  590. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  591. end;
  592. end;
  593. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  594. var
  595. subreg:Tsubregister;
  596. begin
  597. subreg:=cgsize2subreg(getregtype(reg),size);
  598. result:=reg;
  599. setsubreg(result,subreg);
  600. { notify RA }
  601. if result<>reg then
  602. list.concat(tai_regalloc.resize(result));
  603. end;
  604. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  605. begin
  606. if not assigned(rg[getregtype(r)]) then
  607. internalerror(200312125);
  608. rg[getregtype(r)].getcpuregister(list,r);
  609. end;
  610. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  611. begin
  612. if not assigned(rg[getregtype(r)]) then
  613. internalerror(200312126);
  614. rg[getregtype(r)].ungetcpuregister(list,r);
  615. end;
  616. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  617. begin
  618. if assigned(rg[rt]) then
  619. rg[rt].alloccpuregisters(list,r)
  620. else
  621. internalerror(200310092);
  622. end;
  623. procedure tcg.allocallcpuregisters(list:TAsmList);
  624. begin
  625. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  626. {$ifndef i386}
  627. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  628. {$ifdef cpumm}
  629. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  630. {$endif cpumm}
  631. {$endif i386}
  632. end;
  633. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  634. begin
  635. if assigned(rg[rt]) then
  636. rg[rt].dealloccpuregisters(list,r)
  637. else
  638. internalerror(200310093);
  639. end;
  640. procedure tcg.deallocallcpuregisters(list:TAsmList);
  641. begin
  642. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  643. {$ifndef i386}
  644. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  645. {$ifdef cpumm}
  646. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  647. {$endif cpumm}
  648. {$endif i386}
  649. end;
  650. function tcg.uses_registers(rt:Tregistertype):boolean;
  651. begin
  652. if assigned(rg[rt]) then
  653. result:=rg[rt].uses_registers
  654. else
  655. result:=false;
  656. end;
  657. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  658. var
  659. rt : tregistertype;
  660. begin
  661. rt:=getregtype(r);
  662. { Only add it when a register allocator is configured.
  663. No IE can be generated, because the VMT is written
  664. without a valid rg[] }
  665. if assigned(rg[rt]) then
  666. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  667. end;
  668. procedure tcg.add_move_instruction(instr:Taicpu);
  669. var
  670. rt : tregistertype;
  671. begin
  672. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  673. if assigned(rg[rt]) then
  674. rg[rt].add_move_instruction(instr)
  675. else
  676. internalerror(200310095);
  677. end;
  678. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  679. var
  680. rt : tregistertype;
  681. begin
  682. for rt:=low(rg) to high(rg) do
  683. begin
  684. if assigned(rg[rt]) then
  685. rg[rt].live_range_direction:=dir;
  686. end;
  687. end;
  688. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  689. var
  690. rt : tregistertype;
  691. begin
  692. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  693. begin
  694. if assigned(rg[rt]) then
  695. rg[rt].do_register_allocation(list,headertai);
  696. end;
  697. { running the other register allocator passes could require addition int/addr. registers
  698. when spilling so run int/addr register allocation at the end }
  699. if assigned(rg[R_INTREGISTER]) then
  700. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  701. if assigned(rg[R_ADDRESSREGISTER]) then
  702. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  703. end;
  704. procedure tcg.translate_register(var reg : tregister);
  705. begin
  706. rg[getregtype(reg)].translate_register(reg);
  707. end;
  708. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  709. begin
  710. list.concat(tai_regalloc.alloc(r,nil));
  711. end;
  712. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  713. begin
  714. list.concat(tai_regalloc.dealloc(r,nil));
  715. end;
  716. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  717. var
  718. instr : tai;
  719. begin
  720. instr:=tai_regalloc.sync(r);
  721. list.concat(instr);
  722. add_reg_instruction(instr,r);
  723. end;
  724. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  725. begin
  726. list.concat(tai_label.create(l));
  727. end;
  728. {*****************************************************************************
  729. for better code generation these methods should be overridden
  730. ******************************************************************************}
  731. procedure tcg.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  732. var
  733. ref : treference;
  734. begin
  735. cgpara.check_simple_location;
  736. paramanager.alloccgpara(list,cgpara);
  737. case cgpara.location^.loc of
  738. LOC_REGISTER,LOC_CREGISTER:
  739. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  740. LOC_REFERENCE,LOC_CREFERENCE:
  741. begin
  742. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  743. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  744. end;
  745. LOC_MMREGISTER,LOC_CMMREGISTER:
  746. a_loadmm_intreg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register,mms_movescalar);
  747. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  748. begin
  749. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  750. a_load_reg_ref(list,size,size,r,ref);
  751. a_loadfpu_ref_cgpara(list,cgpara.location^.size,ref,cgpara);
  752. tg.Ungettemp(list,ref);
  753. end
  754. else
  755. internalerror(2002071004);
  756. end;
  757. end;
  758. procedure tcg.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  759. var
  760. ref : treference;
  761. begin
  762. cgpara.check_simple_location;
  763. paramanager.alloccgpara(list,cgpara);
  764. case cgpara.location^.loc of
  765. LOC_REGISTER,LOC_CREGISTER:
  766. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  767. LOC_REFERENCE,LOC_CREFERENCE:
  768. begin
  769. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  770. a_load_const_ref(list,cgpara.location^.size,a,ref);
  771. end
  772. else
  773. internalerror(2010053109);
  774. end;
  775. end;
  776. procedure tcg.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  777. var
  778. tmpref, ref: treference;
  779. tmpreg: tregister;
  780. location: pcgparalocation;
  781. orgsizeleft,
  782. sizeleft: aint;
  783. reghasvalue: boolean;
  784. begin
  785. location:=cgpara.location;
  786. tmpref:=r;
  787. sizeleft:=cgpara.intsize;
  788. while assigned(location) do
  789. begin
  790. paramanager.allocparaloc(list,location);
  791. case location^.loc of
  792. LOC_REGISTER,LOC_CREGISTER:
  793. begin
  794. { Parameter locations are often allocated in multiples of
  795. entire registers. If a parameter only occupies a part of
  796. such a register (e.g. a 16 bit int on a 32 bit
  797. architecture), the size of this parameter can only be
  798. determined by looking at the "size" parameter of this
  799. method -> if the size parameter is <= sizeof(aint), then
  800. we check that there is only one parameter location and
  801. then use this "size" to load the value into the parameter
  802. location }
  803. if (size<>OS_NO) and
  804. (tcgsize2size[size]<=sizeof(aint)) then
  805. begin
  806. cgpara.check_simple_location;
  807. a_load_ref_reg(list,size,location^.size,tmpref,location^.register);
  808. end
  809. { there's a lot more data left, and the current paraloc's
  810. register is entirely filled with part of that data }
  811. else if (sizeleft>sizeof(aint)) then
  812. begin
  813. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  814. end
  815. { we're at the end of the data, and it can be loaded into
  816. the current location's register with a single regular
  817. load }
  818. else if (sizeleft in [1,2{$ifndef cpu16bitalu},4{$endif}{$ifdef cpu64bitalu},8{$endif}]) then
  819. begin
  820. a_load_ref_reg(list,int_cgsize(sizeleft),location^.size,tmpref,location^.register);
  821. end
  822. { we're at the end of the data, and we need multiple loads
  823. to get it in the register because it's an irregular size }
  824. else
  825. begin
  826. { should be the last part }
  827. if assigned(location^.next) then
  828. internalerror(2010052907);
  829. { load the value piecewise to get it into the register }
  830. orgsizeleft:=sizeleft;
  831. reghasvalue:=false;
  832. {$ifdef cpu64bitalu}
  833. if sizeleft>=4 then
  834. begin
  835. a_load_ref_reg(list,OS_32,location^.size,tmpref,location^.register);
  836. dec(sizeleft,4);
  837. if target_info.endian=endian_big then
  838. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,location^.register);
  839. inc(tmpref.offset,4);
  840. reghasvalue:=true;
  841. end;
  842. {$endif cpu64bitalu}
  843. if sizeleft>=2 then
  844. begin
  845. tmpreg:=getintregister(list,location^.size);
  846. a_load_ref_reg(list,OS_16,location^.size,tmpref,tmpreg);
  847. dec(sizeleft,2);
  848. if reghasvalue then
  849. begin
  850. if target_info.endian=endian_big then
  851. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg)
  852. else
  853. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+2))*8,tmpreg);
  854. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register);
  855. end
  856. else
  857. begin
  858. if target_info.endian=endian_big then
  859. a_op_const_reg_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg,location^.register)
  860. else
  861. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  862. end;
  863. inc(tmpref.offset,2);
  864. reghasvalue:=true;
  865. end;
  866. if sizeleft=1 then
  867. begin
  868. tmpreg:=getintregister(list,location^.size);
  869. a_load_ref_reg(list,OS_8,location^.size,tmpref,tmpreg);
  870. dec(sizeleft,1);
  871. if reghasvalue then
  872. begin
  873. if target_info.endian=endian_little then
  874. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+1))*8,tmpreg);
  875. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register)
  876. end
  877. else
  878. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  879. inc(tmpref.offset);
  880. end;
  881. { the loop will already adjust the offset and sizeleft }
  882. dec(tmpref.offset,orgsizeleft);
  883. sizeleft:=orgsizeleft;
  884. end;
  885. end;
  886. LOC_REFERENCE,LOC_CREFERENCE:
  887. begin
  888. if assigned(location^.next) then
  889. internalerror(2010052906);
  890. reference_reset_base(ref,location^.reference.index,location^.reference.offset,newalignment(cgpara.alignment,cgpara.intsize-sizeleft));
  891. if (size <> OS_NO) and
  892. (tcgsize2size[size] <= sizeof(aint)) then
  893. a_load_ref_ref(list,size,location^.size,tmpref,ref)
  894. else
  895. { use concatcopy, because the parameter can be larger than }
  896. { what the OS_* constants can handle }
  897. g_concatcopy(list,tmpref,ref,sizeleft);
  898. end;
  899. LOC_MMREGISTER,LOC_CMMREGISTER:
  900. begin
  901. case location^.size of
  902. OS_F32,
  903. OS_F64,
  904. OS_F128:
  905. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,mms_movescalar);
  906. OS_M8..OS_M128,
  907. OS_MS8..OS_MS128:
  908. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,nil);
  909. else
  910. internalerror(2010053101);
  911. end;
  912. end
  913. else
  914. internalerror(2010053111);
  915. end;
  916. inc(tmpref.offset,tcgsize2size[location^.size]);
  917. dec(sizeleft,tcgsize2size[location^.size]);
  918. location:=location^.next;
  919. end;
  920. end;
  921. procedure tcg.a_load_loc_cgpara(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  922. begin
  923. case l.loc of
  924. LOC_REGISTER,
  925. LOC_CREGISTER :
  926. a_load_reg_cgpara(list,l.size,l.register,cgpara);
  927. LOC_CONSTANT :
  928. a_load_const_cgpara(list,l.size,l.value,cgpara);
  929. LOC_CREFERENCE,
  930. LOC_REFERENCE :
  931. a_load_ref_cgpara(list,l.size,l.reference,cgpara);
  932. else
  933. internalerror(2002032211);
  934. end;
  935. end;
  936. procedure tcg.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);
  937. var
  938. hr : tregister;
  939. begin
  940. cgpara.check_simple_location;
  941. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  942. begin
  943. paramanager.allocparaloc(list,cgpara.location);
  944. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  945. end
  946. else
  947. begin
  948. hr:=getaddressregister(list);
  949. a_loadaddr_ref_reg(list,r,hr);
  950. a_load_reg_cgpara(list,OS_ADDR,hr,cgpara);
  951. end;
  952. end;
  953. procedure tcg.a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : aint;align : longint);
  954. var
  955. href : treference;
  956. begin
  957. case paraloc.loc of
  958. LOC_REGISTER :
  959. begin
  960. {$IFDEF POWERPC64}
  961. if (paraloc.shiftval <> 0) then
  962. a_op_const_reg_reg(list, OP_SHL, OS_INT, paraloc.shiftval, paraloc.register, paraloc.register);
  963. {$ENDIF POWERPC64}
  964. a_load_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  965. end;
  966. LOC_MMREGISTER :
  967. begin
  968. case paraloc.size of
  969. OS_F32,
  970. OS_F64,
  971. OS_F128:
  972. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar);
  973. OS_M8..OS_M128,
  974. OS_MS8..OS_MS128:
  975. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,nil);
  976. else
  977. internalerror(2010053102);
  978. end;
  979. end;
  980. LOC_FPUREGISTER :
  981. cg.a_loadfpu_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  982. LOC_REFERENCE :
  983. begin
  984. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  985. { use concatcopy, because it can also be a float which fails when
  986. load_ref_ref is used. Don't copy data when the references are equal }
  987. if not((href.base=ref.base) and (href.offset=ref.offset)) then
  988. g_concatcopy(list,href,ref,sizeleft);
  989. end;
  990. else
  991. internalerror(2002081302);
  992. end;
  993. end;
  994. procedure tcg.a_load_cgparaloc_anyreg(list: TAsmList;regsize: tcgsize;const paraloc: TCGParaLocation;reg: tregister;align: longint);
  995. var
  996. href : treference;
  997. begin
  998. case paraloc.loc of
  999. LOC_REGISTER :
  1000. begin
  1001. case getregtype(reg) of
  1002. R_INTREGISTER:
  1003. a_load_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  1004. R_MMREGISTER:
  1005. a_loadmm_intreg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1006. else
  1007. internalerror(2009112422);
  1008. end;
  1009. end;
  1010. LOC_MMREGISTER :
  1011. begin
  1012. case getregtype(reg) of
  1013. R_INTREGISTER:
  1014. a_loadmm_reg_intreg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1015. R_MMREGISTER:
  1016. begin
  1017. case paraloc.size of
  1018. OS_F32,
  1019. OS_F64,
  1020. OS_F128:
  1021. a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1022. OS_M8..OS_M128,
  1023. OS_MS8..OS_MS128:
  1024. a_loadmm_reg_reg(list,paraloc.size,paraloc.size,paraloc.register,reg,nil);
  1025. else
  1026. internalerror(2010053102);
  1027. end;
  1028. end;
  1029. else
  1030. internalerror(2010053104);
  1031. end;
  1032. end;
  1033. LOC_FPUREGISTER :
  1034. a_loadfpu_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  1035. LOC_REFERENCE :
  1036. begin
  1037. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  1038. case getregtype(reg) of
  1039. R_INTREGISTER :
  1040. a_load_ref_reg(list,paraloc.size,regsize,href,reg);
  1041. R_FPUREGISTER :
  1042. a_loadfpu_ref_reg(list,paraloc.size,regsize,href,reg);
  1043. R_MMREGISTER :
  1044. { not paraloc.size, because it may be OS_64 instead of
  1045. OS_F64 in case the parameter is passed using integer
  1046. conventions (e.g., on ARM) }
  1047. a_loadmm_ref_reg(list,regsize,regsize,href,reg,mms_movescalar);
  1048. else
  1049. internalerror(2004101012);
  1050. end;
  1051. end;
  1052. else
  1053. internalerror(2002081302);
  1054. end;
  1055. end;
  1056. {****************************************************************************
  1057. some generic implementations
  1058. ****************************************************************************}
  1059. {$ifopt r+}
  1060. {$define rangeon}
  1061. {$r-}
  1062. {$endif}
  1063. {$ifopt q+}
  1064. {$define overflowon}
  1065. {$q-}
  1066. {$endif}
  1067. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  1068. var
  1069. bitmask: aword;
  1070. tmpreg: tregister;
  1071. stopbit: byte;
  1072. begin
  1073. tmpreg:=getintregister(list,sreg.subsetregsize);
  1074. if (subsetsize in [OS_S8..OS_S128]) then
  1075. begin
  1076. { sign extend in case the value has a bitsize mod 8 <> 0 }
  1077. { both instructions will be optimized away if not }
  1078. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  1079. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  1080. end
  1081. else
  1082. begin
  1083. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  1084. stopbit := sreg.startbit + sreg.bitlen;
  1085. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1086. // use aword to prevent overflow with 1 shl 31
  1087. if (stopbit - sreg.startbit <> AIntBits) then
  1088. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  1089. else
  1090. bitmask := high(aword);
  1091. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  1092. end;
  1093. tmpreg := makeregsize(list,tmpreg,subsetsize);
  1094. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  1095. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  1096. end;
  1097. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  1098. begin
  1099. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  1100. end;
  1101. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  1102. var
  1103. bitmask: aword;
  1104. tmpreg: tregister;
  1105. stopbit: byte;
  1106. begin
  1107. stopbit := sreg.startbit + sreg.bitlen;
  1108. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1109. if (stopbit <> AIntBits) then
  1110. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  1111. else
  1112. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  1113. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1114. begin
  1115. tmpreg:=getintregister(list,sreg.subsetregsize);
  1116. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  1117. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  1118. if (slopt <> SL_REGNOSRCMASK) then
  1119. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  1120. end;
  1121. if (slopt <> SL_SETMAX) then
  1122. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  1123. case slopt of
  1124. SL_SETZERO : ;
  1125. SL_SETMAX :
  1126. if (sreg.bitlen <> AIntBits) then
  1127. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  1128. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  1129. sreg.subsetreg)
  1130. else
  1131. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  1132. else
  1133. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  1134. end;
  1135. end;
  1136. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  1137. var
  1138. tmpreg: tregister;
  1139. bitmask: aword;
  1140. stopbit: byte;
  1141. begin
  1142. if (fromsreg.bitlen >= tosreg.bitlen) then
  1143. begin
  1144. tmpreg := getintregister(list,tosreg.subsetregsize);
  1145. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  1146. if (fromsreg.startbit <= tosreg.startbit) then
  1147. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  1148. else
  1149. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  1150. stopbit := tosreg.startbit + tosreg.bitlen;
  1151. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1152. if (stopbit <> AIntBits) then
  1153. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  1154. else
  1155. bitmask := (aword(1) shl tosreg.startbit) - 1;
  1156. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  1157. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  1158. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  1159. end
  1160. else
  1161. begin
  1162. tmpreg := getintregister(list,tosubsetsize);
  1163. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1164. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1165. end;
  1166. end;
  1167. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  1168. var
  1169. tmpreg: tregister;
  1170. begin
  1171. tmpreg := getintregister(list,tosize);
  1172. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  1173. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1174. end;
  1175. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  1176. var
  1177. tmpreg: tregister;
  1178. begin
  1179. tmpreg := getintregister(list,subsetsize);
  1180. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1181. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  1182. end;
  1183. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  1184. var
  1185. bitmask: aword;
  1186. stopbit: byte;
  1187. begin
  1188. stopbit := sreg.startbit + sreg.bitlen;
  1189. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1190. if (stopbit <> AIntBits) then
  1191. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  1192. else
  1193. bitmask := (aword(1) shl sreg.startbit) - 1;
  1194. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  1195. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  1196. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  1197. end;
  1198. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  1199. begin
  1200. case loc.loc of
  1201. LOC_REFERENCE,LOC_CREFERENCE:
  1202. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  1203. LOC_REGISTER,LOC_CREGISTER:
  1204. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  1205. LOC_CONSTANT:
  1206. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  1207. LOC_SUBSETREG,LOC_CSUBSETREG:
  1208. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  1209. LOC_SUBSETREF,LOC_CSUBSETREF:
  1210. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  1211. else
  1212. internalerror(200608053);
  1213. end;
  1214. end;
  1215. (*
  1216. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  1217. in memory. They are like a regular reference, but contain an extra bit
  1218. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  1219. and a bit length (always constant).
  1220. Bit packed values are stored differently in memory depending on whether we
  1221. are on a big or a little endian system (compatible with at least GPC). The
  1222. size of the basic working unit is always the smallest power-of-2 byte size
  1223. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  1224. bytes, 17..32 bits -> 4 bytes etc).
  1225. On a big endian, 5-bit: values are stored like this:
  1226. 11111222 22333334 44445555 56666677 77788888
  1227. The leftmost bit of each 5-bit value corresponds to the most significant
  1228. bit.
  1229. On little endian, it goes like this:
  1230. 22211111 43333322 55554444 77666665 88888777
  1231. In this case, per byte the left-most bit is more significant than those on
  1232. the right, but the bits in the next byte are all more significant than
  1233. those in the previous byte (e.g., the 222 in the first byte are the low
  1234. three bits of that value, while the 22 in the second byte are the upper
  1235. two bits.
  1236. Big endian, 9 bit values:
  1237. 11111111 12222222 22333333 33344444 ...
  1238. Little endian, 9 bit values:
  1239. 11111111 22222221 33333322 44444333 ...
  1240. This is memory representation and the 16 bit values are byteswapped.
  1241. Similarly as in the previous case, the 2222222 string contains the lower
  1242. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  1243. registers (two 16 bit registers in the current implementation, although a
  1244. single 32 bit register would be possible too, in particular if 32 bit
  1245. alignment can be guaranteed), this becomes:
  1246. 22222221 11111111 44444333 33333322 ...
  1247. (l)ow u l l u l u
  1248. The startbit/bitindex in a subsetreference always refers to
  1249. a) on big endian: the most significant bit of the value
  1250. (bits counted from left to right, both memory an registers)
  1251. b) on little endian: the least significant bit when the value
  1252. is loaded in a register (bit counted from right to left)
  1253. Although a) results in more complex code for big endian systems, it's
  1254. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  1255. Apple's universal interfaces which depend on these layout differences).
  1256. Note: when changing the loadsize calculated in get_subsetref_load_info,
  1257. make sure the appropriate alignment is guaranteed, at least in case of
  1258. {$defined cpurequiresproperalignment}.
  1259. *)
  1260. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  1261. var
  1262. intloadsize: aint;
  1263. begin
  1264. intloadsize := packedbitsloadsize(sref.bitlen);
  1265. if (intloadsize = 0) then
  1266. internalerror(2006081310);
  1267. if (intloadsize > sizeof(aint)) then
  1268. intloadsize := sizeof(aint);
  1269. loadsize := int_cgsize(intloadsize);
  1270. if (loadsize = OS_NO) then
  1271. internalerror(2006081311);
  1272. if (sref.bitlen > sizeof(aint)*8) then
  1273. internalerror(2006081312);
  1274. extra_load :=
  1275. (sref.bitlen <> 1) and
  1276. ((sref.bitindexreg <> NR_NO) or
  1277. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1278. end;
  1279. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1280. var
  1281. restbits: byte;
  1282. begin
  1283. if (target_info.endian = endian_big) then
  1284. begin
  1285. { valuereg contains the upper bits, extra_value_reg the lower }
  1286. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1287. if (subsetsize in [OS_S8..OS_S128]) then
  1288. begin
  1289. { sign extend }
  1290. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1291. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1292. end
  1293. else
  1294. begin
  1295. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1296. { mask other bits }
  1297. if (sref.bitlen <> AIntBits) then
  1298. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1299. end;
  1300. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1301. end
  1302. else
  1303. begin
  1304. { valuereg contains the lower bits, extra_value_reg the upper }
  1305. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1306. if (subsetsize in [OS_S8..OS_S128]) then
  1307. begin
  1308. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1309. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1310. end
  1311. else
  1312. begin
  1313. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1314. { mask other bits }
  1315. if (sref.bitlen <> AIntBits) then
  1316. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1317. end;
  1318. end;
  1319. { merge }
  1320. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1321. end;
  1322. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister);
  1323. var
  1324. hl: tasmlabel;
  1325. tmpref: treference;
  1326. extra_value_reg,
  1327. tmpreg: tregister;
  1328. begin
  1329. tmpreg := getintregister(list,OS_INT);
  1330. tmpref := sref.ref;
  1331. inc(tmpref.offset,loadbitsize div 8);
  1332. extra_value_reg := getintregister(list,OS_INT);
  1333. if (target_info.endian = endian_big) then
  1334. begin
  1335. { since this is a dynamic index, it's possible that the value }
  1336. { is entirely in valuereg. }
  1337. { get the data in valuereg in the right place }
  1338. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1339. if (subsetsize in [OS_S8..OS_S128]) then
  1340. begin
  1341. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1342. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1343. end
  1344. else
  1345. begin
  1346. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1347. if (loadbitsize <> AIntBits) then
  1348. { mask left over bits }
  1349. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1350. end;
  1351. tmpreg := getintregister(list,OS_INT);
  1352. { ensure we don't load anything past the end of the array }
  1353. current_asmdata.getjumplabel(hl);
  1354. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1355. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1356. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1357. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1358. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1359. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1360. { load next "loadbitsize" bits of the array }
  1361. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1362. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1363. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1364. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1365. { => extra_value_reg is now 0 }
  1366. { merge }
  1367. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1368. { no need to mask, necessary masking happened earlier on }
  1369. a_label(list,hl);
  1370. end
  1371. else
  1372. begin
  1373. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1374. { ensure we don't load anything past the end of the array }
  1375. current_asmdata.getjumplabel(hl);
  1376. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1377. { Y-x = -(Y-x) }
  1378. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1379. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1380. { load next "loadbitsize" bits of the array }
  1381. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1382. { tmpreg is in the range 1..<cpu_bitsize>-1 -> always ok }
  1383. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1384. { merge }
  1385. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1386. a_label(list,hl);
  1387. { sign extend or mask other bits }
  1388. if (subsetsize in [OS_S8..OS_S128]) then
  1389. begin
  1390. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1391. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1392. end
  1393. else
  1394. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1395. end;
  1396. end;
  1397. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1398. var
  1399. tmpref: treference;
  1400. valuereg,extra_value_reg: tregister;
  1401. tosreg: tsubsetregister;
  1402. loadsize: tcgsize;
  1403. loadbitsize: byte;
  1404. extra_load: boolean;
  1405. begin
  1406. get_subsetref_load_info(sref,loadsize,extra_load);
  1407. loadbitsize := tcgsize2size[loadsize]*8;
  1408. { load the (first part) of the bit sequence }
  1409. valuereg := getintregister(list,OS_INT);
  1410. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1411. if not extra_load then
  1412. begin
  1413. { everything is guaranteed to be in a single register of loadsize }
  1414. if (sref.bitindexreg = NR_NO) then
  1415. begin
  1416. { use subsetreg routine, it may have been overridden with an optimized version }
  1417. tosreg.subsetreg := valuereg;
  1418. tosreg.subsetregsize := OS_INT;
  1419. { subsetregs always count bits from right to left }
  1420. if (target_info.endian = endian_big) then
  1421. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1422. else
  1423. tosreg.startbit := sref.startbit;
  1424. tosreg.bitlen := sref.bitlen;
  1425. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1426. exit;
  1427. end
  1428. else
  1429. begin
  1430. if (sref.startbit <> 0) then
  1431. internalerror(2006081510);
  1432. if (target_info.endian = endian_big) then
  1433. begin
  1434. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1435. if (subsetsize in [OS_S8..OS_S128]) then
  1436. begin
  1437. { sign extend to entire register }
  1438. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1439. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1440. end
  1441. else
  1442. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1443. end
  1444. else
  1445. begin
  1446. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1447. if (subsetsize in [OS_S8..OS_S128]) then
  1448. begin
  1449. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1450. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1451. end
  1452. end;
  1453. { mask other bits/sign extend }
  1454. if not(subsetsize in [OS_S8..OS_S128]) then
  1455. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1456. end
  1457. end
  1458. else
  1459. begin
  1460. { load next value as well }
  1461. extra_value_reg := getintregister(list,OS_INT);
  1462. if (sref.bitindexreg = NR_NO) then
  1463. begin
  1464. tmpref := sref.ref;
  1465. inc(tmpref.offset,loadbitsize div 8);
  1466. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1467. { can be overridden to optimize }
  1468. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1469. end
  1470. else
  1471. begin
  1472. if (sref.startbit <> 0) then
  1473. internalerror(2006080610);
  1474. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg);
  1475. end;
  1476. end;
  1477. { store in destination }
  1478. { avoid unnecessary sign extension and zeroing }
  1479. valuereg := makeregsize(list,valuereg,OS_INT);
  1480. destreg := makeregsize(list,destreg,OS_INT);
  1481. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1482. destreg := makeregsize(list,destreg,tosize);
  1483. end;
  1484. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1485. begin
  1486. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1487. end;
  1488. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1489. var
  1490. hl: tasmlabel;
  1491. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1492. tosreg, fromsreg: tsubsetregister;
  1493. tmpref: treference;
  1494. bitmask: aword;
  1495. loadsize: tcgsize;
  1496. loadbitsize: byte;
  1497. extra_load: boolean;
  1498. begin
  1499. { the register must be able to contain the requested value }
  1500. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1501. internalerror(2006081613);
  1502. get_subsetref_load_info(sref,loadsize,extra_load);
  1503. loadbitsize := tcgsize2size[loadsize]*8;
  1504. { load the (first part) of the bit sequence }
  1505. valuereg := getintregister(list,OS_INT);
  1506. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1507. { constant offset of bit sequence? }
  1508. if not extra_load then
  1509. begin
  1510. if (sref.bitindexreg = NR_NO) then
  1511. begin
  1512. { use subsetreg routine, it may have been overridden with an optimized version }
  1513. tosreg.subsetreg := valuereg;
  1514. tosreg.subsetregsize := OS_INT;
  1515. { subsetregs always count bits from right to left }
  1516. if (target_info.endian = endian_big) then
  1517. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1518. else
  1519. tosreg.startbit := sref.startbit;
  1520. tosreg.bitlen := sref.bitlen;
  1521. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1522. end
  1523. else
  1524. begin
  1525. if (sref.startbit <> 0) then
  1526. internalerror(2006081710);
  1527. { should be handled by normal code and will give wrong result }
  1528. { on x86 for the '1 shl bitlen' below }
  1529. if (sref.bitlen = AIntBits) then
  1530. internalerror(2006081711);
  1531. { zero the bits we have to insert }
  1532. if (slopt <> SL_SETMAX) then
  1533. begin
  1534. maskreg := getintregister(list,OS_INT);
  1535. if (target_info.endian = endian_big) then
  1536. begin
  1537. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1538. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1539. end
  1540. else
  1541. begin
  1542. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1543. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1544. end;
  1545. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1546. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1547. end;
  1548. { insert the value }
  1549. if (slopt <> SL_SETZERO) then
  1550. begin
  1551. tmpreg := getintregister(list,OS_INT);
  1552. if (slopt <> SL_SETMAX) then
  1553. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1554. else if (sref.bitlen <> AIntBits) then
  1555. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1556. else
  1557. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1558. if (target_info.endian = endian_big) then
  1559. begin
  1560. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1561. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1562. begin
  1563. if (loadbitsize <> AIntBits) then
  1564. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1565. else
  1566. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1567. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1568. end;
  1569. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1570. end
  1571. else
  1572. begin
  1573. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1574. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1575. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1576. end;
  1577. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1578. end;
  1579. end;
  1580. { store back to memory }
  1581. valuereg := makeregsize(list,valuereg,loadsize);
  1582. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1583. exit;
  1584. end
  1585. else
  1586. begin
  1587. { load next value }
  1588. extra_value_reg := getintregister(list,OS_INT);
  1589. tmpref := sref.ref;
  1590. inc(tmpref.offset,loadbitsize div 8);
  1591. { should maybe be taken out too, can be done more efficiently }
  1592. { on e.g. i386 with shld/shrd }
  1593. if (sref.bitindexreg = NR_NO) then
  1594. begin
  1595. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1596. fromsreg.subsetreg := fromreg;
  1597. fromsreg.subsetregsize := fromsize;
  1598. tosreg.subsetreg := valuereg;
  1599. tosreg.subsetregsize := OS_INT;
  1600. { transfer first part }
  1601. fromsreg.bitlen := loadbitsize-sref.startbit;
  1602. tosreg.bitlen := fromsreg.bitlen;
  1603. if (target_info.endian = endian_big) then
  1604. begin
  1605. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1606. { upper bits of the value ... }
  1607. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1608. { ... to bit 0 }
  1609. tosreg.startbit := 0
  1610. end
  1611. else
  1612. begin
  1613. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1614. { lower bits of the value ... }
  1615. fromsreg.startbit := 0;
  1616. { ... to startbit }
  1617. tosreg.startbit := sref.startbit;
  1618. end;
  1619. case slopt of
  1620. SL_SETZERO,
  1621. SL_SETMAX:
  1622. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1623. else
  1624. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1625. end;
  1626. valuereg := makeregsize(list,valuereg,loadsize);
  1627. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1628. { transfer second part }
  1629. if (target_info.endian = endian_big) then
  1630. begin
  1631. { extra_value_reg must contain the lower bits of the value at bits }
  1632. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1633. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1634. { - bitlen - startbit }
  1635. fromsreg.startbit := 0;
  1636. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1637. end
  1638. else
  1639. begin
  1640. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1641. fromsreg.startbit := fromsreg.bitlen;
  1642. tosreg.startbit := 0;
  1643. end;
  1644. tosreg.subsetreg := extra_value_reg;
  1645. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1646. tosreg.bitlen := fromsreg.bitlen;
  1647. case slopt of
  1648. SL_SETZERO,
  1649. SL_SETMAX:
  1650. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1651. else
  1652. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1653. end;
  1654. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1655. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1656. exit;
  1657. end
  1658. else
  1659. begin
  1660. if (sref.startbit <> 0) then
  1661. internalerror(2006081812);
  1662. { should be handled by normal code and will give wrong result }
  1663. { on x86 for the '1 shl bitlen' below }
  1664. if (sref.bitlen = AIntBits) then
  1665. internalerror(2006081713);
  1666. { generate mask to zero the bits we have to insert }
  1667. if (slopt <> SL_SETMAX) then
  1668. begin
  1669. maskreg := getintregister(list,OS_INT);
  1670. if (target_info.endian = endian_big) then
  1671. begin
  1672. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1673. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1674. end
  1675. else
  1676. begin
  1677. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1678. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1679. end;
  1680. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1681. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1682. end;
  1683. { insert the value }
  1684. if (slopt <> SL_SETZERO) then
  1685. begin
  1686. tmpreg := getintregister(list,OS_INT);
  1687. if (slopt <> SL_SETMAX) then
  1688. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1689. else if (sref.bitlen <> AIntBits) then
  1690. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1691. else
  1692. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1693. if (target_info.endian = endian_big) then
  1694. begin
  1695. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1696. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1697. { mask left over bits }
  1698. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1699. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1700. end
  1701. else
  1702. begin
  1703. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1704. { mask left over bits }
  1705. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1706. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1707. end;
  1708. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1709. end;
  1710. valuereg := makeregsize(list,valuereg,loadsize);
  1711. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1712. { make sure we do not read/write past the end of the array }
  1713. current_asmdata.getjumplabel(hl);
  1714. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1715. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1716. tmpindexreg := getintregister(list,OS_INT);
  1717. { load current array value }
  1718. if (slopt <> SL_SETZERO) then
  1719. begin
  1720. tmpreg := getintregister(list,OS_INT);
  1721. if (slopt <> SL_SETMAX) then
  1722. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1723. else if (sref.bitlen <> AIntBits) then
  1724. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1725. else
  1726. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1727. end;
  1728. { generate mask to zero the bits we have to insert }
  1729. if (slopt <> SL_SETMAX) then
  1730. begin
  1731. maskreg := getintregister(list,OS_INT);
  1732. if (target_info.endian = endian_big) then
  1733. begin
  1734. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1735. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1736. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1737. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1738. end
  1739. else
  1740. begin
  1741. { Y-x = -(x-Y) }
  1742. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1743. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1744. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1745. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1746. end;
  1747. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1748. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1749. end;
  1750. if (slopt <> SL_SETZERO) then
  1751. begin
  1752. if (target_info.endian = endian_big) then
  1753. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1754. else
  1755. begin
  1756. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1757. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1758. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1759. end;
  1760. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1761. end;
  1762. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1763. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1764. a_label(list,hl);
  1765. end;
  1766. end;
  1767. end;
  1768. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1769. var
  1770. tmpreg: tregister;
  1771. begin
  1772. tmpreg := getintregister(list,tosubsetsize);
  1773. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1774. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1775. end;
  1776. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1777. var
  1778. tmpreg: tregister;
  1779. begin
  1780. tmpreg := getintregister(list,tosize);
  1781. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1782. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1783. end;
  1784. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1785. var
  1786. tmpreg: tregister;
  1787. begin
  1788. tmpreg := getintregister(list,subsetsize);
  1789. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1790. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1791. end;
  1792. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1793. var
  1794. tmpreg: tregister;
  1795. slopt: tsubsetloadopt;
  1796. begin
  1797. { perform masking of the source value in advance }
  1798. slopt := SL_REGNOSRCMASK;
  1799. if (sref.bitlen <> AIntBits) then
  1800. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1801. if (
  1802. { broken x86 "x shl regbitsize = x" }
  1803. ((sref.bitlen <> AIntBits) and
  1804. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1805. ((sref.bitlen = AIntBits) and
  1806. (a = -1))
  1807. ) then
  1808. slopt := SL_SETMAX
  1809. else if (a = 0) then
  1810. slopt := SL_SETZERO;
  1811. tmpreg := getintregister(list,subsetsize);
  1812. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1813. a_load_const_reg(list,subsetsize,a,tmpreg);
  1814. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1815. end;
  1816. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1817. begin
  1818. case loc.loc of
  1819. LOC_REFERENCE,LOC_CREFERENCE:
  1820. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1821. LOC_REGISTER,LOC_CREGISTER:
  1822. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1823. LOC_SUBSETREG,LOC_CSUBSETREG:
  1824. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1825. LOC_SUBSETREF,LOC_CSUBSETREF:
  1826. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1827. else
  1828. internalerror(200608054);
  1829. end;
  1830. end;
  1831. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1832. var
  1833. tmpreg: tregister;
  1834. begin
  1835. tmpreg := getintregister(list,tosubsetsize);
  1836. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1837. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1838. end;
  1839. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1840. var
  1841. tmpreg: tregister;
  1842. begin
  1843. tmpreg := getintregister(list,tosubsetsize);
  1844. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1845. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1846. end;
  1847. {$ifdef rangeon}
  1848. {$r+}
  1849. {$undef rangeon}
  1850. {$endif}
  1851. {$ifdef overflowon}
  1852. {$q+}
  1853. {$undef overflowon}
  1854. {$endif}
  1855. { generic bit address calculation routines }
  1856. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1857. begin
  1858. result.ref:=ref;
  1859. inc(result.ref.offset,bitnumber div 8);
  1860. result.bitindexreg:=NR_NO;
  1861. result.startbit:=bitnumber mod 8;
  1862. result.bitlen:=1;
  1863. end;
  1864. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1865. begin
  1866. result.subsetreg:=setreg;
  1867. result.subsetregsize:=setregsize;
  1868. { subsetregs always count from the least significant to the most significant bit }
  1869. if (target_info.endian=endian_big) then
  1870. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1871. else
  1872. result.startbit:=bitnumber;
  1873. result.bitlen:=1;
  1874. end;
  1875. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1876. var
  1877. tmpreg,
  1878. tmpaddrreg: tregister;
  1879. begin
  1880. result.ref:=ref;
  1881. result.startbit:=0;
  1882. result.bitlen:=1;
  1883. tmpreg:=getintregister(list,bitnumbersize);
  1884. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1885. tmpaddrreg:=getaddressregister(list);
  1886. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1887. if (result.ref.base=NR_NO) then
  1888. result.ref.base:=tmpaddrreg
  1889. else if (result.ref.index=NR_NO) then
  1890. result.ref.index:=tmpaddrreg
  1891. else
  1892. begin
  1893. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1894. result.ref.index:=tmpaddrreg;
  1895. end;
  1896. tmpreg:=getintregister(list,OS_INT);
  1897. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1898. result.bitindexreg:=tmpreg;
  1899. end;
  1900. { bit testing routines }
  1901. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1902. var
  1903. tmpvalue: tregister;
  1904. begin
  1905. tmpvalue:=getintregister(list,valuesize);
  1906. if (target_info.endian=endian_little) then
  1907. begin
  1908. { rotate value register "bitnumber" bits to the right }
  1909. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1910. { extract the bit we want }
  1911. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1912. end
  1913. else
  1914. begin
  1915. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1916. { bit in uppermost position, then move it to the lowest position }
  1917. { "and" is not necessary since combination of shl/shr will clear }
  1918. { all other bits }
  1919. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1920. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1921. end;
  1922. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1923. end;
  1924. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1925. begin
  1926. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1927. end;
  1928. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1929. begin
  1930. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1931. end;
  1932. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1933. var
  1934. tmpsreg: tsubsetregister;
  1935. begin
  1936. { the first parameter is used to calculate the bit offset in }
  1937. { case of big endian, and therefore must be the size of the }
  1938. { set and not of the whole subsetreg }
  1939. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1940. { now fix the size of the subsetreg }
  1941. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1942. { correct offset of the set in the subsetreg }
  1943. inc(tmpsreg.startbit,setreg.startbit);
  1944. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1945. end;
  1946. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1947. begin
  1948. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1949. end;
  1950. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1951. var
  1952. tmpreg: tregister;
  1953. begin
  1954. case loc.loc of
  1955. LOC_REFERENCE,LOC_CREFERENCE:
  1956. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1957. LOC_REGISTER,LOC_CREGISTER,
  1958. LOC_SUBSETREG,LOC_CSUBSETREG,
  1959. LOC_CONSTANT:
  1960. begin
  1961. case loc.loc of
  1962. LOC_REGISTER,LOC_CREGISTER:
  1963. tmpreg:=loc.register;
  1964. LOC_SUBSETREG,LOC_CSUBSETREG:
  1965. begin
  1966. tmpreg:=getintregister(list,loc.size);
  1967. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1968. end;
  1969. LOC_CONSTANT:
  1970. begin
  1971. tmpreg:=getintregister(list,loc.size);
  1972. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1973. end;
  1974. end;
  1975. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1976. end;
  1977. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1978. else
  1979. internalerror(2007051701);
  1980. end;
  1981. end;
  1982. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1983. begin
  1984. case loc.loc of
  1985. LOC_REFERENCE,LOC_CREFERENCE:
  1986. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1987. LOC_REGISTER,LOC_CREGISTER:
  1988. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1989. LOC_SUBSETREG,LOC_CSUBSETREG:
  1990. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1991. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1992. else
  1993. internalerror(2007051702);
  1994. end;
  1995. end;
  1996. { bit setting/clearing routines }
  1997. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1998. var
  1999. tmpvalue: tregister;
  2000. begin
  2001. tmpvalue:=getintregister(list,destsize);
  2002. if (target_info.endian=endian_little) then
  2003. begin
  2004. a_load_const_reg(list,destsize,1,tmpvalue);
  2005. { rotate bit "bitnumber" bits to the left }
  2006. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  2007. end
  2008. else
  2009. begin
  2010. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  2011. { shr bitnumber" results in correct mask }
  2012. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  2013. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  2014. end;
  2015. { set/clear the bit we want }
  2016. if (doset) then
  2017. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  2018. else
  2019. begin
  2020. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  2021. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  2022. end;
  2023. end;
  2024. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  2025. begin
  2026. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  2027. end;
  2028. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  2029. begin
  2030. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  2031. end;
  2032. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  2033. var
  2034. tmpsreg: tsubsetregister;
  2035. begin
  2036. { the first parameter is used to calculate the bit offset in }
  2037. { case of big endian, and therefore must be the size of the }
  2038. { set and not of the whole subsetreg }
  2039. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  2040. { now fix the size of the subsetreg }
  2041. tmpsreg.subsetregsize:=destreg.subsetregsize;
  2042. { correct offset of the set in the subsetreg }
  2043. inc(tmpsreg.startbit,destreg.startbit);
  2044. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  2045. end;
  2046. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  2047. begin
  2048. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  2049. end;
  2050. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  2051. var
  2052. tmpreg: tregister;
  2053. begin
  2054. case loc.loc of
  2055. LOC_REFERENCE:
  2056. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  2057. LOC_CREGISTER:
  2058. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  2059. { e.g. a 2-byte set in a record regvar }
  2060. LOC_CSUBSETREG:
  2061. begin
  2062. { hard to do in-place in a generic way, so operate on a copy }
  2063. tmpreg:=getintregister(list,loc.size);
  2064. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2065. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  2066. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2067. end;
  2068. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  2069. else
  2070. internalerror(2007051703)
  2071. end;
  2072. end;
  2073. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  2074. begin
  2075. case loc.loc of
  2076. LOC_REFERENCE:
  2077. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  2078. LOC_CREGISTER:
  2079. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  2080. LOC_CSUBSETREG:
  2081. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  2082. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  2083. else
  2084. internalerror(2007051704)
  2085. end;
  2086. end;
  2087. { memory/register loading }
  2088. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  2089. var
  2090. tmpref : treference;
  2091. tmpreg : tregister;
  2092. i : longint;
  2093. begin
  2094. if ref.alignment<tcgsize2size[fromsize] then
  2095. begin
  2096. tmpref:=ref;
  2097. { we take care of the alignment now }
  2098. tmpref.alignment:=0;
  2099. case FromSize of
  2100. OS_16,OS_S16:
  2101. begin
  2102. tmpreg:=getintregister(list,OS_16);
  2103. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  2104. if target_info.endian=endian_big then
  2105. inc(tmpref.offset);
  2106. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2107. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2108. tmpreg:=makeregsize(list,tmpreg,OS_16);
  2109. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  2110. if target_info.endian=endian_big then
  2111. dec(tmpref.offset)
  2112. else
  2113. inc(tmpref.offset);
  2114. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2115. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2116. end;
  2117. OS_32,OS_S32:
  2118. begin
  2119. { could add an optimised case for ref.alignment=2 }
  2120. tmpreg:=getintregister(list,OS_32);
  2121. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  2122. if target_info.endian=endian_big then
  2123. inc(tmpref.offset,3);
  2124. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2125. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2126. tmpreg:=makeregsize(list,tmpreg,OS_32);
  2127. for i:=1 to 3 do
  2128. begin
  2129. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  2130. if target_info.endian=endian_big then
  2131. dec(tmpref.offset)
  2132. else
  2133. inc(tmpref.offset);
  2134. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2135. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2136. tmpreg:=makeregsize(list,tmpreg,OS_32);
  2137. end;
  2138. end
  2139. else
  2140. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  2141. end;
  2142. end
  2143. else
  2144. a_load_reg_ref(list,fromsize,tosize,register,ref);
  2145. end;
  2146. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  2147. var
  2148. tmpref : treference;
  2149. tmpreg,
  2150. tmpreg2 : tregister;
  2151. i : longint;
  2152. begin
  2153. if ref.alignment in [1,2] then
  2154. begin
  2155. tmpref:=ref;
  2156. { we take care of the alignment now }
  2157. tmpref.alignment:=0;
  2158. case FromSize of
  2159. OS_16,OS_S16:
  2160. if ref.alignment=2 then
  2161. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  2162. else
  2163. begin
  2164. { first load in tmpreg, because the target register }
  2165. { may be used in ref as well }
  2166. if target_info.endian=endian_little then
  2167. inc(tmpref.offset);
  2168. tmpreg:=getintregister(list,OS_8);
  2169. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  2170. tmpreg:=makeregsize(list,tmpreg,OS_16);
  2171. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  2172. if target_info.endian=endian_little then
  2173. dec(tmpref.offset)
  2174. else
  2175. inc(tmpref.offset);
  2176. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  2177. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  2178. end;
  2179. OS_32,OS_S32:
  2180. if ref.alignment=2 then
  2181. begin
  2182. if target_info.endian=endian_little then
  2183. inc(tmpref.offset,2);
  2184. tmpreg:=getintregister(list,OS_32);
  2185. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  2186. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  2187. if target_info.endian=endian_little then
  2188. dec(tmpref.offset,2)
  2189. else
  2190. inc(tmpref.offset,2);
  2191. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  2192. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  2193. end
  2194. else
  2195. begin
  2196. if target_info.endian=endian_little then
  2197. inc(tmpref.offset,3);
  2198. tmpreg:=getintregister(list,OS_32);
  2199. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  2200. tmpreg2:=getintregister(list,OS_32);
  2201. for i:=1 to 3 do
  2202. begin
  2203. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  2204. if target_info.endian=endian_little then
  2205. dec(tmpref.offset)
  2206. else
  2207. inc(tmpref.offset);
  2208. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  2209. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  2210. end;
  2211. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  2212. end
  2213. else
  2214. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  2215. end;
  2216. end
  2217. else
  2218. a_load_ref_reg(list,fromsize,tosize,ref,register);
  2219. end;
  2220. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  2221. var
  2222. tmpreg: tregister;
  2223. begin
  2224. { verify if we have the same reference }
  2225. if references_equal(sref,dref) then
  2226. exit;
  2227. tmpreg:=getintregister(list,tosize);
  2228. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  2229. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  2230. end;
  2231. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  2232. var
  2233. tmpreg: tregister;
  2234. begin
  2235. tmpreg:=getintregister(list,size);
  2236. a_load_const_reg(list,size,a,tmpreg);
  2237. a_load_reg_ref(list,size,size,tmpreg,ref);
  2238. end;
  2239. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  2240. begin
  2241. case loc.loc of
  2242. LOC_REFERENCE,LOC_CREFERENCE:
  2243. a_load_const_ref(list,loc.size,a,loc.reference);
  2244. LOC_REGISTER,LOC_CREGISTER:
  2245. a_load_const_reg(list,loc.size,a,loc.register);
  2246. LOC_SUBSETREG,LOC_CSUBSETREG:
  2247. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  2248. LOC_SUBSETREF,LOC_CSUBSETREF:
  2249. a_load_const_subsetref(list,loc.size,a,loc.sref);
  2250. else
  2251. internalerror(200203272);
  2252. end;
  2253. end;
  2254. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  2255. begin
  2256. case loc.loc of
  2257. LOC_REFERENCE,LOC_CREFERENCE:
  2258. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2259. LOC_REGISTER,LOC_CREGISTER:
  2260. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2261. LOC_SUBSETREG,LOC_CSUBSETREG:
  2262. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  2263. LOC_SUBSETREF,LOC_CSUBSETREF:
  2264. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  2265. LOC_MMREGISTER,LOC_CMMREGISTER:
  2266. a_loadmm_intreg_reg(list,fromsize,loc.size,reg,loc.register,mms_movescalar);
  2267. else
  2268. internalerror(200203271);
  2269. end;
  2270. end;
  2271. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2272. begin
  2273. case loc.loc of
  2274. LOC_REFERENCE,LOC_CREFERENCE:
  2275. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2276. LOC_REGISTER,LOC_CREGISTER:
  2277. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2278. LOC_CONSTANT:
  2279. a_load_const_reg(list,tosize,loc.value,reg);
  2280. LOC_SUBSETREG,LOC_CSUBSETREG:
  2281. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2282. LOC_SUBSETREF,LOC_CSUBSETREF:
  2283. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2284. else
  2285. internalerror(200109092);
  2286. end;
  2287. end;
  2288. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2289. begin
  2290. case loc.loc of
  2291. LOC_REFERENCE,LOC_CREFERENCE:
  2292. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2293. LOC_REGISTER,LOC_CREGISTER:
  2294. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2295. LOC_CONSTANT:
  2296. a_load_const_ref(list,tosize,loc.value,ref);
  2297. LOC_SUBSETREG,LOC_CSUBSETREG:
  2298. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2299. LOC_SUBSETREF,LOC_CSUBSETREF:
  2300. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2301. else
  2302. internalerror(200109302);
  2303. end;
  2304. end;
  2305. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2306. begin
  2307. case loc.loc of
  2308. LOC_REFERENCE,LOC_CREFERENCE:
  2309. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2310. LOC_REGISTER,LOC_CREGISTER:
  2311. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2312. LOC_CONSTANT:
  2313. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2314. LOC_SUBSETREG,LOC_CSUBSETREG:
  2315. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2316. LOC_SUBSETREF,LOC_CSUBSETREF:
  2317. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2318. else
  2319. internalerror(2006052310);
  2320. end;
  2321. end;
  2322. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2323. begin
  2324. case loc.loc of
  2325. LOC_REFERENCE,LOC_CREFERENCE:
  2326. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2327. LOC_REGISTER,LOC_CREGISTER:
  2328. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2329. LOC_SUBSETREG,LOC_CSUBSETREG:
  2330. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2331. LOC_SUBSETREF,LOC_CSUBSETREF:
  2332. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2333. else
  2334. internalerror(2006051510);
  2335. end;
  2336. end;
  2337. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2338. var
  2339. powerval : longint;
  2340. begin
  2341. case op of
  2342. OP_OR :
  2343. begin
  2344. { or with zero returns same result }
  2345. if a = 0 then
  2346. op:=OP_NONE
  2347. else
  2348. { or with max returns max }
  2349. if a = -1 then
  2350. op:=OP_MOVE;
  2351. end;
  2352. OP_AND :
  2353. begin
  2354. { and with max returns same result }
  2355. if (a = -1) then
  2356. op:=OP_NONE
  2357. else
  2358. { and with 0 returns 0 }
  2359. if a=0 then
  2360. op:=OP_MOVE;
  2361. end;
  2362. OP_DIV :
  2363. begin
  2364. { division by 1 returns result }
  2365. if a = 1 then
  2366. op:=OP_NONE
  2367. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2368. begin
  2369. a := powerval;
  2370. op:= OP_SHR;
  2371. end;
  2372. end;
  2373. OP_IDIV:
  2374. begin
  2375. if a = 1 then
  2376. op:=OP_NONE;
  2377. end;
  2378. OP_MUL,OP_IMUL:
  2379. begin
  2380. if a = 1 then
  2381. op:=OP_NONE
  2382. else
  2383. if a=0 then
  2384. op:=OP_MOVE
  2385. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2386. begin
  2387. a := powerval;
  2388. op:= OP_SHL;
  2389. end;
  2390. end;
  2391. OP_ADD,OP_SUB:
  2392. begin
  2393. if a = 0 then
  2394. op:=OP_NONE;
  2395. end;
  2396. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  2397. begin
  2398. if a = 0 then
  2399. op:=OP_NONE;
  2400. end;
  2401. end;
  2402. end;
  2403. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2404. begin
  2405. case loc.loc of
  2406. LOC_REFERENCE, LOC_CREFERENCE:
  2407. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2408. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2409. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2410. else
  2411. internalerror(200203301);
  2412. end;
  2413. end;
  2414. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2415. begin
  2416. case loc.loc of
  2417. LOC_REFERENCE, LOC_CREFERENCE:
  2418. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2419. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2420. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2421. else
  2422. internalerror(48991);
  2423. end;
  2424. end;
  2425. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2426. var
  2427. reg: tregister;
  2428. regsize: tcgsize;
  2429. begin
  2430. if (fromsize>=tosize) then
  2431. regsize:=fromsize
  2432. else
  2433. regsize:=tosize;
  2434. reg:=getfpuregister(list,regsize);
  2435. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2436. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2437. end;
  2438. procedure tcg.a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2439. var
  2440. ref : treference;
  2441. begin
  2442. paramanager.alloccgpara(list,cgpara);
  2443. case cgpara.location^.loc of
  2444. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2445. begin
  2446. cgpara.check_simple_location;
  2447. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2448. end;
  2449. LOC_REFERENCE,LOC_CREFERENCE:
  2450. begin
  2451. cgpara.check_simple_location;
  2452. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2453. a_loadfpu_reg_ref(list,size,size,r,ref);
  2454. end;
  2455. LOC_REGISTER,LOC_CREGISTER:
  2456. begin
  2457. { paramfpu_ref does the check_simpe_location check here if necessary }
  2458. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  2459. a_loadfpu_reg_ref(list,size,size,r,ref);
  2460. a_loadfpu_ref_cgpara(list,size,ref,cgpara);
  2461. tg.Ungettemp(list,ref);
  2462. end;
  2463. else
  2464. internalerror(2010053112);
  2465. end;
  2466. end;
  2467. procedure tcg.a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2468. var
  2469. href : treference;
  2470. hsize: tcgsize;
  2471. begin
  2472. case cgpara.location^.loc of
  2473. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2474. begin
  2475. cgpara.check_simple_location;
  2476. paramanager.alloccgpara(list,cgpara);
  2477. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2478. end;
  2479. LOC_REFERENCE,LOC_CREFERENCE:
  2480. begin
  2481. cgpara.check_simple_location;
  2482. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2483. { concatcopy should choose the best way to copy the data }
  2484. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2485. end;
  2486. LOC_REGISTER,LOC_CREGISTER:
  2487. begin
  2488. { force integer size }
  2489. hsize:=int_cgsize(tcgsize2size[size]);
  2490. {$ifndef cpu64bitalu}
  2491. if (hsize in [OS_S64,OS_64]) then
  2492. cg64.a_load64_ref_cgpara(list,ref,cgpara)
  2493. else
  2494. {$endif not cpu64bitalu}
  2495. begin
  2496. cgpara.check_simple_location;
  2497. a_load_ref_cgpara(list,hsize,ref,cgpara)
  2498. end;
  2499. end
  2500. else
  2501. internalerror(200402201);
  2502. end;
  2503. end;
  2504. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2505. var
  2506. tmpreg : tregister;
  2507. begin
  2508. tmpreg:=getintregister(list,size);
  2509. a_load_ref_reg(list,size,size,ref,tmpreg);
  2510. a_op_const_reg(list,op,size,a,tmpreg);
  2511. a_load_reg_ref(list,size,size,tmpreg,ref);
  2512. end;
  2513. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2514. var
  2515. tmpreg: tregister;
  2516. begin
  2517. tmpreg := getintregister(list, size);
  2518. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2519. a_op_const_reg(list,op,size,a,tmpreg);
  2520. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2521. end;
  2522. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2523. var
  2524. tmpreg: tregister;
  2525. begin
  2526. tmpreg := getintregister(list, size);
  2527. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2528. a_op_const_reg(list,op,size,a,tmpreg);
  2529. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2530. end;
  2531. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2532. begin
  2533. case loc.loc of
  2534. LOC_REGISTER, LOC_CREGISTER:
  2535. a_op_const_reg(list,op,loc.size,a,loc.register);
  2536. LOC_REFERENCE, LOC_CREFERENCE:
  2537. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2538. LOC_SUBSETREG, LOC_CSUBSETREG:
  2539. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2540. LOC_SUBSETREF, LOC_CSUBSETREF:
  2541. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2542. else
  2543. internalerror(200109061);
  2544. end;
  2545. end;
  2546. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2547. var
  2548. tmpreg : tregister;
  2549. begin
  2550. tmpreg:=getintregister(list,size);
  2551. a_load_ref_reg(list,size,size,ref,tmpreg);
  2552. a_op_reg_reg(list,op,size,reg,tmpreg);
  2553. a_load_reg_ref(list,size,size,tmpreg,ref);
  2554. end;
  2555. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2556. var
  2557. tmpreg: tregister;
  2558. begin
  2559. case op of
  2560. OP_NOT,OP_NEG:
  2561. { handle it as "load ref,reg; op reg" }
  2562. begin
  2563. a_load_ref_reg(list,size,size,ref,reg);
  2564. a_op_reg_reg(list,op,size,reg,reg);
  2565. end;
  2566. else
  2567. begin
  2568. tmpreg:=getintregister(list,size);
  2569. a_load_ref_reg(list,size,size,ref,tmpreg);
  2570. a_op_reg_reg(list,op,size,tmpreg,reg);
  2571. end;
  2572. end;
  2573. end;
  2574. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2575. var
  2576. tmpreg: tregister;
  2577. begin
  2578. tmpreg := getintregister(list, opsize);
  2579. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2580. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2581. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2582. end;
  2583. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2584. var
  2585. tmpreg: tregister;
  2586. begin
  2587. tmpreg := getintregister(list, opsize);
  2588. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2589. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2590. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2591. end;
  2592. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2593. begin
  2594. case loc.loc of
  2595. LOC_REGISTER, LOC_CREGISTER:
  2596. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2597. LOC_REFERENCE, LOC_CREFERENCE:
  2598. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2599. LOC_SUBSETREG, LOC_CSUBSETREG:
  2600. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2601. LOC_SUBSETREF, LOC_CSUBSETREF:
  2602. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2603. else
  2604. internalerror(200109061);
  2605. end;
  2606. end;
  2607. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2608. var
  2609. tmpreg: tregister;
  2610. begin
  2611. case loc.loc of
  2612. LOC_REGISTER,LOC_CREGISTER:
  2613. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2614. LOC_REFERENCE,LOC_CREFERENCE:
  2615. begin
  2616. tmpreg:=getintregister(list,loc.size);
  2617. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2618. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2619. end;
  2620. LOC_SUBSETREG, LOC_CSUBSETREG:
  2621. begin
  2622. tmpreg:=getintregister(list,loc.size);
  2623. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2624. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2625. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2626. end;
  2627. LOC_SUBSETREF, LOC_CSUBSETREF:
  2628. begin
  2629. tmpreg:=getintregister(list,loc.size);
  2630. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2631. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2632. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2633. end;
  2634. else
  2635. internalerror(200109061);
  2636. end;
  2637. end;
  2638. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2639. a:aint;src,dst:Tregister);
  2640. begin
  2641. a_load_reg_reg(list,size,size,src,dst);
  2642. a_op_const_reg(list,op,size,a,dst);
  2643. end;
  2644. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2645. size: tcgsize; src1, src2, dst: tregister);
  2646. var
  2647. tmpreg: tregister;
  2648. begin
  2649. if (dst<>src1) then
  2650. begin
  2651. a_load_reg_reg(list,size,size,src2,dst);
  2652. a_op_reg_reg(list,op,size,src1,dst);
  2653. end
  2654. else
  2655. begin
  2656. { can we do a direct operation on the target register ? }
  2657. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2658. a_op_reg_reg(list,op,size,src2,dst)
  2659. else
  2660. begin
  2661. tmpreg:=getintregister(list,size);
  2662. a_load_reg_reg(list,size,size,src2,tmpreg);
  2663. a_op_reg_reg(list,op,size,src1,tmpreg);
  2664. a_load_reg_reg(list,size,size,tmpreg,dst);
  2665. end;
  2666. end;
  2667. end;
  2668. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2669. begin
  2670. a_op_const_reg_reg(list,op,size,a,src,dst);
  2671. ovloc.loc:=LOC_VOID;
  2672. end;
  2673. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2674. begin
  2675. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2676. ovloc.loc:=LOC_VOID;
  2677. end;
  2678. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2679. l : tasmlabel);
  2680. var
  2681. tmpreg: tregister;
  2682. begin
  2683. tmpreg:=getintregister(list,size);
  2684. a_load_ref_reg(list,size,size,ref,tmpreg);
  2685. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2686. end;
  2687. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2688. l : tasmlabel);
  2689. var
  2690. tmpreg : tregister;
  2691. begin
  2692. case loc.loc of
  2693. LOC_REGISTER,LOC_CREGISTER:
  2694. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2695. LOC_REFERENCE,LOC_CREFERENCE:
  2696. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2697. LOC_SUBSETREG, LOC_CSUBSETREG:
  2698. begin
  2699. tmpreg:=getintregister(list,size);
  2700. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2701. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2702. end;
  2703. LOC_SUBSETREF, LOC_CSUBSETREF:
  2704. begin
  2705. tmpreg:=getintregister(list,size);
  2706. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2707. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2708. end;
  2709. else
  2710. internalerror(200109061);
  2711. end;
  2712. end;
  2713. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2714. var
  2715. tmpreg: tregister;
  2716. begin
  2717. tmpreg:=getintregister(list,size);
  2718. a_load_ref_reg(list,size,size,ref,tmpreg);
  2719. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2720. end;
  2721. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2722. var
  2723. tmpreg: tregister;
  2724. begin
  2725. tmpreg:=getintregister(list,size);
  2726. a_load_ref_reg(list,size,size,ref,tmpreg);
  2727. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2728. end;
  2729. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2730. begin
  2731. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2732. end;
  2733. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2734. begin
  2735. case loc.loc of
  2736. LOC_REGISTER,
  2737. LOC_CREGISTER:
  2738. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2739. LOC_REFERENCE,
  2740. LOC_CREFERENCE :
  2741. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2742. LOC_CONSTANT:
  2743. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2744. LOC_SUBSETREG,
  2745. LOC_CSUBSETREG:
  2746. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2747. LOC_SUBSETREF,
  2748. LOC_CSUBSETREF:
  2749. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2750. else
  2751. internalerror(200203231);
  2752. end;
  2753. end;
  2754. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2755. var
  2756. tmpreg: tregister;
  2757. begin
  2758. tmpreg:=getintregister(list, cmpsize);
  2759. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2760. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2761. end;
  2762. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2763. var
  2764. tmpreg: tregister;
  2765. begin
  2766. tmpreg:=getintregister(list, cmpsize);
  2767. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2768. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2769. end;
  2770. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2771. l : tasmlabel);
  2772. var
  2773. tmpreg: tregister;
  2774. begin
  2775. case loc.loc of
  2776. LOC_REGISTER,LOC_CREGISTER:
  2777. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2778. LOC_REFERENCE,LOC_CREFERENCE:
  2779. begin
  2780. tmpreg:=getintregister(list,size);
  2781. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2782. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2783. end;
  2784. LOC_SUBSETREG, LOC_CSUBSETREG:
  2785. begin
  2786. tmpreg:=getintregister(list, size);
  2787. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2788. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2789. end;
  2790. LOC_SUBSETREF, LOC_CSUBSETREF:
  2791. begin
  2792. tmpreg:=getintregister(list, size);
  2793. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2794. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2795. end;
  2796. else
  2797. internalerror(200109061);
  2798. end;
  2799. end;
  2800. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2801. begin
  2802. case loc.loc of
  2803. LOC_MMREGISTER,LOC_CMMREGISTER:
  2804. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2805. LOC_REFERENCE,LOC_CREFERENCE:
  2806. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2807. LOC_REGISTER,LOC_CREGISTER:
  2808. a_loadmm_intreg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2809. else
  2810. internalerror(200310121);
  2811. end;
  2812. end;
  2813. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2814. begin
  2815. case loc.loc of
  2816. LOC_MMREGISTER,LOC_CMMREGISTER:
  2817. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2818. LOC_REFERENCE,LOC_CREFERENCE:
  2819. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2820. else
  2821. internalerror(200310122);
  2822. end;
  2823. end;
  2824. procedure tcg.a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2825. var
  2826. href : treference;
  2827. {$ifndef cpu64bitalu}
  2828. tmpreg : tregister;
  2829. reg64 : tregister64;
  2830. {$endif not cpu64bitalu}
  2831. begin
  2832. {$ifndef cpu64bitalu}
  2833. if not(cgpara.location^.loc in [LOC_REGISTER,LOC_CREGISTER]) or
  2834. (size<>OS_F64) then
  2835. {$endif not cpu64bitalu}
  2836. cgpara.check_simple_location;
  2837. paramanager.alloccgpara(list,cgpara);
  2838. case cgpara.location^.loc of
  2839. LOC_MMREGISTER,LOC_CMMREGISTER:
  2840. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2841. LOC_REFERENCE,LOC_CREFERENCE:
  2842. begin
  2843. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2844. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2845. end;
  2846. LOC_REGISTER,LOC_CREGISTER:
  2847. begin
  2848. if assigned(shuffle) and
  2849. not shufflescalar(shuffle) then
  2850. internalerror(2009112510);
  2851. {$ifndef cpu64bitalu}
  2852. if (size=OS_F64) then
  2853. begin
  2854. if not assigned(cgpara.location^.next) or
  2855. assigned(cgpara.location^.next^.next) then
  2856. internalerror(2009112512);
  2857. case cgpara.location^.next^.loc of
  2858. LOC_REGISTER,LOC_CREGISTER:
  2859. tmpreg:=cgpara.location^.next^.register;
  2860. LOC_REFERENCE,LOC_CREFERENCE:
  2861. tmpreg:=getintregister(list,OS_32);
  2862. else
  2863. internalerror(2009112910);
  2864. end;
  2865. if (target_info.endian=ENDIAN_BIG) then
  2866. begin
  2867. { paraloc^ -> high
  2868. paraloc^.next -> low }
  2869. reg64.reghi:=cgpara.location^.register;
  2870. reg64.reglo:=tmpreg;
  2871. end
  2872. else
  2873. begin
  2874. { paraloc^ -> low
  2875. paraloc^.next -> high }
  2876. reg64.reglo:=cgpara.location^.register;
  2877. reg64.reghi:=tmpreg;
  2878. end;
  2879. cg64.a_loadmm_reg_intreg64(list,size,reg,reg64);
  2880. if (cgpara.location^.next^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  2881. begin
  2882. if not(cgpara.location^.next^.size in [OS_32,OS_S32]) then
  2883. internalerror(2009112911);
  2884. reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.alignment);
  2885. a_load_reg_ref(list,OS_32,cgpara.location^.next^.size,tmpreg,href);
  2886. end;
  2887. end
  2888. else
  2889. {$endif not cpu64bitalu}
  2890. a_loadmm_reg_intreg(list,size,cgpara.location^.size,reg,cgpara.location^.register,mms_movescalar);
  2891. end
  2892. else
  2893. internalerror(200310123);
  2894. end;
  2895. end;
  2896. procedure tcg.a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2897. var
  2898. hr : tregister;
  2899. hs : tmmshuffle;
  2900. begin
  2901. cgpara.check_simple_location;
  2902. hr:=getmmregister(list,cgpara.location^.size);
  2903. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2904. if realshuffle(shuffle) then
  2905. begin
  2906. hs:=shuffle^;
  2907. removeshuffles(hs);
  2908. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,@hs);
  2909. end
  2910. else
  2911. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,shuffle);
  2912. end;
  2913. procedure tcg.a_loadmm_loc_cgpara(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2914. begin
  2915. case loc.loc of
  2916. LOC_MMREGISTER,LOC_CMMREGISTER:
  2917. a_loadmm_reg_cgpara(list,loc.size,loc.register,cgpara,shuffle);
  2918. LOC_REFERENCE,LOC_CREFERENCE:
  2919. a_loadmm_ref_cgpara(list,loc.size,loc.reference,cgpara,shuffle);
  2920. else
  2921. internalerror(200310123);
  2922. end;
  2923. end;
  2924. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2925. var
  2926. hr : tregister;
  2927. hs : tmmshuffle;
  2928. begin
  2929. hr:=getmmregister(list,size);
  2930. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2931. if realshuffle(shuffle) then
  2932. begin
  2933. hs:=shuffle^;
  2934. removeshuffles(hs);
  2935. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2936. end
  2937. else
  2938. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2939. end;
  2940. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2941. var
  2942. hr : tregister;
  2943. hs : tmmshuffle;
  2944. begin
  2945. hr:=getmmregister(list,size);
  2946. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2947. if realshuffle(shuffle) then
  2948. begin
  2949. hs:=shuffle^;
  2950. removeshuffles(hs);
  2951. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2952. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2953. end
  2954. else
  2955. begin
  2956. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2957. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2958. end;
  2959. end;
  2960. procedure tcg.a_loadmm_intreg_reg(list: tasmlist; fromsize,tosize: tcgsize; intreg,mmreg: tregister; shuffle: pmmshuffle);
  2961. var
  2962. tmpref: treference;
  2963. begin
  2964. if (tcgsize2size[fromsize]<>4) or
  2965. (tcgsize2size[tosize]<>4) then
  2966. internalerror(2009112503);
  2967. tg.gettemp(list,4,4,tt_normal,tmpref);
  2968. a_load_reg_ref(list,fromsize,fromsize,intreg,tmpref);
  2969. a_loadmm_ref_reg(list,tosize,tosize,tmpref,mmreg,shuffle);
  2970. tg.ungettemp(list,tmpref);
  2971. end;
  2972. procedure tcg.a_loadmm_reg_intreg(list: tasmlist; fromsize,tosize: tcgsize; mmreg,intreg: tregister; shuffle: pmmshuffle);
  2973. var
  2974. tmpref: treference;
  2975. begin
  2976. if (tcgsize2size[fromsize]<>4) or
  2977. (tcgsize2size[tosize]<>4) then
  2978. internalerror(2009112504);
  2979. tg.gettemp(list,8,8,tt_normal,tmpref);
  2980. cg.a_loadmm_reg_ref(list,fromsize,fromsize,mmreg,tmpref,shuffle);
  2981. a_load_ref_reg(list,tosize,tosize,tmpref,intreg);
  2982. tg.ungettemp(list,tmpref);
  2983. end;
  2984. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2985. begin
  2986. case loc.loc of
  2987. LOC_CMMREGISTER,LOC_MMREGISTER:
  2988. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2989. LOC_CREFERENCE,LOC_REFERENCE:
  2990. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2991. else
  2992. internalerror(200312232);
  2993. end;
  2994. end;
  2995. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2996. begin
  2997. g_concatcopy(list,source,dest,len);
  2998. end;
  2999. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  3000. var
  3001. cgpara1,cgpara2,cgpara3 : TCGPara;
  3002. begin
  3003. cgpara1.init;
  3004. cgpara2.init;
  3005. cgpara3.init;
  3006. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3007. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3008. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3009. a_loadaddr_ref_cgpara(list,dest,cgpara3);
  3010. a_loadaddr_ref_cgpara(list,source,cgpara2);
  3011. a_load_const_cgpara(list,OS_INT,len,cgpara1);
  3012. paramanager.freecgpara(list,cgpara3);
  3013. paramanager.freecgpara(list,cgpara2);
  3014. paramanager.freecgpara(list,cgpara1);
  3015. allocallcpuregisters(list);
  3016. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  3017. deallocallcpuregisters(list);
  3018. cgpara3.done;
  3019. cgpara2.done;
  3020. cgpara1.done;
  3021. end;
  3022. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  3023. var
  3024. cgpara1,cgpara2 : TCGPara;
  3025. begin
  3026. cgpara1.init;
  3027. cgpara2.init;
  3028. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3029. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3030. a_loadaddr_ref_cgpara(list,dest,cgpara2);
  3031. a_loadaddr_ref_cgpara(list,source,cgpara1);
  3032. paramanager.freecgpara(list,cgpara2);
  3033. paramanager.freecgpara(list,cgpara1);
  3034. allocallcpuregisters(list);
  3035. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  3036. deallocallcpuregisters(list);
  3037. cgpara2.done;
  3038. cgpara1.done;
  3039. end;
  3040. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  3041. var
  3042. href : treference;
  3043. incrfunc : string;
  3044. cgpara1,cgpara2 : TCGPara;
  3045. begin
  3046. cgpara1.init;
  3047. cgpara2.init;
  3048. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3049. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3050. if is_interfacecom(t) then
  3051. incrfunc:='FPC_INTF_INCR_REF'
  3052. else if is_ansistring(t) then
  3053. incrfunc:='FPC_ANSISTR_INCR_REF'
  3054. else if is_widestring(t) then
  3055. incrfunc:='FPC_WIDESTR_INCR_REF'
  3056. else if is_unicodestring(t) then
  3057. incrfunc:='FPC_UNICODESTR_INCR_REF'
  3058. else if is_dynamic_array(t) then
  3059. incrfunc:='FPC_DYNARRAY_INCR_REF'
  3060. else
  3061. incrfunc:='';
  3062. { call the special incr function or the generic addref }
  3063. if incrfunc<>'' then
  3064. begin
  3065. { widestrings aren't ref. counted on all platforms so we need the address
  3066. to create a real copy }
  3067. if is_widestring(t) then
  3068. a_loadaddr_ref_cgpara(list,ref,cgpara1)
  3069. else
  3070. { these functions get the pointer by value }
  3071. a_load_ref_cgpara(list,OS_ADDR,ref,cgpara1);
  3072. paramanager.freecgpara(list,cgpara1);
  3073. allocallcpuregisters(list);
  3074. a_call_name(list,incrfunc,false);
  3075. deallocallcpuregisters(list);
  3076. end
  3077. else
  3078. begin
  3079. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3080. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3081. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3082. paramanager.freecgpara(list,cgpara1);
  3083. paramanager.freecgpara(list,cgpara2);
  3084. allocallcpuregisters(list);
  3085. a_call_name(list,'FPC_ADDREF',false);
  3086. deallocallcpuregisters(list);
  3087. end;
  3088. cgpara2.done;
  3089. cgpara1.done;
  3090. end;
  3091. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  3092. var
  3093. href : treference;
  3094. decrfunc : string;
  3095. needrtti : boolean;
  3096. cgpara1,cgpara2 : TCGPara;
  3097. tempreg1,tempreg2 : TRegister;
  3098. begin
  3099. cgpara1.init;
  3100. cgpara2.init;
  3101. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3102. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3103. needrtti:=false;
  3104. if is_interfacecom(t) then
  3105. decrfunc:='FPC_INTF_DECR_REF'
  3106. else if is_ansistring(t) then
  3107. decrfunc:='FPC_ANSISTR_DECR_REF'
  3108. else if is_widestring(t) then
  3109. decrfunc:='FPC_WIDESTR_DECR_REF'
  3110. else if is_unicodestring(t) then
  3111. decrfunc:='FPC_UNICODESTR_DECR_REF'
  3112. else if is_dynamic_array(t) then
  3113. begin
  3114. decrfunc:='FPC_DYNARRAY_DECR_REF';
  3115. needrtti:=true;
  3116. end
  3117. else
  3118. decrfunc:='';
  3119. { call the special decr function or the generic decref }
  3120. if decrfunc<>'' then
  3121. begin
  3122. if needrtti then
  3123. begin
  3124. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3125. tempreg2:=getaddressregister(list);
  3126. a_loadaddr_ref_reg(list,href,tempreg2);
  3127. end;
  3128. tempreg1:=getaddressregister(list);
  3129. a_loadaddr_ref_reg(list,ref,tempreg1);
  3130. if needrtti then
  3131. a_load_reg_cgpara(list,OS_ADDR,tempreg2,cgpara2);
  3132. a_load_reg_cgpara(list,OS_ADDR,tempreg1,cgpara1);
  3133. paramanager.freecgpara(list,cgpara1);
  3134. if needrtti then
  3135. paramanager.freecgpara(list,cgpara2);
  3136. allocallcpuregisters(list);
  3137. a_call_name(list,decrfunc,false);
  3138. deallocallcpuregisters(list);
  3139. end
  3140. else
  3141. begin
  3142. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3143. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3144. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3145. paramanager.freecgpara(list,cgpara1);
  3146. paramanager.freecgpara(list,cgpara2);
  3147. allocallcpuregisters(list);
  3148. a_call_name(list,'FPC_DECREF',false);
  3149. deallocallcpuregisters(list);
  3150. end;
  3151. cgpara2.done;
  3152. cgpara1.done;
  3153. end;
  3154. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  3155. var
  3156. href : treference;
  3157. cgpara1,cgpara2 : TCGPara;
  3158. begin
  3159. cgpara1.init;
  3160. cgpara2.init;
  3161. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3162. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3163. if is_ansistring(t) or
  3164. is_widestring(t) or
  3165. is_unicodestring(t) or
  3166. is_interfacecom(t) or
  3167. is_dynamic_array(t) then
  3168. a_load_const_ref(list,OS_ADDR,0,ref)
  3169. else
  3170. begin
  3171. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3172. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3173. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3174. paramanager.freecgpara(list,cgpara1);
  3175. paramanager.freecgpara(list,cgpara2);
  3176. allocallcpuregisters(list);
  3177. a_call_name(list,'FPC_INITIALIZE',false);
  3178. deallocallcpuregisters(list);
  3179. end;
  3180. cgpara1.done;
  3181. cgpara2.done;
  3182. end;
  3183. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  3184. var
  3185. href : treference;
  3186. cgpara1,cgpara2 : TCGPara;
  3187. begin
  3188. cgpara1.init;
  3189. cgpara2.init;
  3190. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3191. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3192. if is_ansistring(t) or
  3193. is_widestring(t) or
  3194. is_unicodestring(t) or
  3195. is_interfacecom(t) then
  3196. begin
  3197. g_decrrefcount(list,t,ref);
  3198. a_load_const_ref(list,OS_ADDR,0,ref);
  3199. end
  3200. else
  3201. begin
  3202. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3203. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3204. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3205. paramanager.freecgpara(list,cgpara1);
  3206. paramanager.freecgpara(list,cgpara2);
  3207. allocallcpuregisters(list);
  3208. a_call_name(list,'FPC_FINALIZE',false);
  3209. deallocallcpuregisters(list);
  3210. end;
  3211. cgpara1.done;
  3212. cgpara2.done;
  3213. end;
  3214. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  3215. { generate range checking code for the value at location p. The type }
  3216. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  3217. { is the original type used at that location. When both defs are equal }
  3218. { the check is also insert (needed for succ,pref,inc,dec) }
  3219. const
  3220. aintmax=high(aint);
  3221. var
  3222. neglabel : tasmlabel;
  3223. hreg : tregister;
  3224. lto,hto,
  3225. lfrom,hfrom : TConstExprInt;
  3226. fromsize, tosize: cardinal;
  3227. from_signed, to_signed: boolean;
  3228. begin
  3229. { range checking on and range checkable value? }
  3230. if not(cs_check_range in current_settings.localswitches) or
  3231. not(fromdef.typ in [orddef,enumdef]) or
  3232. { C-style booleans can't really fail range checks, }
  3233. { all values are always valid }
  3234. is_cbool(todef) then
  3235. exit;
  3236. {$ifndef cpu64bitalu}
  3237. { handle 64bit rangechecks separate for 32bit processors }
  3238. if is_64bit(fromdef) or is_64bit(todef) then
  3239. begin
  3240. cg64.g_rangecheck64(list,l,fromdef,todef);
  3241. exit;
  3242. end;
  3243. {$endif cpu64bitalu}
  3244. { only check when assigning to scalar, subranges are different, }
  3245. { when todef=fromdef then the check is always generated }
  3246. getrange(fromdef,lfrom,hfrom);
  3247. getrange(todef,lto,hto);
  3248. from_signed := is_signed(fromdef);
  3249. to_signed := is_signed(todef);
  3250. { check the rangedef of the array, not the array itself }
  3251. { (only change now, since getrange needs the arraydef) }
  3252. if (todef.typ = arraydef) then
  3253. todef := tarraydef(todef).rangedef;
  3254. { no range check if from and to are equal and are both longint/dword }
  3255. { (if we have a 32bit processor) or int64/qword, since such }
  3256. { operations can at most cause overflows (JM) }
  3257. { Note that these checks are mostly processor independent, they only }
  3258. { have to be changed once we introduce 64bit subrange types }
  3259. {$ifdef cpu64bitalu}
  3260. if (fromdef = todef) and
  3261. (fromdef.typ=orddef) and
  3262. (((((torddef(fromdef).ordtype = s64bit) and
  3263. (lfrom = low(int64)) and
  3264. (hfrom = high(int64))) or
  3265. ((torddef(fromdef).ordtype = u64bit) and
  3266. (lfrom = low(qword)) and
  3267. (hfrom = high(qword))) or
  3268. ((torddef(fromdef).ordtype = scurrency) and
  3269. (lfrom = low(int64)) and
  3270. (hfrom = high(int64)))))) then
  3271. exit;
  3272. {$else cpu64bitalu}
  3273. if (fromdef = todef) and
  3274. (fromdef.typ=orddef) and
  3275. (((((torddef(fromdef).ordtype = s32bit) and
  3276. (lfrom = int64(low(longint))) and
  3277. (hfrom = int64(high(longint)))) or
  3278. ((torddef(fromdef).ordtype = u32bit) and
  3279. (lfrom = low(cardinal)) and
  3280. (hfrom = high(cardinal)))))) then
  3281. exit;
  3282. {$endif cpu64bitalu}
  3283. { optimize some range checks away in safe cases }
  3284. fromsize := fromdef.size;
  3285. tosize := todef.size;
  3286. if ((from_signed = to_signed) or
  3287. (not from_signed)) and
  3288. (lto<=lfrom) and (hto>=hfrom) and
  3289. (fromsize <= tosize) then
  3290. begin
  3291. { if fromsize < tosize, and both have the same signed-ness or }
  3292. { fromdef is unsigned, then all bit patterns from fromdef are }
  3293. { valid for todef as well }
  3294. if (fromsize < tosize) then
  3295. exit;
  3296. if (fromsize = tosize) and
  3297. (from_signed = to_signed) then
  3298. { only optimize away if all bit patterns which fit in fromsize }
  3299. { are valid for the todef }
  3300. begin
  3301. {$ifopt Q+}
  3302. {$define overflowon}
  3303. {$Q-}
  3304. {$endif}
  3305. {$ifopt R+}
  3306. {$define rangeon}
  3307. {$R-}
  3308. {$endif}
  3309. if to_signed then
  3310. begin
  3311. { calculation of the low/high ranges must not overflow 64 bit
  3312. otherwise we end up comparing with zero for 64 bit data types on
  3313. 64 bit processors }
  3314. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  3315. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  3316. exit
  3317. end
  3318. else
  3319. begin
  3320. { calculation of the low/high ranges must not overflow 64 bit
  3321. otherwise we end up having all zeros for 64 bit data types on
  3322. 64 bit processors }
  3323. if (lto = 0) and
  3324. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  3325. exit
  3326. end;
  3327. {$ifdef overflowon}
  3328. {$Q+}
  3329. {$undef overflowon}
  3330. {$endif}
  3331. {$ifdef rangeon}
  3332. {$R+}
  3333. {$undef rangeon}
  3334. {$endif}
  3335. end
  3336. end;
  3337. { generate the rangecheck code for the def where we are going to }
  3338. { store the result }
  3339. { use the trick that }
  3340. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  3341. { To be able to do that, we have to make sure however that either }
  3342. { fromdef and todef are both signed or unsigned, or that we leave }
  3343. { the parts < 0 and > maxlongint out }
  3344. if from_signed xor to_signed then
  3345. begin
  3346. if from_signed then
  3347. { from is signed, to is unsigned }
  3348. begin
  3349. { if high(from) < 0 -> always range error }
  3350. if (hfrom < 0) or
  3351. { if low(to) > maxlongint also range error }
  3352. (lto > aintmax) then
  3353. begin
  3354. a_call_name(list,'FPC_RANGEERROR',false);
  3355. exit
  3356. end;
  3357. { from is signed and to is unsigned -> when looking at to }
  3358. { as an signed value, it must be < maxaint (otherwise }
  3359. { it will become negative, which is invalid since "to" is unsigned) }
  3360. if hto > aintmax then
  3361. hto := aintmax;
  3362. end
  3363. else
  3364. { from is unsigned, to is signed }
  3365. begin
  3366. if (lfrom > aintmax) or
  3367. (hto < 0) then
  3368. begin
  3369. a_call_name(list,'FPC_RANGEERROR',false);
  3370. exit
  3371. end;
  3372. { from is unsigned and to is signed -> when looking at to }
  3373. { as an unsigned value, it must be >= 0 (since negative }
  3374. { values are the same as values > maxlongint) }
  3375. if lto < 0 then
  3376. lto := 0;
  3377. end;
  3378. end;
  3379. hreg:=getintregister(list,OS_INT);
  3380. a_load_loc_reg(list,OS_INT,l,hreg);
  3381. a_op_const_reg(list,OP_SUB,OS_INT,aint(int64(lto)),hreg);
  3382. current_asmdata.getjumplabel(neglabel);
  3383. {
  3384. if from_signed then
  3385. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3386. else
  3387. }
  3388. {$ifdef cpu64bitalu}
  3389. if qword(hto-lto)>qword(aintmax) then
  3390. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3391. else
  3392. {$endif cpu64bitalu}
  3393. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
  3394. a_call_name(list,'FPC_RANGEERROR',false);
  3395. a_label(list,neglabel);
  3396. end;
  3397. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3398. begin
  3399. g_overflowCheck(list,loc,def);
  3400. end;
  3401. {$ifdef cpuflags}
  3402. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3403. var
  3404. tmpreg : tregister;
  3405. begin
  3406. tmpreg:=getintregister(list,size);
  3407. g_flags2reg(list,size,f,tmpreg);
  3408. a_load_reg_ref(list,size,size,tmpreg,ref);
  3409. end;
  3410. {$endif cpuflags}
  3411. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3412. var
  3413. OKLabel : tasmlabel;
  3414. cgpara1 : TCGPara;
  3415. begin
  3416. if (cs_check_object in current_settings.localswitches) or
  3417. (cs_check_range in current_settings.localswitches) then
  3418. begin
  3419. current_asmdata.getjumplabel(oklabel);
  3420. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3421. cgpara1.init;
  3422. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3423. a_load_const_cgpara(list,OS_INT,210,cgpara1);
  3424. paramanager.freecgpara(list,cgpara1);
  3425. a_call_name(list,'FPC_HANDLEERROR',false);
  3426. a_label(list,oklabel);
  3427. cgpara1.done;
  3428. end;
  3429. end;
  3430. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3431. var
  3432. hrefvmt : treference;
  3433. cgpara1,cgpara2 : TCGPara;
  3434. begin
  3435. cgpara1.init;
  3436. cgpara2.init;
  3437. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3438. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3439. if (cs_check_object in current_settings.localswitches) then
  3440. begin
  3441. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  3442. a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
  3443. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  3444. paramanager.freecgpara(list,cgpara1);
  3445. paramanager.freecgpara(list,cgpara2);
  3446. allocallcpuregisters(list);
  3447. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  3448. deallocallcpuregisters(list);
  3449. end
  3450. else
  3451. if (cs_check_range in current_settings.localswitches) then
  3452. begin
  3453. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  3454. paramanager.freecgpara(list,cgpara1);
  3455. allocallcpuregisters(list);
  3456. a_call_name(list,'FPC_CHECK_OBJECT',false);
  3457. deallocallcpuregisters(list);
  3458. end;
  3459. cgpara1.done;
  3460. cgpara2.done;
  3461. end;
  3462. {*****************************************************************************
  3463. Entry/Exit Code Functions
  3464. *****************************************************************************}
  3465. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3466. var
  3467. sizereg,sourcereg,lenreg : tregister;
  3468. cgpara1,cgpara2,cgpara3 : TCGPara;
  3469. begin
  3470. { because some abis don't support dynamic stack allocation properly
  3471. open array value parameters are copied onto the heap
  3472. }
  3473. { calculate necessary memory }
  3474. { read/write operations on one register make the life of the register allocator hard }
  3475. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3476. begin
  3477. lenreg:=getintregister(list,OS_INT);
  3478. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3479. end
  3480. else
  3481. lenreg:=lenloc.register;
  3482. sizereg:=getintregister(list,OS_INT);
  3483. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3484. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3485. { load source }
  3486. sourcereg:=getaddressregister(list);
  3487. a_loadaddr_ref_reg(list,ref,sourcereg);
  3488. { do getmem call }
  3489. cgpara1.init;
  3490. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3491. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara1);
  3492. paramanager.freecgpara(list,cgpara1);
  3493. allocallcpuregisters(list);
  3494. a_call_name(list,'FPC_GETMEM',false);
  3495. deallocallcpuregisters(list);
  3496. cgpara1.done;
  3497. { return the new address }
  3498. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3499. { do move call }
  3500. cgpara1.init;
  3501. cgpara2.init;
  3502. cgpara3.init;
  3503. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3504. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3505. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3506. { load size }
  3507. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara3);
  3508. { load destination }
  3509. a_load_reg_cgpara(list,OS_ADDR,destreg,cgpara2);
  3510. { load source }
  3511. a_load_reg_cgpara(list,OS_ADDR,sourcereg,cgpara1);
  3512. paramanager.freecgpara(list,cgpara3);
  3513. paramanager.freecgpara(list,cgpara2);
  3514. paramanager.freecgpara(list,cgpara1);
  3515. allocallcpuregisters(list);
  3516. a_call_name(list,'FPC_MOVE',false);
  3517. deallocallcpuregisters(list);
  3518. cgpara3.done;
  3519. cgpara2.done;
  3520. cgpara1.done;
  3521. end;
  3522. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3523. var
  3524. cgpara1 : TCGPara;
  3525. begin
  3526. { do move call }
  3527. cgpara1.init;
  3528. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3529. { load source }
  3530. a_load_loc_cgpara(list,l,cgpara1);
  3531. paramanager.freecgpara(list,cgpara1);
  3532. allocallcpuregisters(list);
  3533. a_call_name(list,'FPC_FREEMEM',false);
  3534. deallocallcpuregisters(list);
  3535. cgpara1.done;
  3536. end;
  3537. procedure tcg.g_save_registers(list:TAsmList);
  3538. var
  3539. href : treference;
  3540. size : longint;
  3541. r : integer;
  3542. begin
  3543. { calculate temp. size }
  3544. size:=0;
  3545. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3546. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3547. inc(size,sizeof(aint));
  3548. { mm registers }
  3549. if uses_registers(R_MMREGISTER) then
  3550. begin
  3551. { Make sure we reserve enough space to do the alignment based on the offset
  3552. later on. We can't use the size for this, because the alignment of the start
  3553. of the temp is smaller than needed for an OS_VECTOR }
  3554. inc(size,tcgsize2size[OS_VECTOR]);
  3555. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3556. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3557. inc(size,tcgsize2size[OS_VECTOR]);
  3558. end;
  3559. if size>0 then
  3560. begin
  3561. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  3562. include(current_procinfo.flags,pi_has_saved_regs);
  3563. { Copy registers to temp }
  3564. href:=current_procinfo.save_regs_ref;
  3565. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3566. begin
  3567. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3568. begin
  3569. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3570. inc(href.offset,sizeof(aint));
  3571. end;
  3572. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3573. end;
  3574. if uses_registers(R_MMREGISTER) then
  3575. begin
  3576. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3577. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3578. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3579. begin
  3580. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3581. begin
  3582. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3583. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3584. end;
  3585. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3586. end;
  3587. end;
  3588. end;
  3589. end;
  3590. procedure tcg.g_restore_registers(list:TAsmList);
  3591. var
  3592. href : treference;
  3593. r : integer;
  3594. hreg : tregister;
  3595. begin
  3596. if not(pi_has_saved_regs in current_procinfo.flags) then
  3597. exit;
  3598. { Copy registers from temp }
  3599. href:=current_procinfo.save_regs_ref;
  3600. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3601. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3602. begin
  3603. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3604. { Allocate register so the optimizer does not remove the load }
  3605. a_reg_alloc(list,hreg);
  3606. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3607. inc(href.offset,sizeof(aint));
  3608. end;
  3609. if uses_registers(R_MMREGISTER) then
  3610. begin
  3611. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3612. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3613. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3614. begin
  3615. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3616. begin
  3617. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3618. { Allocate register so the optimizer does not remove the load }
  3619. a_reg_alloc(list,hreg);
  3620. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3621. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3622. end;
  3623. end;
  3624. end;
  3625. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3626. end;
  3627. procedure tcg.g_profilecode(list : TAsmList);
  3628. begin
  3629. end;
  3630. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3631. begin
  3632. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3633. end;
  3634. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3635. begin
  3636. a_load_const_ref(list, OS_INT, a, href);
  3637. end;
  3638. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3639. begin
  3640. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  3641. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3642. end;
  3643. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3644. var
  3645. hsym : tsym;
  3646. href : treference;
  3647. paraloc : Pcgparalocation;
  3648. begin
  3649. { calculate the parameter info for the procdef }
  3650. if not procdef.has_paraloc_info then
  3651. begin
  3652. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3653. procdef.has_paraloc_info:=true;
  3654. end;
  3655. hsym:=tsym(procdef.parast.Find('self'));
  3656. if not(assigned(hsym) and
  3657. (hsym.typ=paravarsym)) then
  3658. internalerror(200305251);
  3659. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3660. while paraloc<>nil do
  3661. with paraloc^ do
  3662. begin
  3663. case loc of
  3664. LOC_REGISTER:
  3665. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3666. LOC_REFERENCE:
  3667. begin
  3668. { offset in the wrapper needs to be adjusted for the stored
  3669. return address }
  3670. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  3671. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3672. end
  3673. else
  3674. internalerror(200309189);
  3675. end;
  3676. paraloc:=next;
  3677. end;
  3678. end;
  3679. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3680. begin
  3681. a_jmp_name(list,externalname);
  3682. end;
  3683. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3684. begin
  3685. a_call_name(list,s,false);
  3686. end;
  3687. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;
  3688. var
  3689. l: tasmsymbol;
  3690. ref: treference;
  3691. begin
  3692. result := NR_NO;
  3693. case target_info.system of
  3694. system_powerpc_darwin,
  3695. system_i386_darwin,
  3696. system_powerpc64_darwin,
  3697. system_arm_darwin:
  3698. begin
  3699. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3700. if not(assigned(l)) then
  3701. begin
  3702. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
  3703. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3704. if not(weak) then
  3705. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.RefAsmSymbol(symname).Name))
  3706. else
  3707. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.WeakRefAsmSymbol(symname).Name));
  3708. {$ifdef cpu64bitaddr}
  3709. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3710. {$else cpu64bitaddr}
  3711. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3712. {$endif cpu64bitaddr}
  3713. end;
  3714. result := getaddressregister(list);
  3715. reference_reset_symbol(ref,l,0,sizeof(pint));
  3716. { a_load_ref_reg will turn this into a pic-load if needed }
  3717. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3718. end;
  3719. end;
  3720. end;
  3721. procedure tcg.g_maybe_got_init(list: TAsmList);
  3722. begin
  3723. end;
  3724. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  3725. begin
  3726. internalerror(200807231);
  3727. end;
  3728. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  3729. begin
  3730. internalerror(200807232);
  3731. end;
  3732. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  3733. begin
  3734. internalerror(200807233);
  3735. end;
  3736. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  3737. begin
  3738. internalerror(200807234);
  3739. end;
  3740. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  3741. begin
  3742. Result:=TRegister(0);
  3743. internalerror(200807238);
  3744. end;
  3745. {*****************************************************************************
  3746. TCG64
  3747. *****************************************************************************}
  3748. {$ifndef cpu64bitalu}
  3749. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3750. begin
  3751. a_load64_reg_reg(list,regsrc,regdst);
  3752. a_op64_const_reg(list,op,size,value,regdst);
  3753. end;
  3754. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3755. var
  3756. tmpreg64 : tregister64;
  3757. begin
  3758. { when src1=dst then we need to first create a temp to prevent
  3759. overwriting src1 with src2 }
  3760. if (regsrc1.reghi=regdst.reghi) or
  3761. (regsrc1.reglo=regdst.reghi) or
  3762. (regsrc1.reghi=regdst.reglo) or
  3763. (regsrc1.reglo=regdst.reglo) then
  3764. begin
  3765. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3766. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3767. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3768. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3769. a_load64_reg_reg(list,tmpreg64,regdst);
  3770. end
  3771. else
  3772. begin
  3773. a_load64_reg_reg(list,regsrc2,regdst);
  3774. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3775. end;
  3776. end;
  3777. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3778. var
  3779. tmpreg64 : tregister64;
  3780. begin
  3781. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3782. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3783. a_load64_subsetref_reg(list,sref,tmpreg64);
  3784. a_op64_const_reg(list,op,size,a,tmpreg64);
  3785. a_load64_reg_subsetref(list,tmpreg64,sref);
  3786. end;
  3787. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3788. var
  3789. tmpreg64 : tregister64;
  3790. begin
  3791. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3792. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3793. a_load64_subsetref_reg(list,sref,tmpreg64);
  3794. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3795. a_load64_reg_subsetref(list,tmpreg64,sref);
  3796. end;
  3797. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3798. var
  3799. tmpreg64 : tregister64;
  3800. begin
  3801. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3802. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3803. a_load64_subsetref_reg(list,sref,tmpreg64);
  3804. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3805. a_load64_reg_subsetref(list,tmpreg64,sref);
  3806. end;
  3807. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3808. var
  3809. tmpreg64 : tregister64;
  3810. begin
  3811. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3812. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3813. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3814. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3815. end;
  3816. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3817. begin
  3818. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3819. ovloc.loc:=LOC_VOID;
  3820. end;
  3821. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3822. begin
  3823. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3824. ovloc.loc:=LOC_VOID;
  3825. end;
  3826. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3827. begin
  3828. case l.loc of
  3829. LOC_REFERENCE, LOC_CREFERENCE:
  3830. a_load64_ref_subsetref(list,l.reference,sref);
  3831. LOC_REGISTER,LOC_CREGISTER:
  3832. a_load64_reg_subsetref(list,l.register64,sref);
  3833. LOC_CONSTANT :
  3834. a_load64_const_subsetref(list,l.value64,sref);
  3835. LOC_SUBSETREF,LOC_CSUBSETREF:
  3836. a_load64_subsetref_subsetref(list,l.sref,sref);
  3837. else
  3838. internalerror(2006082210);
  3839. end;
  3840. end;
  3841. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3842. begin
  3843. case l.loc of
  3844. LOC_REFERENCE, LOC_CREFERENCE:
  3845. a_load64_subsetref_ref(list,sref,l.reference);
  3846. LOC_REGISTER,LOC_CREGISTER:
  3847. a_load64_subsetref_reg(list,sref,l.register64);
  3848. LOC_SUBSETREF,LOC_CSUBSETREF:
  3849. a_load64_subsetref_subsetref(list,sref,l.sref);
  3850. else
  3851. internalerror(2006082211);
  3852. end;
  3853. end;
  3854. {$endif cpu64bitalu}
  3855. procedure destroy_codegen;
  3856. begin
  3857. cg.free;
  3858. cg:=nil;
  3859. {$ifndef cpu64bitalu}
  3860. cg64.free;
  3861. cg64:=nil;
  3862. {$endif cpu64bitalu}
  3863. end;
  3864. end.