agarmgas.pas 13 KB

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  1. {
  2. Copyright (c) 2003 by Florian Klaempfl
  3. This unit implements an asm for the ARM
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. { This unit implements the GNU Assembler writer for the ARM
  18. }
  19. unit agarmgas;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. aasmtai,
  25. aggas,
  26. cpubase,cpuinfo;
  27. type
  28. TARMGNUAssembler=class(TGNUassembler)
  29. constructor create(smart: boolean); override;
  30. function MakeCmdLine: TCmdStr; override;
  31. procedure WriteExtraHeader; override;
  32. end;
  33. TArmInstrWriter=class(TCPUInstrWriter)
  34. procedure WriteInstruction(hp : tai);override;
  35. end;
  36. TArmAppleGNUAssembler=class(TAppleGNUassembler)
  37. constructor create(smart: boolean); override;
  38. end;
  39. const
  40. gas_shiftmode2str : array[tshiftmode] of string[3] = (
  41. '','lsl','lsr','asr','ror','rrx');
  42. const
  43. cputype_to_gas_march : array[tcputype] of string = (
  44. '', // cpu_none
  45. 'armv3',
  46. 'armv4',
  47. 'armv4t',
  48. 'armv5',
  49. 'armv5t',
  50. 'armv5te',
  51. 'armv5tej',
  52. 'armv6',
  53. 'armv6k',
  54. 'armv6t2',
  55. 'armv6z',
  56. 'armv6-m',
  57. 'armv7',
  58. 'armv7-a',
  59. 'armv7-r',
  60. 'armv7-m',
  61. 'armv7e-m');
  62. implementation
  63. uses
  64. cutils,globals,verbose,
  65. systems,
  66. assemble,
  67. aasmcpu,
  68. itcpugas,
  69. cgbase,cgutils;
  70. {****************************************************************************}
  71. { GNU Arm Assembler writer }
  72. {****************************************************************************}
  73. constructor TArmGNUAssembler.create(smart: boolean);
  74. begin
  75. inherited create(smart);
  76. InstrWriter := TArmInstrWriter.create(self);
  77. end;
  78. function TArmGNUAssembler.MakeCmdLine: TCmdStr;
  79. begin
  80. result:=inherited MakeCmdLine;
  81. if (current_settings.fputype = fpu_soft) then
  82. result:='-mfpu=softvfp '+result;
  83. if (current_settings.fputype = fpu_vfpv2) then
  84. result:='-mfpu=vfpv2 '+result;
  85. if (current_settings.fputype = fpu_vfpv3) then
  86. result:='-mfpu=vfpv3 '+result;
  87. if (current_settings.fputype = fpu_vfpv3_d16) then
  88. result:='-mfpu=vfpv3-d16 '+result;
  89. if (current_settings.fputype = fpu_fpv4_s16) then
  90. result:='-mfpu=fpv4-sp-d16 '+result;
  91. if GenerateThumb2Code then
  92. result:='-march='+cputype_to_gas_march[current_settings.cputype]+' -mthumb -mthumb-interwork '+result
  93. else if GenerateThumbCode then
  94. result:='-march='+cputype_to_gas_march[current_settings.cputype]+' -mthumb -mthumb-interwork '+result
  95. else
  96. result:='-march='+cputype_to_gas_march[current_settings.cputype]+' '+result;
  97. if target_info.abi = abi_eabihf then
  98. { options based on what gcc uses on debian armhf }
  99. result:='-mfloat-abi=hard -meabi=5 '+result;
  100. end;
  101. procedure TArmGNUAssembler.WriteExtraHeader;
  102. begin
  103. inherited WriteExtraHeader;
  104. if GenerateThumb2Code then
  105. AsmWriteLn(#9'.syntax unified');
  106. end;
  107. {****************************************************************************}
  108. { GNU/Apple ARM Assembler writer }
  109. {****************************************************************************}
  110. constructor TArmAppleGNUAssembler.create(smart: boolean);
  111. begin
  112. inherited create(smart);
  113. InstrWriter := TArmInstrWriter.create(self);
  114. end;
  115. {****************************************************************************}
  116. { Helper routines for Instruction Writer }
  117. {****************************************************************************}
  118. function getreferencestring(var ref : treference) : string;
  119. var
  120. s : string;
  121. begin
  122. with ref do
  123. begin
  124. {$ifdef extdebug}
  125. // if base=NR_NO then
  126. // internalerror(200308292);
  127. // if ((index<>NR_NO) or (shiftmode<>SM_None)) and ((offset<>0) or (symbol<>nil)) then
  128. // internalerror(200308293);
  129. {$endif extdebug}
  130. if assigned(symbol) then
  131. begin
  132. if (base<>NR_NO) and not(is_pc(base)) then
  133. internalerror(200309011);
  134. s:=symbol.name;
  135. if offset<>0 then
  136. s:=s+tostr_with_plus(offset);
  137. if refaddr=addr_pic then
  138. s:=s+'(PLT)';
  139. end
  140. else
  141. begin
  142. s:='['+gas_regname(base);
  143. if addressmode=AM_POSTINDEXED then
  144. s:=s+']';
  145. if index<>NR_NO then
  146. begin
  147. if signindex<0 then
  148. s:=s+', -'
  149. else
  150. s:=s+', ';
  151. s:=s+gas_regname(index);
  152. {RRX always rotates by 1 bit and does not take an imm}
  153. if shiftmode = SM_RRX then
  154. s:=s+', rrx'
  155. else if shiftmode <> SM_None then
  156. s:=s+', '+gas_shiftmode2str[shiftmode]+' #'+tostr(shiftimm);
  157. end
  158. else if offset<>0 then
  159. s:=s+', #'+tostr(offset);
  160. case addressmode of
  161. AM_OFFSET:
  162. s:=s+']';
  163. AM_PREINDEXED:
  164. s:=s+']!';
  165. end;
  166. end;
  167. end;
  168. getreferencestring:=s;
  169. end;
  170. function getopstr(const o:toper) : string;
  171. var
  172. hs : string;
  173. first : boolean;
  174. r : tsuperregister;
  175. begin
  176. case o.typ of
  177. top_reg:
  178. getopstr:=gas_regname(o.reg);
  179. top_shifterop:
  180. begin
  181. {RRX is special, it only rotates by 1 and does not take any shiftervalue}
  182. if o.shifterop^.shiftmode=SM_RRX then
  183. getopstr:='rrx'
  184. else if (o.shifterop^.rs<>NR_NO) and (o.shifterop^.shiftimm=0) then
  185. getopstr:=gas_shiftmode2str[o.shifterop^.shiftmode]+' '+gas_regname(o.shifterop^.rs)
  186. else if (o.shifterop^.rs=NR_NO) then
  187. getopstr:=gas_shiftmode2str[o.shifterop^.shiftmode]+' #'+tostr(o.shifterop^.shiftimm)
  188. else internalerror(200308282);
  189. end;
  190. top_const:
  191. getopstr:='#'+tostr(longint(o.val));
  192. top_regset:
  193. begin
  194. getopstr:='{';
  195. first:=true;
  196. for r:=RS_R0 to RS_R15 do
  197. if r in o.regset^ then
  198. begin
  199. if not(first) then
  200. getopstr:=getopstr+',';
  201. getopstr:=getopstr+gas_regname(newreg(o.regtyp,r,o.subreg));
  202. first:=false;
  203. end;
  204. getopstr:=getopstr+'}';
  205. if o.usermode then
  206. getopstr:=getopstr+'^';
  207. end;
  208. top_conditioncode:
  209. getopstr:=cond2str[o.cc];
  210. top_modeflags:
  211. begin
  212. getopstr:='';
  213. if mfA in o.modeflags then getopstr:=getopstr+'a';
  214. if mfI in o.modeflags then getopstr:=getopstr+'i';
  215. if mfF in o.modeflags then getopstr:=getopstr+'f';
  216. end;
  217. top_ref:
  218. if o.ref^.refaddr=addr_full then
  219. begin
  220. hs:=o.ref^.symbol.name;
  221. if o.ref^.offset>0 then
  222. hs:=hs+'+'+tostr(o.ref^.offset)
  223. else
  224. if o.ref^.offset<0 then
  225. hs:=hs+tostr(o.ref^.offset);
  226. getopstr:=hs;
  227. end
  228. else
  229. getopstr:=getreferencestring(o.ref^);
  230. top_specialreg:
  231. begin
  232. getopstr:=gas_regname(o.specialreg);
  233. if o.specialflags<>[] then
  234. begin
  235. getopstr:=getopstr+'_';
  236. if srC in o.specialflags then getopstr:=getopstr+'c';
  237. if srX in o.specialflags then getopstr:=getopstr+'x';
  238. if srF in o.specialflags then getopstr:=getopstr+'f';
  239. if srS in o.specialflags then getopstr:=getopstr+'s';
  240. end;
  241. end
  242. else
  243. internalerror(2002070604);
  244. end;
  245. end;
  246. Procedure TArmInstrWriter.WriteInstruction(hp : tai);
  247. var op: TAsmOp;
  248. postfix,s: string;
  249. i: byte;
  250. sep: string[3];
  251. begin
  252. op:=taicpu(hp).opcode;
  253. if GenerateThumb2Code then
  254. begin
  255. postfix:='';
  256. if taicpu(hp).wideformat then
  257. postfix:='.w';
  258. if taicpu(hp).ops = 0 then
  259. s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfix2str[taicpu(hp).oppostfix]
  260. else if (taicpu(hp).opcode>=A_VABS) and (taicpu(hp).opcode<=A_VSUB) then
  261. s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfix2str[taicpu(hp).oppostfix]
  262. else
  263. s:=#9+gas_op2str[op]+oppostfix2str[taicpu(hp).oppostfix]+cond2str[taicpu(hp).condition]+postfix; // Conditional infixes are deprecated in unified syntax
  264. end
  265. else
  266. s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfix2str[taicpu(hp).oppostfix];
  267. if taicpu(hp).ops<>0 then
  268. begin
  269. sep:=#9;
  270. for i:=0 to taicpu(hp).ops-1 do
  271. begin
  272. // debug code
  273. // writeln(s);
  274. // writeln(taicpu(hp).fileinfo.line);
  275. { LDM and STM use references as first operand but they are written like a register }
  276. if (i=0) and (op in [A_LDM,A_STM,A_FSTM,A_FLDM]) then
  277. begin
  278. case taicpu(hp).oper[0]^.typ of
  279. top_ref:
  280. begin
  281. s:=s+sep+gas_regname(taicpu(hp).oper[0]^.ref^.index);
  282. if taicpu(hp).oper[0]^.ref^.addressmode=AM_PREINDEXED then
  283. s:=s+'!';
  284. end;
  285. top_reg:
  286. s:=s+sep+gas_regname(taicpu(hp).oper[0]^.reg);
  287. else
  288. internalerror(200311292);
  289. end;
  290. end
  291. { register count of SFM and LFM is written without # }
  292. else if (i=1) and (op in [A_SFM,A_LFM]) then
  293. begin
  294. case taicpu(hp).oper[1]^.typ of
  295. top_const:
  296. s:=s+sep+tostr(taicpu(hp).oper[1]^.val);
  297. else
  298. internalerror(200311292);
  299. end;
  300. end
  301. else
  302. s:=s+sep+getopstr(taicpu(hp).oper[i]^);
  303. sep:=',';
  304. end;
  305. end;
  306. owner.AsmWriteLn(s);
  307. end;
  308. const
  309. as_arm_gas_info : tasminfo =
  310. (
  311. id : as_gas;
  312. idtxt : 'AS';
  313. asmbin : 'as';
  314. asmcmd : '-o $OBJ $EXTRAOPT $ASM';
  315. supported_targets : [system_arm_linux,system_arm_wince,system_arm_gba,system_arm_palmos,system_arm_nds,
  316. system_arm_embedded,system_arm_symbian,system_arm_android];
  317. flags : [af_needar,af_smartlink_sections];
  318. labelprefix : '.L';
  319. comment : '# ';
  320. dollarsign: '$';
  321. );
  322. as_arm_gas_darwin_info : tasminfo =
  323. (
  324. id : as_darwin;
  325. idtxt : 'AS-Darwin';
  326. asmbin : 'as';
  327. asmcmd : '-o $OBJ $EXTRAOPT $ASM -arch $ARCH';
  328. supported_targets : [system_arm_darwin];
  329. flags : [af_needar,af_smartlink_sections,af_supports_dwarf,af_stabs_use_function_absolute_addresses];
  330. labelprefix : 'L';
  331. comment : '# ';
  332. dollarsign: '$';
  333. );
  334. begin
  335. RegisterAssembler(as_arm_gas_info,TARMGNUAssembler);
  336. RegisterAssembler(as_arm_gas_darwin_info,TArmAppleGNUAssembler);
  337. end.