cg386mat.pas 41 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Generate i386 assembler for math nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cg386mat;
  19. interface
  20. uses
  21. tree;
  22. procedure secondmoddiv(var p : ptree);
  23. procedure secondshlshr(var p : ptree);
  24. procedure secondunaryminus(var p : ptree);
  25. procedure secondnot(var p : ptree);
  26. implementation
  27. uses
  28. globtype,systems,
  29. cobjects,verbose,globals,
  30. symconst,symtable,aasm,types,
  31. hcodegen,temp_gen,pass_2,
  32. cpubase,cpuasm,
  33. {$ifdef dummy}
  34. end { this overcomes the annoying highlighting problem in my TP IDE,
  35. the IDE assumes i386asm start a asm block (FK) }
  36. {$endif}
  37. cgai386,tgeni386;
  38. {*****************************************************************************
  39. SecondModDiv
  40. *****************************************************************************}
  41. procedure secondmoddiv(var p : ptree);
  42. var
  43. hreg1 : tregister;
  44. {$ifdef newOptimizations}
  45. hreg2 : tregister;
  46. {$endif}
  47. shrdiv, andmod, pushed,popeax,popedx : boolean;
  48. power : longint;
  49. hl : pasmlabel;
  50. hloc : tlocation;
  51. pushedreg : tpushed;
  52. typename,opname : string[6];
  53. begin
  54. shrdiv := false;
  55. andmod := false;
  56. secondpass(p^.left);
  57. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  58. secondpass(p^.right);
  59. if pushed then
  60. restore(p^.left,is_64bitint(p^.left^.resulttype));
  61. set_location(p^.location,p^.left^.location);
  62. if is_64bitint(p^.resulttype) then
  63. begin
  64. { save p^.lcoation, because we change it now }
  65. set_location(hloc,p^.location);
  66. release_qword_loc(p^.location);
  67. release_qword_loc(p^.right^.location);
  68. p^.location.registerlow:=getexplicitregister32(R_EAX);
  69. p^.location.registerhigh:=getexplicitregister32(R_EDX);
  70. pushusedregisters(pushedreg,$ff
  71. and not($80 shr byte(p^.location.registerlow))
  72. and not($80 shr byte(p^.location.registerhigh)));
  73. { the left operand is in hloc, because the
  74. location of left is p^.location but p^.location
  75. is already destroyed
  76. }
  77. emit_pushq_loc(hloc);
  78. clear_location(hloc);
  79. emit_pushq_loc(p^.right^.location);
  80. if porddef(p^.resulttype)^.typ=u64bit then
  81. typename:='QWORD'
  82. else
  83. typename:='INT64';
  84. if p^.treetype=divn then
  85. opname:='DIV_'
  86. else
  87. opname:='MOD_';
  88. emitcall('FPC_'+opname+typename);
  89. emit_reg_reg(A_MOV,S_L,R_EAX,p^.location.registerlow);
  90. emit_reg_reg(A_MOV,S_L,R_EDX,p^.location.registerhigh);
  91. popusedregisters(pushedreg);
  92. p^.location.loc:=LOC_REGISTER;
  93. end
  94. else
  95. begin
  96. { put numerator in register }
  97. if p^.left^.location.loc<>LOC_REGISTER then
  98. begin
  99. if p^.left^.location.loc=LOC_CREGISTER then
  100. begin
  101. hreg1:=getregister32;
  102. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,hreg1);
  103. end
  104. else
  105. begin
  106. del_reference(p^.left^.location.reference);
  107. hreg1:=getregister32;
  108. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  109. hreg1);
  110. end;
  111. clear_location(p^.left^.location);
  112. p^.left^.location.loc:=LOC_REGISTER;
  113. p^.left^.location.register:=hreg1;
  114. end
  115. else hreg1:=p^.left^.location.register;
  116. if (p^.treetype=divn) and (p^.right^.treetype=ordconstn) and
  117. ispowerof2(p^.right^.value,power) then
  118. Begin
  119. shrdiv := true;
  120. {for signed numbers, the numerator must be adjusted before the
  121. shift instruction, but not wih unsigned numbers! Otherwise,
  122. "Cardinal($ffffffff) div 16" overflows! (JM)}
  123. If is_signed(p^.left^.resulttype) Then
  124. Begin
  125. {$ifdef newOptimizations}
  126. If (aktOptProcessor <> class386) and
  127. not(CS_LittleSize in aktglobalswitches) then
  128. { use a sequence without jumps, saw this in
  129. comp.compilers (JM) }
  130. begin
  131. { no jumps, but more operations }
  132. if (hreg1 = R_EAX) and
  133. (R_EDX in unused) then
  134. begin
  135. hreg2 := getexplicitregister32(R_EDX);
  136. emit_none(A_CDQ,S_NO);
  137. end
  138. else
  139. begin
  140. {$ifndef noAllocEdi}
  141. getexplicitregister32(R_EDI);
  142. {$endif noAllocEdi}
  143. hreg2 := R_EDI;
  144. emit_reg_reg(A_MOV,S_L,hreg1,R_EDI);
  145. { if the left value is signed, R_EDI := $ffffffff,
  146. otherwise 0 }
  147. emit_const_reg(A_SAR,S_L,31,R_EDI);
  148. { if signed, R_EDI := right value-1, otherwise 0 }
  149. end;
  150. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg2);
  151. { add to the left value }
  152. emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
  153. { release EDX if we used it }
  154. {$ifndef noAllocEdi}
  155. { also releas EDI }
  156. ungetregister32(hreg2);
  157. {$else noAllocEdi}
  158. if (hreg2 = R_EDX) then
  159. ungetregister32(hreg2);
  160. {$endif noAllocEdi}
  161. { do the shift }
  162. emit_const_reg(A_SAR,S_L,power,hreg1);
  163. end
  164. else
  165. {$endif newOptimizations}
  166. begin
  167. { a jump, but less operations }
  168. emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
  169. getlabel(hl);
  170. emitjmp(C_NS,hl);
  171. if power=1 then
  172. emit_reg(A_INC,S_L,hreg1)
  173. else
  174. emit_const_reg(A_ADD,S_L,p^.right^.value-1,hreg1);
  175. emitlab(hl);
  176. emit_const_reg(A_SAR,S_L,power,hreg1);
  177. end
  178. End
  179. Else
  180. emit_const_reg(A_SHR,S_L,power,hreg1);
  181. End
  182. else
  183. if (p^.treetype=modn) and (p^.right^.treetype=ordconstn) and
  184. ispowerof2(p^.right^.value,power) and Not(is_signed(p^.left^.resulttype)) Then
  185. {is there a similar trick for MOD'ing signed numbers? (JM)}
  186. Begin
  187. emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg1);
  188. andmod := true;
  189. End
  190. else
  191. begin
  192. { bring denominator to EDI }
  193. { EDI is always free, it's }
  194. { only used for temporary }
  195. { purposes }
  196. {$ifndef noAllocEdi}
  197. getexplicitregister32(R_EDI);
  198. {$endif noAllocEdi}
  199. if (p^.right^.location.loc<>LOC_REGISTER) and
  200. (p^.right^.location.loc<>LOC_CREGISTER) then
  201. begin
  202. del_reference(p^.right^.location.reference);
  203. p^.left^.location.loc:=LOC_REGISTER;
  204. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),R_EDI);
  205. end
  206. else
  207. begin
  208. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,R_EDI);
  209. ungetregister32(p^.right^.location.register);
  210. end;
  211. popedx:=false;
  212. popeax:=false;
  213. if hreg1=R_EDX then
  214. begin
  215. if not(R_EAX in unused) then
  216. begin
  217. emit_reg(A_PUSH,S_L,R_EAX);
  218. popeax:=true;
  219. end;
  220. emit_reg_reg(A_MOV,S_L,R_EDX,R_EAX);
  221. end
  222. else
  223. begin
  224. if not(R_EDX in unused) then
  225. begin
  226. emit_reg(A_PUSH,S_L,R_EDX);
  227. popedx:=true;
  228. end;
  229. if hreg1<>R_EAX then
  230. begin
  231. if not(R_EAX in unused) then
  232. begin
  233. emit_reg(A_PUSH,S_L,R_EAX);
  234. popeax:=true;
  235. end;
  236. emit_reg_reg(A_MOV,S_L,hreg1,R_EAX);
  237. end;
  238. end;
  239. { sign extension depends on the left type }
  240. if porddef(p^.left^.resulttype)^.typ=u32bit then
  241. emit_reg_reg(A_XOR,S_L,R_EDX,R_EDX)
  242. else
  243. emit_none(A_CDQ,S_NO);
  244. { division depends on the right type }
  245. if porddef(p^.right^.resulttype)^.typ=u32bit then
  246. emit_reg(A_DIV,S_L,R_EDI)
  247. else
  248. emit_reg(A_IDIV,S_L,R_EDI);
  249. {$ifndef noAllocEdi}
  250. ungetregister32(R_EDI);
  251. {$endif noAllocEdi}
  252. if p^.treetype=divn then
  253. begin
  254. { if result register is busy then copy }
  255. if popeax then
  256. begin
  257. if hreg1=R_EAX then
  258. internalerror(112);
  259. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1)
  260. end
  261. else
  262. if hreg1<>R_EAX then
  263. Begin
  264. ungetregister32(hreg1);
  265. hreg1 := getexplicitregister32(R_EAX);
  266. { I don't think it's possible that now hreg1 <> R_EAX
  267. since popeax is false, but for all certainty I do
  268. support that situation (JM)}
  269. if hreg1 <> R_EAX then
  270. emit_reg_reg(A_MOV,S_L,R_EAX,hreg1);
  271. end;
  272. end
  273. else
  274. {if we did the mod by an "and", the result is in hreg1 and
  275. EDX certainly hasn't been pushed (JM)}
  276. if not(andmod) Then
  277. if popedx then
  278. {the mod was done by an (i)div (so the result is now in
  279. edx), but edx was occupied prior to the division, so
  280. move the result into a safe place (JM)}
  281. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1)
  282. else
  283. Begin
  284. {Get rid of the unnecessary hreg1 if possible (same as with
  285. EAX in divn) (JM)}
  286. ungetregister32(hreg1);
  287. hreg1 := getexplicitregister32(R_EDX);
  288. if hreg1 <> R_EDX then
  289. emit_reg_reg(A_MOV,S_L,R_EDX,hreg1);;
  290. End;
  291. if popeax then
  292. emit_reg(A_POP,S_L,R_EAX);
  293. if popedx then
  294. emit_reg(A_POP,S_L,R_EDX);
  295. end;
  296. If not(andmod or shrdiv) then
  297. {andmod and shrdiv only use hreg1 (which is already in usedinproc,
  298. since it was acquired with getregister), the others also use both
  299. EAX and EDX (JM)}
  300. Begin
  301. usedinproc:=usedinproc or ($80 shr byte(R_EAX));
  302. usedinproc:=usedinproc or ($80 shr byte(R_EDX));
  303. End;
  304. clear_location(p^.location);
  305. p^.location.loc:=LOC_REGISTER;
  306. p^.location.register:=hreg1;
  307. end;
  308. end;
  309. {*****************************************************************************
  310. SecondShlShr
  311. *****************************************************************************}
  312. procedure secondshlshr(var p : ptree);
  313. var
  314. hregister1,hregister2,hregister3,
  315. hregisterhigh,hregisterlow : tregister;
  316. pushed,popecx : boolean;
  317. op : tasmop;
  318. l1,l2,l3 : pasmlabel;
  319. begin
  320. popecx:=false;
  321. secondpass(p^.left);
  322. pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
  323. secondpass(p^.right);
  324. if pushed then
  325. restore(p^.left,is_64bitint(p^.left^.resulttype));
  326. if is_64bitint(p^.left^.resulttype) then
  327. begin
  328. { load left operator in a register }
  329. if p^.left^.location.loc<>LOC_REGISTER then
  330. begin
  331. if p^.left^.location.loc=LOC_CREGISTER then
  332. begin
  333. hregisterlow:=getregister32;
  334. hregisterhigh:=getregister32;
  335. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,
  336. hregisterlow);
  337. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,
  338. hregisterlow);
  339. end
  340. else
  341. begin
  342. del_reference(p^.left^.location.reference);
  343. hregisterlow:=getregister32;
  344. hregisterhigh:=getregister32;
  345. emit_mov_ref_reg64(p^.left^.location.reference,
  346. hregisterlow,
  347. hregisterhigh);
  348. end;
  349. end
  350. else
  351. begin
  352. hregisterlow:=p^.left^.location.registerlow;
  353. hregisterhigh:=p^.left^.location.registerhigh;
  354. end;
  355. { shifting by a constant directly coded: }
  356. if (p^.right^.treetype=ordconstn) then
  357. begin
  358. { shrd/shl works only for values <=31 !! }
  359. if p^.right^.value>31 then
  360. begin
  361. if p^.treetype=shln then
  362. begin
  363. emit_reg_reg(A_XOR,S_L,hregisterhigh,
  364. hregisterhigh);
  365. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  366. hregisterlow);
  367. end
  368. else
  369. begin
  370. emit_reg_reg(A_XOR,S_L,hregisterlow,
  371. hregisterlow);
  372. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  373. hregisterhigh);
  374. end;
  375. p^.location.registerhigh:=hregisterlow;
  376. p^.location.registerlow:=hregisterhigh;
  377. end
  378. else
  379. begin
  380. if p^.treetype=shln then
  381. begin
  382. emit_const_reg_reg(A_SHLD,S_L,p^.right^.value and 31,
  383. hregisterlow,hregisterhigh);
  384. emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
  385. hregisterlow);
  386. end
  387. else
  388. begin
  389. emit_const_reg_reg(A_SHRD,S_L,p^.right^.value and 31,
  390. hregisterhigh,hregisterlow);
  391. emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
  392. hregisterhigh);
  393. end;
  394. p^.location.registerlow:=hregisterlow;
  395. p^.location.registerhigh:=hregisterhigh;
  396. end;
  397. p^.location.loc:=LOC_REGISTER;
  398. end
  399. else
  400. begin
  401. { load right operators in a register }
  402. if p^.right^.location.loc<>LOC_REGISTER then
  403. begin
  404. if p^.right^.location.loc=LOC_CREGISTER then
  405. begin
  406. hregister2:=getexplicitregister32(R_ECX);
  407. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  408. hregister2);
  409. end
  410. else
  411. begin
  412. del_reference(p^.right^.location.reference);
  413. hregister2:=getexplicitregister32(R_ECX);
  414. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  415. hregister2);
  416. end;
  417. end
  418. else
  419. hregister2:=p^.right^.location.register;
  420. { left operator is already in a register }
  421. { hence are both in a register }
  422. { is it in the case ECX ? }
  423. if (hregisterlow=R_ECX) then
  424. begin
  425. { then only swap }
  426. emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
  427. hregister3:=hregisterlow;
  428. hregisterlow:=hregister2;
  429. hregister2:=hregister3;
  430. end
  431. else if (hregisterhigh=R_ECX) then
  432. begin
  433. { then only swap }
  434. emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
  435. hregister3:=hregisterhigh;
  436. hregisterhigh:=hregister2;
  437. hregister2:=hregister3;
  438. end
  439. { if second operator not in ECX ? }
  440. else if (hregister2<>R_ECX) then
  441. begin
  442. { ECX occupied then push it }
  443. if not (R_ECX in unused) then
  444. begin
  445. popecx:=true;
  446. emit_reg(A_PUSH,S_L,R_ECX);
  447. end;
  448. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  449. end;
  450. ungetregister32(hregister2);
  451. { the damned shift instructions work only til a count of 32 }
  452. { so we've to do some tricks here }
  453. if p^.treetype=shln then
  454. begin
  455. getlabel(l1);
  456. getlabel(l2);
  457. getlabel(l3);
  458. emit_const_reg(A_CMP,S_L,64,R_ECX);
  459. emitjmp(C_L,l1);
  460. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  461. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  462. emitjmp(C_None,l3);
  463. emitlab(l1);
  464. emit_const_reg(A_CMP,S_L,32,R_ECX);
  465. emitjmp(C_L,l2);
  466. emit_const_reg(A_SUB,S_L,32,R_ECX);
  467. emit_reg_reg(A_SHL,S_L,R_CL,
  468. hregisterlow);
  469. emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
  470. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  471. emitjmp(C_None,l3);
  472. emitlab(l2);
  473. emit_reg_reg_reg(A_SHLD,S_L,R_CL,
  474. hregisterlow,hregisterhigh);
  475. emit_reg_reg(A_SHL,S_L,R_CL,
  476. hregisterlow);
  477. emitlab(l3);
  478. end
  479. else
  480. begin
  481. getlabel(l1);
  482. getlabel(l2);
  483. getlabel(l3);
  484. emit_const_reg(A_CMP,S_L,64,R_ECX);
  485. emitjmp(C_L,l1);
  486. emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
  487. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  488. emitjmp(C_None,l3);
  489. emitlab(l1);
  490. emit_const_reg(A_CMP,S_L,32,R_ECX);
  491. emitjmp(C_L,l2);
  492. emit_const_reg(A_SUB,S_L,32,R_ECX);
  493. emit_reg_reg(A_SHR,S_L,R_CL,
  494. hregisterhigh);
  495. emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
  496. emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
  497. emitjmp(C_None,l3);
  498. emitlab(l2);
  499. emit_reg_reg_reg(A_SHRD,S_L,R_CL,
  500. hregisterhigh,hregisterlow);
  501. emit_reg_reg(A_SHR,S_L,R_CL,
  502. hregisterhigh);
  503. emitlab(l3);
  504. end;
  505. { maybe put ECX back }
  506. if popecx then
  507. emit_reg(A_POP,S_L,R_ECX);
  508. p^.location.registerlow:=hregisterlow;
  509. p^.location.registerhigh:=hregisterhigh;
  510. end;
  511. end
  512. else
  513. begin
  514. { load left operators in a register }
  515. if p^.left^.location.loc<>LOC_REGISTER then
  516. begin
  517. if p^.left^.location.loc=LOC_CREGISTER then
  518. begin
  519. hregister1:=getregister32;
  520. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,
  521. hregister1);
  522. end
  523. else
  524. begin
  525. del_reference(p^.left^.location.reference);
  526. hregister1:=getregister32;
  527. emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
  528. hregister1);
  529. end;
  530. end
  531. else
  532. hregister1:=p^.left^.location.register;
  533. { determine operator }
  534. if p^.treetype=shln then
  535. op:=A_SHL
  536. else
  537. op:=A_SHR;
  538. { shifting by a constant directly coded: }
  539. if (p^.right^.treetype=ordconstn) then
  540. begin
  541. { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
  542. if p^.right^.value<=31 then
  543. }
  544. emit_const_reg(op,S_L,p^.right^.value and 31,
  545. hregister1);
  546. {
  547. else
  548. emit_reg_reg(A_XOR,S_L,hregister1,
  549. hregister1);
  550. }
  551. p^.location.loc:=LOC_REGISTER;
  552. p^.location.register:=hregister1;
  553. end
  554. else
  555. begin
  556. { load right operators in a register }
  557. if p^.right^.location.loc<>LOC_REGISTER then
  558. begin
  559. if p^.right^.location.loc=LOC_CREGISTER then
  560. begin
  561. hregister2:=getexplicitregister32(R_ECX);
  562. emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
  563. hregister2);
  564. end
  565. else
  566. begin
  567. del_reference(p^.right^.location.reference);
  568. hregister2:=getexplicitregister32(R_ECX);
  569. emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
  570. hregister2);
  571. end;
  572. end
  573. else
  574. hregister2:=p^.right^.location.register;
  575. { left operator is already in a register }
  576. { hence are both in a register }
  577. { is it in the case ECX ? }
  578. if (hregister1=R_ECX) then
  579. begin
  580. { then only swap }
  581. emit_reg_reg(A_XCHG,S_L,hregister1,hregister2);
  582. hregister3:=hregister1;
  583. hregister1:=hregister2;
  584. hregister2:=hregister3;
  585. end
  586. { if second operator not in ECX ? }
  587. else if (hregister2<>R_ECX) then
  588. begin
  589. { ECX occupied then push it }
  590. if not (R_ECX in unused) then
  591. begin
  592. popecx:=true;
  593. emit_reg(A_PUSH,S_L,R_ECX);
  594. end;
  595. emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
  596. end;
  597. ungetregister32(hregister2);
  598. { right operand is in ECX }
  599. emit_reg_reg(op,S_L,R_CL,hregister1);
  600. { maybe ECX back }
  601. if popecx then
  602. emit_reg(A_POP,S_L,R_ECX);
  603. p^.location.register:=hregister1;
  604. end;
  605. end;
  606. end;
  607. {*****************************************************************************
  608. SecondUnaryMinus
  609. *****************************************************************************}
  610. procedure secondunaryminus(var p : ptree);
  611. {$ifdef SUPPORT_MMX}
  612. procedure do_mmx_neg;
  613. var
  614. op : tasmop;
  615. begin
  616. p^.location.loc:=LOC_MMXREGISTER;
  617. if cs_mmx_saturation in aktlocalswitches then
  618. case mmx_type(p^.resulttype) of
  619. mmxs8bit:
  620. op:=A_PSUBSB;
  621. mmxu8bit:
  622. op:=A_PSUBUSB;
  623. mmxs16bit,mmxfixed16:
  624. op:=A_PSUBSW;
  625. mmxu16bit:
  626. op:=A_PSUBUSW;
  627. end
  628. else
  629. case mmx_type(p^.resulttype) of
  630. mmxs8bit,mmxu8bit:
  631. op:=A_PSUBB;
  632. mmxs16bit,mmxu16bit,mmxfixed16:
  633. op:=A_PSUBW;
  634. mmxs32bit,mmxu32bit:
  635. op:=A_PSUBD;
  636. end;
  637. emit_reg_reg(op,S_NO,p^.location.register,R_MM7);
  638. emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
  639. end;
  640. {$endif}
  641. begin
  642. if is_64bitint(p^.left^.resulttype) then
  643. begin
  644. secondpass(p^.left);
  645. clear_location(p^.location);
  646. p^.location.loc:=LOC_REGISTER;
  647. case p^.left^.location.loc of
  648. LOC_REGISTER :
  649. begin
  650. p^.location.registerlow:=p^.left^.location.registerlow;
  651. p^.location.registerhigh:=p^.left^.location.registerhigh;
  652. end;
  653. LOC_CREGISTER :
  654. begin
  655. p^.location.registerlow:=getregister32;
  656. p^.location.registerhigh:=getregister32;
  657. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  658. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  659. end;
  660. LOC_REFERENCE,LOC_MEM :
  661. begin
  662. del_reference(p^.left^.location.reference);
  663. p^.location.registerlow:=getregister32;
  664. p^.location.registerhigh:=getregister32;
  665. emit_mov_ref_reg64(p^.left^.location.reference,
  666. p^.location.registerlow,
  667. p^.location.registerhigh);
  668. end;
  669. end;
  670. {
  671. emit_reg(A_NEG,S_L,p^.location.registerlow);
  672. emit_const_reg(A_ADC,S_L,0,p^.location.registerhigh);
  673. emit_reg(A_NEG,S_L,p^.location.registerhigh);
  674. }
  675. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  676. emit_reg(A_NEG,S_L,p^.location.registerlow);
  677. emit_const_reg(A_SBB,S_L,-1,p^.location.registerhigh);
  678. end
  679. else
  680. begin
  681. secondpass(p^.left);
  682. p^.location.loc:=LOC_REGISTER;
  683. case p^.left^.location.loc of
  684. LOC_REGISTER:
  685. begin
  686. p^.location.register:=p^.left^.location.register;
  687. emit_reg(A_NEG,S_L,p^.location.register);
  688. end;
  689. LOC_CREGISTER:
  690. begin
  691. p^.location.register:=getregister32;
  692. emit_reg_reg(A_MOV,S_L,p^.location.register,
  693. p^.location.register);
  694. emit_reg(A_NEG,S_L,p^.location.register);
  695. end;
  696. {$ifdef SUPPORT_MMX}
  697. LOC_MMXREGISTER:
  698. begin
  699. set_location(p^.location,p^.left^.location);
  700. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  701. do_mmx_neg;
  702. end;
  703. LOC_CMMXREGISTER:
  704. begin
  705. p^.location.register:=getregistermmx;
  706. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  707. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,
  708. p^.location.register);
  709. do_mmx_neg;
  710. end;
  711. {$endif SUPPORT_MMX}
  712. LOC_REFERENCE,LOC_MEM:
  713. begin
  714. del_reference(p^.left^.location.reference);
  715. if (p^.left^.resulttype^.deftype=floatdef) and
  716. (pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
  717. begin
  718. p^.location.loc:=LOC_FPU;
  719. floatload(pfloatdef(p^.left^.resulttype)^.typ,
  720. p^.left^.location.reference);
  721. emit_none(A_FCHS,S_NO);
  722. end
  723. {$ifdef SUPPORT_MMX}
  724. else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  725. begin
  726. p^.location.register:=getregistermmx;
  727. emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
  728. emit_ref_reg(A_MOVQ,S_NO,
  729. newreference(p^.left^.location.reference),
  730. p^.location.register);
  731. do_mmx_neg;
  732. end
  733. {$endif SUPPORT_MMX}
  734. else
  735. begin
  736. p^.location.register:=getregister32;
  737. emit_ref_reg(A_MOV,S_L,
  738. newreference(p^.left^.location.reference),
  739. p^.location.register);
  740. emit_reg(A_NEG,S_L,p^.location.register);
  741. end;
  742. end;
  743. LOC_FPU:
  744. begin
  745. p^.location.loc:=LOC_FPU;
  746. emit_none(A_FCHS,S_NO);
  747. end;
  748. LOC_CFPUREGISTER:
  749. begin
  750. emit_reg(A_FLD,S_NO,
  751. correct_fpuregister(p^.left^.location.register,fpuvaroffset));
  752. inc(fpuvaroffset);
  753. p^.location.loc:=LOC_FPU;
  754. emit_none(A_FCHS,S_NO);
  755. end;
  756. end;
  757. end;
  758. { Here was a problem... }
  759. { Operand to be negated always }
  760. { seems to be converted to signed }
  761. { 32-bit before doing neg!! }
  762. { So this is useless... }
  763. { that's not true: -2^31 gives an overflow error if it is negaded (FK) }
  764. { emitoverflowcheck(p);}
  765. end;
  766. {*****************************************************************************
  767. SecondNot
  768. *****************************************************************************}
  769. procedure secondnot(var p : ptree);
  770. const
  771. flagsinvers : array[F_E..F_BE] of tresflags =
  772. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  773. F_A,F_AE,F_B,F_BE);
  774. var
  775. hl : pasmlabel;
  776. opsize : topsize;
  777. begin
  778. if is_boolean(p^.resulttype) then
  779. begin
  780. opsize:=def_opsize(p^.resulttype);
  781. { the second pass could change the location of left }
  782. { if it is a register variable, so we've to do }
  783. { this before the case statement }
  784. if p^.left^.location.loc in [LOC_REFERENCE,LOC_MEM,
  785. LOC_FLAGS,LOC_REGISTER,LOC_CREGISTER] then
  786. secondpass(p^.left);
  787. case p^.left^.location.loc of
  788. LOC_JUMP :
  789. begin
  790. hl:=truelabel;
  791. truelabel:=falselabel;
  792. falselabel:=hl;
  793. secondpass(p^.left);
  794. maketojumpbool(p^.left);
  795. hl:=truelabel;
  796. truelabel:=falselabel;
  797. falselabel:=hl;
  798. end;
  799. LOC_FLAGS :
  800. p^.location.resflags:=flagsinvers[p^.left^.location.resflags];
  801. LOC_REGISTER :
  802. begin
  803. {p^.location.register:=p^.left^.location.register;
  804. emit_const_reg(A_XOR,opsize,1,p^.location.register);}
  805. p^.location.loc:=LOC_FLAGS;
  806. p^.location.resflags:=F_E;
  807. emit_reg_reg(A_TEST,opsize,
  808. p^.left^.location.register,p^.left^.location.register);
  809. ungetregister(p^.left^.location.register);
  810. end;
  811. LOC_CREGISTER :
  812. begin
  813. clear_location(p^.location);
  814. p^.location.loc:=LOC_REGISTER;
  815. p^.location.register:=def_getreg(p^.resulttype);
  816. emit_reg_reg(A_MOV,opsize,p^.left^.location.register,p^.location.register);
  817. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  818. ungetregister(p^.location.register);
  819. p^.location.loc:=LOC_FLAGS;
  820. p^.location.resflags:=F_E;
  821. end;
  822. LOC_REFERENCE,
  823. LOC_MEM :
  824. begin
  825. clear_location(p^.location);
  826. p^.location.loc:=LOC_REGISTER;
  827. del_reference(p^.left^.location.reference);
  828. { this was placed before del_ref => internaalerror(10) }
  829. p^.location.register:=def_getreg(p^.resulttype);
  830. emit_ref_reg(A_MOV,opsize,
  831. newreference(p^.left^.location.reference),p^.location.register);
  832. emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
  833. ungetregister(p^.location.register);
  834. p^.location.loc:=LOC_FLAGS;
  835. p^.location.resflags:=F_E;
  836. end;
  837. end;
  838. end
  839. {$ifdef SUPPORT_MMX}
  840. else
  841. if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
  842. begin
  843. secondpass(p^.left);
  844. p^.location.loc:=LOC_MMXREGISTER;
  845. { prepare EDI }
  846. {$ifndef noAllocEdi}
  847. getexplicitregister32(R_EDI);
  848. {$endif noAllocEdi}
  849. emit_const_reg(A_MOV,S_L,$ffffffff,R_EDI);
  850. { load operand }
  851. case p^.left^.location.loc of
  852. LOC_MMXREGISTER:
  853. set_location(p^.location,p^.left^.location);
  854. LOC_CMMXREGISTER:
  855. begin
  856. p^.location.register:=getregistermmx;
  857. emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,p^.location.register);
  858. end;
  859. LOC_REFERENCE,LOC_MEM:
  860. begin
  861. del_reference(p^.left^.location.reference);
  862. p^.location.register:=getregistermmx;
  863. emit_ref_reg(A_MOVQ,S_NO,
  864. newreference(p^.left^.location.reference),p^.location.register);
  865. end;
  866. end;
  867. { load mask }
  868. emit_reg_reg(A_MOVD,S_NO,R_EDI,R_MM7);
  869. {$ifndef noAllocEdi}
  870. ungetregister32(R_EDI);
  871. {$endif noAllocEdi}
  872. { lower 32 bit }
  873. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  874. { shift mask }
  875. emit_const_reg(A_PSLLQ,S_NO,32,R_MM7);
  876. { higher 32 bit }
  877. emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
  878. end
  879. {$endif SUPPORT_MMX}
  880. else if is_64bitint(p^.left^.resulttype) then
  881. begin
  882. secondpass(p^.left);
  883. clear_location(p^.location);
  884. p^.location.loc:=LOC_REGISTER;
  885. case p^.left^.location.loc of
  886. LOC_REGISTER :
  887. begin
  888. p^.location.registerlow:=p^.left^.location.registerlow;
  889. p^.location.registerhigh:=p^.left^.location.registerhigh;
  890. emit_reg(A_NOT,S_L,p^.location.registerlow);
  891. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  892. end;
  893. LOC_CREGISTER :
  894. begin
  895. p^.location.registerlow:=getregister32;
  896. p^.location.registerhigh:=getregister32;
  897. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
  898. emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
  899. emit_reg(A_NOT,S_L,p^.location.registerlow);
  900. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  901. end;
  902. LOC_REFERENCE,LOC_MEM :
  903. begin
  904. del_reference(p^.left^.location.reference);
  905. p^.location.registerlow:=getregister32;
  906. p^.location.registerhigh:=getregister32;
  907. emit_mov_ref_reg64(p^.left^.location.reference,
  908. p^.location.registerlow,
  909. p^.location.registerhigh);
  910. emit_reg(A_NOT,S_L,p^.location.registerlow);
  911. emit_reg(A_NOT,S_L,p^.location.registerhigh);
  912. end;
  913. end;
  914. end
  915. else
  916. begin
  917. secondpass(p^.left);
  918. clear_location(p^.location);
  919. p^.location.loc:=LOC_REGISTER;
  920. case p^.left^.location.loc of
  921. LOC_REGISTER :
  922. begin
  923. p^.location.register:=p^.left^.location.register;
  924. emit_reg(A_NOT,S_L,p^.location.register);
  925. end;
  926. LOC_CREGISTER :
  927. begin
  928. p^.location.register:=getregister32;
  929. emit_reg_reg(A_MOV,S_L,p^.left^.location.register,p^.location.register);
  930. emit_reg(A_NOT,S_L,p^.location.register);
  931. end;
  932. LOC_REFERENCE,LOC_MEM :
  933. begin
  934. del_reference(p^.left^.location.reference);
  935. p^.location.register:=getregister32;
  936. emit_ref_reg(A_MOV,S_L,
  937. newreference(p^.left^.location.reference),p^.location.register);
  938. emit_reg(A_NOT,S_L,p^.location.register);
  939. end;
  940. end;
  941. end;
  942. end;
  943. end.
  944. {
  945. $Log$
  946. Revision 1.2 2000-07-13 11:32:35 michael
  947. + removed logs
  948. }