daopt386.pas 81 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Jonas Maebe, member of the Freepascal
  4. development team
  5. This unit contains the data flow analyzer and several helper procedures
  6. and functions.
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. ****************************************************************************
  19. }
  20. {$ifDef TP}
  21. {$UnDef JumpAnal}
  22. {$Endif TP}
  23. Unit DAOpt386;
  24. {$ifdef newOptimizations}
  25. {$define foropt}
  26. {$define replacereg}
  27. {$define arithopt}
  28. {$define foldarithops}
  29. {$endif newOptimizations}
  30. Interface
  31. Uses
  32. GlobType,
  33. CObjects,Aasm,
  34. cpubase,cpuasm;
  35. Type
  36. TRegArray = Array[R_EAX..R_BL] of TRegister;
  37. TRegSet = Set of R_EAX..R_BL;
  38. TRegInfo = Record
  39. NewRegsEncountered, OldRegsEncountered: TRegSet;
  40. RegsLoadedForRef: TRegSet;
  41. New2OldReg: TRegArray;
  42. End;
  43. {possible actions on an operand: read, write or modify (= read & write)}
  44. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  45. {*********************** Procedures and Functions ************************}
  46. Procedure InsertLLItem(AsmL: PAasmOutput; prev, foll, new_one: PLinkedList_Item);
  47. Function Reg32(Reg: TRegister): TRegister;
  48. Function RefsEquivalent(Const R1, R2: TReference; Var RegInfo: TRegInfo; OpAct: TOpAction): Boolean;
  49. Function RefsEqual(Const R1, R2: TReference): Boolean;
  50. Function IsGP32Reg(Reg: TRegister): Boolean;
  51. Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
  52. function RegReadByInstruction(reg: TRegister; hp: pai): boolean;
  53. function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
  54. function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
  55. function RegInOp(Reg: TRegister; const o:toper): Boolean;
  56. Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
  57. Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
  58. Procedure SkipHead(var P: Pai);
  59. Procedure RemoveLastDeallocForFuncRes(asmL: PAasmOutput; p: pai);
  60. Function regLoadedWithNewValue(reg: tregister; canDependOnPrevValue: boolean;
  61. hp: pai): boolean;
  62. Procedure UpdateUsedRegs(Var UsedRegs: TRegSet; p: Pai);
  63. Procedure AllocRegBetween(AsmL: PAasmOutput; Reg: TRegister; p1, p2: Pai);
  64. Function RegsEquivalent(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo; OpAct: TopAction): Boolean;
  65. Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
  66. Function OpsEqual(const o1,o2:toper): Boolean;
  67. Function DFAPass1(AsmL: PAasmOutput; BlockStart: Pai): Pai;
  68. Function DFAPass2(
  69. {$ifdef statedebug}
  70. AsmL: PAasmOutPut;
  71. {$endif statedebug}
  72. BlockStart, BlockEnd: Pai): Boolean;
  73. Procedure ShutDownDFA;
  74. Function FindLabel(L: PasmLabel; Var hp: Pai): Boolean;
  75. {******************************* Constants *******************************}
  76. Const
  77. {Possible register content types}
  78. con_Unknown = 0;
  79. con_ref = 1;
  80. con_const = 2;
  81. {********************************* Types *********************************}
  82. type
  83. {the possible states of a flag}
  84. TFlagContents = (F_Unknown, F_NotSet, F_Set);
  85. TContent = Packed Record
  86. {start and end of block instructions that defines the
  87. content of this register.}
  88. StartMod: pai;
  89. {starts at 0, gets increased everytime the register is written to}
  90. WState: Byte;
  91. {starts at 0, gets increased everytime the register is read from}
  92. RState: Byte;
  93. {how many instructions starting with StarMod does the block consist of}
  94. NrOfMods: Byte;
  95. {the type of the content of the register: unknown, memory, constant}
  96. Typ: Byte;
  97. End;
  98. {Contents of the integer registers}
  99. TRegContent = Array[R_EAX..R_EDI] Of TContent;
  100. {contents of the FPU registers}
  101. TRegFPUContent = Array[R_ST..R_ST7] Of TContent;
  102. {$ifdef tempOpts}
  103. { linked list which allows searching/deleting based on value, no extra frills}
  104. PSearchLinkedListItem = ^TSearchLinkedListItem;
  105. TSearchLinkedListItem = object(TLinkedList_Item)
  106. constructor init;
  107. function equals(p: PSearchLinkedListItem): boolean; virtual;
  108. end;
  109. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  110. TSearchDoubleIntItem = object(TLinkedList_Item)
  111. constructor init(_int1,_int2: longint);
  112. function equals(p: PSearchLinkedListItem): boolean; virtual;
  113. private
  114. int1, int2: longint;
  115. end;
  116. PSearchLinkedList = ^TSearchLinkedList;
  117. TSearchLinkedList = object(TLinkedList)
  118. function searchByValue(p: PSearchLinkedListItem): boolean;
  119. procedure removeByValue(p: PSearchLinkedListItem);
  120. end;
  121. {$endif tempOpts}
  122. {information record with the contents of every register. Every Pai object
  123. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  124. TPaiProp = Record
  125. Regs: TRegContent;
  126. { FPURegs: TRegFPUContent;} {currently not yet used}
  127. { allocated Registers }
  128. UsedRegs: TRegSet;
  129. { status of the direction flag }
  130. DirFlag: TFlagContents;
  131. {$ifdef tempOpts}
  132. { currently used temps }
  133. tempAllocs: PSearchLinkedList;
  134. {$endif tempOpts}
  135. { can this instruction be removed? }
  136. CanBeRemoved: Boolean;
  137. End;
  138. PPaiProp = ^TPaiProp;
  139. {$IfNDef TP}
  140. TPaiPropBlock = Array[1..250000] Of TPaiProp;
  141. PPaiPropBlock = ^TPaiPropBlock;
  142. {$EndIf TP}
  143. TInstrSinceLastMod = Array[R_EAX..R_EDI] Of Byte;
  144. TLabelTableItem = Record
  145. PaiObj: Pai;
  146. {$IfDef JumpAnal}
  147. InstrNr: Longint;
  148. RefsFound: Word;
  149. JmpsProcessed: Word
  150. {$EndIf JumpAnal}
  151. End;
  152. {$IfDef tp}
  153. TLabelTable = Array[0..10000] Of TLabelTableItem;
  154. {$Else tp}
  155. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  156. {$Endif tp}
  157. PLabelTable = ^TLabelTable;
  158. {******************************* Variables *******************************}
  159. Var
  160. {the amount of PaiObjects in the current assembler list}
  161. NrOfPaiObjs: Longint;
  162. {$IfNDef TP}
  163. {Array which holds all TPaiProps}
  164. PaiPropBlock: PPaiPropBlock;
  165. {$EndIf TP}
  166. LoLab, HiLab, LabDif: Longint;
  167. LTable: PLabelTable;
  168. {*********************** End of Interface section ************************}
  169. Implementation
  170. Uses
  171. globals, systems, strings, verbose, hcodegen, symconst, tgeni386;
  172. Type
  173. TRefCompare = function(const r1, r2: TReference): Boolean;
  174. Var
  175. {How many instructions are between the current instruction and the last one
  176. that modified the register}
  177. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  178. {$ifdef tempOpts}
  179. constructor TSearchLinkedListItem.init;
  180. begin
  181. end;
  182. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  183. begin
  184. equals := false;
  185. end;
  186. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  187. begin
  188. int1 := _int1;
  189. int2 := _int2;
  190. end;
  191. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  192. begin
  193. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  194. (TSearchDoubleIntItem(p).int2 = int2);
  195. end;
  196. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  197. var temp: PSearchLinkedListItem;
  198. begin
  199. temp := first;
  200. while (temp <> last^.next) and
  201. not(temp^.equals(p)) do
  202. temp := temp^.next;
  203. searchByValue := temp <> last^.next;
  204. end;
  205. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  206. begin
  207. temp := first;
  208. while (temp <> last^.next) and
  209. not(temp^.equals(p)) do
  210. temp := temp^.next;
  211. if temp <> last^.next then
  212. begin
  213. remove(temp);
  214. dispose(temp,done);
  215. end;
  216. end;
  217. Procedure updateTempAllocs(Var UsedRegs: TRegSet; p: Pai);
  218. {updates UsedRegs with the RegAlloc Information coming after P}
  219. Begin
  220. Repeat
  221. While Assigned(p) And
  222. ((p^.typ in (SkipInstr - [ait_RegAlloc])) or
  223. ((p^.typ = ait_label) And
  224. Not(Pai_Label(p)^.l^.is_used))) Do
  225. p := Pai(p^.next);
  226. While Assigned(p) And
  227. (p^.typ=ait_RegAlloc) Do
  228. Begin
  229. if pairegalloc(p)^.allocation then
  230. UsedRegs := UsedRegs + [PaiRegAlloc(p)^.Reg]
  231. else
  232. UsedRegs := UsedRegs - [PaiRegAlloc(p)^.Reg];
  233. p := pai(p^.next);
  234. End;
  235. Until Not(Assigned(p)) Or
  236. (Not(p^.typ in SkipInstr) And
  237. Not((p^.typ = ait_label) And
  238. Not(Pai_Label(p)^.l^.is_used)));
  239. End;
  240. {$endif tempOpts}
  241. {************************ Create the Label table ************************}
  242. Function FindLoHiLabels(Var LowLabel, HighLabel, LabelDif: Longint; BlockStart: Pai): Pai;
  243. {Walks through the paasmlist to find the lowest and highest label number}
  244. Var LabelFound: Boolean;
  245. P, lastP: Pai;
  246. Begin
  247. LabelFound := False;
  248. LowLabel := MaxLongint;
  249. HighLabel := 0;
  250. P := BlockStart;
  251. lastP := p;
  252. While Assigned(P) Do
  253. Begin
  254. If (Pai(p)^.typ = ait_label) Then
  255. If (Pai_Label(p)^.l^.is_used)
  256. Then
  257. Begin
  258. LabelFound := True;
  259. If (Pai_Label(p)^.l^.labelnr < LowLabel) Then
  260. LowLabel := Pai_Label(p)^.l^.labelnr;
  261. If (Pai_Label(p)^.l^.labelnr > HighLabel) Then
  262. HighLabel := Pai_Label(p)^.l^.labelnr;
  263. End;
  264. lastP := p;
  265. GetNextInstruction(p, p);
  266. End;
  267. if (lastP^.typ = ait_marker) and
  268. (pai_marker(lastP)^.kind = asmBlockStart) then
  269. FindLoHiLabels := lastP
  270. else FindLoHiLabels := nil;
  271. If LabelFound
  272. Then LabelDif := HighLabel+1-LowLabel
  273. Else LabelDif := 0;
  274. End;
  275. Function FindRegAlloc(Reg: TRegister; StartPai: Pai; alloc: boolean): Boolean;
  276. { Returns true if a ait_alloc object for Reg is found in the block of Pai's }
  277. { starting with StartPai and ending with the next "real" instruction }
  278. Begin
  279. FindRegAlloc := false;
  280. Repeat
  281. While Assigned(StartPai) And
  282. ((StartPai^.typ in (SkipInstr - [ait_regAlloc])) Or
  283. ((StartPai^.typ = ait_label) and
  284. Not(Pai_Label(StartPai)^.l^.Is_Used))) Do
  285. StartPai := Pai(StartPai^.Next);
  286. If Assigned(StartPai) And
  287. (StartPai^.typ = ait_regAlloc) and (PairegAlloc(StartPai)^.allocation = alloc) Then
  288. Begin
  289. if PairegAlloc(StartPai)^.Reg = Reg then
  290. begin
  291. FindRegAlloc:=true;
  292. break;
  293. end;
  294. StartPai := Pai(StartPai^.Next);
  295. End
  296. else
  297. break;
  298. Until false;
  299. End;
  300. Procedure RemoveLastDeallocForFuncRes(asmL: PAasmOutput; p: pai);
  301. Procedure DoRemoveLastDeallocForFuncRes(asmL: PAasmOutput; reg: TRegister);
  302. var
  303. hp2: pai;
  304. begin
  305. hp2 := p;
  306. repeat
  307. hp2 := pai(hp2^.previous);
  308. if assigned(hp2) and
  309. (hp2^.typ = ait_regalloc) and
  310. not(pairegalloc(hp2)^.allocation) and
  311. (pairegalloc(hp2)^.reg = reg) then
  312. begin
  313. asml^.remove(hp2);
  314. dispose(hp2,done);
  315. break;
  316. end;
  317. until not(assigned(hp2)) or
  318. regInInstruction(reg,hp2);
  319. end;
  320. begin
  321. if assigned(procinfo^.returntype.def) then
  322. case procinfo^.returntype.def^.deftype of
  323. arraydef,recorddef,pointerdef,
  324. stringdef,enumdef,procdef,objectdef,errordef,
  325. filedef,setdef,procvardef,
  326. classrefdef,forwarddef:
  327. DoRemoveLastDeallocForFuncRes(asmL,R_EAX);
  328. orddef:
  329. if procinfo^.returntype.def^.size <> 0 then
  330. begin
  331. DoRemoveLastDeallocForFuncRes(asmL,R_EAX);
  332. { for int64/qword }
  333. if procinfo^.returntype.def^.size = 8 then
  334. DoRemoveLastDeallocForFuncRes(asmL,R_EDX);
  335. end;
  336. end;
  337. end;
  338. procedure getNoDeallocRegs(var regs: TRegSet);
  339. var regCounter: TRegister;
  340. begin
  341. regs := [];
  342. if assigned(procinfo^.returntype.def) then
  343. case procinfo^.returntype.def^.deftype of
  344. arraydef,recorddef,pointerdef,
  345. stringdef,enumdef,procdef,objectdef,errordef,
  346. filedef,setdef,procvardef,
  347. classrefdef,forwarddef:
  348. regs := [R_EAX];
  349. orddef:
  350. if procinfo^.returntype.def^.size <> 0 then
  351. begin
  352. regs := [R_EAX];
  353. { for int64/qword }
  354. if procinfo^.returntype.def^.size = 8 then
  355. regs := regs + [R_EDX];
  356. end;
  357. end;
  358. for regCounter := R_EAX to R_EBX do
  359. if not(regCounter in usableregs) then
  360. regs := regs + [regCounter];
  361. end;
  362. Procedure AddRegDeallocFor(asmL: paasmOutput; reg: TRegister; p: pai);
  363. var hp1: pai;
  364. funcResRegs: TRegset;
  365. funcResReg: boolean;
  366. begin
  367. if not(reg in usableregs) then
  368. exit;
  369. getNoDeallocRegs(funcResRegs);
  370. funcResRegs := funcResRegs - usableregs;
  371. funcResReg := reg in funcResRegs;
  372. hp1 := p;
  373. while not(funcResReg and
  374. (p^.typ = ait_instruction) and
  375. (paicpu(p)^.opcode = A_JMP) and
  376. (pasmlabel(paicpu(p)^.oper[0].sym) = aktexit2label)) and
  377. getLastInstruction(p, p) And
  378. not(regInInstruction(reg, p)) Do
  379. hp1 := p;
  380. { don't insert a dealloc for registers which contain the function result }
  381. { if they are followed by a jump to the exit label (for exit(...)) }
  382. if not(funcResReg) or
  383. not((hp1^.typ = ait_instruction) and
  384. (paicpu(hp1)^.opcode = A_JMP) and
  385. (pasmlabel(paicpu(hp1)^.oper[0].sym) = aktexit2label)) then
  386. begin
  387. p := new(paiRegAlloc, deAlloc(reg));
  388. insertLLItem(AsmL, hp1^.previous, hp1, p);
  389. end;
  390. end;
  391. Procedure BuildLabelTableAndFixRegAlloc(asmL: PAasmOutput; Var LabelTable: PLabelTable; LowLabel: Longint;
  392. Var LabelDif: Longint; BlockStart, BlockEnd: Pai);
  393. {Builds a table with the locations of the labels in the paasmoutput.
  394. Also fixes some RegDeallocs like "# %eax released; push (%eax)"}
  395. Var p, hp1, hp2, lastP: Pai;
  396. regCounter: TRegister;
  397. UsedRegs, noDeallocRegs: TRegSet;
  398. Begin
  399. UsedRegs := [];
  400. If (LabelDif <> 0) Then
  401. Begin
  402. {$IfDef TP}
  403. If (MaxAvail >= LabelDif*SizeOf(Pai))
  404. Then
  405. Begin
  406. {$EndIf TP}
  407. GetMem(LabelTable, LabelDif*SizeOf(TLabelTableItem));
  408. FillChar(LabelTable^, LabelDif*SizeOf(TLabelTableItem), 0);
  409. {$IfDef TP}
  410. End
  411. Else LabelDif := 0;
  412. {$EndIf TP}
  413. End;
  414. p := BlockStart;
  415. lastP := p;
  416. While (P <> BlockEnd) Do
  417. Begin
  418. Case p^.typ Of
  419. ait_Label:
  420. If Pai_Label(p)^.l^.is_used Then
  421. LabelTable^[Pai_Label(p)^.l^.labelnr-LowLabel].PaiObj := p;
  422. ait_regAlloc:
  423. { ESI and EDI are (de)allocated manually, don't mess with them }
  424. if not(paiRegAlloc(p)^.Reg in [R_EDI,R_ESI]) then
  425. begin
  426. if PairegAlloc(p)^.Allocation then
  427. Begin
  428. If Not(paiRegAlloc(p)^.Reg in UsedRegs) Then
  429. UsedRegs := UsedRegs + [paiRegAlloc(p)^.Reg]
  430. Else
  431. addRegDeallocFor(asmL, paiRegAlloc(p)^.reg, p);
  432. End
  433. else
  434. begin
  435. UsedRegs := UsedRegs - [paiRegAlloc(p)^.Reg];
  436. hp1 := p;
  437. hp2 := nil;
  438. While Not(FindRegAlloc(paiRegAlloc(p)^.Reg, Pai(hp1^.Next),true)) And
  439. GetNextInstruction(hp1, hp1) And
  440. RegInInstruction(paiRegAlloc(p)^.Reg, hp1) Do
  441. hp2 := hp1;
  442. If hp2 <> nil Then
  443. Begin
  444. hp1 := Pai(p^.previous);
  445. AsmL^.Remove(p);
  446. InsertLLItem(AsmL, hp2, Pai(hp2^.Next), p);
  447. p := hp1;
  448. end;
  449. end;
  450. end;
  451. end;
  452. repeat
  453. lastP := p;
  454. P := Pai(P^.Next);
  455. until not(Assigned(p)) or
  456. not(p^.typ in (SkipInstr - [ait_regalloc]));
  457. End;
  458. { don't add deallocation for function result variable or for regvars}
  459. getNoDeallocRegs(noDeallocRegs);
  460. usedRegs := usedRegs - noDeallocRegs;
  461. for regCounter := R_EAX to R_EDI do
  462. if regCounter in usedRegs then
  463. addRegDeallocFor(asmL,regCounter,lastP);
  464. End;
  465. {************************ Search the Label table ************************}
  466. Function FindLabel(L: PasmLabel; Var hp: Pai): Boolean;
  467. {searches for the specified label starting from hp as long as the
  468. encountered instructions are labels, to be able to optimize constructs like
  469. jne l2 jmp l2
  470. jmp l3 and l1:
  471. l1: l2:
  472. l2:}
  473. Var TempP: Pai;
  474. Begin
  475. TempP := hp;
  476. While Assigned(TempP) and
  477. (TempP^.typ In SkipInstr + [ait_label,ait_align]) Do
  478. If (TempP^.typ <> ait_Label) Or
  479. (pai_label(TempP)^.l <> L)
  480. Then GetNextInstruction(TempP, TempP)
  481. Else
  482. Begin
  483. hp := TempP;
  484. FindLabel := True;
  485. exit
  486. End;
  487. FindLabel := False;
  488. End;
  489. {************************ Some general functions ************************}
  490. Function TCh2Reg(Ch: TInsChange): TRegister;
  491. {converts a TChange variable to a TRegister}
  492. Begin
  493. If (Ch <= Ch_REDI) Then
  494. TCh2Reg := TRegister(Byte(Ch))
  495. Else
  496. If (Ch <= Ch_WEDI) Then
  497. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_REDI))
  498. Else
  499. If (Ch <= Ch_RWEDI) Then
  500. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_WEDI))
  501. Else
  502. If (Ch <= Ch_MEDI) Then
  503. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_RWEDI))
  504. Else InternalError($db)
  505. End;
  506. Function Reg32(Reg: TRegister): TRegister;
  507. {Returns the 32 bit component of Reg if it exists, otherwise Reg is returned}
  508. Begin
  509. Reg32 := Reg;
  510. If (Reg >= R_AX)
  511. Then
  512. If (Reg <= R_DI)
  513. Then Reg32 := Reg16ToReg32(Reg)
  514. Else
  515. If (Reg <= R_BL)
  516. Then Reg32 := Reg8toReg32(Reg);
  517. End;
  518. { inserts new_one between prev and foll }
  519. Procedure InsertLLItem(AsmL: PAasmOutput; prev, foll, new_one: PLinkedList_Item);
  520. Begin
  521. If Assigned(prev) Then
  522. If Assigned(foll) Then
  523. Begin
  524. If Assigned(new_one) Then
  525. Begin
  526. new_one^.previous := prev;
  527. new_one^.next := foll;
  528. prev^.next := new_one;
  529. foll^.previous := new_one;
  530. Pai(new_one)^.fileinfo := Pai(foll)^.fileinfo;
  531. End;
  532. End
  533. Else AsmL^.Concat(new_one)
  534. Else If Assigned(Foll) Then AsmL^.Insert(new_one)
  535. End;
  536. {********************* Compare parts of Pai objects *********************}
  537. Function RegsSameSize(Reg1, Reg2: TRegister): Boolean;
  538. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  539. 8bit, 16bit or 32bit)}
  540. Begin
  541. If (Reg1 <= R_EDI)
  542. Then RegsSameSize := (Reg2 <= R_EDI)
  543. Else
  544. If (Reg1 <= R_DI)
  545. Then RegsSameSize := (Reg2 in [R_AX..R_DI])
  546. Else
  547. If (Reg1 <= R_BL)
  548. Then RegsSameSize := (Reg2 in [R_AL..R_BL])
  549. Else RegsSameSize := False
  550. End;
  551. Procedure AddReg2RegInfo(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo);
  552. {updates the ???RegsEncountered and ???2???Reg fields of RegInfo. Assumes that
  553. OldReg and NewReg have the same size (has to be chcked in advance with
  554. RegsSameSize) and that neither equals R_NO}
  555. Begin
  556. With RegInfo Do
  557. Begin
  558. NewRegsEncountered := NewRegsEncountered + [NewReg];
  559. OldRegsEncountered := OldRegsEncountered + [OldReg];
  560. New2OldReg[NewReg] := OldReg;
  561. Case OldReg Of
  562. R_EAX..R_EDI:
  563. Begin
  564. NewRegsEncountered := NewRegsEncountered + [Reg32toReg16(NewReg)];
  565. OldRegsEncountered := OldRegsEncountered + [Reg32toReg16(OldReg)];
  566. New2OldReg[Reg32toReg16(NewReg)] := Reg32toReg16(OldReg);
  567. If (NewReg in [R_EAX..R_EBX]) And
  568. (OldReg in [R_EAX..R_EBX]) Then
  569. Begin
  570. NewRegsEncountered := NewRegsEncountered + [Reg32toReg8(NewReg)];
  571. OldRegsEncountered := OldRegsEncountered + [Reg32toReg8(OldReg)];
  572. New2OldReg[Reg32toReg8(NewReg)] := Reg32toReg8(OldReg);
  573. End;
  574. End;
  575. R_AX..R_DI:
  576. Begin
  577. NewRegsEncountered := NewRegsEncountered + [Reg16toReg32(NewReg)];
  578. OldRegsEncountered := OldRegsEncountered + [Reg16toReg32(OldReg)];
  579. New2OldReg[Reg16toReg32(NewReg)] := Reg16toReg32(OldReg);
  580. If (NewReg in [R_AX..R_BX]) And
  581. (OldReg in [R_AX..R_BX]) Then
  582. Begin
  583. NewRegsEncountered := NewRegsEncountered + [Reg16toReg8(NewReg)];
  584. OldRegsEncountered := OldRegsEncountered + [Reg16toReg8(OldReg)];
  585. New2OldReg[Reg16toReg8(NewReg)] := Reg16toReg8(OldReg);
  586. End;
  587. End;
  588. R_AL..R_BL:
  589. Begin
  590. NewRegsEncountered := NewRegsEncountered + [Reg8toReg32(NewReg)]
  591. + [Reg8toReg16(NewReg)];
  592. OldRegsEncountered := OldRegsEncountered + [Reg8toReg32(OldReg)]
  593. + [Reg8toReg16(OldReg)];
  594. New2OldReg[Reg8toReg32(NewReg)] := Reg8toReg32(OldReg);
  595. End;
  596. End;
  597. End;
  598. End;
  599. Procedure AddOp2RegInfo(const o:Toper; Var RegInfo: TRegInfo);
  600. Begin
  601. Case o.typ Of
  602. Top_Reg:
  603. If (o.reg <> R_NO) Then
  604. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  605. Top_Ref:
  606. Begin
  607. If o.ref^.base <> R_NO Then
  608. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  609. If o.ref^.index <> R_NO Then
  610. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  611. End;
  612. End;
  613. End;
  614. Function RegsEquivalent(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo; OPAct: TOpAction): Boolean;
  615. Begin
  616. If Not((OldReg = R_NO) Or (NewReg = R_NO)) Then
  617. If RegsSameSize(OldReg, NewReg) Then
  618. With RegInfo Do
  619. {here we always check for the 32 bit component, because it is possible that
  620. the 8 bit component has not been set, event though NewReg already has been
  621. processed. This happens if it has been compared with a register that doesn't
  622. have an 8 bit component (such as EDI). In that case the 8 bit component is
  623. still set to R_NO and the comparison in the Else-part will fail}
  624. If (Reg32(OldReg) in OldRegsEncountered) Then
  625. If (Reg32(NewReg) in NewRegsEncountered) Then
  626. RegsEquivalent := (OldReg = New2OldReg[NewReg])
  627. { If we haven't encountered the new register yet, but we have encountered the
  628. old one already, the new one can only be correct if it's being written to
  629. (and consequently the old one is also being written to), otherwise
  630. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  631. movl (%eax), %eax movl (%edx), %edx
  632. are considered equivalent}
  633. Else
  634. If (OpAct = OpAct_Write) Then
  635. Begin
  636. AddReg2RegInfo(OldReg, NewReg, RegInfo);
  637. RegsEquivalent := True
  638. End
  639. Else Regsequivalent := False
  640. Else
  641. If Not(Reg32(NewReg) in NewRegsEncountered) Then
  642. Begin
  643. AddReg2RegInfo(OldReg, NewReg, RegInfo);
  644. RegsEquivalent := True
  645. End
  646. Else RegsEquivalent := False
  647. Else RegsEquivalent := False
  648. Else RegsEquivalent := OldReg = NewReg
  649. End;
  650. Function RefsEquivalent(Const R1, R2: TReference; var RegInfo: TRegInfo; OpAct: TOpAction): Boolean;
  651. Begin
  652. If R1.is_immediate Then
  653. RefsEquivalent := R2.is_immediate and (R1.Offset = R2.Offset)
  654. Else
  655. RefsEquivalent := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  656. RegsEquivalent(R1.Base, R2.Base, RegInfo, OpAct) And
  657. RegsEquivalent(R1.Index, R2.Index, RegInfo, OpAct) And
  658. (R1.Segment = R2.Segment) And (R1.ScaleFactor = R2.ScaleFactor) And
  659. (R1.Symbol = R2.Symbol);
  660. End;
  661. Function RefsEqual(Const R1, R2: TReference): Boolean;
  662. Begin
  663. If R1.is_immediate Then
  664. RefsEqual := R2.is_immediate and (R1.Offset = R2.Offset)
  665. Else
  666. RefsEqual := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  667. (R1.Segment = R2.Segment) And (R1.Base = R2.Base) And
  668. (R1.Index = R2.Index) And (R1.ScaleFactor = R2.ScaleFactor) And
  669. (R1.Symbol=R2.Symbol);
  670. End;
  671. Function IsGP32Reg(Reg: TRegister): Boolean;
  672. {Checks if the register is a 32 bit general purpose register}
  673. Begin
  674. If (Reg >= R_EAX) and (Reg <= R_EBX)
  675. Then IsGP32Reg := True
  676. Else IsGP32reg := False
  677. End;
  678. Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
  679. Begin {checks whether Ref contains a reference to Reg}
  680. Reg := Reg32(Reg);
  681. RegInRef := (Ref.Base = Reg) Or (Ref.Index = Reg)
  682. End;
  683. function RegReadByInstruction(reg: TRegister; hp: pai): boolean;
  684. var p: paicpu;
  685. opCount: byte;
  686. begin
  687. RegReadByInstruction := false;
  688. reg := reg32(reg);
  689. p := paicpu(hp);
  690. if hp^.typ <> ait_instruction then
  691. exit;
  692. case p^.opcode of
  693. A_IMUL:
  694. case p^.ops of
  695. 1: regReadByInstruction := (reg = R_EAX) or reginOp(reg,p^.oper[0]);
  696. 2,3:
  697. regReadByInstruction := regInOp(reg,p^.oper[0]) or
  698. regInOp(reg,p^.oper[1]);
  699. end;
  700. A_IDIV,A_DIV,A_MUL:
  701. begin
  702. regReadByInstruction :=
  703. regInOp(reg,p^.oper[0]) or (reg = R_EAX);
  704. end;
  705. else
  706. begin
  707. for opCount := 0 to 2 do
  708. if (p^.oper[opCount].typ = top_ref) and
  709. RegInRef(reg,p^.oper[opCount].ref^) then
  710. begin
  711. RegReadByInstruction := true;
  712. exit
  713. end;
  714. for opCount := 1 to MaxCh do
  715. case InsProp[p^.opcode].Ch[opCount] of
  716. Ch_REAX..CH_REDI,CH_RWEAX..Ch_MEDI:
  717. if reg = TCh2Reg(InsProp[p^.opcode].Ch[opCount]) then
  718. begin
  719. RegReadByInstruction := true;
  720. exit
  721. end;
  722. Ch_RWOp1,Ch_ROp1{$ifdef arithopt},Ch_MOp1{$endif}:
  723. if (p^.oper[0].typ = top_reg) and
  724. (reg32(p^.oper[0].reg) = reg) then
  725. begin
  726. RegReadByInstruction := true;
  727. exit
  728. end;
  729. Ch_RWOp2,Ch_ROp2{$ifdef arithopt},Ch_MOp2{$endif}:
  730. if (p^.oper[1].typ = top_reg) and
  731. (reg32(p^.oper[1].reg) = reg) then
  732. begin
  733. RegReadByInstruction := true;
  734. exit
  735. end;
  736. Ch_RWOp3,Ch_ROp3{$ifdef arithopt},Ch_MOp3{$endif}:
  737. if (p^.oper[2].typ = top_reg) and
  738. (reg32(p^.oper[2].reg) = reg) then
  739. begin
  740. RegReadByInstruction := true;
  741. exit
  742. end;
  743. end;
  744. end;
  745. end;
  746. end;
  747. function regInInstruction(Reg: TRegister; p1: Pai): Boolean;
  748. { Checks if Reg is used by the instruction p1 }
  749. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  750. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  751. var p: paicpu;
  752. opCount: byte;
  753. begin
  754. reg := reg32(reg);
  755. regInInstruction := false;
  756. p := paicpu(p1);
  757. if p1^.typ <> ait_instruction then
  758. exit;
  759. case p^.opcode of
  760. A_IMUL:
  761. case p^.ops of
  762. 1: regInInstruction := (reg = R_EAX) or reginOp(reg,p^.oper[0]);
  763. 2,3:
  764. regInInstruction := regInOp(reg,p^.oper[0]) or
  765. regInOp(reg,p^.oper[1]) or regInOp(reg,p^.oper[2]);
  766. end;
  767. A_IDIV,A_DIV,A_MUL:
  768. regInInstruction :=
  769. regInOp(reg,p^.oper[0]) or
  770. (reg = R_EAX) or (reg = R_EDX)
  771. else
  772. begin
  773. for opCount := 1 to MaxCh do
  774. case InsProp[p^.opcode].Ch[opCount] of
  775. CH_REAX..CH_MEDI:
  776. if tch2reg(InsProp[p^.opcode].Ch[opCount]) = reg then
  777. begin
  778. regInInstruction := true;
  779. exit;
  780. end;
  781. Ch_ROp1..Ch_MOp1:
  782. if regInOp(reg,p^.oper[0]) then
  783. begin
  784. regInInstruction := true;
  785. exit
  786. end;
  787. Ch_ROp2..Ch_MOp2:
  788. if regInOp(reg,p^.oper[1]) then
  789. begin
  790. regInInstruction := true;
  791. exit
  792. end;
  793. Ch_ROp3..Ch_MOp3:
  794. if regInOp(reg,p^.oper[2]) then
  795. begin
  796. regInInstruction := true;
  797. exit
  798. end;
  799. end;
  800. end;
  801. end;
  802. end;
  803. Function RegInOp(Reg: TRegister; const o:toper): Boolean;
  804. Begin
  805. RegInOp := False;
  806. reg := reg32(reg);
  807. Case o.typ Of
  808. top_reg: RegInOp := Reg = reg32(o.reg);
  809. top_ref: RegInOp := (Reg = o.ref^.Base) Or
  810. (Reg = o.ref^.Index);
  811. End;
  812. End;
  813. Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
  814. Var InstrProp: TInsProp;
  815. TmpResult: Boolean;
  816. Cnt: Byte;
  817. Begin
  818. TmpResult := False;
  819. Reg := Reg32(Reg);
  820. If (p1^.typ = ait_instruction) Then
  821. Case paicpu(p1)^.opcode of
  822. A_IMUL:
  823. With paicpu(p1)^ Do
  824. TmpResult :=
  825. ((ops = 1) and (reg in [R_EAX,R_EDX])) or
  826. ((ops = 2) and (Reg32(oper[1].reg) = reg)) or
  827. ((ops = 3) and (Reg32(oper[2].reg) = reg));
  828. A_DIV, A_IDIV, A_MUL:
  829. With paicpu(p1)^ Do
  830. TmpResult :=
  831. (Reg = R_EAX) or
  832. (Reg = R_EDX);
  833. Else
  834. Begin
  835. Cnt := 1;
  836. InstrProp := InsProp[paicpu(p1)^.OpCode];
  837. While (Cnt <= MaxCh) And
  838. (InstrProp.Ch[Cnt] <> Ch_None) And
  839. Not(TmpResult) Do
  840. Begin
  841. Case InstrProp.Ch[Cnt] Of
  842. Ch_WEAX..Ch_MEDI:
  843. TmpResult := Reg = TCh2Reg(InstrProp.Ch[Cnt]);
  844. Ch_RWOp1,Ch_WOp1{$ifdef arithopt},Ch_Mop1{$endif arithopt}:
  845. TmpResult := (paicpu(p1)^.oper[0].typ = top_reg) and
  846. (Reg32(paicpu(p1)^.oper[0].reg) = reg);
  847. Ch_RWOp2,Ch_WOp2{$ifdef arithopt},Ch_Mop2{$endif arithopt}:
  848. TmpResult := (paicpu(p1)^.oper[1].typ = top_reg) and
  849. (Reg32(paicpu(p1)^.oper[1].reg) = reg);
  850. Ch_RWOp3,Ch_WOp3{$ifdef arithopt},Ch_Mop3{$endif arithopt}:
  851. TmpResult := (paicpu(p1)^.oper[2].typ = top_reg) and
  852. (Reg32(paicpu(p1)^.oper[2].reg) = reg);
  853. Ch_FPU: TmpResult := Reg in [R_ST..R_ST7,R_MM0..R_MM7];
  854. Ch_ALL: TmpResult := true;
  855. End;
  856. Inc(Cnt)
  857. End
  858. End
  859. End;
  860. RegModifiedByInstruction := TmpResult
  861. End;
  862. {********************* GetNext and GetLastInstruction *********************}
  863. Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
  864. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  865. { next pai object in Next. Returns false if there isn't any }
  866. Begin
  867. Repeat
  868. If (Current^.typ = ait_marker) And
  869. (Pai_Marker(Current)^.Kind = AsmBlockStart) Then
  870. Begin
  871. GetNextInstruction := False;
  872. Next := Nil;
  873. Exit
  874. End;
  875. Current := Pai(Current^.Next);
  876. While Assigned(Current) And
  877. ((Current^.typ In SkipInstr) or
  878. ((Current^.typ = ait_label) And
  879. Not(Pai_Label(Current)^.l^.is_used))) Do
  880. Current := Pai(Current^.Next);
  881. If Assigned(Current) And
  882. (Current^.typ = ait_Marker) And
  883. (Pai_Marker(Current)^.Kind = NoPropInfoStart) Then
  884. Begin
  885. While Assigned(Current) And
  886. ((Current^.typ <> ait_Marker) Or
  887. (Pai_Marker(Current)^.Kind <> NoPropInfoEnd)) Do
  888. Current := Pai(Current^.Next);
  889. End;
  890. Until Not(Assigned(Current)) Or
  891. (Current^.typ <> ait_Marker) Or
  892. (Pai_Marker(Current)^.Kind <> NoPropInfoEnd);
  893. Next := Current;
  894. If Assigned(Current) And
  895. Not((Current^.typ In SkipInstr) or
  896. ((Current^.typ = ait_label) And
  897. Not(Pai_Label(Current)^.l^.is_used)))
  898. Then
  899. GetNextInstruction :=
  900. not((current^.typ = ait_marker) and
  901. (pai_marker(current)^.kind = asmBlockStart))
  902. Else
  903. Begin
  904. GetNextInstruction := False;
  905. Next := nil;
  906. End;
  907. End;
  908. Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
  909. {skips the ait-types in SkipInstr puts the previous pai object in
  910. Last. Returns false if there isn't any}
  911. Begin
  912. Repeat
  913. Current := Pai(Current^.previous);
  914. While Assigned(Current) And
  915. (((Current^.typ = ait_Marker) And
  916. Not(Pai_Marker(Current)^.Kind in [AsmBlockEnd,NoPropInfoEnd])) or
  917. (Current^.typ In SkipInstr) or
  918. ((Current^.typ = ait_label) And
  919. Not(Pai_Label(Current)^.l^.is_used))) Do
  920. Current := Pai(Current^.previous);
  921. If Assigned(Current) And
  922. (Current^.typ = ait_Marker) And
  923. (Pai_Marker(Current)^.Kind = NoPropInfoEnd) Then
  924. Begin
  925. While Assigned(Current) And
  926. ((Current^.typ <> ait_Marker) Or
  927. (Pai_Marker(Current)^.Kind <> NoPropInfoStart)) Do
  928. Current := Pai(Current^.previous);
  929. End;
  930. Until Not(Assigned(Current)) Or
  931. (Current^.typ <> ait_Marker) Or
  932. (Pai_Marker(Current)^.Kind <> NoPropInfoStart);
  933. If Not(Assigned(Current)) or
  934. (Current^.typ In SkipInstr) or
  935. ((Current^.typ = ait_label) And
  936. Not(Pai_Label(Current)^.l^.is_used)) or
  937. ((Current^.typ = ait_Marker) And
  938. (Pai_Marker(Current)^.Kind = AsmBlockEnd))
  939. Then
  940. Begin
  941. Last := nil;
  942. GetLastInstruction := False
  943. End
  944. Else
  945. Begin
  946. Last := Current;
  947. GetLastInstruction := True;
  948. End;
  949. End;
  950. Procedure SkipHead(var P: Pai);
  951. Var OldP: Pai;
  952. Begin
  953. Repeat
  954. OldP := P;
  955. If (P^.typ in SkipInstr) Or
  956. ((P^.typ = ait_marker) And
  957. (Pai_Marker(P)^.Kind = AsmBlockEnd)) Then
  958. GetNextInstruction(P, P)
  959. Else If ((P^.Typ = Ait_Marker) And
  960. (Pai_Marker(P)^.Kind = NoPropInfoStart)) Then
  961. {a marker of the NoPropInfoStart can't be the first instruction of a
  962. paasmoutput list}
  963. GetNextInstruction(Pai(P^.Previous),P);
  964. { If (P^.Typ = Ait_Marker) And
  965. (Pai_Marker(P)^.Kind = AsmBlockStart) Then
  966. Begin
  967. P := Pai(P^.Next);
  968. While (P^.typ <> Ait_Marker) Or
  969. (Pai_Marker(P)^.Kind <> AsmBlockEnd) Do
  970. P := Pai(P^.Next)
  971. End;}
  972. Until P = OldP
  973. End;
  974. {******************* The Data Flow Analyzer functions ********************}
  975. function regLoadedWithNewValue(reg: tregister; canDependOnPrevValue: boolean;
  976. hp: pai): boolean;
  977. { assumes reg is a 32bit register }
  978. var p: paicpu;
  979. begin
  980. p := paicpu(hp);
  981. regLoadedWithNewValue :=
  982. assigned(hp) and
  983. (hp^.typ = ait_instruction) and
  984. (((p^.opcode = A_MOV) or
  985. (p^.opcode = A_MOVZX) or
  986. (p^.opcode = A_MOVSX) or
  987. (p^.opcode = A_LEA)) and
  988. (p^.oper[1].typ = top_reg) and
  989. (Reg32(p^.oper[1].reg) = reg) and
  990. (canDependOnPrevValue or
  991. (p^.oper[0].typ <> top_ref) or
  992. not regInRef(reg,p^.oper[0].ref^)) or
  993. ((p^.opcode = A_POP) and
  994. (Reg32(p^.oper[0].reg) = reg)));
  995. end;
  996. Procedure UpdateUsedRegs(Var UsedRegs: TRegSet; p: Pai);
  997. {updates UsedRegs with the RegAlloc Information coming after P}
  998. Begin
  999. Repeat
  1000. While Assigned(p) And
  1001. ((p^.typ in (SkipInstr - [ait_RegAlloc])) or
  1002. ((p^.typ = ait_label) And
  1003. Not(Pai_Label(p)^.l^.is_used))) Do
  1004. p := Pai(p^.next);
  1005. While Assigned(p) And
  1006. (p^.typ=ait_RegAlloc) Do
  1007. Begin
  1008. if pairegalloc(p)^.allocation then
  1009. UsedRegs := UsedRegs + [PaiRegAlloc(p)^.Reg]
  1010. else
  1011. UsedRegs := UsedRegs - [PaiRegAlloc(p)^.Reg];
  1012. p := pai(p^.next);
  1013. End;
  1014. Until Not(Assigned(p)) Or
  1015. (Not(p^.typ in SkipInstr) And
  1016. Not((p^.typ = ait_label) And
  1017. Not(Pai_Label(p)^.l^.is_used)));
  1018. End;
  1019. Procedure AllocRegBetween(AsmL: PAasmOutput; Reg: TRegister; p1, p2: Pai);
  1020. { allocates register Reg between (and including) instructions p1 and p2 }
  1021. { the type of p1 and p2 must not be in SkipInstr }
  1022. var
  1023. hp: pai;
  1024. lastRemovedWasDealloc: boolean;
  1025. Begin
  1026. If not(reg in usableregs+[R_EDI,R_ESI]) or
  1027. not(assigned(p1)) Then
  1028. { this happens with registers which are loaded implicitely, outside the }
  1029. { current block (e.g. esi with self) }
  1030. exit;
  1031. lastRemovedWasDealloc := false;
  1032. {$ifdef allocregdebug}
  1033. hp := new(pai_asm_comment,init(strpnew('allocating '+att_reg2str[reg]+
  1034. ' from here...')));
  1035. insertllitem(asml,p1^.previous,p1,hp);
  1036. hp := new(pai_asm_comment,init(strpnew('allocated '+att_reg2str[reg]+
  1037. ' till here...')));
  1038. insertllitem(asml,p2,p1^.next,hp);
  1039. {$endif allocregdebug}
  1040. if Assigned(p1^.optInfo) and
  1041. not (reg in PPaiProp(p1^.OptInfo)^.UsedRegs) then
  1042. begin
  1043. hp := new(paiRegalloc,alloc(reg));
  1044. insertLLItem(asmL,p1^.previous,p1,hp);
  1045. end;
  1046. Repeat
  1047. If Assigned(p1^.OptInfo) Then
  1048. Include(PPaiProp(p1^.OptInfo)^.UsedRegs,Reg);
  1049. p1 := Pai(p1^.next);
  1050. Repeat
  1051. While assigned(p1) and
  1052. (p1^.typ in (SkipInstr-[ait_regalloc])) Do
  1053. p1 := Pai(p1^.next);
  1054. { remove all allocation/deallocation info about the register in between }
  1055. If assigned(p1) and
  1056. (p1^.typ = ait_regalloc) Then
  1057. If (PaiRegAlloc(p1)^.Reg = Reg) Then
  1058. Begin
  1059. lastRemovedWasDealloc := not PaiRegAlloc(p1)^.allocation;
  1060. hp := Pai(p1^.Next);
  1061. AsmL^.Remove(p1);
  1062. Dispose(p1, Done);
  1063. p1 := hp;
  1064. End
  1065. Else p1 := Pai(p1^.next);
  1066. Until not(assigned(p1)) or
  1067. Not(p1^.typ in SkipInstr);
  1068. Until not(assigned(p1)) or
  1069. (p1 = p2);
  1070. if assigned(p1) and lastRemovedWasDealloc then
  1071. begin
  1072. hp := new(paiRegalloc,dealloc(reg));
  1073. insertLLItem(asmL,p1,p1^.next,hp);
  1074. end;
  1075. End;
  1076. Procedure IncState(Var S: Byte);
  1077. {Increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1078. errors}
  1079. Begin
  1080. If (s <> $ff)
  1081. Then Inc(s)
  1082. Else s := 0
  1083. End;
  1084. Function sequenceDependsonReg(Const Content: TContent; seqReg, Reg: TRegister): Boolean;
  1085. { Content is the sequence of instructions that describes the contents of }
  1086. { seqReg. Reg is being overwritten by the current instruction. If the }
  1087. { content of seqReg depends on reg (ie. because of a }
  1088. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1089. Var p: Pai;
  1090. Counter: Byte;
  1091. TmpResult: Boolean;
  1092. RegsChecked: TRegSet;
  1093. Begin
  1094. RegsChecked := [];
  1095. p := Content.StartMod;
  1096. TmpResult := False;
  1097. Counter := 1;
  1098. While Not(TmpResult) And
  1099. (Counter <= Content.NrOfMods) Do
  1100. Begin
  1101. If (p^.typ = ait_instruction) and
  1102. ((Paicpu(p)^.opcode = A_MOV) or
  1103. (Paicpu(p)^.opcode = A_MOVZX) or
  1104. (Paicpu(p)^.opcode = A_MOVSX) or
  1105. (paicpu(p)^.opcode = A_LEA)) and
  1106. (Paicpu(p)^.oper[0].typ = top_ref) Then
  1107. With Paicpu(p)^.oper[0].ref^ Do
  1108. If ((Base = procinfo^.FramePointer) or
  1109. (assigned(symbol) and (base = R_NO))) And
  1110. (Index = R_NO) Then
  1111. Begin
  1112. RegsChecked := RegsChecked + [Reg32(Paicpu(p)^.oper[1].reg)];
  1113. If Reg = Reg32(Paicpu(p)^.oper[1].reg) Then
  1114. Break;
  1115. End
  1116. Else
  1117. tmpResult :=
  1118. regReadByInstruction(reg,p) and
  1119. regModifiedByInstruction(seqReg,p)
  1120. Else
  1121. tmpResult :=
  1122. regReadByInstruction(reg,p) and
  1123. regModifiedByInstruction(seqReg,p);
  1124. Inc(Counter);
  1125. GetNextInstruction(p,p)
  1126. End;
  1127. sequenceDependsonReg := TmpResult
  1128. End;
  1129. Procedure DestroyReg(p1: PPaiProp; Reg: TRegister; doIncState:Boolean);
  1130. {Destroys the contents of the register Reg in the PPaiProp p1, as well as the
  1131. contents of registers are loaded with a memory location based on Reg.
  1132. doIncState is false when this register has to be destroyed not because
  1133. it's contents are directly modified/overwritten, but because of an indirect
  1134. action (ie. this register holds the contents of a variable and the value
  1135. of the variable in memory is changed }
  1136. Var TmpWState, TmpRState: Byte;
  1137. Counter: TRegister;
  1138. Begin
  1139. Reg := Reg32(Reg);
  1140. { the following happens for fpu registers }
  1141. if (reg < low(NrOfInstrSinceLastMod)) or
  1142. (reg > high(NrOfInstrSinceLastMod)) then
  1143. exit;
  1144. NrOfInstrSinceLastMod[Reg] := 0;
  1145. If (Reg >= R_EAX) And (Reg <= R_EDI)
  1146. Then
  1147. Begin
  1148. With p1^.Regs[Reg] Do
  1149. Begin
  1150. if doIncState then
  1151. IncState(WState);
  1152. TmpWState := WState;
  1153. TmpRState := RState;
  1154. FillChar(p1^.Regs[Reg], SizeOf(TContent), 0);
  1155. WState := TmpWState;
  1156. RState := TmpRState;
  1157. End;
  1158. For counter := R_EAX to R_EDI Do
  1159. With p1^.Regs[counter] Do
  1160. If (Typ = Con_Ref) And
  1161. sequenceDependsOnReg(p1^.Regs[counter],counter,reg) Then
  1162. Begin
  1163. if doIncState then
  1164. IncState(WState);
  1165. TmpWState := WState;
  1166. TmpRState := RState;
  1167. FillChar(p1^.Regs[Counter], SizeOf(TContent), 0);
  1168. WState := TmpWState;
  1169. RState := TmpRState;
  1170. End;
  1171. End;
  1172. End;
  1173. {Procedure AddRegsToSet(p: Pai; Var RegSet: TRegSet);
  1174. Begin
  1175. If (p^.typ = ait_instruction) Then
  1176. Begin
  1177. Case Paicpu(p)^.oper[0].typ Of
  1178. top_reg:
  1179. If Not(Paicpu(p)^.oper[0].reg in [R_NO,R_ESP,procinfo^.FramePointer]) Then
  1180. RegSet := RegSet + [Paicpu(p)^.oper[0].reg];
  1181. top_ref:
  1182. With TReference(Paicpu(p)^.oper[0]^) Do
  1183. Begin
  1184. If Not(Base in [procinfo^.FramePointer,R_NO,R_ESP])
  1185. Then RegSet := RegSet + [Base];
  1186. If Not(Index in [procinfo^.FramePointer,R_NO,R_ESP])
  1187. Then RegSet := RegSet + [Index];
  1188. End;
  1189. End;
  1190. Case Paicpu(p)^.oper[1].typ Of
  1191. top_reg:
  1192. If Not(Paicpu(p)^.oper[1].reg in [R_NO,R_ESP,procinfo^.FramePointer]) Then
  1193. If RegSet := RegSet + [TRegister(TwoWords(Paicpu(p)^.oper[1]).Word1];
  1194. top_ref:
  1195. With TReference(Paicpu(p)^.oper[1]^) Do
  1196. Begin
  1197. If Not(Base in [procinfo^.FramePointer,R_NO,R_ESP])
  1198. Then RegSet := RegSet + [Base];
  1199. If Not(Index in [procinfo^.FramePointer,R_NO,R_ESP])
  1200. Then RegSet := RegSet + [Index];
  1201. End;
  1202. End;
  1203. End;
  1204. End;}
  1205. Function OpsEquivalent(const o1, o2: toper; Var RegInfo: TRegInfo; OpAct: TopAction): Boolean;
  1206. Begin {checks whether the two ops are equivalent}
  1207. OpsEquivalent := False;
  1208. if o1.typ=o2.typ then
  1209. Case o1.typ Of
  1210. Top_Reg:
  1211. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, RegInfo, OpAct);
  1212. Top_Ref:
  1213. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, RegInfo, OpAct);
  1214. Top_Const:
  1215. OpsEquivalent := o1.val = o2.val;
  1216. Top_None:
  1217. OpsEquivalent := True
  1218. End;
  1219. End;
  1220. Function OpsEqual(const o1,o2:toper): Boolean;
  1221. Begin {checks whether the two ops are equal}
  1222. OpsEqual := False;
  1223. if o1.typ=o2.typ then
  1224. Case o1.typ Of
  1225. Top_Reg :
  1226. OpsEqual:=o1.reg=o2.reg;
  1227. Top_Ref :
  1228. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1229. Top_Const :
  1230. OpsEqual:=o1.val=o2.val;
  1231. Top_Symbol :
  1232. OpsEqual:=(o1.sym=o2.sym) and (o1.symofs=o2.symofs);
  1233. Top_None :
  1234. OpsEqual := True
  1235. End;
  1236. End;
  1237. Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
  1238. {$ifdef csdebug}
  1239. var
  1240. hp: pai;
  1241. {$endif csdebug}
  1242. Begin {checks whether two Paicpu instructions are equal}
  1243. If Assigned(p1) And Assigned(p2) And
  1244. (Pai(p1)^.typ = ait_instruction) And
  1245. (Pai(p1)^.typ = ait_instruction) And
  1246. (Paicpu(p1)^.opcode = Paicpu(p2)^.opcode) And
  1247. (Paicpu(p1)^.oper[0].typ = Paicpu(p2)^.oper[0].typ) And
  1248. (Paicpu(p1)^.oper[1].typ = Paicpu(p2)^.oper[1].typ) And
  1249. (Paicpu(p1)^.oper[2].typ = Paicpu(p2)^.oper[2].typ)
  1250. Then
  1251. {both instructions have the same structure:
  1252. "<operator> <operand of type1>, <operand of type 2>"}
  1253. If ((Paicpu(p1)^.opcode = A_MOV) or
  1254. (Paicpu(p1)^.opcode = A_MOVZX) or
  1255. (Paicpu(p1)^.opcode = A_MOVSX)) And
  1256. (Paicpu(p1)^.oper[0].typ = top_ref) {then .oper[1]t = top_reg} Then
  1257. If Not(RegInRef(Paicpu(p1)^.oper[1].reg, Paicpu(p1)^.oper[0].ref^)) Then
  1258. {the "old" instruction is a load of a register with a new value, not with
  1259. a value based on the contents of this register (so no "mov (reg), reg")}
  1260. If Not(RegInRef(Paicpu(p2)^.oper[1].reg, Paicpu(p2)^.oper[0].ref^)) And
  1261. RefsEqual(Paicpu(p1)^.oper[0].ref^, Paicpu(p2)^.oper[0].ref^)
  1262. Then
  1263. {the "new" instruction is also a load of a register with a new value, and
  1264. this value is fetched from the same memory location}
  1265. Begin
  1266. With Paicpu(p2)^.oper[0].ref^ Do
  1267. Begin
  1268. If Not(Base in [procinfo^.FramePointer, R_NO, R_ESP]) Then
  1269. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Base];
  1270. If Not(Index in [procinfo^.FramePointer, R_NO, R_ESP]) Then
  1271. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
  1272. End;
  1273. {add the registers from the reference (.oper[0]) to the RegInfo, all registers
  1274. from the reference are the same in the old and in the new instruction
  1275. sequence}
  1276. AddOp2RegInfo(Paicpu(p1)^.oper[0], RegInfo);
  1277. {the registers from .oper[1] have to be equivalent, but not necessarily equal}
  1278. InstructionsEquivalent :=
  1279. RegsEquivalent(Paicpu(p1)^.oper[1].reg, Paicpu(p2)^.oper[1].reg, RegInfo, OpAct_Write);
  1280. End
  1281. {the registers are loaded with values from different memory locations. If
  1282. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1283. would be considered equivalent}
  1284. Else InstructionsEquivalent := False
  1285. Else
  1286. {load register with a value based on the current value of this register}
  1287. Begin
  1288. With Paicpu(p2)^.oper[0].ref^ Do
  1289. Begin
  1290. If Not(Base in [procinfo^.FramePointer,
  1291. Reg32(Paicpu(p2)^.oper[1].reg),R_NO,R_ESP]) Then
  1292. {it won't do any harm if the register is already in RegsLoadedForRef}
  1293. Begin
  1294. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Base];
  1295. {$ifdef csdebug}
  1296. Writeln(att_reg2str[base], ' added');
  1297. {$endif csdebug}
  1298. end;
  1299. If Not(Index in [procinfo^.FramePointer,
  1300. Reg32(Paicpu(p2)^.oper[1].reg),R_NO,R_ESP]) Then
  1301. Begin
  1302. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
  1303. {$ifdef csdebug}
  1304. Writeln(att_reg2str[index], ' added');
  1305. {$endif csdebug}
  1306. end;
  1307. End;
  1308. If Not(Reg32(Paicpu(p2)^.oper[1].reg) In [procinfo^.FramePointer,R_NO,R_ESP])
  1309. Then
  1310. Begin
  1311. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1312. [Reg32(Paicpu(p2)^.oper[1].reg)];
  1313. {$ifdef csdebug}
  1314. Writeln(att_reg2str[Reg32(Paicpu(p2)^.oper[1].reg)], ' removed');
  1315. {$endif csdebug}
  1316. end;
  1317. InstructionsEquivalent :=
  1318. OpsEquivalent(Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0], RegInfo, OpAct_Read) And
  1319. OpsEquivalent(Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1], RegInfo, OpAct_Write)
  1320. End
  1321. Else
  1322. {an instruction <> mov, movzx, movsx}
  1323. begin
  1324. {$ifdef csdebug}
  1325. hp := new(pai_asm_comment,init(strpnew('checking if equivalent')));
  1326. hp^.previous := p2;
  1327. hp^.next := p2^.next;
  1328. p2^.next^.previous := hp;
  1329. p2^.next := hp;
  1330. {$endif csdebug}
  1331. InstructionsEquivalent :=
  1332. OpsEquivalent(Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0], RegInfo, OpAct_Unknown) And
  1333. OpsEquivalent(Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1], RegInfo, OpAct_Unknown) And
  1334. OpsEquivalent(Paicpu(p1)^.oper[2], Paicpu(p2)^.oper[2], RegInfo, OpAct_Unknown)
  1335. end
  1336. {the instructions haven't even got the same structure, so they're certainly
  1337. not equivalent}
  1338. Else
  1339. begin
  1340. {$ifdef csdebug}
  1341. hp := new(pai_asm_comment,init(strpnew('different opcodes/format')));
  1342. hp^.previous := p2;
  1343. hp^.next := p2^.next;
  1344. p2^.next^.previous := hp;
  1345. p2^.next := hp;
  1346. {$endif csdebug}
  1347. InstructionsEquivalent := False;
  1348. end;
  1349. {$ifdef csdebug}
  1350. hp := new(pai_asm_comment,init(strpnew('instreq: '+tostr(byte(instructionsequivalent)))));
  1351. hp^.previous := p2;
  1352. hp^.next := p2^.next;
  1353. p2^.next^.previous := hp;
  1354. p2^.next := hp;
  1355. {$endif csdebug}
  1356. End;
  1357. (*
  1358. Function InstructionsEqual(p1, p2: Pai): Boolean;
  1359. Begin {checks whether two Paicpu instructions are equal}
  1360. InstructionsEqual :=
  1361. Assigned(p1) And Assigned(p2) And
  1362. ((Pai(p1)^.typ = ait_instruction) And
  1363. (Pai(p1)^.typ = ait_instruction) And
  1364. (Paicpu(p1)^.opcode = Paicpu(p2)^.opcode) And
  1365. (Paicpu(p1)^.oper[0].typ = Paicpu(p2)^.oper[0].typ) And
  1366. (Paicpu(p1)^.oper[1].typ = Paicpu(p2)^.oper[1].typ) And
  1367. OpsEqual(Paicpu(p1)^.oper[0].typ, Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0]) And
  1368. OpsEqual(Paicpu(p1)^.oper[1].typ, Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1]))
  1369. End;
  1370. *)
  1371. Procedure ReadReg(p: PPaiProp; Reg: TRegister);
  1372. Begin
  1373. Reg := Reg32(Reg);
  1374. If Reg in [R_EAX..R_EDI] Then
  1375. IncState(p^.Regs[Reg].RState)
  1376. End;
  1377. Procedure ReadRef(p: PPaiProp; Ref: PReference);
  1378. Begin
  1379. If Ref^.Base <> R_NO Then
  1380. ReadReg(p, Ref^.Base);
  1381. If Ref^.Index <> R_NO Then
  1382. ReadReg(p, Ref^.Index);
  1383. End;
  1384. Procedure ReadOp(P: PPaiProp;const o:toper);
  1385. Begin
  1386. Case o.typ Of
  1387. top_reg: ReadReg(P, o.reg);
  1388. top_ref: ReadRef(P, o.ref);
  1389. top_symbol : ;
  1390. End;
  1391. End;
  1392. Function RefInInstruction(Const Ref: TReference; p: Pai;
  1393. RefsEq: TRefCompare): Boolean;
  1394. {checks whehter Ref is used in P}
  1395. Var TmpResult: Boolean;
  1396. Begin
  1397. TmpResult := False;
  1398. If (p^.typ = ait_instruction) Then
  1399. Begin
  1400. If (Paicpu(p)^.oper[0].typ = Top_Ref) Then
  1401. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[0].ref^);
  1402. If Not(TmpResult) And (Paicpu(p)^.oper[1].typ = Top_Ref) Then
  1403. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[1].ref^);
  1404. If Not(TmpResult) And (Paicpu(p)^.oper[2].typ = Top_Ref) Then
  1405. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[2].ref^);
  1406. End;
  1407. RefInInstruction := TmpResult;
  1408. End;
  1409. Function RefInSequence(Const Ref: TReference; Content: TContent;
  1410. RefsEq: TRefCompare): Boolean;
  1411. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1412. Pai objects) to see whether Ref is used somewhere}
  1413. Var p: Pai;
  1414. Counter: Byte;
  1415. TmpResult: Boolean;
  1416. Begin
  1417. p := Content.StartMod;
  1418. TmpResult := False;
  1419. Counter := 1;
  1420. While Not(TmpResult) And
  1421. (Counter <= Content.NrOfMods) Do
  1422. Begin
  1423. If (p^.typ = ait_instruction) And
  1424. RefInInstruction(Ref, p, RefsEq)
  1425. Then TmpResult := True;
  1426. Inc(Counter);
  1427. GetNextInstruction(p,p)
  1428. End;
  1429. RefInSequence := TmpResult
  1430. End;
  1431. Function ArrayRefsEq(const r1, r2: TReference): Boolean;{$ifdef tp}far;{$endif}
  1432. Begin
  1433. ArrayRefsEq := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  1434. (R1.Segment = R2.Segment) And
  1435. (R1.Symbol=R2.Symbol) And
  1436. ((Assigned(R1.Symbol)) Or
  1437. (R1.Base = R2.Base))
  1438. End;
  1439. Procedure DestroyRefs(p: pai; Const Ref: TReference; WhichReg: TRegister);
  1440. {destroys all registers which possibly contain a reference to Ref, WhichReg
  1441. is the register whose contents are being written to memory (if this proc
  1442. is called because of a "mov?? %reg, (mem)" instruction)}
  1443. Var RefsEq: TRefCompare;
  1444. Counter: TRegister;
  1445. Begin
  1446. WhichReg := Reg32(WhichReg);
  1447. If (Ref.base = procinfo^.FramePointer) or
  1448. Assigned(Ref.Symbol) Then
  1449. Begin
  1450. If (Ref.Index = R_NO) And
  1451. (Not(Assigned(Ref.Symbol)) or
  1452. (Ref.base = R_NO)) Then
  1453. { local variable which is not an array }
  1454. RefsEq := {$ifdef fpc}@{$endif}RefsEqual
  1455. Else
  1456. { local variable which is an array }
  1457. RefsEq := {$ifdef fpc}@{$endif}ArrayRefsEq;
  1458. {write something to a parameter, a local or global variable, so
  1459. * with uncertain optimizations on:
  1460. - destroy the contents of registers whose contents have somewhere a
  1461. "mov?? (Ref), %reg". WhichReg (this is the register whose contents
  1462. are being written to memory) is not destroyed if it's StartMod is
  1463. of that form and NrOfMods = 1 (so if it holds ref, but is not a
  1464. pointer based on Ref)
  1465. * with uncertain optimizations off:
  1466. - also destroy registers that contain any pointer}
  1467. For Counter := R_EAX to R_EDI Do
  1468. With PPaiProp(p^.OptInfo)^.Regs[Counter] Do
  1469. Begin
  1470. If (typ = Con_Ref) And
  1471. ((Not(cs_UncertainOpts in aktglobalswitches) And
  1472. (NrOfMods <> 1)
  1473. ) Or
  1474. (RefInSequence(Ref,PPaiProp(p^.OptInfo)^.Regs[Counter],RefsEq) And
  1475. ((Counter <> WhichReg) Or
  1476. ((NrOfMods <> 1) And
  1477. {StarMod is always of the type ait_instruction}
  1478. (Paicpu(StartMod)^.oper[0].typ = top_ref) And
  1479. RefsEq(Paicpu(StartMod)^.oper[0].ref^, Ref)
  1480. )
  1481. )
  1482. )
  1483. )
  1484. Then
  1485. DestroyReg(PPaiProp(p^.OptInfo), Counter, false)
  1486. End
  1487. End
  1488. Else
  1489. {write something to a pointer location, so
  1490. * with uncertain optimzations on:
  1491. - do not destroy registers which contain a local/global variable or a
  1492. parameter, except if DestroyRefs is called because of a "movsl"
  1493. * with uncertain optimzations off:
  1494. - destroy every register which contains a memory location
  1495. }
  1496. For Counter := R_EAX to R_EDI Do
  1497. With PPaiProp(p^.OptInfo)^.Regs[Counter] Do
  1498. If (typ = Con_Ref) And
  1499. (Not(cs_UncertainOpts in aktglobalswitches) Or
  1500. {for movsl}
  1501. (Ref.Base = R_EDI) Or
  1502. {don't destroy if reg contains a parameter, local or global variable}
  1503. Not((NrOfMods = 1) And
  1504. (Paicpu(StartMod)^.oper[0].typ = top_ref) And
  1505. ((Paicpu(StartMod)^.oper[0].ref^.base = procinfo^.FramePointer) Or
  1506. Assigned(Paicpu(StartMod)^.oper[0].ref^.Symbol)
  1507. )
  1508. )
  1509. )
  1510. Then DestroyReg(PPaiProp(p^.OptInfo), Counter, false)
  1511. End;
  1512. Procedure DestroyAllRegs(p: PPaiProp);
  1513. Var Counter: TRegister;
  1514. Begin {initializes/desrtoys all registers}
  1515. For Counter := R_EAX To R_EDI Do
  1516. Begin
  1517. ReadReg(p, Counter);
  1518. DestroyReg(p, Counter, true);
  1519. End;
  1520. p^.DirFlag := F_Unknown;
  1521. End;
  1522. Procedure DestroyOp(PaiObj: Pai; const o:Toper);
  1523. {$ifdef statedebug}
  1524. var hp: pai;
  1525. {$endif statedebug}
  1526. Begin
  1527. Case o.typ Of
  1528. top_reg:
  1529. begin
  1530. {$ifdef statedebug}
  1531. hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[o.reg])));
  1532. hp^.next := paiobj^.next;
  1533. hp^.previous := paiobj;
  1534. paiobj^.next := hp;
  1535. if assigned(hp^.next) then
  1536. hp^.next^.previous := hp;
  1537. {$endif statedebug}
  1538. DestroyReg(PPaiProp(PaiObj^.OptInfo), reg32(o.reg), true);
  1539. end;
  1540. top_ref:
  1541. Begin
  1542. ReadRef(PPaiProp(PaiObj^.OptInfo), o.ref);
  1543. DestroyRefs(PaiObj, o.ref^, R_NO);
  1544. End;
  1545. top_symbol:;
  1546. End;
  1547. End;
  1548. Function DFAPass1(AsmL: PAasmOutput; BlockStart: Pai): Pai;
  1549. {gathers the RegAlloc data... still need to think about where to store it to
  1550. avoid global vars}
  1551. Var BlockEnd: Pai;
  1552. Begin
  1553. BlockEnd := FindLoHiLabels(LoLab, HiLab, LabDif, BlockStart);
  1554. BuildLabelTableAndFixRegAlloc(AsmL, LTable, LoLab, LabDif, BlockStart, BlockEnd);
  1555. DFAPass1 := BlockEnd;
  1556. End;
  1557. {$ifdef arithopt}
  1558. Procedure AddInstr2RegContents({$ifdef statedebug} asml: paasmoutput; {$endif}
  1559. p: paicpu; reg: TRegister);
  1560. {$ifdef statedebug}
  1561. var hp: pai;
  1562. {$endif statedebug}
  1563. Begin
  1564. Reg := Reg32(Reg);
  1565. With PPaiProp(p^.optinfo)^.Regs[reg] Do
  1566. If (Typ = Con_Ref)
  1567. Then
  1568. Begin
  1569. IncState(WState);
  1570. {also store how many instructions are part of the sequence in the first
  1571. instructions PPaiProp, so it can be easily accessed from within
  1572. CheckSequence}
  1573. Inc(NrOfMods, NrOfInstrSinceLastMod[Reg]);
  1574. PPaiProp(Pai(StartMod)^.OptInfo)^.Regs[Reg].NrOfMods := NrOfMods;
  1575. NrOfInstrSinceLastMod[Reg] := 0;
  1576. {$ifdef StateDebug}
  1577. hp := new(pai_asm_comment,init(strpnew(att_reg2str[reg]+': '+tostr(PPaiProp(p^.optinfo)^.Regs[reg].WState)
  1578. + ' -- ' + tostr(PPaiProp(p^.optinfo)^.Regs[reg].nrofmods))));
  1579. InsertLLItem(AsmL, p, p^.next, hp);
  1580. {$endif StateDebug}
  1581. End
  1582. Else
  1583. Begin
  1584. {$ifdef statedebug}
  1585. hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[reg])));
  1586. insertllitem(asml,p,p^.next,hp);
  1587. {$endif statedebug}
  1588. DestroyReg(PPaiProp(p^.optinfo), Reg, true);
  1589. {$ifdef StateDebug}
  1590. hp := new(pai_asm_comment,init(strpnew(att_reg2str[reg]+': '+tostr(PPaiProp(p^.optinfo)^.Regs[reg].WState))));
  1591. InsertLLItem(AsmL, p, p^.next, hp);
  1592. {$endif StateDebug}
  1593. End
  1594. End;
  1595. Procedure AddInstr2OpContents({$ifdef statedebug} asml: paasmoutput; {$endif}
  1596. p: paicpu; const oper: TOper);
  1597. Begin
  1598. If oper.typ = top_reg Then
  1599. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, oper.reg)
  1600. Else
  1601. Begin
  1602. ReadOp(PPaiProp(p^.optinfo), oper);
  1603. DestroyOp(p, oper);
  1604. End
  1605. End;
  1606. {$endif arithopt}
  1607. Procedure DoDFAPass2(
  1608. {$Ifdef StateDebug}
  1609. AsmL: PAasmOutput;
  1610. {$endif statedebug}
  1611. BlockStart, BlockEnd: Pai);
  1612. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  1613. contents for the instructions starting with p. Returns the last pai which has
  1614. been processed}
  1615. Var
  1616. CurProp: PPaiProp;
  1617. {$ifdef AnalyzeLoops}
  1618. TmpState: Byte;
  1619. {$endif AnalyzeLoops}
  1620. Cnt, InstrCnt : Longint;
  1621. InstrProp: TInsProp;
  1622. UsedRegs: TRegSet;
  1623. p, hp : Pai;
  1624. TmpRef: TReference;
  1625. TmpReg: TRegister;
  1626. Begin
  1627. p := BlockStart;
  1628. UsedRegs := [];
  1629. UpdateUsedregs(UsedRegs, p);
  1630. SkipHead(P);
  1631. BlockStart := p;
  1632. InstrCnt := 1;
  1633. FillChar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  1634. While (P <> BlockEnd) Do
  1635. Begin
  1636. {$IfDef TP}
  1637. New(CurProp);
  1638. {$Else TP}
  1639. CurProp := @PaiPropBlock^[InstrCnt];
  1640. {$EndIf TP}
  1641. If (p <> BlockStart)
  1642. Then
  1643. Begin
  1644. {$ifdef JumpAnal}
  1645. If (p^.Typ <> ait_label) Then
  1646. {$endif JumpAnal}
  1647. Begin
  1648. GetLastInstruction(p, hp);
  1649. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1650. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1651. End
  1652. End
  1653. Else
  1654. Begin
  1655. FillChar(CurProp^, SizeOf(CurProp^), 0);
  1656. { For TmpReg := R_EAX to R_EDI Do
  1657. CurProp^.Regs[TmpReg].WState := 1;}
  1658. End;
  1659. CurProp^.UsedRegs := UsedRegs;
  1660. CurProp^.CanBeRemoved := False;
  1661. UpdateUsedRegs(UsedRegs, Pai(p^.Next));
  1662. {$ifdef TP}
  1663. PPaiProp(p^.OptInfo) := CurProp;
  1664. {$Endif TP}
  1665. For TmpReg := R_EAX To R_EDI Do
  1666. Inc(NrOfInstrSinceLastMod[TmpReg]);
  1667. Case p^.typ Of
  1668. ait_label:
  1669. {$Ifndef JumpAnal}
  1670. If (Pai_label(p)^.l^.is_used) Then
  1671. DestroyAllRegs(CurProp);
  1672. {$Else JumpAnal}
  1673. Begin
  1674. If (Pai_Label(p)^.is_used) Then
  1675. With LTable^[Pai_Label(p)^.l^.labelnr-LoLab] Do
  1676. {$IfDef AnalyzeLoops}
  1677. If (RefsFound = Pai_Label(p)^.l^.RefCount)
  1678. {$Else AnalyzeLoops}
  1679. If (JmpsProcessed = Pai_Label(p)^.l^.RefCount)
  1680. {$EndIf AnalyzeLoops}
  1681. Then
  1682. {all jumps to this label have been found}
  1683. {$IfDef AnalyzeLoops}
  1684. If (JmpsProcessed > 0)
  1685. Then
  1686. {$EndIf AnalyzeLoops}
  1687. {we've processed at least one jump to this label}
  1688. Begin
  1689. If (GetLastInstruction(p, hp) And
  1690. Not(((hp^.typ = ait_instruction)) And
  1691. (paicpu_labeled(hp)^.is_jmp))
  1692. Then
  1693. {previous instruction not a JMP -> the contents of the registers after the
  1694. previous intruction has been executed have to be taken into account as well}
  1695. For TmpReg := R_EAX to R_EDI Do
  1696. Begin
  1697. If (CurProp^.Regs[TmpReg].WState <>
  1698. PPaiProp(hp^.OptInfo)^.Regs[TmpReg].WState)
  1699. Then DestroyReg(CurProp, TmpReg, true)
  1700. End
  1701. End
  1702. {$IfDef AnalyzeLoops}
  1703. Else
  1704. {a label from a backward jump (e.g. a loop), no jump to this label has
  1705. already been processed}
  1706. If GetLastInstruction(p, hp) And
  1707. Not(hp^.typ = ait_instruction) And
  1708. (paicpu_labeled(hp)^.opcode = A_JMP))
  1709. Then
  1710. {previous instruction not a jmp, so keep all the registers' contents from the
  1711. previous instruction}
  1712. Begin
  1713. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1714. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1715. End
  1716. Else
  1717. {previous instruction a jmp and no jump to this label processed yet}
  1718. Begin
  1719. hp := p;
  1720. Cnt := InstrCnt;
  1721. {continue until we find a jump to the label or a label which has already
  1722. been processed}
  1723. While GetNextInstruction(hp, hp) And
  1724. Not((hp^.typ = ait_instruction) And
  1725. (paicpu(hp)^.is_jmp) and
  1726. (pasmlabel(paicpu(hp)^.oper[0].sym)^.labelnr = Pai_Label(p)^.l^.labelnr)) And
  1727. Not((hp^.typ = ait_label) And
  1728. (LTable^[Pai_Label(hp)^.l^.labelnr-LoLab].RefsFound
  1729. = Pai_Label(hp)^.l^.RefCount) And
  1730. (LTable^[Pai_Label(hp)^.l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  1731. Inc(Cnt);
  1732. If (hp^.typ = ait_label)
  1733. Then
  1734. {there's a processed label after the current one}
  1735. Begin
  1736. CurProp^.Regs := PaiPropBlock^[Cnt].Regs;
  1737. CurProp^.DirFlag := PaiPropBlock^[Cnt].DirFlag;
  1738. End
  1739. Else
  1740. {there's no label anymore after the current one, or they haven't been
  1741. processed yet}
  1742. Begin
  1743. GetLastInstruction(p, hp);
  1744. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1745. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1746. DestroyAllRegs(PPaiProp(hp^.OptInfo))
  1747. End
  1748. End
  1749. {$EndIf AnalyzeLoops}
  1750. Else
  1751. {not all references to this label have been found, so destroy all registers}
  1752. Begin
  1753. GetLastInstruction(p, hp);
  1754. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1755. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1756. DestroyAllRegs(CurProp)
  1757. End;
  1758. End;
  1759. {$EndIf JumpAnal}
  1760. {$ifdef GDB}
  1761. ait_stabs, ait_stabn, ait_stab_function_name:;
  1762. {$endif GDB}
  1763. ait_align: ; { may destroy flags !!! }
  1764. ait_instruction:
  1765. Begin
  1766. if paicpu(p)^.is_jmp then
  1767. begin
  1768. {$IfNDef JumpAnal}
  1769. ;
  1770. {$Else JumpAnal}
  1771. With LTable^[pasmlabel(paicpu(p)^.oper[0].sym)^.labelnr-LoLab] Do
  1772. If (RefsFound = pasmlabel(paicpu(p)^.oper[0].sym)^.RefCount) Then
  1773. Begin
  1774. If (InstrCnt < InstrNr)
  1775. Then
  1776. {forward jump}
  1777. If (JmpsProcessed = 0) Then
  1778. {no jump to this label has been processed yet}
  1779. Begin
  1780. PaiPropBlock^[InstrNr].Regs := CurProp^.Regs;
  1781. PaiPropBlock^[InstrNr].DirFlag := CurProp^.DirFlag;
  1782. Inc(JmpsProcessed);
  1783. End
  1784. Else
  1785. Begin
  1786. For TmpReg := R_EAX to R_EDI Do
  1787. If (PaiPropBlock^[InstrNr].Regs[TmpReg].WState <>
  1788. CurProp^.Regs[TmpReg].WState) Then
  1789. DestroyReg(@PaiPropBlock^[InstrNr], TmpReg, true);
  1790. Inc(JmpsProcessed);
  1791. End
  1792. {$ifdef AnalyzeLoops}
  1793. Else
  1794. { backward jump, a loop for example}
  1795. { If (JmpsProcessed > 0) Or
  1796. Not(GetLastInstruction(PaiObj, hp) And
  1797. (hp^.typ = ait_labeled_instruction) And
  1798. (paicpu_labeled(hp)^.opcode = A_JMP))
  1799. Then}
  1800. {instruction prior to label is not a jmp, or at least one jump to the label
  1801. has yet been processed}
  1802. Begin
  1803. Inc(JmpsProcessed);
  1804. For TmpReg := R_EAX to R_EDI Do
  1805. If (PaiPropBlock^[InstrNr].Regs[TmpReg].WState <>
  1806. CurProp^.Regs[TmpReg].WState)
  1807. Then
  1808. Begin
  1809. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1810. Cnt := InstrNr;
  1811. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1812. Begin
  1813. DestroyReg(@PaiPropBlock^[Cnt], TmpReg, true);
  1814. Inc(Cnt);
  1815. End;
  1816. While (Cnt <= InstrCnt) Do
  1817. Begin
  1818. Inc(PaiPropBlock^[Cnt].Regs[TmpReg].WState);
  1819. Inc(Cnt)
  1820. End
  1821. End;
  1822. End
  1823. { Else }
  1824. {instruction prior to label is a jmp and no jumps to the label have yet been
  1825. processed}
  1826. { Begin
  1827. Inc(JmpsProcessed);
  1828. For TmpReg := R_EAX to R_EDI Do
  1829. Begin
  1830. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1831. Cnt := InstrNr;
  1832. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1833. Begin
  1834. PaiPropBlock^[Cnt].Regs[TmpReg] := CurProp^.Regs[TmpReg];
  1835. Inc(Cnt);
  1836. End;
  1837. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1838. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1839. Begin
  1840. DestroyReg(@PaiPropBlock^[Cnt], TmpReg, true);
  1841. Inc(Cnt);
  1842. End;
  1843. While (Cnt <= InstrCnt) Do
  1844. Begin
  1845. Inc(PaiPropBlock^[Cnt].Regs[TmpReg].WState);
  1846. Inc(Cnt)
  1847. End
  1848. End
  1849. End}
  1850. {$endif AnalyzeLoops}
  1851. End;
  1852. {$EndIf JumpAnal}
  1853. end
  1854. else
  1855. begin
  1856. InstrProp := InsProp[Paicpu(p)^.opcode];
  1857. Case Paicpu(p)^.opcode Of
  1858. A_MOV, A_MOVZX, A_MOVSX:
  1859. Begin
  1860. Case Paicpu(p)^.oper[0].typ Of
  1861. Top_Reg:
  1862. Case Paicpu(p)^.oper[1].typ Of
  1863. Top_Reg:
  1864. Begin
  1865. {$ifdef statedebug}
  1866. hp := new(pai_asm_comment,init(strpnew('destroying '+
  1867. att_reg2str[Paicpu(p)^.oper[1].reg])));
  1868. insertllitem(asml,p,p^.next,hp);
  1869. {$endif statedebug}
  1870. DestroyReg(CurProp, Paicpu(p)^.oper[1].reg, true);
  1871. ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
  1872. { CurProp^.Regs[Paicpu(p)^.oper[1].reg] :=
  1873. CurProp^.Regs[Paicpu(p)^.oper[0].reg];
  1874. If (CurProp^.Regs[Paicpu(p)^.oper[1].reg].ModReg = R_NO) Then
  1875. CurProp^.Regs[Paicpu(p)^.oper[1].reg].ModReg :=
  1876. Paicpu(p)^.oper[0].reg;}
  1877. End;
  1878. Top_Ref:
  1879. Begin
  1880. ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
  1881. ReadRef(CurProp, Paicpu(p)^.oper[1].ref);
  1882. DestroyRefs(p, Paicpu(p)^.oper[1].ref^, Paicpu(p)^.oper[0].reg);
  1883. End;
  1884. End;
  1885. Top_Ref:
  1886. Begin {destination is always a register in this case}
  1887. ReadRef(CurProp, Paicpu(p)^.oper[0].ref);
  1888. TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
  1889. If RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^) And
  1890. (CurProp^.Regs[TmpReg].Typ = Con_Ref)
  1891. Then
  1892. Begin
  1893. With CurProp^.Regs[TmpReg] Do
  1894. Begin
  1895. IncState(WState);
  1896. {also store how many instructions are part of the sequence in the first
  1897. instructions PPaiProp, so it can be easily accessed from within
  1898. CheckSequence}
  1899. Inc(NrOfMods, NrOfInstrSinceLastMod[TmpReg]);
  1900. PPaiProp(Pai(StartMod)^.OptInfo)^.Regs[TmpReg].NrOfMods := NrOfMods;
  1901. NrOfInstrSinceLastMod[TmpReg] := 0;
  1902. End;
  1903. End
  1904. Else
  1905. Begin
  1906. {$ifdef statedebug}
  1907. hp := new(pai_asm_comment,init(strpnew('destroying & initing '+att_reg2str[tmpreg])));
  1908. insertllitem(asml,p,p^.next,hp);
  1909. {$endif statedebug}
  1910. DestroyReg(CurProp, TmpReg, true);
  1911. If Not(RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^)) Then
  1912. With CurProp^.Regs[TmpReg] Do
  1913. Begin
  1914. Typ := Con_Ref;
  1915. StartMod := p;
  1916. NrOfMods := 1;
  1917. End
  1918. End;
  1919. {$ifdef StateDebug}
  1920. hp := new(pai_asm_comment,init(strpnew(att_reg2str[TmpReg]+': '+tostr(CurProp^.Regs[TmpReg].WState))));
  1921. InsertLLItem(AsmL, p, p^.next, hp);
  1922. {$endif StateDebug}
  1923. End;
  1924. top_symbol,Top_Const:
  1925. Begin
  1926. Case Paicpu(p)^.oper[1].typ Of
  1927. Top_Reg:
  1928. Begin
  1929. TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
  1930. {$ifdef statedebug}
  1931. hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[tmpreg])));
  1932. insertllitem(asml,p,p^.next,hp);
  1933. {$endif statedebug}
  1934. With CurProp^.Regs[TmpReg] Do
  1935. Begin
  1936. DestroyReg(CurProp, TmpReg, true);
  1937. typ := Con_Const;
  1938. StartMod := p;
  1939. End
  1940. End;
  1941. Top_Ref:
  1942. Begin
  1943. ReadRef(CurProp, Paicpu(p)^.oper[1].ref);
  1944. DestroyRefs(P, Paicpu(p)^.oper[1].ref^, R_NO);
  1945. End;
  1946. End;
  1947. End;
  1948. End;
  1949. End;
  1950. A_DIV, A_IDIV, A_MUL:
  1951. Begin
  1952. ReadOp(Curprop, Paicpu(p)^.oper[0]);
  1953. ReadReg(CurProp,R_EAX);
  1954. If (Paicpu(p)^.OpCode = A_IDIV) or
  1955. (Paicpu(p)^.OpCode = A_DIV) Then
  1956. ReadReg(CurProp,R_EDX);
  1957. {$ifdef statedebug}
  1958. hp := new(pai_asm_comment,init(strpnew('destroying eax and edx')));
  1959. insertllitem(asml,p,p^.next,hp);
  1960. {$endif statedebug}
  1961. DestroyReg(CurProp, R_EAX, true);
  1962. DestroyReg(CurProp, R_EDX, true)
  1963. End;
  1964. A_IMUL:
  1965. Begin
  1966. ReadOp(CurProp,Paicpu(p)^.oper[0]);
  1967. ReadOp(CurProp,Paicpu(p)^.oper[1]);
  1968. If (Paicpu(p)^.oper[2].typ = top_none) Then
  1969. If (Paicpu(p)^.oper[1].typ = top_none) Then
  1970. Begin
  1971. ReadReg(CurProp,R_EAX);
  1972. {$ifdef statedebug}
  1973. hp := new(pai_asm_comment,init(strpnew('destroying eax and edx')));
  1974. insertllitem(asml,p,p^.next,hp);
  1975. {$endif statedebug}
  1976. DestroyReg(CurProp, R_EAX, true);
  1977. DestroyReg(CurProp, R_EDX, true)
  1978. End
  1979. Else
  1980. {$ifdef arithopt}
  1981. AddInstr2OpContents(
  1982. {$ifdef statedebug}asml,{$endif}
  1983. Paicpu(p), Paicpu(p)^.oper[1])
  1984. {$else arithopt}
  1985. DestroyOp(p, Paicpu(p)^.oper[1])
  1986. {$endif arithopt}
  1987. Else
  1988. {$ifdef arithopt}
  1989. AddInstr2OpContents({$ifdef statedebug}asml,{$endif}
  1990. Paicpu(p), Paicpu(p)^.oper[2]);
  1991. {$else arithopt}
  1992. DestroyOp(p, Paicpu(p)^.oper[2]);
  1993. {$endif arithopt}
  1994. End;
  1995. {$ifdef arithopt}
  1996. A_LEA:
  1997. begin
  1998. readop(curprop,paicpu(p)^.oper[0]);
  1999. if reginref(paicpu(p)^.oper[1].reg,paicpu(p)^.oper[0].ref^) then
  2000. AddInstr2RegContents({$ifdef statedebug}asml,{$endif}
  2001. paicpu(p), paicpu(p)^.oper[1].reg)
  2002. else
  2003. begin
  2004. {$ifdef statedebug}
  2005. hp := new(pai_asm_comment,init(strpnew('destroying '+
  2006. att_reg2str[paicpu(p)^.oper[1].reg])));
  2007. insertllitem(asml,p,p^.next,hp);
  2008. {$endif statedebug}
  2009. destroyreg(curprop,paicpu(p)^.oper[1].reg,true);
  2010. end;
  2011. end;
  2012. {$endif arithopt}
  2013. Else
  2014. Begin
  2015. Cnt := 1;
  2016. While (Cnt <= MaxCh) And
  2017. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2018. Begin
  2019. Case InstrProp.Ch[Cnt] Of
  2020. Ch_REAX..Ch_REDI: ReadReg(CurProp,TCh2Reg(InstrProp.Ch[Cnt]));
  2021. Ch_WEAX..Ch_RWEDI:
  2022. Begin
  2023. If (InstrProp.Ch[Cnt] >= Ch_RWEAX) Then
  2024. ReadReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]));
  2025. {$ifdef statedebug}
  2026. hp := new(pai_asm_comment,init(strpnew('destroying '+
  2027. att_reg2str[TCh2Reg(InstrProp.Ch[Cnt])])));
  2028. insertllitem(asml,p,p^.next,hp);
  2029. {$endif statedebug}
  2030. DestroyReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]), true);
  2031. End;
  2032. {$ifdef arithopt}
  2033. Ch_MEAX..Ch_MEDI:
  2034. AddInstr2RegContents({$ifdef statedebug} asml,{$endif}
  2035. Paicpu(p),TCh2Reg(InstrProp.Ch[Cnt]));
  2036. {$endif arithopt}
  2037. Ch_CDirFlag: CurProp^.DirFlag := F_NotSet;
  2038. Ch_SDirFlag: CurProp^.DirFlag := F_Set;
  2039. Ch_Rop1: ReadOp(CurProp, Paicpu(p)^.oper[0]);
  2040. Ch_Rop2: ReadOp(CurProp, Paicpu(p)^.oper[1]);
  2041. Ch_ROp3: ReadOp(CurProp, Paicpu(p)^.oper[2]);
  2042. Ch_Wop1..Ch_RWop1:
  2043. Begin
  2044. If (InstrProp.Ch[Cnt] in [Ch_RWop1]) Then
  2045. ReadOp(CurProp, Paicpu(p)^.oper[0]);
  2046. DestroyOp(p, Paicpu(p)^.oper[0]);
  2047. End;
  2048. {$ifdef arithopt}
  2049. Ch_Mop1:
  2050. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  2051. Paicpu(p), Paicpu(p)^.oper[0]);
  2052. {$endif arithopt}
  2053. Ch_Wop2..Ch_RWop2:
  2054. Begin
  2055. If (InstrProp.Ch[Cnt] = Ch_RWop2) Then
  2056. ReadOp(CurProp, Paicpu(p)^.oper[1]);
  2057. DestroyOp(p, Paicpu(p)^.oper[1]);
  2058. End;
  2059. {$ifdef arithopt}
  2060. Ch_Mop2:
  2061. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  2062. Paicpu(p), Paicpu(p)^.oper[1]);
  2063. {$endif arithopt}
  2064. Ch_WOp3..Ch_RWOp3:
  2065. Begin
  2066. If (InstrProp.Ch[Cnt] = Ch_RWOp3) Then
  2067. ReadOp(CurProp, Paicpu(p)^.oper[2]);
  2068. DestroyOp(p, Paicpu(p)^.oper[2]);
  2069. End;
  2070. {$ifdef arithopt}
  2071. Ch_Mop3:
  2072. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  2073. Paicpu(p), Paicpu(p)^.oper[2]);
  2074. {$endif arithopt}
  2075. Ch_WMemEDI:
  2076. Begin
  2077. ReadReg(CurProp, R_EDI);
  2078. FillChar(TmpRef, SizeOf(TmpRef), 0);
  2079. TmpRef.Base := R_EDI;
  2080. DestroyRefs(p, TmpRef, R_NO)
  2081. End;
  2082. Ch_RFlags, Ch_WFlags, Ch_RWFlags, Ch_FPU:
  2083. Else
  2084. Begin
  2085. {$ifdef statedebug}
  2086. hp := new(pai_asm_comment,init(strpnew(
  2087. 'destroying all regs for prev instruction')));
  2088. insertllitem(asml,p, p^.next,hp);
  2089. {$endif statedebug}
  2090. DestroyAllRegs(CurProp);
  2091. End;
  2092. End;
  2093. Inc(Cnt);
  2094. End
  2095. End;
  2096. end;
  2097. End;
  2098. End
  2099. Else
  2100. Begin
  2101. {$ifdef statedebug}
  2102. hp := new(pai_asm_comment,init(strpnew(
  2103. 'destroying all regs: unknown pai: '+tostr(ord(p^.typ)))));
  2104. insertllitem(asml,p, p^.next,hp);
  2105. {$endif statedebug}
  2106. DestroyAllRegs(CurProp);
  2107. End;
  2108. End;
  2109. Inc(InstrCnt);
  2110. GetNextInstruction(p, p);
  2111. End;
  2112. End;
  2113. Function InitDFAPass2(BlockStart, BlockEnd: Pai): Boolean;
  2114. {reserves memory for the PPaiProps in one big memory block when not using
  2115. TP, returns False if not enough memory is available for the optimizer in all
  2116. cases}
  2117. Var p: Pai;
  2118. Count: Longint;
  2119. { TmpStr: String; }
  2120. Begin
  2121. P := BlockStart;
  2122. SkipHead(P);
  2123. NrOfPaiObjs := 0;
  2124. While (P <> BlockEnd) Do
  2125. Begin
  2126. {$IfDef JumpAnal}
  2127. Case P^.Typ Of
  2128. ait_label:
  2129. Begin
  2130. If (Pai_Label(p)^.l^.is_used) Then
  2131. LTable^[Pai_Label(P)^.l^.labelnr-LoLab].InstrNr := NrOfPaiObjs
  2132. End;
  2133. ait_instruction:
  2134. begin
  2135. if paicpu(p)^.is_jmp then
  2136. begin
  2137. If (pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr >= LoLab) And
  2138. (pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr <= HiLab) Then
  2139. Inc(LTable^[pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr-LoLab].RefsFound);
  2140. end;
  2141. end;
  2142. { ait_instruction:
  2143. Begin
  2144. If (Paicpu(p)^.opcode = A_PUSH) And
  2145. (Paicpu(p)^.oper[0].typ = top_symbol) And
  2146. (PCSymbol(Paicpu(p)^.oper[0])^.offset = 0) Then
  2147. Begin
  2148. TmpStr := StrPas(PCSymbol(Paicpu(p)^.oper[0])^.symbol);
  2149. If}
  2150. End;
  2151. {$EndIf JumpAnal}
  2152. Inc(NrOfPaiObjs);
  2153. GetNextInstruction(p, p);
  2154. End;
  2155. {$IfDef TP}
  2156. If (MemAvail < (SizeOf(TPaiProp)*NrOfPaiObjs))
  2157. Or (NrOfPaiObjs = 0)
  2158. {this doesn't have to be one contiguous block}
  2159. Then InitDFAPass2 := False
  2160. Else InitDFAPass2 := True;
  2161. {$Else}
  2162. {Uncomment the next line to see how much memory the reloading optimizer needs}
  2163. { Writeln((NrOfPaiObjs*(((SizeOf(TPaiProp)+3)div 4)*4)));}
  2164. {no need to check mem/maxavail, we've got as much virtual memory as we want}
  2165. If NrOfPaiObjs <> 0 Then
  2166. Begin
  2167. InitDFAPass2 := True;
  2168. GetMem(PaiPropBlock, NrOfPaiObjs*(((SizeOf(TPaiProp)+3)div 4)*4));
  2169. p := BlockStart;
  2170. SkipHead(p);
  2171. For Count := 1 To NrOfPaiObjs Do
  2172. Begin
  2173. PPaiProp(p^.OptInfo) := @PaiPropBlock^[Count];
  2174. GetNextInstruction(p, p);
  2175. End;
  2176. End
  2177. Else InitDFAPass2 := False;
  2178. {$EndIf TP}
  2179. End;
  2180. Function DFAPass2(
  2181. {$ifdef statedebug}
  2182. AsmL: PAasmOutPut;
  2183. {$endif statedebug}
  2184. BlockStart, BlockEnd: Pai): Boolean;
  2185. Begin
  2186. If InitDFAPass2(BlockStart, BlockEnd) Then
  2187. Begin
  2188. DoDFAPass2(
  2189. {$ifdef statedebug}
  2190. asml,
  2191. {$endif statedebug}
  2192. BlockStart, BlockEnd);
  2193. DFAPass2 := True
  2194. End
  2195. Else DFAPass2 := False;
  2196. End;
  2197. Procedure ShutDownDFA;
  2198. Begin
  2199. If LabDif <> 0 Then
  2200. FreeMem(LTable, LabDif*SizeOf(TLabelTableItem));
  2201. End;
  2202. End.
  2203. {
  2204. $Log$
  2205. Revision 1.2 2000-07-13 11:32:40 michael
  2206. + removed logs
  2207. }