florian a502921481 * overleft formatting issue 1 месяц назад
..
aoptcpu.pas 63c4bc29ba * cleanup 3 месяцев назад
aoptcpub.pas 9b0ff05ee8 - get rid of MaxOps, it is redundant with max_operands 7 лет назад
aoptcpuc.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 лет назад
aoptcpud.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 лет назад
cgcpu.pas a502921481 * overleft formatting issue 1 месяц назад
cpuinfo.pas 0bbd64b9de Make Zicsr and Zifencei explicitly part of subarch name since it is not included in the base ISA 20191213 2 месяцев назад
cpunode.pas 971d97c179 + RiscV: make use of the fmv.w.x/fmv.d.x instruction to load 0.0 11 месяцев назад
cpupara.pas b7608b045b * RiscV: push_addr_param unified 1 год назад
cpupi.pas 281b3ad276 * fix case completeness and unreachable code warnings in compiler that would 6 лет назад
cputarg.pas bedd4edc72 + first work for esp32-c3 support 2 лет назад
hlcgcpu.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 лет назад
nrv32add.pas c83e6c34a9 riscv32: Fix 64bit comparisons 3 лет назад
nrv32cal.pas 44150f43ac * RISC-V 32 compilation fixed 7 лет назад
nrv32cnv.pas 281b3ad276 * fix case completeness and unreachable code warnings in compiler that would 6 лет назад
nrv32mat.pas a291347d98 * emit_div/mod_reg_reg_reg takes now three operands 3 месяцев назад
nrv32util.pas b4a83e29a4 * fixes RiscV32 building 1 год назад
rrv32con.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
rrv32dwa.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
rrv32nor.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
rrv32num.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
rrv32rni.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
rrv32sri.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
rrv32sta.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
rrv32std.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
rrv32sup.inc 8d0bdf2f16 + RiscV: vector registers 1 год назад
symcpu.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 7 лет назад
tripletcpu.pas eb7ba1690e * mark all external assemblers using an LLVM tool using af_llvm 5 лет назад