cpubase.pas 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Contains the base types for the m68k
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. { This Unit contains the base types for the m68k
  18. }
  19. unit cpubase;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,globals,
  24. strings,cutils,cclasses,aasmbase,cpuinfo,cgbase;
  25. {*****************************************************************************
  26. Assembler Opcodes
  27. *****************************************************************************}
  28. type
  29. tasmop = {$i m68kop.inc}
  30. {# This should define the array of instructions as string }
  31. op2strtable=array[tasmop] of string[11];
  32. Const
  33. {# First value of opcode enumeration }
  34. firstop = low(tasmop);
  35. {# Last value of opcode enumeration }
  36. lastop = high(tasmop);
  37. {*****************************************************************************
  38. Registers
  39. *****************************************************************************}
  40. type
  41. { Number of registers used for indexing in tables }
  42. tregisterindex=0..{$i r68knor.inc}-1;
  43. const
  44. { Available Superregisters }
  45. {$i r68ksup.inc}
  46. RS_SP = RS_A7;
  47. R_SUBWHOLE = R_SUBD;
  48. { Available Registers }
  49. {$i r68kcon.inc}
  50. NR_SP = NR_A7;
  51. { Integer Super registers first and last }
  52. first_int_imreg = 8;
  53. { Float Super register first and last }
  54. first_fpu_imreg = 8;
  55. { Integer Super registers first and last }
  56. first_addr_imreg = 8;
  57. { MM Super register first and last }
  58. first_mm_supreg = 0;
  59. first_mm_imreg = 0;
  60. maxfpuregs = 8;
  61. { include regnumber_count_bsstart }
  62. {$i r68kbss.inc}
  63. regnumber_table : array[tregisterindex] of tregister = (
  64. {$i r68knum.inc}
  65. );
  66. regstabs_table : array[tregisterindex] of shortint = (
  67. {$i r68ksta.inc}
  68. );
  69. regdwarf_table : array[tregisterindex] of shortint = (
  70. { TODO: reused stabs values!}
  71. {$i r68ksta.inc}
  72. );
  73. { registers which may be destroyed by calls }
  74. VOLATILE_INTREGISTERS = [RS_D0,RS_D1];
  75. VOLATILE_FPUREGISTERS = [RS_FP0,RS_FP1];
  76. VOLATILE_ADDRESSREGISTERS = [RS_A0,RS_A1];
  77. {*****************************************************************************
  78. Conditions
  79. *****************************************************************************}
  80. type
  81. TAsmCond=(C_None,
  82. C_CC,C_LS,C_CS,C_LT,C_EQ,C_MI,C_F,C_NE,
  83. C_GE,C_PL,C_GT,C_T,C_HI,C_VC,C_LE,C_VS
  84. );
  85. const
  86. cond2str:array[TAsmCond] of string[3]=('',
  87. 'cc','ls','cs','lt','eq','mi','f','ne',
  88. 'ge','pl','gt','t','hi','vc','le','vs'
  89. );
  90. {*****************************************************************************
  91. Flags
  92. *****************************************************************************}
  93. type
  94. TResFlags = (
  95. F_E,F_NE,
  96. F_G,F_L,F_GE,F_LE,F_C,F_NC,F_A,F_AE,F_B,F_BE,
  97. F_FE,F_FNE,
  98. F_FG,F_FL,F_FGE,F_FLE
  99. );
  100. const
  101. FloatResFlags = [F_FE..F_FLE];
  102. {*****************************************************************************
  103. Reference
  104. *****************************************************************************}
  105. type
  106. { direction of address register : }
  107. { (An) (An)+ -(An) }
  108. tdirection = (dir_none,dir_inc,dir_dec);
  109. {*****************************************************************************
  110. Operand Sizes
  111. *****************************************************************************}
  112. { S_NO = No Size of operand }
  113. { S_B = 8-bit size operand }
  114. { S_W = 16-bit size operand }
  115. { S_L = 32-bit size operand }
  116. { Floating point types }
  117. { S_FS = single type (32 bit) }
  118. { S_FD = double/64bit integer }
  119. { S_FX = Extended type }
  120. topsize = (S_NO,S_B,S_W,S_L,S_FS,S_FD,S_FX);
  121. TOpSizes = set of topsize;
  122. {*****************************************************************************
  123. Constants
  124. *****************************************************************************}
  125. const
  126. {# maximum number of operands in assembler instruction }
  127. max_operands = 6;
  128. {*****************************************************************************
  129. Default generic sizes
  130. *****************************************************************************}
  131. {# Defines the default address size for a processor, }
  132. OS_ADDR = OS_32;
  133. {# the natural int size for a processor,
  134. has to match osuinttype/ossinttype as initialized in psystem }
  135. OS_INT = OS_32;
  136. OS_SINT = OS_S32;
  137. {# the maximum float size for a processor, }
  138. OS_FLOAT = OS_F64;
  139. {# the size of a vector register for a processor }
  140. OS_VECTOR = OS_M128;
  141. {*****************************************************************************
  142. GDB Information
  143. *****************************************************************************}
  144. {# Register indexes for stabs information, when some
  145. parameters or variables are stored in registers.
  146. Taken from m68kelf.h (DBX_REGISTER_NUMBER)
  147. from GCC 3.x source code.
  148. This is not compatible with the m68k-sun
  149. implementation.
  150. }
  151. stab_regindex : array[tregisterindex] of shortint =
  152. (
  153. {$i r68ksta.inc}
  154. );
  155. {*****************************************************************************
  156. Generic Register names
  157. *****************************************************************************}
  158. {# Stack pointer register }
  159. NR_STACK_POINTER_REG = NR_SP;
  160. RS_STACK_POINTER_REG = RS_SP;
  161. {# Frame pointer register }
  162. { Frame pointer register (initialized in tcpuprocinfo.init_framepointer) }
  163. RS_FRAME_POINTER_REG: tsuperregister = RS_NO;
  164. NR_FRAME_POINTER_REG: tregister = NR_NO;
  165. {# Register for addressing absolute data in a position independant way,
  166. such as in PIC code. The exact meaning is ABI specific. For
  167. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  168. }
  169. RS_PIC_OFFSET_REG: tsuperregister = RS_NO;
  170. NR_PIC_OFFSET_REG: tregister = NR_NO;
  171. { Return address for DWARF }
  172. NR_RETURN_ADDRESS_REG = NR_A0;
  173. RS_RETURN_ADDRESS_REG = RS_A0;
  174. { Results are returned in this register (32-bit values) }
  175. NR_FUNCTION_RETURN_REG = NR_D0;
  176. RS_FUNCTION_RETURN_REG = RS_D0;
  177. { Low part of 64bit return value }
  178. NR_FUNCTION_RETURN64_LOW_REG = NR_D0;
  179. RS_FUNCTION_RETURN64_LOW_REG = RS_D0;
  180. { High part of 64bit return value }
  181. NR_FUNCTION_RETURN64_HIGH_REG = NR_D1;
  182. RS_FUNCTION_RETURN64_HIGH_REG = RS_D1;
  183. { The value returned from a function is available in this register }
  184. NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
  185. RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
  186. { The lowh part of 64bit value returned from a function }
  187. NR_FUNCTION_RESULT64_LOW_REG = NR_FUNCTION_RETURN64_LOW_REG;
  188. RS_FUNCTION_RESULT64_LOW_REG = RS_FUNCTION_RETURN64_LOW_REG;
  189. { The high part of 64bit value returned from a function }
  190. NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
  191. RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
  192. {# Floating point results will be placed into this register }
  193. NR_FPU_RESULT_REG = NR_FP0;
  194. {# This is m68k C ABI specific. Some ABIs expect the address of the
  195. return struct result value in this register. Note that it could be
  196. either A0 or A1, so later it must be decided on target/ABI specific
  197. basis. We start with A1 now, because that's what Linux/m68k does
  198. currently. (KB) }
  199. RS_M68K_STRUCT_RESULT_REG: tsuperregister = RS_A1;
  200. NR_M68K_STRUCT_RESULT_REG: tregister = NR_A1;
  201. NR_DEFAULTFLAGS = NR_SR;
  202. RS_DEFAULTFLAGS = RS_SR;
  203. {*****************************************************************************
  204. GCC /ABI linking information
  205. *****************************************************************************}
  206. {# Required parameter alignment when calling a routine declared as
  207. stdcall and cdecl. The alignment value should be the one defined
  208. by GCC or the target ABI.
  209. The value of this constant is equal to the constant
  210. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  211. }
  212. std_param_align = 4; { for 32-bit version only }
  213. {*****************************************************************************
  214. CPU Dependent Constants
  215. *****************************************************************************}
  216. {*****************************************************************************
  217. Helpers
  218. *****************************************************************************}
  219. const
  220. tcgsize2opsize: Array[tcgsize] of topsize =
  221. (S_NO,S_B,S_W,S_L,S_L,S_NO,S_B,S_W,S_L,S_L,S_NO,
  222. S_FS,S_FD,S_FX,S_NO,S_NO,
  223. S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO);
  224. function is_calljmp(o:tasmop):boolean;
  225. procedure inverse_flags(var r : TResFlags);
  226. function flags_to_cond(const f: TResFlags) : TAsmCond;
  227. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  228. function reg_cgsize(const reg: tregister): tcgsize;
  229. function findreg_by_number(r:Tregister):tregisterindex;
  230. function std_regnum_search(const s:string):Tregister;
  231. function std_regname(r:Tregister):string;
  232. function isaddressregister(reg : tregister) : boolean;
  233. function isintregister(reg : tregister) : boolean;
  234. function isfpuregister(reg : tregister) : boolean;
  235. function fpuregopsize: TOpSize; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  236. function fpuregsize: aint; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  237. function needs_unaligned(const refalignment: aint; const size: tcgsize): boolean;
  238. function isregoverlap(reg1: tregister; reg2: tregister): boolean;
  239. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  240. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  241. { Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
  242. function condition_in(const Subset, c: TAsmCond): Boolean;
  243. function dwarf_reg(r:tregister):shortint;
  244. function dwarf_reg_no_error(r:tregister):shortint;
  245. function eh_return_data_regno(nr: longint): longint;
  246. function isvalue8bit(val: tcgint): boolean;
  247. function isvalue16bit(val: tcgint): boolean;
  248. function isvalueforaddqsubq(val: tcgint): boolean;
  249. implementation
  250. uses
  251. verbose,
  252. rgbase;
  253. const
  254. std_regname_table : TRegNameTable = (
  255. {$i r68kstd.inc}
  256. );
  257. std_regfullname_table : TRegNameTable = (
  258. {$i r68kstdf.inc}
  259. );
  260. regnumber_index : array[tregisterindex] of tregisterindex = (
  261. {$i r68krni.inc}
  262. );
  263. std_regname_index : array[tregisterindex] of tregisterindex = (
  264. {$i r68ksri.inc}
  265. );
  266. {*****************************************************************************
  267. Helpers
  268. *****************************************************************************}
  269. function is_calljmp(o:tasmop):boolean;
  270. begin
  271. case o of
  272. A_BXX,A_FBXX,A_DBXX,
  273. A_BHS,A_BLO,A_BHI,A_BLS,A_BCC,A_BCS,A_BNE,A_BEQ,A_BVC,A_BVS,
  274. A_BPL,A_BMI,A_BGE,A_BLT,A_BGT,A_BLE,A_BRA,
  275. A_DBT,A_DBF,A_DBHI,A_DBLS,A_DBCC,A_DBHS,A_DBCS,A_DBLO,A_DBNE,
  276. A_DBEQ,A_DBVC,A_DBVS,A_DBPL,A_DBMI,A_DBGE,A_DBLT,A_DBGT,A_DBLE,
  277. A_DBRA,
  278. A_FBF,A_FBEQ,A_FBOGT,A_FBOGE,A_FBOLT,A_FBOLE,A_FBOGL,A_FBOR,A_FBUN,
  279. A_FBUEQ,A_FBUGT,A_FBUGE,A_FBULT,A_FBULE,A_FBNE,A_FBT,A_FBSF,A_FBSEQ,
  280. A_FBGT,A_FBGE,A_FBLT,A_FBLE,A_FBGL,A_FBGLE,A_FBNGLE,A_FBNGL,A_FBNLE,
  281. A_FBNLT,A_FBNGE,A_FBNGT,A_FBSNE,A_FBST,
  282. A_FDBF,A_FDBEQ,A_FDBOGT,A_FDBOGE,A_FDBOLT,A_FDBOLE,A_FDBOGL,A_FDBOR,
  283. A_FDBUN,A_FDBUEQ,A_FDBUGT,A_FDBUGE,A_FDBULT,A_FDBULE,A_FDBNE,A_FDBT,
  284. A_FDBSF,A_FDBSEQ,A_FDBGT,A_FDBGE,A_FDBLT,A_FDBLE,A_FDBGL,A_FDBGLE,
  285. A_FDBNGLE,A_FDBNGL,A_FDBNLE,A_FDBNLT,A_FDBNGE,A_FDBNGT,A_FDBSNE,
  286. A_FDBST,
  287. A_JSR,A_BSR,A_JMP:
  288. is_calljmp:=true;
  289. else
  290. is_calljmp:=false;
  291. end;
  292. end;
  293. procedure inverse_flags(var r: TResFlags);
  294. const flagsinvers : array[F_E..F_FLE] of tresflags =
  295. (F_NE,F_E,
  296. F_LE,F_GE,
  297. F_L,F_G,
  298. F_NC,F_C,
  299. F_BE,F_B,
  300. F_AE,F_A,
  301. F_FNE,F_FE,
  302. F_FLE,F_FGE,
  303. F_FL,F_G);
  304. begin
  305. r:=flagsinvers[r];
  306. end;
  307. function flags_to_cond(const f: TResFlags) : TAsmCond;
  308. const flags2cond: array[tresflags] of tasmcond = (
  309. C_EQ,{F_E equal}
  310. C_NE,{F_NE not equal}
  311. C_GT,{F_G gt signed}
  312. C_LT,{F_L lt signed}
  313. C_GE,{F_GE ge signed}
  314. C_LE,{F_LE le signed}
  315. C_CS,{F_C carry set}
  316. C_CC,{F_NC carry clear}
  317. C_HI,{F_A gt unsigned}
  318. C_CC,{F_AE ge unsigned}
  319. C_CS,{F_B lt unsigned}
  320. C_LS,{F_BE le unsigned}
  321. C_EQ,{F_FEQ }
  322. C_NE,{F_FNE }
  323. C_GT,{F_FG }
  324. C_LT,{F_FL }
  325. C_GE,{F_FGE }
  326. C_LE);{F_FLE }
  327. begin
  328. flags_to_cond := flags2cond[f];
  329. end;
  330. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  331. begin
  332. case regtype of
  333. R_INTREGISTER:
  334. if (CPUM68K_HAS_BYTEWORDMATH in cpu_capabilities[current_settings.cputype]) then
  335. case s of
  336. OS_8,OS_S8:
  337. cgsize2subreg:=R_SUBL;
  338. OS_16,OS_S16:
  339. cgsize2subreg:=R_SUBW;
  340. OS_32,OS_S32:
  341. cgsize2subreg:=R_SUBD;
  342. OS_64,OS_S64:
  343. cgsize2subreg:=R_SUBWHOLE;
  344. OS_NO:
  345. cgsize2subreg:=R_SUBNONE;
  346. else
  347. internalerror(2019090801);
  348. end
  349. else
  350. case s of
  351. OS_8,OS_S8,
  352. OS_16,OS_S16,
  353. OS_32,OS_S32,
  354. OS_64,OS_S64:
  355. cgsize2subreg:=R_SUBWHOLE;
  356. OS_NO:
  357. cgsize2subreg:=R_SUBNONE;
  358. else
  359. internalerror(2019090803);
  360. end;
  361. R_ADDRESSREGISTER:
  362. cgsize2subreg:=R_SUBWHOLE;
  363. R_FPUREGISTER:
  364. cgsize2subreg:=R_SUBNONE;
  365. else
  366. internalerror(2019090802);
  367. end;
  368. end;
  369. function reg_cgsize(const reg: tregister): tcgsize;
  370. { 68881 & compatibles -> 80 bit }
  371. { CF FPU -> 64 bit }
  372. const
  373. fpureg_cgsize: array[boolean] of tcgsize = ( OS_F80, OS_F64 );
  374. begin
  375. case getregtype(reg) of
  376. R_ADDRESSREGISTER,
  377. R_INTREGISTER :
  378. result:=OS_32;
  379. R_FPUREGISTER :
  380. result:=fpureg_cgsize[current_settings.fputype = fpu_coldfire];
  381. else
  382. internalerror(200303181);
  383. end;
  384. end;
  385. function findreg_by_number(r:Tregister):tregisterindex;
  386. begin
  387. result:=findreg_by_number_table(r,regnumber_index);
  388. end;
  389. function std_regnum_search(const s:string):Tregister;
  390. begin
  391. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  392. if result=NR_NO then
  393. begin
  394. result:=regnumber_table[findreg_by_name_table(s,std_regfullname_table,std_regname_index)];
  395. end;
  396. end;
  397. function std_regname(r:Tregister):string;
  398. var
  399. p : tregisterindex;
  400. begin
  401. p:=findreg_by_number_table(r,regnumber_index);
  402. if p<>0 then
  403. result:=std_regname_table[p]
  404. else
  405. result:=generic_regname(r);
  406. end;
  407. function isaddressregister(reg : tregister) : boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  408. begin
  409. result:=getregtype(reg)=R_ADDRESSREGISTER;
  410. end;
  411. function isintregister(reg : tregister) : boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  412. begin
  413. result:=getregtype(reg)=R_INTREGISTER;
  414. end;
  415. function isfpuregister(reg : tregister) : boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  416. begin
  417. result:=getregtype(reg)=R_FPUREGISTER;
  418. end;
  419. function fpuregopsize: TOpSize; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  420. const
  421. fpu_regopsize: array[boolean] of TOpSize = ( S_FX, S_FD );
  422. begin
  423. result:=fpu_regopsize[current_settings.fputype = fpu_coldfire];
  424. end;
  425. function fpuregsize: aint; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  426. const
  427. fpu_regsize: array[boolean] of aint = ( 12, 8 ); { S_FX is 12 bytes on '881 }
  428. begin
  429. result:=fpu_regsize[current_settings.fputype = fpu_coldfire];
  430. end;
  431. function needs_unaligned(const refalignment: aint; const size: tcgsize): boolean;
  432. begin
  433. result:=not(CPUM68K_HAS_UNALIGNED in cpu_capabilities[current_settings.cputype]) and
  434. (refalignment = 1) and
  435. (tcgsize2size[size] > 1);
  436. end;
  437. // the function returns true, if the registers overlap (subreg of the same superregister and same type)
  438. function isregoverlap(reg1: tregister; reg2: tregister): boolean;
  439. begin
  440. tregisterrec(reg1).subreg:=R_SUBNONE;
  441. tregisterrec(reg2).subreg:=R_SUBNONE;
  442. result:=reg1=reg2;
  443. end;
  444. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  445. const
  446. inverse:array[TAsmCond] of TAsmCond=(C_None,
  447. //C_CC,C_LS,C_CS,C_LT,C_EQ,C_MI,C_F,C_NE,
  448. C_CS,C_HI,C_CC,C_GE,C_NE,C_PL,C_T,C_EQ,
  449. //C_GE,C_PL,C_GT,C_T,C_HI,C_VC,C_LE,C_VS
  450. C_LT,C_MI,C_LE,C_F,C_LS,C_VS,C_GT,C_VC
  451. );
  452. begin
  453. result := inverse[c];
  454. end;
  455. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  456. begin
  457. result := c1 = c2;
  458. end;
  459. { Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
  460. function condition_in(const Subset, c: TAsmCond): Boolean;
  461. begin
  462. Result := (c = C_None) or conditions_equal(Subset, c);
  463. { Please update as necessary. [Kit] }
  464. if not Result then
  465. case Subset of
  466. C_EQ:
  467. Result := (c in [C_GE, C_LE]);
  468. C_LT:
  469. Result := (c in [C_LE]);
  470. C_GT:
  471. Result := (c in [C_GE]);
  472. else
  473. Result := False;
  474. end;
  475. end;
  476. function dwarf_reg(r:tregister):shortint;
  477. begin
  478. result:=regdwarf_table[findreg_by_number(r)];
  479. if result=-1 then
  480. internalerror(200603251);
  481. end;
  482. function dwarf_reg_no_error(r:tregister):shortint;
  483. begin
  484. result:=regdwarf_table[findreg_by_number(r)];
  485. end;
  486. function eh_return_data_regno(nr: longint): longint;
  487. begin
  488. result:=-1;
  489. end;
  490. { returns true if given value fits to an 8bit signed integer }
  491. function isvalue8bit(val: tcgint): boolean;
  492. begin
  493. isvalue8bit := (val >= low(shortint)) and (val <= high(shortint));
  494. end;
  495. { returns true if given value fits to a 16bit signed integer }
  496. function isvalue16bit(val: tcgint): boolean;
  497. begin
  498. isvalue16bit := (val >= low(smallint)) and (val <= high(smallint));
  499. end;
  500. { returns true if given value fits addq/subq argument, so in 1 - 8 range }
  501. function isvalueforaddqsubq(val: tcgint): boolean;
  502. begin
  503. isvalueforaddqsubq := (val >= 1) and (val <= 8);
  504. end;
  505. end.