cgcpu.pas 67 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_load_reg_cgpara(list : TAsmList; size : tcgsize;r : tregister; const cgpara : tcgpara);override;
  40. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  41. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_name(list : TAsmList;const s : string); override;
  58. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  59. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  60. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  61. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  62. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  63. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  64. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  65. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  66. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  67. procedure g_save_registers(list : TAsmList);override;
  68. procedure g_restore_registers(list : TAsmList);override;
  69. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  70. procedure fixref(list : TAsmList;var ref : treference);
  71. function normalize_ref(list : TAsmList;ref : treference;
  72. tmpreg : tregister) : treference;
  73. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  74. procedure a_adjust_sp(list: TAsmList; value: longint);
  75. function GetLoad(const ref : treference) : tasmop;
  76. function GetStore(const ref: treference): tasmop;
  77. protected
  78. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  79. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  80. end;
  81. tcg64favr = class(tcg64f32)
  82. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  83. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  84. end;
  85. procedure create_codegen;
  86. const
  87. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  88. A_NONE,A_MULS,A_MUL,A_NEG,A_COM,A_OR,
  89. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  90. implementation
  91. uses
  92. globals,verbose,systems,cutils,
  93. fmodule,
  94. symconst,symsym,symtable,
  95. tgobj,rgobj,
  96. procinfo,cpupi,
  97. paramgr;
  98. procedure tcgavr.init_register_allocators;
  99. begin
  100. inherited init_register_allocators;
  101. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  102. [RS_R18,RS_R19,RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  103. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,
  104. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17],first_int_imreg,[]);
  105. end;
  106. procedure tcgavr.done_register_allocators;
  107. begin
  108. rg[R_INTREGISTER].free;
  109. // rg[R_ADDRESSREGISTER].free;
  110. inherited done_register_allocators;
  111. end;
  112. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  113. var
  114. tmp1,tmp2,tmp3 : TRegister;
  115. begin
  116. case size of
  117. OS_8,OS_S8:
  118. Result:=inherited getintregister(list, size);
  119. OS_16,OS_S16:
  120. begin
  121. Result:=inherited getintregister(list, OS_8);
  122. { ensure that the high register can be retrieved by
  123. GetNextReg
  124. }
  125. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  126. internalerror(2011021331);
  127. end;
  128. OS_32,OS_S32:
  129. begin
  130. Result:=inherited getintregister(list, OS_8);
  131. tmp1:=inherited getintregister(list, OS_8);
  132. { ensure that the high register can be retrieved by
  133. GetNextReg
  134. }
  135. if tmp1<>GetNextReg(Result) then
  136. internalerror(2011021332);
  137. tmp2:=inherited getintregister(list, OS_8);
  138. { ensure that the upper register can be retrieved by
  139. GetNextReg
  140. }
  141. if tmp2<>GetNextReg(tmp1) then
  142. internalerror(2011021333);
  143. tmp3:=inherited getintregister(list, OS_8);
  144. { ensure that the upper register can be retrieved by
  145. GetNextReg
  146. }
  147. if tmp3<>GetNextReg(tmp2) then
  148. internalerror(2011021334);
  149. end;
  150. else
  151. internalerror(2011021330);
  152. end;
  153. end;
  154. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  155. begin
  156. Result:=getintregister(list,OS_ADDR);
  157. end;
  158. procedure tcgavr.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);
  159. procedure load_para_loc(r : TRegister;paraloc : PCGParaLocation);
  160. var
  161. ref : treference;
  162. begin
  163. paramanager.allocparaloc(list,paraloc);
  164. case paraloc^.loc of
  165. LOC_REGISTER,LOC_CREGISTER:
  166. a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
  167. LOC_REFERENCE,LOC_CREFERENCE:
  168. begin
  169. reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2);
  170. a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
  171. end;
  172. else
  173. internalerror(2002071004);
  174. end;
  175. end;
  176. var
  177. i, i2 : longint;
  178. hp : PCGParaLocation;
  179. begin
  180. { if use_push(cgpara) then
  181. begin
  182. if tcgsize2size[cgpara.Size] > 2 then
  183. begin
  184. if tcgsize2size[cgpara.Size] <> 4 then
  185. internalerror(2013031101);
  186. if cgpara.location^.Next = nil then
  187. begin
  188. if tcgsize2size[cgpara.location^.size] <> 4 then
  189. internalerror(2013031101);
  190. end
  191. else
  192. begin
  193. if tcgsize2size[cgpara.location^.size] <> 2 then
  194. internalerror(2013031101);
  195. if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
  196. internalerror(2013031101);
  197. if cgpara.location^.Next^.Next <> nil then
  198. internalerror(2013031101);
  199. end;
  200. if tcgsize2size[cgpara.size]>cgpara.alignment then
  201. pushsize:=cgpara.size
  202. else
  203. pushsize:=int_cgsize(cgpara.alignment);
  204. pushsize2 := int_cgsize(tcgsize2size[pushsize] - 2);
  205. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize2],makeregsize(list,GetNextReg(r),pushsize2)));
  206. list.concat(taicpu.op_reg(A_PUSH,S_W,makeregsize(list,r,OS_16)));
  207. end
  208. else
  209. begin
  210. cgpara.check_simple_location;
  211. if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
  212. pushsize:=cgpara.location^.size
  213. else
  214. pushsize:=int_cgsize(cgpara.alignment);
  215. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize],makeregsize(list,r,pushsize)));
  216. end;
  217. end
  218. else }
  219. begin
  220. if not(tcgsize2size[cgpara.Size] in [1..4]) then
  221. internalerror(2014011101);
  222. hp:=cgpara.location;
  223. i:=0;
  224. while i<tcgsize2size[cgpara.Size] do
  225. begin
  226. if not(assigned(hp)) then
  227. internalerror(2014011102);
  228. inc(i, tcgsize2size[hp^.Size]);
  229. if hp^.Loc=LOC_REGISTER then
  230. begin
  231. load_para_loc(r,hp);
  232. hp:=hp^.Next;
  233. r:=GetNextReg(r);
  234. end
  235. else
  236. begin
  237. load_para_loc(r,hp);
  238. for i2:=1 to tcgsize2size[hp^.Size] do
  239. r:=GetNextReg(r);
  240. hp:=hp^.Next;
  241. end;
  242. end;
  243. if assigned(hp) then
  244. internalerror(2014011103);
  245. end;
  246. end;
  247. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  248. var
  249. i : longint;
  250. hp : PCGParaLocation;
  251. begin
  252. if not(tcgsize2size[paraloc.Size] in [1..4]) then
  253. internalerror(2014011101);
  254. hp:=paraloc.location;
  255. for i:=1 to tcgsize2size[paraloc.Size] do
  256. begin
  257. if not(assigned(hp)) or
  258. (tcgsize2size[hp^.size]<>1) or
  259. (hp^.shiftval<>0) then
  260. internalerror(2014011105);
  261. case hp^.loc of
  262. LOC_REGISTER,LOC_CREGISTER:
  263. a_load_const_reg(list,hp^.size,(a shr (8*(i-1))) and $ff,hp^.register);
  264. LOC_REFERENCE,LOC_CREFERENCE:
  265. begin
  266. list.concat(taicpu.op_const(A_PUSH,(a shr (8*(i-1))) and $ff));
  267. end;
  268. else
  269. internalerror(2002071004);
  270. end;
  271. hp:=hp^.Next;
  272. end;
  273. if assigned(hp) then
  274. internalerror(2014011104);
  275. end;
  276. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  277. var
  278. tmpref, ref: treference;
  279. location: pcgparalocation;
  280. sizeleft: tcgint;
  281. begin
  282. location := paraloc.location;
  283. tmpref := r;
  284. sizeleft := paraloc.intsize;
  285. while assigned(location) do
  286. begin
  287. paramanager.allocparaloc(list,location);
  288. case location^.loc of
  289. LOC_REGISTER,LOC_CREGISTER:
  290. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  291. LOC_REFERENCE:
  292. begin
  293. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  294. { doubles in softemu mode have a strange order of registers and references }
  295. if location^.size=OS_32 then
  296. g_concatcopy(list,tmpref,ref,4)
  297. else
  298. begin
  299. g_concatcopy(list,tmpref,ref,sizeleft);
  300. if assigned(location^.next) then
  301. internalerror(2005010710);
  302. end;
  303. end;
  304. LOC_VOID:
  305. begin
  306. // nothing to do
  307. end;
  308. else
  309. internalerror(2002081103);
  310. end;
  311. inc(tmpref.offset,tcgsize2size[location^.size]);
  312. dec(sizeleft,tcgsize2size[location^.size]);
  313. location := location^.next;
  314. end;
  315. end;
  316. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  317. var
  318. tmpreg: tregister;
  319. begin
  320. tmpreg:=getaddressregister(list);
  321. a_loadaddr_ref_reg(list,r,tmpreg);
  322. a_load_reg_cgpara(list,OS_ADDR,tmpreg,paraloc);
  323. end;
  324. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  325. begin
  326. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  327. list.concat(taicpu.op_sym(A_CALL,current_asmdata.RefAsmSymbol(s)))
  328. else
  329. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  330. include(current_procinfo.flags,pi_do_call);
  331. end;
  332. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  333. begin
  334. a_reg_alloc(list,NR_ZLO);
  335. a_reg_alloc(list,NR_ZHI);
  336. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  337. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  338. list.concat(taicpu.op_none(A_ICALL));
  339. a_reg_dealloc(list,NR_ZLO);
  340. a_reg_dealloc(list,NR_ZHI);
  341. include(current_procinfo.flags,pi_do_call);
  342. end;
  343. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  344. begin
  345. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  346. internalerror(2012102403);
  347. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  348. end;
  349. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  350. begin
  351. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  352. internalerror(2012102401);
  353. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  354. end;
  355. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  356. var
  357. countreg,
  358. tmpreg: tregister;
  359. i : integer;
  360. instr : taicpu;
  361. paraloc1,paraloc2,paraloc3 : TCGPara;
  362. l1,l2 : tasmlabel;
  363. pd : tprocdef;
  364. procedure NextSrcDst;
  365. begin
  366. if i=5 then
  367. begin
  368. dst:=dsthi;
  369. src:=srchi;
  370. end
  371. else
  372. begin
  373. dst:=GetNextReg(dst);
  374. src:=GetNextReg(src);
  375. end;
  376. end;
  377. { iterates TmpReg through all registers of dst }
  378. procedure NextTmp;
  379. begin
  380. if i=5 then
  381. tmpreg:=dsthi
  382. else
  383. tmpreg:=GetNextReg(tmpreg);
  384. end;
  385. begin
  386. case op of
  387. OP_ADD:
  388. begin
  389. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  390. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  391. begin
  392. for i:=2 to tcgsize2size[size] do
  393. begin
  394. NextSrcDst;
  395. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  396. end;
  397. end;
  398. end;
  399. OP_SUB:
  400. begin
  401. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  402. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  403. begin
  404. for i:=2 to tcgsize2size[size] do
  405. begin
  406. NextSrcDst;
  407. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  408. end;
  409. end;
  410. end;
  411. OP_NEG:
  412. begin
  413. if src<>dst then
  414. begin
  415. if size in [OS_S64,OS_64] then
  416. begin
  417. a_load_reg_reg(list,OS_32,OS_32,src,dst);
  418. a_load_reg_reg(list,OS_32,OS_32,srchi,dsthi);
  419. end
  420. else
  421. a_load_reg_reg(list,size,size,src,dst);
  422. end;
  423. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  424. begin
  425. tmpreg:=GetNextReg(dst);
  426. for i:=2 to tcgsize2size[size] do
  427. begin
  428. list.concat(taicpu.op_reg(A_COM,tmpreg));
  429. NextTmp;
  430. end;
  431. list.concat(taicpu.op_reg(A_NEG,dst));
  432. tmpreg:=GetNextReg(dst);
  433. for i:=2 to tcgsize2size[size] do
  434. begin
  435. list.concat(taicpu.op_reg_const(A_SBCI,tmpreg,-1));
  436. NextTmp;
  437. end;
  438. end;
  439. end;
  440. OP_NOT:
  441. begin
  442. for i:=1 to tcgsize2size[size] do
  443. begin
  444. if src<>dst then
  445. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  446. list.concat(taicpu.op_reg(A_COM,dst));
  447. NextSrcDst;
  448. end;
  449. end;
  450. OP_MUL,OP_IMUL:
  451. begin
  452. if size in [OS_8,OS_S8] then
  453. begin
  454. getcpuregister(list,NR_R0);
  455. getcpuregister(list,NR_R1);
  456. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  457. ungetcpuregister(list,NR_R1);
  458. list.concat(taicpu.op_reg_reg(A_MOV,dst,NR_R0));
  459. ungetcpuregister(list,NR_R0);
  460. end
  461. else if size=OS_16 then
  462. begin
  463. pd:=search_system_proc('fpc_mul_word');
  464. paraloc1.init;
  465. paraloc2.init;
  466. paraloc3.init;
  467. paramanager.getintparaloc(list,pd,1,paraloc1);
  468. paramanager.getintparaloc(list,pd,2,paraloc2);
  469. paramanager.getintparaloc(list,pd,3,paraloc3);
  470. a_load_const_cgpara(list,OS_8,0,paraloc3);
  471. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  472. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  473. paramanager.freecgpara(list,paraloc3);
  474. paramanager.freecgpara(list,paraloc2);
  475. paramanager.freecgpara(list,paraloc1);
  476. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  477. a_call_name(list,'FPC_MUL_WORD',false);
  478. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  479. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  480. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  481. paraloc3.done;
  482. paraloc2.done;
  483. paraloc1.done;
  484. end
  485. else
  486. internalerror(2011022002);
  487. end;
  488. OP_DIV,OP_IDIV:
  489. { special stuff, needs separate handling inside code }
  490. { generator }
  491. internalerror(2011022001);
  492. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  493. begin
  494. current_asmdata.getjumplabel(l1);
  495. current_asmdata.getjumplabel(l2);
  496. countreg:=getintregister(list,OS_8);
  497. a_load_reg_reg(list,size,OS_8,src,countreg);
  498. list.concat(taicpu.op_reg_const(A_CPI,countreg,0));
  499. a_jmp_flags(list,F_EQ,l2);
  500. cg.a_label(list,l1);
  501. case op of
  502. OP_SHR:
  503. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  504. OP_SHL:
  505. list.concat(taicpu.op_reg(A_LSL,dst));
  506. OP_SAR:
  507. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  508. OP_ROR:
  509. begin
  510. { load carry? }
  511. if not(size in [OS_8,OS_S8]) then
  512. begin
  513. list.concat(taicpu.op_none(A_CLC));
  514. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  515. list.concat(taicpu.op_none(A_SEC));
  516. end;
  517. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  518. end;
  519. OP_ROL:
  520. begin
  521. { load carry? }
  522. if not(size in [OS_8,OS_S8]) then
  523. begin
  524. list.concat(taicpu.op_none(A_CLC));
  525. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  526. list.concat(taicpu.op_none(A_SEC));
  527. end;
  528. list.concat(taicpu.op_reg(A_ROL,dst))
  529. end;
  530. else
  531. internalerror(2011030901);
  532. end;
  533. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  534. begin
  535. for i:=2 to tcgsize2size[size] do
  536. begin
  537. case op of
  538. OP_ROR,
  539. OP_SHR:
  540. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  541. OP_ROL,
  542. OP_SHL:
  543. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  544. OP_SAR:
  545. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  546. else
  547. internalerror(2011030902);
  548. end;
  549. end;
  550. end;
  551. a_op_const_reg(list,OP_SUB,OS_8,1,countreg);
  552. a_jmp_flags(list,F_NE,l1);
  553. // keep registers alive
  554. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  555. cg.a_label(list,l2);
  556. end;
  557. OP_AND,OP_OR,OP_XOR:
  558. begin
  559. for i:=1 to tcgsize2size[size] do
  560. begin
  561. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  562. NextSrcDst;
  563. end;
  564. end;
  565. else
  566. internalerror(2011022004);
  567. end;
  568. end;
  569. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  570. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  571. var
  572. mask : qword;
  573. shift : byte;
  574. i : byte;
  575. tmpreg : tregister;
  576. tmpreg64 : tregister64;
  577. procedure NextReg;
  578. begin
  579. if i=5 then
  580. reg:=reghi
  581. else
  582. reg:=GetNextReg(reg);
  583. end;
  584. var
  585. curvalue : byte;
  586. begin
  587. mask:=$ff;
  588. shift:=0;
  589. case op of
  590. OP_OR:
  591. begin
  592. for i:=1 to tcgsize2size[size] do
  593. begin
  594. list.concat(taicpu.op_reg_const(A_ORI,reg,(qword(a) and mask) shr shift));
  595. NextReg;
  596. mask:=mask shl 8;
  597. inc(shift,8);
  598. end;
  599. end;
  600. OP_AND:
  601. begin
  602. for i:=1 to tcgsize2size[size] do
  603. begin
  604. list.concat(taicpu.op_reg_const(A_ANDI,reg,(qword(a) and mask) shr shift));
  605. NextReg;
  606. mask:=mask shl 8;
  607. inc(shift,8);
  608. end;
  609. end;
  610. OP_SUB:
  611. begin
  612. list.concat(taicpu.op_reg_const(A_SUBI,reg,a and mask));
  613. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  614. begin
  615. for i:=2 to tcgsize2size[size] do
  616. begin
  617. NextReg;
  618. mask:=mask shl 8;
  619. inc(shift,8);
  620. curvalue:=(qword(a) and mask) shr shift;
  621. { decrease pressure on upper half of registers by using SBC ...,R1 instead
  622. of SBCI ...,0 }
  623. if curvalue=0 then
  624. list.concat(taicpu.op_reg_reg(A_SBC,reg,NR_R1))
  625. else
  626. list.concat(taicpu.op_reg_const(A_SBCI,reg,curvalue));
  627. end;
  628. end;
  629. end;
  630. OP_ADD:
  631. begin
  632. curvalue:=a and mask;
  633. if curvalue=0 then
  634. list.concat(taicpu.op_reg_reg(A_ADD,reg,NR_R1))
  635. else
  636. begin
  637. tmpreg:=getintregister(list,OS_8);
  638. a_load_const_reg(list,OS_8,curvalue,tmpreg);
  639. list.concat(taicpu.op_reg_reg(A_ADD,reg,tmpreg));
  640. end;
  641. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  642. begin
  643. for i:=2 to tcgsize2size[size] do
  644. begin
  645. NextReg;
  646. mask:=mask shl 8;
  647. inc(shift,8);
  648. curvalue:=(qword(a) and mask) shr shift;
  649. { decrease pressure on upper half of registers by using ADC ...,R1 instead
  650. of ADD ...,0 }
  651. if curvalue=0 then
  652. list.concat(taicpu.op_reg_reg(A_ADC,reg,NR_R1))
  653. else
  654. begin
  655. tmpreg:=getintregister(list,OS_8);
  656. a_load_const_reg(list,OS_8,curvalue,tmpreg);
  657. list.concat(taicpu.op_reg_reg(A_ADC,reg,tmpreg));
  658. end;
  659. end;
  660. end;
  661. end;
  662. else
  663. begin
  664. if size in [OS_64,OS_S64] then
  665. begin
  666. tmpreg64.reglo:=getintregister(list,OS_32);
  667. tmpreg64.reghi:=getintregister(list,OS_32);
  668. cg64.a_load64_const_reg(list,a,tmpreg64);
  669. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  670. end
  671. else
  672. begin
  673. tmpreg:=getintregister(list,size);
  674. a_load_const_reg(list,size,a,tmpreg);
  675. a_op_reg_reg(list,op,size,tmpreg,reg);
  676. end;
  677. end;
  678. end;
  679. end;
  680. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  681. var
  682. mask : qword;
  683. shift : byte;
  684. i : byte;
  685. begin
  686. mask:=$ff;
  687. shift:=0;
  688. for i:=1 to tcgsize2size[size] do
  689. begin
  690. if ((qword(a) and mask) shr shift)=0 then
  691. list.concat(taicpu.op_reg(A_CLR,reg))
  692. else
  693. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  694. mask:=mask shl 8;
  695. inc(shift,8);
  696. reg:=GetNextReg(reg);
  697. end;
  698. end;
  699. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  700. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  701. begin
  702. { allocate the register only, if a cpu register is passed }
  703. if getsupreg(reg)<first_int_imreg then
  704. getcpuregister(list,reg);
  705. end;
  706. var
  707. tmpref : treference;
  708. l : tasmlabel;
  709. begin
  710. Result:=ref;
  711. if ref.addressmode<>AM_UNCHANGED then
  712. internalerror(2011021701);
  713. { Be sure to have a base register }
  714. if (ref.base=NR_NO) then
  715. begin
  716. { only symbol+offset? }
  717. if ref.index=NR_NO then
  718. exit;
  719. ref.base:=ref.index;
  720. ref.index:=NR_NO;
  721. end;
  722. if assigned(ref.symbol) or (ref.offset<>0) then
  723. begin
  724. reference_reset(tmpref,0);
  725. tmpref.symbol:=ref.symbol;
  726. tmpref.offset:=ref.offset;
  727. tmpref.refaddr:=addr_lo8;
  728. maybegetcpuregister(list,tmpreg);
  729. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  730. tmpref.refaddr:=addr_hi8;
  731. maybegetcpuregister(list,GetNextReg(tmpreg));
  732. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  733. if (ref.base<>NR_NO) then
  734. begin
  735. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  736. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  737. end;
  738. if (ref.index<>NR_NO) then
  739. begin
  740. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  741. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  742. end;
  743. ref.symbol:=nil;
  744. ref.offset:=0;
  745. ref.base:=tmpreg;
  746. ref.index:=NR_NO;
  747. end
  748. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  749. begin
  750. maybegetcpuregister(list,tmpreg);
  751. emit_mov(list,tmpreg,ref.base);
  752. maybegetcpuregister(list,GetNextReg(tmpreg));
  753. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  754. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  755. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  756. ref.base:=tmpreg;
  757. ref.index:=NR_NO;
  758. end
  759. else if (ref.base<>NR_NO) then
  760. begin
  761. maybegetcpuregister(list,tmpreg);
  762. emit_mov(list,tmpreg,ref.base);
  763. maybegetcpuregister(list,GetNextReg(tmpreg));
  764. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  765. ref.base:=tmpreg;
  766. ref.index:=NR_NO;
  767. end
  768. else if (ref.index<>NR_NO) then
  769. begin
  770. maybegetcpuregister(list,tmpreg);
  771. emit_mov(list,tmpreg,ref.index);
  772. maybegetcpuregister(list,GetNextReg(tmpreg));
  773. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  774. ref.base:=tmpreg;
  775. ref.index:=NR_NO;
  776. end;
  777. Result:=ref;
  778. end;
  779. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  780. var
  781. href : treference;
  782. conv_done: boolean;
  783. tmpreg : tregister;
  784. i : integer;
  785. QuickRef : Boolean;
  786. begin
  787. QuickRef:=false;
  788. if not((Ref.addressmode=AM_UNCHANGED) and
  789. (Ref.symbol=nil) and
  790. ((Ref.base=NR_R28) or
  791. (Ref.base=NR_R29)) and
  792. (Ref.Index=NR_No) and
  793. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  794. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  795. href:=normalize_ref(list,Ref,NR_R30)
  796. else
  797. begin
  798. QuickRef:=true;
  799. href:=Ref;
  800. end;
  801. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  802. internalerror(2011021307);
  803. conv_done:=false;
  804. if tosize<>fromsize then
  805. begin
  806. conv_done:=true;
  807. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  808. fromsize:=tosize;
  809. case fromsize of
  810. OS_8:
  811. begin
  812. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  813. href.addressmode:=AM_POSTINCREMENT;
  814. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  815. for i:=2 to tcgsize2size[tosize] do
  816. begin
  817. if QuickRef then
  818. inc(href.offset);
  819. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  820. href.addressmode:=AM_POSTINCREMENT
  821. else
  822. href.addressmode:=AM_UNCHANGED;
  823. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  824. end;
  825. end;
  826. OS_S8:
  827. begin
  828. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  829. href.addressmode:=AM_POSTINCREMENT;
  830. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  831. if tcgsize2size[tosize]>1 then
  832. begin
  833. tmpreg:=getintregister(list,OS_8);
  834. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  835. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  836. list.concat(taicpu.op_reg(A_COM,tmpreg));
  837. for i:=2 to tcgsize2size[tosize] do
  838. begin
  839. if QuickRef then
  840. inc(href.offset);
  841. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  842. href.addressmode:=AM_POSTINCREMENT
  843. else
  844. href.addressmode:=AM_UNCHANGED;
  845. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  846. end;
  847. end;
  848. end;
  849. OS_16:
  850. begin
  851. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  852. href.addressmode:=AM_POSTINCREMENT;
  853. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  854. if QuickRef then
  855. inc(href.offset)
  856. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  857. href.addressmode:=AM_POSTINCREMENT
  858. else
  859. href.addressmode:=AM_UNCHANGED;
  860. reg:=GetNextReg(reg);
  861. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  862. for i:=3 to tcgsize2size[tosize] do
  863. begin
  864. if QuickRef then
  865. inc(href.offset);
  866. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  867. href.addressmode:=AM_POSTINCREMENT
  868. else
  869. href.addressmode:=AM_UNCHANGED;
  870. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  871. end;
  872. end;
  873. OS_S16:
  874. begin
  875. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  876. href.addressmode:=AM_POSTINCREMENT;
  877. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  878. if QuickRef then
  879. inc(href.offset)
  880. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  881. href.addressmode:=AM_POSTINCREMENT
  882. else
  883. href.addressmode:=AM_UNCHANGED;
  884. reg:=GetNextReg(reg);
  885. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  886. if tcgsize2size[tosize]>2 then
  887. begin
  888. tmpreg:=getintregister(list,OS_8);
  889. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  890. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  891. list.concat(taicpu.op_reg(A_COM,tmpreg));
  892. for i:=3 to tcgsize2size[tosize] do
  893. begin
  894. if QuickRef then
  895. inc(href.offset);
  896. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  897. href.addressmode:=AM_POSTINCREMENT
  898. else
  899. href.addressmode:=AM_UNCHANGED;
  900. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  901. end;
  902. end;
  903. end;
  904. else
  905. conv_done:=false;
  906. end;
  907. end;
  908. if not conv_done then
  909. begin
  910. for i:=1 to tcgsize2size[fromsize] do
  911. begin
  912. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  913. href.addressmode:=AM_POSTINCREMENT
  914. else
  915. href.addressmode:=AM_UNCHANGED;
  916. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  917. if QuickRef then
  918. inc(href.offset);
  919. reg:=GetNextReg(reg);
  920. end;
  921. end;
  922. if not(QuickRef) then
  923. begin
  924. ungetcpuregister(list,href.base);
  925. ungetcpuregister(list,GetNextReg(href.base));
  926. end;
  927. end;
  928. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  929. const Ref : treference;reg : tregister);
  930. var
  931. href : treference;
  932. conv_done: boolean;
  933. tmpreg : tregister;
  934. i : integer;
  935. QuickRef : boolean;
  936. begin
  937. QuickRef:=false;
  938. if not((Ref.addressmode=AM_UNCHANGED) and
  939. (Ref.symbol=nil) and
  940. ((Ref.base=NR_R28) or
  941. (Ref.base=NR_R29)) and
  942. (Ref.Index=NR_No) and
  943. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  944. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  945. href:=normalize_ref(list,Ref,NR_R30)
  946. else
  947. begin
  948. QuickRef:=true;
  949. href:=Ref;
  950. end;
  951. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  952. internalerror(2011021307);
  953. conv_done:=false;
  954. if tosize<>fromsize then
  955. begin
  956. conv_done:=true;
  957. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  958. fromsize:=tosize;
  959. case fromsize of
  960. OS_8:
  961. begin
  962. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  963. for i:=2 to tcgsize2size[tosize] do
  964. begin
  965. reg:=GetNextReg(reg);
  966. list.concat(taicpu.op_reg(A_CLR,reg));
  967. end;
  968. end;
  969. OS_S8:
  970. begin
  971. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  972. tmpreg:=reg;
  973. if tcgsize2size[tosize]>1 then
  974. begin
  975. reg:=GetNextReg(reg);
  976. list.concat(taicpu.op_reg(A_CLR,reg));
  977. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  978. list.concat(taicpu.op_reg(A_COM,reg));
  979. tmpreg:=reg;
  980. for i:=3 to tcgsize2size[tosize] do
  981. begin
  982. reg:=GetNextReg(reg);
  983. emit_mov(list,reg,tmpreg);
  984. end;
  985. end;
  986. end;
  987. OS_16:
  988. begin
  989. if not(QuickRef) then
  990. href.addressmode:=AM_POSTINCREMENT;
  991. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  992. if QuickRef then
  993. inc(href.offset);
  994. href.addressmode:=AM_UNCHANGED;
  995. reg:=GetNextReg(reg);
  996. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  997. for i:=3 to tcgsize2size[tosize] do
  998. begin
  999. reg:=GetNextReg(reg);
  1000. list.concat(taicpu.op_reg(A_CLR,reg));
  1001. end;
  1002. end;
  1003. OS_S16:
  1004. begin
  1005. if not(QuickRef) then
  1006. href.addressmode:=AM_POSTINCREMENT;
  1007. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1008. if QuickRef then
  1009. inc(href.offset);
  1010. href.addressmode:=AM_UNCHANGED;
  1011. reg:=GetNextReg(reg);
  1012. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1013. tmpreg:=reg;
  1014. reg:=GetNextReg(reg);
  1015. list.concat(taicpu.op_reg(A_CLR,reg));
  1016. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  1017. list.concat(taicpu.op_reg(A_COM,reg));
  1018. tmpreg:=reg;
  1019. for i:=4 to tcgsize2size[tosize] do
  1020. begin
  1021. reg:=GetNextReg(reg);
  1022. emit_mov(list,reg,tmpreg);
  1023. end;
  1024. end;
  1025. else
  1026. conv_done:=false;
  1027. end;
  1028. end;
  1029. if not conv_done then
  1030. begin
  1031. for i:=1 to tcgsize2size[fromsize] do
  1032. begin
  1033. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  1034. href.addressmode:=AM_POSTINCREMENT
  1035. else
  1036. href.addressmode:=AM_UNCHANGED;
  1037. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1038. if QuickRef then
  1039. inc(href.offset);
  1040. reg:=GetNextReg(reg);
  1041. end;
  1042. end;
  1043. if not(QuickRef) then
  1044. begin
  1045. ungetcpuregister(list,href.base);
  1046. ungetcpuregister(list,GetNextReg(href.base));
  1047. end;
  1048. end;
  1049. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  1050. var
  1051. conv_done: boolean;
  1052. tmpreg : tregister;
  1053. i : integer;
  1054. begin
  1055. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  1056. internalerror(2011021310);
  1057. conv_done:=false;
  1058. if tosize<>fromsize then
  1059. begin
  1060. conv_done:=true;
  1061. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  1062. fromsize:=tosize;
  1063. case fromsize of
  1064. OS_8:
  1065. begin
  1066. emit_mov(list,reg2,reg1);
  1067. for i:=2 to tcgsize2size[tosize] do
  1068. begin
  1069. reg2:=GetNextReg(reg2);
  1070. list.concat(taicpu.op_reg(A_CLR,reg2));
  1071. end;
  1072. end;
  1073. OS_S8:
  1074. begin
  1075. emit_mov(list,reg2,reg1);
  1076. if tcgsize2size[tosize]>1 then
  1077. begin
  1078. reg2:=GetNextReg(reg2);
  1079. list.concat(taicpu.op_reg(A_CLR,reg2));
  1080. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1081. list.concat(taicpu.op_reg(A_COM,reg2));
  1082. tmpreg:=reg2;
  1083. for i:=3 to tcgsize2size[tosize] do
  1084. begin
  1085. reg2:=GetNextReg(reg2);
  1086. emit_mov(list,reg2,tmpreg);
  1087. end;
  1088. end;
  1089. end;
  1090. OS_16:
  1091. begin
  1092. emit_mov(list,reg2,reg1);
  1093. reg1:=GetNextReg(reg1);
  1094. reg2:=GetNextReg(reg2);
  1095. emit_mov(list,reg2,reg1);
  1096. for i:=3 to tcgsize2size[tosize] do
  1097. begin
  1098. reg2:=GetNextReg(reg2);
  1099. list.concat(taicpu.op_reg(A_CLR,reg2));
  1100. end;
  1101. end;
  1102. OS_S16:
  1103. begin
  1104. emit_mov(list,reg2,reg1);
  1105. reg1:=GetNextReg(reg1);
  1106. reg2:=GetNextReg(reg2);
  1107. emit_mov(list,reg2,reg1);
  1108. if tcgsize2size[tosize]>2 then
  1109. begin
  1110. reg2:=GetNextReg(reg2);
  1111. list.concat(taicpu.op_reg(A_CLR,reg2));
  1112. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1113. list.concat(taicpu.op_reg(A_COM,reg2));
  1114. tmpreg:=reg2;
  1115. for i:=4 to tcgsize2size[tosize] do
  1116. begin
  1117. reg2:=GetNextReg(reg2);
  1118. emit_mov(list,reg2,tmpreg);
  1119. end;
  1120. end;
  1121. end;
  1122. else
  1123. conv_done:=false;
  1124. end;
  1125. end;
  1126. if not conv_done and (reg1<>reg2) then
  1127. begin
  1128. for i:=1 to tcgsize2size[fromsize] do
  1129. begin
  1130. emit_mov(list,reg2,reg1);
  1131. reg1:=GetNextReg(reg1);
  1132. reg2:=GetNextReg(reg2);
  1133. end;
  1134. end;
  1135. end;
  1136. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1137. begin
  1138. internalerror(2012010702);
  1139. end;
  1140. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1141. begin
  1142. internalerror(2012010703);
  1143. end;
  1144. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1145. begin
  1146. internalerror(2012010704);
  1147. end;
  1148. { comparison operations }
  1149. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1150. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1151. var
  1152. swapped : boolean;
  1153. tmpreg : tregister;
  1154. i : byte;
  1155. begin
  1156. if a=0 then
  1157. begin
  1158. swapped:=false;
  1159. { swap parameters? }
  1160. case cmp_op of
  1161. OC_GT:
  1162. begin
  1163. swapped:=true;
  1164. cmp_op:=OC_LT;
  1165. end;
  1166. OC_LTE:
  1167. begin
  1168. swapped:=true;
  1169. cmp_op:=OC_GTE;
  1170. end;
  1171. OC_BE:
  1172. begin
  1173. swapped:=true;
  1174. cmp_op:=OC_AE;
  1175. end;
  1176. OC_A:
  1177. begin
  1178. swapped:=true;
  1179. cmp_op:=OC_B;
  1180. end;
  1181. end;
  1182. if swapped then
  1183. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1184. else
  1185. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1186. for i:=2 to tcgsize2size[size] do
  1187. begin
  1188. reg:=GetNextReg(reg);
  1189. if swapped then
  1190. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1191. else
  1192. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1193. end;
  1194. a_jmp_cond(list,cmp_op,l);
  1195. end
  1196. else
  1197. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1198. end;
  1199. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1200. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1201. var
  1202. swapped : boolean;
  1203. tmpreg : tregister;
  1204. i : byte;
  1205. begin
  1206. swapped:=false;
  1207. { swap parameters? }
  1208. case cmp_op of
  1209. OC_GT:
  1210. begin
  1211. swapped:=true;
  1212. cmp_op:=OC_LT;
  1213. end;
  1214. OC_LTE:
  1215. begin
  1216. swapped:=true;
  1217. cmp_op:=OC_GTE;
  1218. end;
  1219. OC_BE:
  1220. begin
  1221. swapped:=true;
  1222. cmp_op:=OC_AE;
  1223. end;
  1224. OC_A:
  1225. begin
  1226. swapped:=true;
  1227. cmp_op:=OC_B;
  1228. end;
  1229. end;
  1230. if swapped then
  1231. begin
  1232. tmpreg:=reg1;
  1233. reg1:=reg2;
  1234. reg2:=tmpreg;
  1235. end;
  1236. list.concat(taicpu.op_reg_reg(A_CP,reg2,reg1));
  1237. for i:=2 to tcgsize2size[size] do
  1238. begin
  1239. reg1:=GetNextReg(reg1);
  1240. reg2:=GetNextReg(reg2);
  1241. list.concat(taicpu.op_reg_reg(A_CPC,reg2,reg1));
  1242. end;
  1243. a_jmp_cond(list,cmp_op,l);
  1244. end;
  1245. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1246. var
  1247. ai : taicpu;
  1248. begin
  1249. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1250. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s))
  1251. else
  1252. ai:=taicpu.op_sym(A_RJMP,current_asmdata.RefAsmSymbol(s));
  1253. ai.is_jmp:=true;
  1254. list.concat(ai);
  1255. end;
  1256. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1257. var
  1258. ai : taicpu;
  1259. begin
  1260. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1261. ai:=taicpu.op_sym(A_JMP,l)
  1262. else
  1263. ai:=taicpu.op_sym(A_RJMP,l);
  1264. ai.is_jmp:=true;
  1265. list.concat(ai);
  1266. end;
  1267. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1268. var
  1269. ai : taicpu;
  1270. begin
  1271. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1272. ai.is_jmp:=true;
  1273. list.concat(ai);
  1274. end;
  1275. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1276. var
  1277. l : TAsmLabel;
  1278. tmpflags : TResFlags;
  1279. begin
  1280. current_asmdata.getjumplabel(l);
  1281. {
  1282. if flags_to_cond(f) then
  1283. begin
  1284. tmpflags:=f;
  1285. inverse_flags(tmpflags);
  1286. list.concat(taicpu.op_reg(A_CLR,reg));
  1287. a_jmp_flags(list,tmpflags,l);
  1288. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1289. end
  1290. else
  1291. }
  1292. begin
  1293. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1294. a_jmp_flags(list,f,l);
  1295. list.concat(taicpu.op_reg(A_CLR,reg));
  1296. end;
  1297. cg.a_label(list,l);
  1298. end;
  1299. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1300. var
  1301. i : integer;
  1302. begin
  1303. case value of
  1304. 0:
  1305. ;
  1306. {-14..-1:
  1307. begin
  1308. if ((-value) mod 2)<>0 then
  1309. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1310. for i:=1 to (-value) div 2 do
  1311. list.concat(taicpu.op_const(A_RCALL,0));
  1312. end;
  1313. 1..7:
  1314. begin
  1315. for i:=1 to value do
  1316. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1317. end;}
  1318. else
  1319. begin
  1320. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1321. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1322. // get SREG
  1323. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1324. // block interrupts
  1325. list.concat(taicpu.op_none(A_CLI));
  1326. // write high SP
  1327. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1328. // release interrupts
  1329. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1330. // write low SP
  1331. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1332. end;
  1333. end;
  1334. end;
  1335. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1336. begin
  1337. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1338. result:=A_LDS
  1339. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1340. result:=A_LDD
  1341. else
  1342. result:=A_LD;
  1343. end;
  1344. function tcgavr.GetStore(const ref: treference) : tasmop;
  1345. begin
  1346. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1347. result:=A_STS
  1348. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1349. result:=A_STD
  1350. else
  1351. result:=A_ST;
  1352. end;
  1353. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1354. var
  1355. regs : tcpuregisterset;
  1356. reg : tsuperregister;
  1357. begin
  1358. if not(nostackframe) then
  1359. begin
  1360. { save int registers }
  1361. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1362. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1363. regs:=regs+[RS_R28,RS_R29];
  1364. for reg:=RS_R31 downto RS_R0 do
  1365. if reg in regs then
  1366. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1367. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1368. begin
  1369. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1370. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1371. end
  1372. else
  1373. { the framepointer cannot be omitted on avr because sp
  1374. is not a register but part of the i/o map
  1375. }
  1376. internalerror(2011021901);
  1377. a_adjust_sp(list,-localsize);
  1378. end;
  1379. end;
  1380. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1381. var
  1382. regs : tcpuregisterset;
  1383. reg : TSuperRegister;
  1384. LocalSize : longint;
  1385. begin
  1386. if not(nostackframe) then
  1387. begin
  1388. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1389. begin
  1390. LocalSize:=current_procinfo.calc_stackframe_size;
  1391. a_adjust_sp(list,LocalSize);
  1392. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1393. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1394. regs:=regs+[RS_R28,RS_R29];
  1395. for reg:=RS_R0 to RS_R31 do
  1396. if reg in regs then
  1397. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1398. end
  1399. else
  1400. { the framepointer cannot be omitted on avr because sp
  1401. is not a register but part of the i/o map
  1402. }
  1403. internalerror(2011021902);
  1404. end;
  1405. list.concat(taicpu.op_none(A_RET));
  1406. end;
  1407. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1408. var
  1409. tmpref : treference;
  1410. begin
  1411. if ref.addressmode<>AM_UNCHANGED then
  1412. internalerror(2011021701);
  1413. if assigned(ref.symbol) or (ref.offset<>0) then
  1414. begin
  1415. reference_reset(tmpref,0);
  1416. tmpref.symbol:=ref.symbol;
  1417. tmpref.offset:=ref.offset;
  1418. tmpref.refaddr:=addr_lo8;
  1419. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1420. tmpref.refaddr:=addr_hi8;
  1421. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1422. if (ref.base<>NR_NO) then
  1423. begin
  1424. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1425. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1426. end;
  1427. if (ref.index<>NR_NO) then
  1428. begin
  1429. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1430. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1431. end;
  1432. end
  1433. else if (ref.base<>NR_NO)then
  1434. begin
  1435. emit_mov(list,r,ref.base);
  1436. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1437. if (ref.index<>NR_NO) then
  1438. begin
  1439. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1440. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1441. end;
  1442. end
  1443. else if (ref.index<>NR_NO) then
  1444. begin
  1445. emit_mov(list,r,ref.index);
  1446. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1447. end;
  1448. end;
  1449. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1450. begin
  1451. internalerror(2011021320);
  1452. end;
  1453. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1454. var
  1455. paraloc1,paraloc2,paraloc3 : TCGPara;
  1456. pd : tprocdef;
  1457. begin
  1458. pd:=search_system_proc('MOVE');
  1459. paraloc1.init;
  1460. paraloc2.init;
  1461. paraloc3.init;
  1462. paramanager.getintparaloc(list,pd,1,paraloc1);
  1463. paramanager.getintparaloc(list,pd,2,paraloc2);
  1464. paramanager.getintparaloc(list,pd,3,paraloc3);
  1465. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1466. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1467. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1468. paramanager.freecgpara(list,paraloc3);
  1469. paramanager.freecgpara(list,paraloc2);
  1470. paramanager.freecgpara(list,paraloc1);
  1471. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1472. a_call_name_static(list,'FPC_MOVE');
  1473. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1474. paraloc3.done;
  1475. paraloc2.done;
  1476. paraloc1.done;
  1477. end;
  1478. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1479. var
  1480. countreg,tmpreg : tregister;
  1481. srcref,dstref : treference;
  1482. copysize,countregsize : tcgsize;
  1483. l : TAsmLabel;
  1484. i : longint;
  1485. SrcQuickRef, DestQuickRef : Boolean;
  1486. begin
  1487. if len>16 then
  1488. begin
  1489. current_asmdata.getjumplabel(l);
  1490. reference_reset(srcref,0);
  1491. reference_reset(dstref,0);
  1492. srcref.base:=NR_R30;
  1493. srcref.addressmode:=AM_POSTINCREMENT;
  1494. dstref.base:=NR_R26;
  1495. dstref.addressmode:=AM_POSTINCREMENT;
  1496. copysize:=OS_8;
  1497. if len<256 then
  1498. countregsize:=OS_8
  1499. else if len<65536 then
  1500. countregsize:=OS_16
  1501. else
  1502. internalerror(2011022007);
  1503. countreg:=getintregister(list,countregsize);
  1504. a_load_const_reg(list,countregsize,len,countreg);
  1505. a_loadaddr_ref_reg(list,source,NR_R30);
  1506. tmpreg:=getaddressregister(list);
  1507. a_loadaddr_ref_reg(list,dest,tmpreg);
  1508. { X is used for spilling code so we can load it
  1509. only by a push/pop sequence, this can be
  1510. optimized later on by the peephole optimizer
  1511. }
  1512. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1513. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1514. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1515. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1516. cg.a_label(list,l);
  1517. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1518. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1519. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1520. a_jmp_flags(list,F_NE,l);
  1521. // keep registers alive
  1522. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1523. end
  1524. else
  1525. begin
  1526. SrcQuickRef:=false;
  1527. DestQuickRef:=false;
  1528. if not((source.addressmode=AM_UNCHANGED) and
  1529. (source.symbol=nil) and
  1530. ((source.base=NR_R28) or
  1531. (source.base=NR_R29)) and
  1532. (source.Index=NR_NO) and
  1533. (source.Offset in [0..64-len])) and
  1534. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1535. srcref:=normalize_ref(list,source,NR_R30)
  1536. else
  1537. begin
  1538. SrcQuickRef:=true;
  1539. srcref:=source;
  1540. end;
  1541. if not((dest.addressmode=AM_UNCHANGED) and
  1542. (dest.symbol=nil) and
  1543. ((dest.base=NR_R28) or
  1544. (dest.base=NR_R29)) and
  1545. (dest.Index=NR_No) and
  1546. (dest.Offset in [0..64-len])) and
  1547. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1548. begin
  1549. if not(SrcQuickRef) then
  1550. begin
  1551. tmpreg:=getaddressregister(list);
  1552. dstref:=normalize_ref(list,dest,tmpreg);
  1553. { X is used for spilling code so we can load it
  1554. only by a push/pop sequence, this can be
  1555. optimized later on by the peephole optimizer
  1556. }
  1557. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1558. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1559. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1560. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1561. dstref.base:=NR_R26;
  1562. end
  1563. else
  1564. dstref:=normalize_ref(list,dest,NR_R30);
  1565. end
  1566. else
  1567. begin
  1568. DestQuickRef:=true;
  1569. dstref:=dest;
  1570. end;
  1571. for i:=1 to len do
  1572. begin
  1573. if not(SrcQuickRef) and (i<len) then
  1574. srcref.addressmode:=AM_POSTINCREMENT
  1575. else
  1576. srcref.addressmode:=AM_UNCHANGED;
  1577. if not(DestQuickRef) and (i<len) then
  1578. dstref.addressmode:=AM_POSTINCREMENT
  1579. else
  1580. dstref.addressmode:=AM_UNCHANGED;
  1581. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1582. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1583. if SrcQuickRef then
  1584. inc(srcref.offset);
  1585. if DestQuickRef then
  1586. inc(dstref.offset);
  1587. end;
  1588. if not(SrcQuickRef) then
  1589. begin
  1590. ungetcpuregister(list,srcref.base);
  1591. ungetcpuregister(list,GetNextReg(srcref.base));
  1592. end;
  1593. end;
  1594. end;
  1595. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1596. var
  1597. hl : tasmlabel;
  1598. ai : taicpu;
  1599. cond : TAsmCond;
  1600. begin
  1601. if not(cs_check_overflow in current_settings.localswitches) then
  1602. exit;
  1603. current_asmdata.getjumplabel(hl);
  1604. if not ((def.typ=pointerdef) or
  1605. ((def.typ=orddef) and
  1606. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1607. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1608. cond:=C_VC
  1609. else
  1610. cond:=C_CC;
  1611. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1612. ai.SetCondition(cond);
  1613. ai.is_jmp:=true;
  1614. list.concat(ai);
  1615. a_call_name(list,'FPC_OVERFLOW',false);
  1616. a_label(list,hl);
  1617. end;
  1618. procedure tcgavr.g_save_registers(list: TAsmList);
  1619. begin
  1620. { this is done by the entry code }
  1621. end;
  1622. procedure tcgavr.g_restore_registers(list: TAsmList);
  1623. begin
  1624. { this is done by the exit code }
  1625. end;
  1626. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1627. var
  1628. ai1,ai2 : taicpu;
  1629. hl : TAsmLabel;
  1630. begin
  1631. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1632. ai1.is_jmp:=true;
  1633. hl:=nil;
  1634. case cond of
  1635. OC_EQ:
  1636. ai1.SetCondition(C_EQ);
  1637. OC_GT:
  1638. begin
  1639. { emulate GT }
  1640. current_asmdata.getjumplabel(hl);
  1641. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1642. ai2.SetCondition(C_EQ);
  1643. ai2.is_jmp:=true;
  1644. list.concat(ai2);
  1645. ai1.SetCondition(C_GE);
  1646. end;
  1647. OC_LT:
  1648. ai1.SetCondition(C_LT);
  1649. OC_GTE:
  1650. ai1.SetCondition(C_GE);
  1651. OC_LTE:
  1652. begin
  1653. { emulate LTE }
  1654. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1655. ai2.SetCondition(C_EQ);
  1656. ai2.is_jmp:=true;
  1657. list.concat(ai2);
  1658. ai1.SetCondition(C_LT);
  1659. end;
  1660. OC_NE:
  1661. ai1.SetCondition(C_NE);
  1662. OC_BE:
  1663. begin
  1664. { emulate BE }
  1665. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1666. ai2.SetCondition(C_EQ);
  1667. ai2.is_jmp:=true;
  1668. list.concat(ai2);
  1669. ai1.SetCondition(C_LO);
  1670. end;
  1671. OC_B:
  1672. ai1.SetCondition(C_LO);
  1673. OC_AE:
  1674. ai1.SetCondition(C_SH);
  1675. OC_A:
  1676. begin
  1677. { emulate A (unsigned GT) }
  1678. current_asmdata.getjumplabel(hl);
  1679. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1680. ai2.SetCondition(C_EQ);
  1681. ai2.is_jmp:=true;
  1682. list.concat(ai2);
  1683. ai1.SetCondition(C_SH);
  1684. end;
  1685. else
  1686. internalerror(2011082501);
  1687. end;
  1688. list.concat(ai1);
  1689. if assigned(hl) then
  1690. a_label(list,hl);
  1691. end;
  1692. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1693. var
  1694. instr: taicpu;
  1695. begin
  1696. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1697. list.Concat(instr);
  1698. { Notify the register allocator that we have written a move instruction so
  1699. it can try to eliminate it. }
  1700. add_move_instruction(instr);
  1701. end;
  1702. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1703. begin
  1704. if not(size in [OS_S64,OS_64]) then
  1705. internalerror(2012102402);
  1706. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1707. end;
  1708. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1709. begin
  1710. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1711. end;
  1712. procedure create_codegen;
  1713. begin
  1714. cg:=tcgavr.create;
  1715. cg64:=tcg64favr.create;
  1716. end;
  1717. end.