ncgadd.pas 31 KB

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  1. {
  2. Copyright (c) 2000-2002 by the FPC development team
  3. Code generation for add nodes (generic version)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,cpubase;
  22. type
  23. tcgaddnode = class(taddnode)
  24. { function pass_1: tnode; override;}
  25. procedure pass_generate_code;override;
  26. protected
  27. { call secondpass for both left and right }
  28. procedure pass_left_right;
  29. { set the register of the result location }
  30. procedure set_result_location_reg;
  31. { load left and right nodes into registers }
  32. procedure force_reg_left_right(allow_swap,allow_constant:boolean);
  33. procedure second_opfloat;
  34. procedure second_opboolean;
  35. procedure second_opsmallset;
  36. procedure second_op64bit;
  37. procedure second_opordinal;
  38. procedure second_addstring;virtual;
  39. procedure second_addfloat;virtual;abstract;
  40. procedure second_addboolean;virtual;
  41. procedure second_addsmallset;virtual;
  42. {$ifdef x86}
  43. {$ifdef SUPPORT_MMX}
  44. procedure second_opmmxset;virtual;abstract;
  45. procedure second_opmmx;virtual;abstract;
  46. {$endif SUPPORT_MMX}
  47. {$endif x86}
  48. procedure second_opvector;virtual;abstract;
  49. procedure second_add64bit;virtual;
  50. procedure second_addordinal;virtual;
  51. procedure second_cmpfloat;virtual;abstract;
  52. procedure second_cmpboolean;virtual;
  53. procedure second_cmpsmallset;virtual;abstract;
  54. procedure second_cmp64bit;virtual;abstract;
  55. procedure second_cmpordinal;virtual;abstract;
  56. end;
  57. implementation
  58. uses
  59. globtype,systems,
  60. cutils,verbose,globals,
  61. symconst,symdef,paramgr,
  62. aasmbase,aasmtai,aasmdata,defutil,
  63. cgbase,procinfo,pass_2,tgobj,
  64. nutils,ncon,nset,ncgutil,cgobj,cgutils
  65. ;
  66. {*****************************************************************************
  67. Helpers
  68. *****************************************************************************}
  69. procedure tcgaddnode.pass_left_right;
  70. var
  71. tmpreg : tregister;
  72. isjump,
  73. pushedfpu : boolean;
  74. otl,ofl : tasmlabel;
  75. begin
  76. { calculate the operator which is more difficult }
  77. firstcomplex(self);
  78. { in case of constant put it to the left }
  79. if (left.nodetype=ordconstn) then
  80. swapleftright;
  81. isjump:=(left.expectloc=LOC_JUMP);
  82. if isjump then
  83. begin
  84. otl:=current_procinfo.CurrTrueLabel;
  85. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  86. ofl:=current_procinfo.CurrFalseLabel;
  87. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  88. end;
  89. secondpass(left);
  90. if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
  91. location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(resultdef),false);
  92. if isjump then
  93. begin
  94. current_procinfo.CurrTrueLabel:=otl;
  95. current_procinfo.CurrFalseLabel:=ofl;
  96. end;
  97. { are too few registers free? }
  98. pushedfpu:=false;
  99. {$ifdef i386}
  100. if (left.location.loc=LOC_FPUREGISTER) and
  101. (node_resources_fpu(right)>=maxfpuregs) then
  102. begin
  103. location_force_mem(current_asmdata.CurrAsmList,left.location);
  104. pushedfpu:=true;
  105. end;
  106. {$endif i386}
  107. isjump:=(right.expectloc=LOC_JUMP);
  108. if isjump then
  109. begin
  110. otl:=current_procinfo.CurrTrueLabel;
  111. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  112. ofl:=current_procinfo.CurrFalseLabel;
  113. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  114. end;
  115. secondpass(right);
  116. if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
  117. location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(resultdef),false);
  118. if isjump then
  119. begin
  120. current_procinfo.CurrTrueLabel:=otl;
  121. current_procinfo.CurrFalseLabel:=ofl;
  122. end;
  123. if pushedfpu then
  124. begin
  125. {$ifdef x86}
  126. if use_sse(left.resultdef) then
  127. begin
  128. tmpreg := cg.getmmregister(current_asmdata.CurrAsmList,left.location.size);
  129. cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg,mms_movescalar);
  130. location_freetemp(current_asmdata.CurrAsmList,left.location);
  131. location_reset(left.location,LOC_MMREGISTER,left.location.size);
  132. left.location.register := tmpreg;
  133. end
  134. else
  135. {$endif x86}
  136. begin
  137. tmpreg := cg.getfpuregister(current_asmdata.CurrAsmList,left.location.size);
  138. cg.a_loadfpu_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg);
  139. location_freetemp(current_asmdata.CurrAsmList,left.location);
  140. location_reset(left.location,LOC_FPUREGISTER,left.location.size);
  141. left.location.register := tmpreg;
  142. {$ifdef x86}
  143. { left operand is now on top of the stack, instead of the right one! }
  144. toggleflag(nf_swapped);
  145. {$endif x86}
  146. end;
  147. end;
  148. end;
  149. procedure tcgaddnode.set_result_location_reg;
  150. begin
  151. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  152. {$ifdef x86}
  153. if left.location.loc=LOC_REGISTER then
  154. begin
  155. if TCGSize2Size[left.location.size]<>TCGSize2Size[location.size] then
  156. internalerror(200307041);
  157. {$ifndef cpu64bit}
  158. if location.size in [OS_64,OS_S64] then
  159. begin
  160. location.register64.reglo := left.location.register64.reglo;
  161. location.register64.reghi := left.location.register64.reghi;
  162. end
  163. else
  164. {$endif}
  165. location.register := left.location.register;
  166. end
  167. else
  168. if right.location.loc=LOC_REGISTER then
  169. begin
  170. if TCGSize2Size[right.location.size]<>TCGSize2Size[location.size] then
  171. internalerror(200307042);
  172. {$ifndef cpu64bit}
  173. if location.size in [OS_64,OS_S64] then
  174. begin
  175. location.register64.reglo := right.location.register64.reglo;
  176. location.register64.reghi := right.location.register64.reghi;
  177. end
  178. else
  179. {$endif}
  180. location.register := right.location.register;
  181. end
  182. else
  183. {$endif}
  184. begin
  185. {$ifndef cpu64bit}
  186. if location.size in [OS_64,OS_S64] then
  187. begin
  188. location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  189. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  190. end
  191. else
  192. {$endif}
  193. location.register := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  194. end;
  195. end;
  196. procedure tcgaddnode.force_reg_left_right(allow_swap,allow_constant:boolean);
  197. begin
  198. if (left.location.loc<>LOC_REGISTER) and
  199. not(
  200. allow_constant and
  201. (left.location.loc in [LOC_CONSTANT,LOC_CREGISTER])
  202. ) then
  203. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
  204. if (right.location.loc<>LOC_REGISTER) and
  205. not(
  206. allow_constant and
  207. (right.location.loc in [LOC_CONSTANT,LOC_CREGISTER]) and
  208. (left.location.loc<>LOC_CONSTANT)
  209. ) then
  210. location_force_reg(current_asmdata.CurrAsmList,right.location,right.location.size,false);
  211. { Left is always a register, right can be register or constant }
  212. if left.location.loc=LOC_CONSTANT then
  213. begin
  214. { when it is not allowed to swap we have a constant on
  215. left, that will give problems }
  216. if not allow_swap then
  217. internalerror(200307043);
  218. swapleftright;
  219. end;
  220. end;
  221. {*****************************************************************************
  222. Smallsets
  223. *****************************************************************************}
  224. procedure tcgaddnode.second_opsmallset;
  225. begin
  226. { when a setdef is passed, it has to be a smallset }
  227. if is_varset(left.resultdef) or
  228. is_varset(right.resultdef) then
  229. internalerror(200203302);
  230. if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
  231. second_cmpsmallset
  232. else
  233. second_addsmallset;
  234. end;
  235. procedure tcgaddnode.second_addsmallset;
  236. var
  237. tmpreg : tregister;
  238. mask,
  239. setbase : aint;
  240. cgop : TOpCg;
  241. opdone : boolean;
  242. begin
  243. opdone := false;
  244. pass_left_right;
  245. force_reg_left_right(true,true);
  246. { setelementn is a special case, it must be on right.
  247. We need an extra check if left is a register because the
  248. default case can skip the register loading when the
  249. setelementn is in a register (PFV) }
  250. if (nf_swapped in flags) and
  251. (left.nodetype=setelementn) then
  252. swapleftright;
  253. if (right.nodetype=setelementn) and
  254. (left.location.loc<>LOC_REGISTER) then
  255. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
  256. set_result_location_reg;
  257. if (left.resultdef.typ=setdef) then
  258. setbase:=tsetdef(left.resultdef).setbase
  259. else
  260. setbase:=tsetdef(right.resultdef).setbase;
  261. case nodetype of
  262. addn :
  263. begin
  264. { are we adding set elements ? }
  265. if right.nodetype=setelementn then
  266. begin
  267. { no range support for smallsets! }
  268. if assigned(tsetelementnode(right).right) then
  269. internalerror(43244);
  270. if (right.location.loc = LOC_CONSTANT) then
  271. begin
  272. if (target_info.endian=endian_big) then
  273. mask:=aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value-setbase))
  274. else
  275. mask:=aint(1 shl (right.location.value-setbase));
  276. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
  277. mask,left.location.register,location.register);
  278. end
  279. else
  280. begin
  281. if (target_info.endian=endian_big) then
  282. begin
  283. mask:=aint((aword(1) shl (resultdef.size*8-1)));
  284. cgop:=OP_SHR
  285. end
  286. else
  287. begin
  288. mask:=1;
  289. cgop:=OP_SHL
  290. end;
  291. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  292. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,mask,tmpreg);
  293. location_force_reg(current_asmdata.CurrAsmList,right.location,location.size,true);
  294. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
  295. cg.a_op_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  296. right.location.register,tmpreg);
  297. if left.location.loc <> LOC_CONSTANT then
  298. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,tmpreg,
  299. left.location.register,location.register)
  300. else
  301. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
  302. left.location.value,tmpreg,location.register);
  303. end;
  304. opdone := true;
  305. end
  306. else
  307. cgop := OP_OR;
  308. end;
  309. symdifn :
  310. cgop:=OP_XOR;
  311. muln :
  312. cgop:=OP_AND;
  313. subn :
  314. begin
  315. cgop:=OP_AND;
  316. if (not(nf_swapped in flags)) then
  317. if (right.location.loc=LOC_CONSTANT) then
  318. right.location.value := not(right.location.value)
  319. else
  320. opdone := true
  321. else if (left.location.loc=LOC_CONSTANT) then
  322. left.location.value := not(left.location.value)
  323. else
  324. begin
  325. swapleftright;
  326. opdone := true;
  327. end;
  328. if opdone then
  329. begin
  330. if left.location.loc = LOC_CONSTANT then
  331. begin
  332. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  333. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
  334. left.location.value,tmpreg);
  335. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,location.size,right.location.register,right.location.register);
  336. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,location.size,right.location.register,tmpreg);
  337. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,location.size,tmpreg,location.register);
  338. end
  339. else
  340. begin
  341. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,right.location.size,right.location.register,right.location.register);
  342. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,left.location.size,right.location.register,left.location.register);
  343. cg.a_load_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register);
  344. end;
  345. end;
  346. end;
  347. else
  348. internalerror(2002072701);
  349. end;
  350. if not opdone then
  351. begin
  352. // these are all commutative operations
  353. if (left.location.loc = LOC_CONSTANT) then
  354. swapleftright;
  355. if (right.location.loc = LOC_CONSTANT) then
  356. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  357. right.location.value,left.location.register,
  358. location.register)
  359. else
  360. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  361. right.location.register,left.location.register,
  362. location.register);
  363. end;
  364. end;
  365. {*****************************************************************************
  366. Boolean
  367. *****************************************************************************}
  368. procedure tcgaddnode.second_opboolean;
  369. begin
  370. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  371. second_cmpboolean
  372. else
  373. second_addboolean;
  374. end;
  375. procedure tcgaddnode.second_addboolean;
  376. var
  377. cgop : TOpCg;
  378. otl,ofl : tasmlabel;
  379. oldflowcontrol : tflowcontrol;
  380. begin
  381. { And,Or will only evaluate from left to right only the
  382. needed nodes unless full boolean evaluation is enabled }
  383. if (nodetype in [orn,andn]) and
  384. (not(cs_full_boolean_eval in current_settings.localswitches) or
  385. (nf_short_bool in flags)) then
  386. begin
  387. location_reset(location,LOC_JUMP,OS_NO);
  388. case nodetype of
  389. andn :
  390. begin
  391. otl:=current_procinfo.CurrTrueLabel;
  392. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  393. secondpass(left);
  394. maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
  395. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  396. current_procinfo.CurrTrueLabel:=otl;
  397. end;
  398. orn :
  399. begin
  400. ofl:=current_procinfo.CurrFalseLabel;
  401. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  402. secondpass(left);
  403. maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
  404. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  405. current_procinfo.CurrFalseLabel:=ofl;
  406. end;
  407. else
  408. internalerror(200307044);
  409. end;
  410. { these jumps mean we're now in a flow control construct }
  411. oldflowcontrol:=flowcontrol;
  412. include(flowcontrol,fc_inflowcontrol);
  413. secondpass(right);
  414. maketojumpbool(current_asmdata.CurrAsmList,right,lr_load_regvars);
  415. flowcontrol:=oldflowcontrol+(flowcontrol-[fc_inflowcontrol]);
  416. end
  417. else
  418. begin
  419. pass_left_right;
  420. force_reg_left_right(false,true);
  421. set_result_location_reg;
  422. case nodetype of
  423. xorn :
  424. cgop:=OP_XOR;
  425. orn :
  426. cgop:=OP_OR;
  427. andn :
  428. cgop:=OP_AND;
  429. else
  430. internalerror(200203247);
  431. end;
  432. if right.location.loc <> LOC_CONSTANT then
  433. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  434. left.location.register,right.location.register,
  435. location.register)
  436. else
  437. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  438. right.location.value,left.location.register,
  439. location.register);
  440. end;
  441. end;
  442. {*****************************************************************************
  443. 64-bit
  444. *****************************************************************************}
  445. procedure tcgaddnode.second_op64bit;
  446. begin
  447. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  448. second_cmp64bit
  449. else
  450. second_add64bit;
  451. end;
  452. procedure tcgaddnode.second_add64bit;
  453. var
  454. op : TOpCG;
  455. checkoverflow : boolean;
  456. ovloc : tlocation;
  457. begin
  458. ovloc.loc:=LOC_VOID;
  459. pass_left_right;
  460. force_reg_left_right(false,true);
  461. set_result_location_reg;
  462. { assume no overflow checking is required }
  463. checkoverflow := false;
  464. case nodetype of
  465. addn :
  466. begin
  467. op:=OP_ADD;
  468. checkoverflow:=true;
  469. end;
  470. subn :
  471. begin
  472. op:=OP_SUB;
  473. checkoverflow:=true;
  474. end;
  475. xorn:
  476. op:=OP_XOR;
  477. orn:
  478. op:=OP_OR;
  479. andn:
  480. op:=OP_AND;
  481. muln:
  482. begin
  483. { should be handled in pass_1 (JM) }
  484. internalerror(200109051);
  485. end;
  486. else
  487. internalerror(2002072705);
  488. end;
  489. checkoverflow:=
  490. checkoverflow and
  491. (left.resultdef.typ<>pointerdef) and
  492. (right.resultdef.typ<>pointerdef);
  493. {$ifdef cpu64bit}
  494. case nodetype of
  495. xorn,orn,andn,addn:
  496. begin
  497. if (right.location.loc = LOC_CONSTANT) then
  498. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.value,
  499. left.location.register,location.register)
  500. else
  501. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.register,
  502. left.location.register,location.register);
  503. end;
  504. subn:
  505. begin
  506. if (nf_swapped in flags) then
  507. swapleftright;
  508. if left.location.loc <> LOC_CONSTANT then
  509. begin
  510. if right.location.loc <> LOC_CONSTANT then
  511. // reg64 - reg64
  512. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  513. right.location.register,left.location.register,location.register,
  514. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  515. else
  516. // reg64 - const64
  517. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  518. right.location.value,left.location.register,location.register,
  519. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  520. end
  521. else
  522. begin
  523. // const64 - reg64
  524. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  525. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  526. right.location.register,left.location.register,location.register,
  527. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  528. end;
  529. end;
  530. else
  531. internalerror(2002072803);
  532. end;
  533. {$else cpu64bit}
  534. case nodetype of
  535. xorn,orn,andn,addn:
  536. begin
  537. if (right.location.loc = LOC_CONSTANT) then
  538. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.value64,
  539. left.location.register64,location.register64,
  540. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  541. else
  542. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.register64,
  543. left.location.register64,location.register64,
  544. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  545. end;
  546. subn:
  547. begin
  548. if (nf_swapped in flags) then
  549. swapleftright;
  550. if left.location.loc <> LOC_CONSTANT then
  551. begin
  552. if right.location.loc <> LOC_CONSTANT then
  553. // reg64 - reg64
  554. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  555. right.location.register64,left.location.register64,
  556. location.register64,
  557. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  558. else
  559. // reg64 - const64
  560. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  561. right.location.value64,left.location.register64,
  562. location.register64,
  563. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  564. end
  565. else
  566. begin
  567. // const64 - reg64
  568. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  569. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  570. right.location.register64,left.location.register64,
  571. location.register64,
  572. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  573. end;
  574. end;
  575. else
  576. internalerror(2002072803);
  577. end;
  578. {$endif cpu64bit}
  579. { emit overflow check if enabled }
  580. if checkoverflow then
  581. cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  582. end;
  583. {*****************************************************************************
  584. Strings
  585. *****************************************************************************}
  586. procedure tcgaddnode.second_addstring;
  587. begin
  588. { this should already be handled in pass1 }
  589. internalerror(2002072402);
  590. end;
  591. {*****************************************************************************
  592. Floats
  593. *****************************************************************************}
  594. procedure tcgaddnode.second_opfloat;
  595. begin
  596. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  597. second_cmpfloat
  598. else
  599. second_addfloat;
  600. end;
  601. {*****************************************************************************
  602. Ordinals
  603. *****************************************************************************}
  604. procedure tcgaddnode.second_opordinal;
  605. begin
  606. if (nodetype in [ltn,lten,gtn,gten,equaln,unequaln]) then
  607. second_cmpordinal
  608. else
  609. second_addordinal;
  610. end;
  611. procedure tcgaddnode.second_addordinal;
  612. var
  613. unsigned,
  614. checkoverflow : boolean;
  615. cgop : topcg;
  616. tmpreg : tregister;
  617. ovloc : tlocation;
  618. begin
  619. ovloc.loc:=LOC_VOID;
  620. pass_left_right;
  621. force_reg_left_right(false,true);
  622. set_result_location_reg;
  623. { determine if the comparison will be unsigned }
  624. unsigned:=not(is_signed(left.resultdef)) or
  625. not(is_signed(right.resultdef));
  626. { assume no overflow checking is require }
  627. checkoverflow := false;
  628. case nodetype of
  629. addn:
  630. begin
  631. cgop:=OP_ADD;
  632. checkoverflow:=true;
  633. end;
  634. xorn :
  635. begin
  636. cgop:=OP_XOR;
  637. end;
  638. orn :
  639. begin
  640. cgop:=OP_OR;
  641. end;
  642. andn:
  643. begin
  644. cgop:=OP_AND;
  645. end;
  646. muln:
  647. begin
  648. checkoverflow:=true;
  649. if unsigned then
  650. cgop:=OP_MUL
  651. else
  652. cgop:=OP_IMUL;
  653. end;
  654. subn :
  655. begin
  656. checkoverflow:=true;
  657. cgop:=OP_SUB;
  658. end;
  659. end;
  660. checkoverflow:=
  661. checkoverflow and
  662. (left.resultdef.typ<>pointerdef) and
  663. (right.resultdef.typ<>pointerdef);
  664. if nodetype<>subn then
  665. begin
  666. if (right.location.loc<>LOC_CONSTANT) then
  667. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
  668. left.location.register,right.location.register,
  669. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  670. else
  671. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
  672. right.location.value,left.location.register,
  673. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  674. end
  675. else { subtract is a special case since its not commutative }
  676. begin
  677. if (nf_swapped in flags) then
  678. swapleftright;
  679. if left.location.loc<>LOC_CONSTANT then
  680. begin
  681. if right.location.loc<>LOC_CONSTANT then
  682. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  683. right.location.register,left.location.register,
  684. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  685. else
  686. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  687. right.location.value,left.location.register,
  688. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  689. end
  690. else
  691. begin
  692. tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  693. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
  694. left.location.value,tmpreg);
  695. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  696. right.location.register,tmpreg,location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  697. end;
  698. end;
  699. { emit overflow check if required }
  700. if checkoverflow then
  701. cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  702. end;
  703. procedure tcgaddnode.second_cmpboolean;
  704. begin
  705. second_cmpordinal;
  706. end;
  707. {*****************************************************************************
  708. pass_generate_code;
  709. *****************************************************************************}
  710. procedure tcgaddnode.pass_generate_code;
  711. begin
  712. case left.resultdef.typ of
  713. orddef :
  714. begin
  715. { handling boolean expressions }
  716. if is_boolean(left.resultdef) and
  717. is_boolean(right.resultdef) then
  718. second_opboolean
  719. { 64bit operations }
  720. else if is_64bit(left.resultdef) then
  721. second_op64bit
  722. else
  723. second_opordinal;
  724. end;
  725. stringdef :
  726. begin
  727. second_addstring;
  728. end;
  729. setdef :
  730. begin
  731. {Normalsets are already handled in pass1 if mmx
  732. should not be used.}
  733. if is_varset(tsetdef(left.resultdef)) then
  734. begin
  735. {$ifdef SUPPORT_MMX}
  736. {$ifdef i386}
  737. if cs_mmx in current_settings.localswitches then
  738. second_opmmxset
  739. else
  740. {$endif}
  741. {$endif SUPPORT_MMX}
  742. internalerror(200109041);
  743. end
  744. else
  745. second_opsmallset;
  746. end;
  747. arraydef :
  748. begin
  749. { support dynarr=nil }
  750. if is_dynamic_array(left.resultdef) then
  751. second_opordinal
  752. else
  753. if (cs_support_vectors in current_settings.globalswitches) and
  754. is_vector(left.resultdef) then
  755. second_opvector
  756. {$ifdef SUPPORT_MMX}
  757. else
  758. if is_mmx_able_array(left.resultdef) then
  759. second_opmmx
  760. {$endif SUPPORT_MMX}
  761. else
  762. internalerror(200306016);
  763. end;
  764. floatdef :
  765. second_opfloat;
  766. else
  767. second_opordinal;
  768. end;
  769. end;
  770. begin
  771. caddnode:=tcgaddnode;
  772. end.