daopt386.pas 95 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  52. TRegSet = Set of RS_EAX..RS_ESP;
  53. toptreginfo = Record
  54. NewRegsEncountered, OldRegsEncountered: TRegSet;
  55. RegsLoadedForRef: TRegSet;
  56. lastReload: array[RS_EAX..RS_ESP] of tai;
  57. New2OldReg: TRegArray;
  58. end;
  59. {possible actions on an operand: read, write or modify (= read & write)}
  60. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  61. {the possible states of a flag}
  62. TFlagContents = (F_Unknown, F_notSet, F_Set);
  63. TContent = Packed Record
  64. {start and end of block instructions that defines the
  65. content of this register.}
  66. StartMod: tai;
  67. MemWrite: taicpu;
  68. {how many instructions starting with StarMod does the block consist of}
  69. NrOfMods: Word;
  70. {the type of the content of the register: unknown, memory, constant}
  71. Typ: Byte;
  72. case byte of
  73. {starts at 0, gets increased everytime the register is written to}
  74. 1: (WState: Byte;
  75. {starts at 0, gets increased everytime the register is read from}
  76. RState: Byte);
  77. { to compare both states in one operation }
  78. 2: (state: word);
  79. end;
  80. {Contents of the integer registers}
  81. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  82. {contents of the FPU registers}
  83. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  84. {$ifdef tempOpts}
  85. { linked list which allows searching/deleting based on value, no extra frills}
  86. PSearchLinkedListItem = ^TSearchLinkedListItem;
  87. TSearchLinkedListItem = object(TLinkedList_Item)
  88. constructor init;
  89. function equals(p: PSearchLinkedListItem): boolean; virtual;
  90. end;
  91. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  92. TSearchDoubleIntItem = object(TLinkedList_Item)
  93. constructor init(_int1,_int2: longint);
  94. function equals(p: PSearchLinkedListItem): boolean; virtual;
  95. private
  96. int1, int2: longint;
  97. end;
  98. PSearchLinkedList = ^TSearchLinkedList;
  99. TSearchLinkedList = object(TLinkedList)
  100. function searchByValue(p: PSearchLinkedListItem): boolean;
  101. procedure removeByValue(p: PSearchLinkedListItem);
  102. end;
  103. {$endif tempOpts}
  104. {information record with the contents of every register. Every tai object
  105. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  106. TtaiProp = Record
  107. Regs: TRegContent;
  108. { FPURegs: TRegFPUContent;} {currently not yet used}
  109. { allocated Registers }
  110. UsedRegs: TRegSet;
  111. { status of the direction flag }
  112. DirFlag: TFlagContents;
  113. {$ifdef tempOpts}
  114. { currently used temps }
  115. tempAllocs: PSearchLinkedList;
  116. {$endif tempOpts}
  117. { can this instruction be removed? }
  118. CanBeRemoved: Boolean;
  119. { are the resultflags set by this instruction used? }
  120. FlagsUsed: Boolean;
  121. end;
  122. ptaiprop = ^TtaiProp;
  123. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  124. PtaiPropBlock = ^TtaiPropBlock;
  125. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  126. TLabelTableItem = Record
  127. taiObj: tai;
  128. {$ifDef JumpAnal}
  129. InstrNr: Longint;
  130. RefsFound: Word;
  131. JmpsProcessed: Word
  132. {$endif JumpAnal}
  133. end;
  134. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  135. PLabelTable = ^TLabelTable;
  136. {*********************** procedures and functions ************************}
  137. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  138. function RefsEqual(const R1, R2: TReference): Boolean;
  139. function isgp32reg(supreg: tsuperregister): Boolean;
  140. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  141. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  142. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function reginop(supreg: tsuperregister; const o:toper): boolean;
  145. function instrWritesFlags(p: tai): boolean;
  146. function instrReadsFlags(p: tai): boolean;
  147. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  148. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  149. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  150. const c: tcontent): boolean;
  151. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  152. const c: tcontent; var memwritedestroyed: boolean): boolean;
  153. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  154. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  155. procedure SkipHead(var p: tai);
  156. function labelCanBeSkipped(p: tai_label): boolean;
  157. procedure RemoveLastDeallocForFuncRes(asmL: TAAsmOutput; p: tai);
  158. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  159. hp: tai): boolean;
  160. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  161. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  162. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  163. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  164. function sizescompatible(loadsize,newsize: topsize): boolean;
  165. function OpsEqual(const o1,o2:toper): Boolean;
  166. type
  167. tdfaobj = class
  168. constructor create(_list: taasmoutput); virtual;
  169. function pass_1(_blockstart: tai): tai;
  170. function pass_2: boolean;
  171. procedure clear;
  172. function getlabelwithsym(sym: tasmlabel): tai;
  173. private
  174. { Walks through the list to find the lowest and highest label number, inits the }
  175. { labeltable and fixes/optimizes some regallocs }
  176. procedure initlabeltable;
  177. function initdfapass2: boolean;
  178. procedure dodfapass2;
  179. { asm list we're working on }
  180. list: taasmoutput;
  181. { current part of the asm list }
  182. blockstart, blockend: tai;
  183. { the amount of taiObjects in the current part of the assembler list }
  184. nroftaiobjs: longint;
  185. { Array which holds all TtaiProps }
  186. taipropblock: ptaipropblock;
  187. { all labels in the current block: their value mapped to their location }
  188. lolab, hilab, labdif: longint;
  189. labeltable: plabeltable;
  190. end;
  191. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  192. procedure incState(var S: Byte; amount: longint);
  193. {******************************* Variables *******************************}
  194. var
  195. dfa: tdfaobj;
  196. {*********************** end of Interface section ************************}
  197. Implementation
  198. Uses
  199. {$ifdef csdebug}
  200. cutils,
  201. {$else}
  202. {$ifdef statedebug}
  203. cutils,
  204. {$else}
  205. {$ifdef allocregdebug}
  206. cutils,
  207. {$endif}
  208. {$endif}
  209. {$endif}
  210. globals, systems, verbose, symconst, cgobj,procinfo;
  211. Type
  212. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  213. var
  214. {How many instructions are between the current instruction and the last one
  215. that modified the register}
  216. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  217. {$ifdef tempOpts}
  218. constructor TSearchLinkedListItem.init;
  219. begin
  220. end;
  221. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  222. begin
  223. equals := false;
  224. end;
  225. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  226. begin
  227. int1 := _int1;
  228. int2 := _int2;
  229. end;
  230. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  231. begin
  232. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  233. (TSearchDoubleIntItem(p).int2 = int2);
  234. end;
  235. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  236. var temp: PSearchLinkedListItem;
  237. begin
  238. temp := first;
  239. while (temp <> last.next) and
  240. not(temp.equals(p)) do
  241. temp := temp.next;
  242. searchByValue := temp <> last.next;
  243. end;
  244. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  245. begin
  246. temp := first;
  247. while (temp <> last.next) and
  248. not(temp.equals(p)) do
  249. temp := temp.next;
  250. if temp <> last.next then
  251. begin
  252. remove(temp);
  253. dispose(temp,done);
  254. end;
  255. end;
  256. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  257. {updates UsedRegs with the RegAlloc Information coming after p}
  258. begin
  259. repeat
  260. while assigned(p) and
  261. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  262. ((p.typ = ait_label) and
  263. labelCanBeSkipped(tai_label(current)))) Do
  264. p := tai(p.next);
  265. while assigned(p) and
  266. (p.typ=ait_RegAlloc) Do
  267. begin
  268. case tai_regalloc(p).ratype of
  269. ra_alloc :
  270. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  271. ra_dealloc :
  272. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  273. end;
  274. p := tai(p.next);
  275. end;
  276. until not(assigned(p)) or
  277. (not(p.typ in SkipInstr) and
  278. not((p.typ = ait_label) and
  279. labelCanBeSkipped(tai_label(current))));
  280. end;
  281. {$endif tempOpts}
  282. {************************ Create the Label table ************************}
  283. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  284. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  285. { starting with Starttai and ending with the next "real" instruction }
  286. begin
  287. findregalloc := false;
  288. repeat
  289. while assigned(starttai) and
  290. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  291. ((starttai.typ = ait_label) and
  292. labelcanbeskipped(tai_label(starttai)))) do
  293. starttai := tai(starttai.next);
  294. if assigned(starttai) and
  295. (starttai.typ = ait_regalloc) then
  296. begin
  297. if (tai_regalloc(Starttai).ratype = ratyp) and
  298. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  299. begin
  300. findregalloc:=true;
  301. break;
  302. end;
  303. starttai := tai(starttai.next);
  304. end
  305. else
  306. break;
  307. until false;
  308. end;
  309. procedure RemoveLastDeallocForFuncRes(asml: taasmoutput; p: tai);
  310. procedure DoRemoveLastDeallocForFuncRes(asml: taasmoutput; supreg: tsuperregister);
  311. var
  312. hp2: tai;
  313. begin
  314. hp2 := p;
  315. repeat
  316. hp2 := tai(hp2.previous);
  317. if assigned(hp2) and
  318. (hp2.typ = ait_regalloc) and
  319. (tai_regalloc(hp2).ratype=ra_dealloc) and
  320. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  321. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  322. begin
  323. asml.remove(hp2);
  324. hp2.free;
  325. break;
  326. end;
  327. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  328. end;
  329. begin
  330. case current_procinfo.procdef.rettype.def.deftype of
  331. arraydef,recorddef,pointerdef,
  332. stringdef,enumdef,procdef,objectdef,errordef,
  333. filedef,setdef,procvardef,
  334. classrefdef,forwarddef:
  335. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  336. orddef:
  337. if current_procinfo.procdef.rettype.def.size <> 0 then
  338. begin
  339. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  340. { for int64/qword }
  341. if current_procinfo.procdef.rettype.def.size = 8 then
  342. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  343. end;
  344. end;
  345. end;
  346. procedure getNoDeallocRegs(var regs: tregset);
  347. var
  348. regCounter: TSuperRegister;
  349. begin
  350. regs := [];
  351. case current_procinfo.procdef.rettype.def.deftype of
  352. arraydef,recorddef,pointerdef,
  353. stringdef,enumdef,procdef,objectdef,errordef,
  354. filedef,setdef,procvardef,
  355. classrefdef,forwarddef:
  356. regs := [RS_EAX];
  357. orddef:
  358. if current_procinfo.procdef.rettype.def.size <> 0 then
  359. begin
  360. regs := [RS_EAX];
  361. { for int64/qword }
  362. if current_procinfo.procdef.rettype.def.size = 8 then
  363. regs := regs + [RS_EDX];
  364. end;
  365. end;
  366. for regCounter := RS_EAX to RS_EBX do
  367. { if not(regCounter in rg.usableregsint) then}
  368. include(regs,regcounter);
  369. end;
  370. procedure AddRegDeallocFor(asml: taasmoutput; reg: tregister; p: tai);
  371. var
  372. hp1: tai;
  373. funcResRegs: tregset;
  374. funcResReg: boolean;
  375. begin
  376. { if not(supreg in rg.usableregsint) then
  377. exit;}
  378. { if not(supreg in [RS_EDI]) then
  379. exit;}
  380. getNoDeallocRegs(funcresregs);
  381. { funcResRegs := funcResRegs - rg.usableregsint;}
  382. { funcResRegs := funcResRegs - [RS_EDI];}
  383. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  384. funcResReg := getsupreg(reg) in funcresregs;
  385. hp1 := p;
  386. {
  387. while not(funcResReg and
  388. (p.typ = ait_instruction) and
  389. (taicpu(p).opcode = A_JMP) and
  390. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  391. getLastInstruction(p, p) and
  392. not(regInInstruction(supreg, p)) do
  393. hp1 := p;
  394. }
  395. { don't insert a dealloc for registers which contain the function result }
  396. { if they are followed by a jump to the exit label (for exit(...)) }
  397. { if not(funcResReg) or
  398. not((hp1.typ = ait_instruction) and
  399. (taicpu(hp1).opcode = A_JMP) and
  400. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  401. begin
  402. p := tai_regalloc.deAlloc(reg,nil);
  403. insertLLItem(AsmL, hp1.previous, hp1, p);
  404. end;
  405. end;
  406. {************************ Search the Label table ************************}
  407. function findlabel(l: tasmlabel; var hp: tai): boolean;
  408. {searches for the specified label starting from hp as long as the
  409. encountered instructions are labels, to be able to optimize constructs like
  410. jne l2 jmp l2
  411. jmp l3 and l1:
  412. l1: l2:
  413. l2:}
  414. var
  415. p: tai;
  416. begin
  417. p := hp;
  418. while assigned(p) and
  419. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  420. if (p.typ <> ait_Label) or
  421. (tai_label(p).labsym <> l) then
  422. GetNextInstruction(p, p)
  423. else
  424. begin
  425. hp := p;
  426. findlabel := true;
  427. exit
  428. end;
  429. findlabel := false;
  430. end;
  431. {************************ Some general functions ************************}
  432. function tch2reg(ch: tinschange): tsuperregister;
  433. {converts a TChange variable to a TRegister}
  434. const
  435. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  436. begin
  437. if (ch <= CH_REDI) then
  438. tch2reg := ch2reg[ch]
  439. else if (ch <= CH_WEDI) then
  440. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  441. else if (ch <= CH_RWEDI) then
  442. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  443. else if (ch <= CH_MEDI) then
  444. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  445. else
  446. InternalError($db)
  447. end;
  448. { inserts new_one between prev and foll }
  449. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  450. begin
  451. if assigned(prev) then
  452. if assigned(foll) then
  453. begin
  454. if assigned(new_one) then
  455. begin
  456. new_one.previous := prev;
  457. new_one.next := foll;
  458. prev.next := new_one;
  459. foll.previous := new_one;
  460. { shgould we update line information }
  461. if (not (tai(new_one).typ in SkipLineInfo)) and
  462. (not (tai(foll).typ in SkipLineInfo)) then
  463. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  464. end;
  465. end
  466. else
  467. asml.Concat(new_one)
  468. else
  469. if assigned(foll) then
  470. asml.Insert(new_one)
  471. end;
  472. {********************* Compare parts of tai objects *********************}
  473. function regssamesize(reg1, reg2: tregister): boolean;
  474. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  475. 8bit, 16bit or 32bit)}
  476. begin
  477. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  478. internalerror(2003111602);
  479. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  480. end;
  481. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  482. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  483. OldReg and NewReg have the same size (has to be chcked in advance with
  484. RegsSameSize) and that neither equals RS_INVALID}
  485. var
  486. newsupreg, oldsupreg: tsuperregister;
  487. begin
  488. if (newreg = NR_NO) or (oldreg = NR_NO) then
  489. internalerror(2003111601);
  490. newsupreg := getsupreg(newreg);
  491. oldsupreg := getsupreg(oldreg);
  492. with RegInfo Do
  493. begin
  494. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  495. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  496. New2OldReg[newsupreg] := oldsupreg;
  497. end;
  498. end;
  499. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  500. begin
  501. case o.typ Of
  502. top_reg:
  503. if (o.reg <> NR_NO) then
  504. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  505. top_ref:
  506. begin
  507. if o.ref^.base <> NR_NO then
  508. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  509. if o.ref^.index <> NR_NO then
  510. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  511. end;
  512. end;
  513. end;
  514. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  515. begin
  516. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  517. if RegsSameSize(oldreg, newreg) then
  518. with reginfo do
  519. {here we always check for the 32 bit component, because it is possible that
  520. the 8 bit component has not been set, event though NewReg already has been
  521. processed. This happens if it has been compared with a register that doesn't
  522. have an 8 bit component (such as EDI). in that case the 8 bit component is
  523. still set to RS_NO and the comparison in the else-part will fail}
  524. if (getsupreg(oldReg) in OldRegsEncountered) then
  525. if (getsupreg(NewReg) in NewRegsEncountered) then
  526. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  527. { if we haven't encountered the new register yet, but we have encountered the
  528. old one already, the new one can only be correct if it's being written to
  529. (and consequently the old one is also being written to), otherwise
  530. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  531. movl (%eax), %eax movl (%edx), %edx
  532. are considered equivalent}
  533. else
  534. if (opact = opact_write) then
  535. begin
  536. AddReg2RegInfo(oldreg, newreg, reginfo);
  537. RegsEquivalent := true
  538. end
  539. else
  540. Regsequivalent := false
  541. else
  542. if not(getsupreg(newreg) in NewRegsEncountered) and
  543. ((opact = opact_write) or
  544. ((newreg = oldreg) and
  545. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  546. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  547. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  548. begin
  549. AddReg2RegInfo(oldreg, newreg, reginfo);
  550. RegsEquivalent := true
  551. end
  552. else
  553. RegsEquivalent := false
  554. else
  555. RegsEquivalent := false
  556. else
  557. RegsEquivalent := oldreg = newreg
  558. end;
  559. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  560. begin
  561. RefsEquivalent :=
  562. (r1.offset = r2.offset) and
  563. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  564. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  565. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  566. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  567. (r1.relsymbol = r2.relsymbol);
  568. end;
  569. function refsequal(const r1, r2: treference): boolean;
  570. begin
  571. refsequal :=
  572. (r1.offset = r2.offset) and
  573. (r1.segment = r2.segment) and (r1.base = r2.base) and
  574. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  575. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  576. (r1.relsymbol = r2.relsymbol);
  577. end;
  578. {$ifdef q+}
  579. {$q-}
  580. {$define overflowon}
  581. {$endif q+}
  582. // checks whether a write to r2 of size "size" contains address r1
  583. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  584. var
  585. realsize1, realsize2: aint;
  586. begin
  587. realsize1 := tcgsize2size[size1];
  588. realsize2 := tcgsize2size[size2];
  589. refsoverlapping :=
  590. (r2.offset <= r1.offset+realsize1) and
  591. (r1.offset <= r2.offset+realsize2) and
  592. (r1.segment = r2.segment) and (r1.base = r2.base) and
  593. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  594. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  595. (r1.relsymbol = r2.relsymbol);
  596. end;
  597. {$ifdef overflowon}
  598. {$q+}
  599. {$undef overflowon}
  600. {$endif overflowon}
  601. function isgp32reg(supreg: tsuperregister): boolean;
  602. {Checks if the register is a 32 bit general purpose register}
  603. begin
  604. isgp32reg := false;
  605. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  606. isgp32reg := true
  607. end;
  608. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  609. begin {checks whether ref contains a reference to reg}
  610. reginref :=
  611. ((ref.base <> NR_NO) and
  612. (getsupreg(ref.base) = supreg)) or
  613. ((ref.index <> NR_NO) and
  614. (getsupreg(ref.index) = supreg))
  615. end;
  616. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  617. var
  618. p: taicpu;
  619. opcount: longint;
  620. begin
  621. RegReadByInstruction := false;
  622. if hp.typ <> ait_instruction then
  623. exit;
  624. p := taicpu(hp);
  625. case p.opcode of
  626. A_CALL:
  627. regreadbyinstruction := true;
  628. A_IMUL:
  629. case p.ops of
  630. 1:
  631. regReadByInstruction :=
  632. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  633. 2,3:
  634. regReadByInstruction :=
  635. reginop(supreg,p.oper[0]^) or
  636. reginop(supreg,p.oper[1]^);
  637. end;
  638. A_IDIV,A_DIV,A_MUL:
  639. begin
  640. regReadByInstruction :=
  641. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  642. end;
  643. else
  644. begin
  645. for opcount := 0 to p.ops-1 do
  646. if (p.oper[opCount]^.typ = top_ref) and
  647. reginref(supreg,p.oper[opcount]^.ref^) then
  648. begin
  649. RegReadByInstruction := true;
  650. exit
  651. end;
  652. for opcount := 1 to maxinschanges do
  653. case insprop[p.opcode].ch[opcount] of
  654. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  655. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  656. begin
  657. RegReadByInstruction := true;
  658. exit
  659. end;
  660. CH_RWOP1,CH_ROP1,CH_MOP1:
  661. if //(p.oper[0]^.typ = top_reg) and
  662. reginop(supreg,p.oper[0]^) then
  663. begin
  664. RegReadByInstruction := true;
  665. exit
  666. end;
  667. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  668. if //(p.oper[1]^.typ = top_reg) and
  669. reginop(supreg,p.oper[1]^) then
  670. begin
  671. RegReadByInstruction := true;
  672. exit
  673. end;
  674. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  675. if //(p.oper[2]^.typ = top_reg) and
  676. reginop(supreg,p.oper[2]^) then
  677. begin
  678. RegReadByInstruction := true;
  679. exit
  680. end;
  681. end;
  682. end;
  683. end;
  684. end;
  685. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  686. { Checks if reg is used by the instruction p1 }
  687. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  688. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  689. var
  690. p: taicpu;
  691. opcount: longint;
  692. begin
  693. regInInstruction := false;
  694. if p1.typ <> ait_instruction then
  695. exit;
  696. p := taicpu(p1);
  697. case p.opcode of
  698. A_CALL:
  699. regininstruction := true;
  700. A_IMUL:
  701. case p.ops of
  702. 1:
  703. regInInstruction :=
  704. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  705. 2,3:
  706. regInInstruction :=
  707. reginop(supreg,p.oper[0]^) or
  708. reginop(supreg,p.oper[1]^) or
  709. (assigned(p.oper[2]) and
  710. reginop(supreg,p.oper[2]^));
  711. end;
  712. A_IDIV,A_DIV,A_MUL:
  713. regInInstruction :=
  714. reginop(supreg,p.oper[0]^) or
  715. (supreg in [RS_EAX,RS_EDX])
  716. else
  717. begin
  718. for opcount := 1 to maxinschanges do
  719. case insprop[p.opcode].Ch[opCount] of
  720. CH_REAX..CH_MEDI:
  721. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  722. begin
  723. regInInstruction := true;
  724. exit;
  725. end;
  726. CH_ROp1..CH_MOp1:
  727. if reginop(supreg,p.oper[0]^) then
  728. begin
  729. regInInstruction := true;
  730. exit
  731. end;
  732. Ch_ROp2..Ch_MOp2:
  733. if reginop(supreg,p.oper[1]^) then
  734. begin
  735. regInInstruction := true;
  736. exit
  737. end;
  738. Ch_ROp3..Ch_MOp3:
  739. if reginop(supreg,p.oper[2]^) then
  740. begin
  741. regInInstruction := true;
  742. exit
  743. end;
  744. end;
  745. end;
  746. end;
  747. end;
  748. function reginop(supreg: tsuperregister; const o:toper): boolean;
  749. begin
  750. reginop := false;
  751. case o.typ Of
  752. top_reg:
  753. reginop :=
  754. (getregtype(o.reg) = R_INTREGISTER) and
  755. (supreg = getsupreg(o.reg));
  756. top_ref:
  757. reginop :=
  758. ((o.ref^.base <> NR_NO) and
  759. (supreg = getsupreg(o.ref^.base))) or
  760. ((o.ref^.index <> NR_NO) and
  761. (supreg = getsupreg(o.ref^.index)));
  762. end;
  763. end;
  764. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  765. var
  766. InstrProp: TInsProp;
  767. TmpResult: Boolean;
  768. Cnt: Word;
  769. begin
  770. TmpResult := False;
  771. if supreg = RS_INVALID then
  772. exit;
  773. if (p1.typ = ait_instruction) then
  774. case taicpu(p1).opcode of
  775. A_IMUL:
  776. With taicpu(p1) Do
  777. TmpResult :=
  778. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  779. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  780. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  781. A_DIV, A_IDIV, A_MUL:
  782. With taicpu(p1) Do
  783. TmpResult :=
  784. (supreg in [RS_EAX,RS_EDX]);
  785. else
  786. begin
  787. Cnt := 1;
  788. InstrProp := InsProp[taicpu(p1).OpCode];
  789. while (Cnt <= maxinschanges) and
  790. (InstrProp.Ch[Cnt] <> Ch_None) and
  791. not(TmpResult) Do
  792. begin
  793. case InstrProp.Ch[Cnt] Of
  794. Ch_WEAX..Ch_MEDI:
  795. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  796. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  797. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  798. reginop(supreg,taicpu(p1).oper[0]^);
  799. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  800. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  801. reginop(supreg,taicpu(p1).oper[1]^);
  802. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  803. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  804. reginop(supreg,taicpu(p1).oper[2]^);
  805. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  806. Ch_ALL: TmpResult := true;
  807. end;
  808. inc(Cnt)
  809. end
  810. end
  811. end;
  812. RegModifiedByInstruction := TmpResult
  813. end;
  814. function instrWritesFlags(p: tai): boolean;
  815. var
  816. l: longint;
  817. begin
  818. instrWritesFlags := true;
  819. case p.typ of
  820. ait_instruction:
  821. begin
  822. for l := 1 to maxinschanges do
  823. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  824. exit;
  825. end;
  826. ait_label:
  827. exit;
  828. end;
  829. instrWritesFlags := false;
  830. end;
  831. function instrReadsFlags(p: tai): boolean;
  832. var
  833. l: longint;
  834. begin
  835. instrReadsFlags := true;
  836. case p.typ of
  837. ait_instruction:
  838. begin
  839. for l := 1 to maxinschanges do
  840. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  841. exit;
  842. end;
  843. ait_label:
  844. exit;
  845. end;
  846. instrReadsFlags := false;
  847. end;
  848. {********************* GetNext and GetLastInstruction *********************}
  849. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  850. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  851. { next tai object in Next. Returns false if there isn't any }
  852. begin
  853. repeat
  854. if (Current.typ = ait_marker) and
  855. (tai_Marker(current).Kind = AsmBlockStart) then
  856. begin
  857. GetNextInstruction := False;
  858. Next := Nil;
  859. Exit
  860. end;
  861. Current := tai(current.Next);
  862. while assigned(Current) and
  863. ((current.typ in skipInstr) or
  864. ((current.typ = ait_label) and
  865. labelCanBeSkipped(tai_label(current)))) do
  866. Current := tai(current.Next);
  867. { if assigned(Current) and
  868. (current.typ = ait_Marker) and
  869. (tai_Marker(current).Kind = NoPropInfoStart) then
  870. begin
  871. while assigned(Current) and
  872. ((current.typ <> ait_Marker) or
  873. (tai_Marker(current).Kind <> NoPropInfoend)) Do
  874. Current := tai(current.Next);
  875. end;}
  876. until not(assigned(Current)) or
  877. (current.typ <> ait_Marker) or
  878. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  879. Next := Current;
  880. if assigned(Current) and
  881. not((current.typ in SkipInstr) or
  882. ((current.typ = ait_label) and
  883. labelCanBeSkipped(tai_label(current))))
  884. then
  885. GetNextInstruction :=
  886. not((current.typ = ait_marker) and
  887. (tai_marker(current).kind = asmBlockStart))
  888. else
  889. begin
  890. GetNextInstruction := False;
  891. Next := nil;
  892. end;
  893. end;
  894. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  895. {skips the ait-types in SkipInstr puts the previous tai object in
  896. Last. Returns false if there isn't any}
  897. begin
  898. repeat
  899. Current := tai(current.previous);
  900. while assigned(Current) and
  901. (((current.typ = ait_Marker) and
  902. not(tai_Marker(current).Kind in [AsmBlockend{,NoPropInfoend}])) or
  903. (current.typ in SkipInstr) or
  904. ((current.typ = ait_label) and
  905. labelCanBeSkipped(tai_label(current)))) Do
  906. Current := tai(current.previous);
  907. { if assigned(Current) and
  908. (current.typ = ait_Marker) and
  909. (tai_Marker(current).Kind = NoPropInfoend) then
  910. begin
  911. while assigned(Current) and
  912. ((current.typ <> ait_Marker) or
  913. (tai_Marker(current).Kind <> NoPropInfoStart)) Do
  914. Current := tai(current.previous);
  915. end;}
  916. until not(assigned(Current)) or
  917. (current.typ <> ait_Marker) or
  918. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  919. if not(assigned(Current)) or
  920. (current.typ in SkipInstr) or
  921. ((current.typ = ait_label) and
  922. labelCanBeSkipped(tai_label(current))) or
  923. ((current.typ = ait_Marker) and
  924. (tai_Marker(current).Kind = AsmBlockend))
  925. then
  926. begin
  927. Last := nil;
  928. GetLastInstruction := False
  929. end
  930. else
  931. begin
  932. Last := Current;
  933. GetLastInstruction := True;
  934. end;
  935. end;
  936. procedure SkipHead(var p: tai);
  937. var
  938. oldp: tai;
  939. begin
  940. repeat
  941. oldp := p;
  942. if (p.typ in SkipInstr) or
  943. ((p.typ = ait_marker) and
  944. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend])) then
  945. GetNextInstruction(p,p)
  946. else if ((p.Typ = Ait_Marker) and
  947. (tai_Marker(p).Kind = nopropinfostart)) then
  948. {a marker of the NoPropInfoStart can't be the first instruction of a
  949. TAAsmoutput list}
  950. GetNextInstruction(tai(p.previous),p);
  951. until p = oldp
  952. end;
  953. function labelCanBeSkipped(p: tai_label): boolean;
  954. begin
  955. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  956. end;
  957. {******************* The Data Flow Analyzer functions ********************}
  958. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  959. hp: tai): boolean;
  960. { assumes reg is a 32bit register }
  961. var
  962. p: taicpu;
  963. begin
  964. if not assigned(hp) or
  965. (hp.typ <> ait_instruction) then
  966. begin
  967. regLoadedWithNewValue := false;
  968. exit;
  969. end;
  970. p := taicpu(hp);
  971. regLoadedWithNewValue :=
  972. (((p.opcode = A_MOV) or
  973. (p.opcode = A_MOVZX) or
  974. (p.opcode = A_MOVSX) or
  975. (p.opcode = A_LEA)) and
  976. (p.oper[1]^.typ = top_reg) and
  977. (getsupreg(p.oper[1]^.reg) = supreg) and
  978. (canDependOnPrevValue or
  979. (p.oper[0]^.typ <> top_ref) or
  980. not regInRef(supreg,p.oper[0]^.ref^)) or
  981. ((p.opcode = A_POP) and
  982. (getsupreg(p.oper[0]^.reg) = supreg)));
  983. end;
  984. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  985. {updates UsedRegs with the RegAlloc Information coming after p}
  986. begin
  987. repeat
  988. while assigned(p) and
  989. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  990. ((p.typ = ait_label) and
  991. labelCanBeSkipped(tai_label(p))) or
  992. ((p.typ = ait_marker) and
  993. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend]))) do
  994. p := tai(p.next);
  995. while assigned(p) and
  996. (p.typ=ait_RegAlloc) Do
  997. begin
  998. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  999. begin
  1000. case tai_regalloc(p).ratype of
  1001. ra_alloc :
  1002. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1003. ra_dealloc :
  1004. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1005. end;
  1006. end;
  1007. p := tai(p.next);
  1008. end;
  1009. until not(assigned(p)) or
  1010. (not(p.typ in SkipInstr) and
  1011. not((p.typ = ait_label) and
  1012. labelCanBeSkipped(tai_label(p))));
  1013. end;
  1014. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1015. { allocates register reg between (and including) instructions p1 and p2 }
  1016. { the type of p1 and p2 must not be in SkipInstr }
  1017. { note that this routine is both called from the peephole optimizer }
  1018. { where optinfo is not yet initialised) and from the cse (where it is) }
  1019. var
  1020. hp, start: tai;
  1021. removedsomething,
  1022. firstRemovedWasAlloc,
  1023. lastRemovedWasDealloc: boolean;
  1024. supreg: tsuperregister;
  1025. begin
  1026. {$ifdef EXTDEBUG}
  1027. if assigned(p1.optinfo) and
  1028. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1029. internalerror(2004101010);
  1030. {$endif EXTDEBUG}
  1031. start := p1;
  1032. if (reg = NR_ESP) or
  1033. (reg = current_procinfo.framepointer) or
  1034. not(assigned(p1)) then
  1035. { this happens with registers which are loaded implicitely, outside the }
  1036. { current block (e.g. esi with self) }
  1037. exit;
  1038. supreg := getsupreg(reg);
  1039. { make sure we allocate it for this instruction }
  1040. getnextinstruction(p2,p2);
  1041. lastRemovedWasDealloc := false;
  1042. removedSomething := false;
  1043. firstRemovedWasAlloc := false;
  1044. {$ifdef allocregdebug}
  1045. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1046. ' from here...'));
  1047. insertllitem(asml,p1.previous,p1,hp);
  1048. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1049. ' till here...'));
  1050. insertllitem(asml,p2,p2.next,hp);
  1051. {$endif allocregdebug}
  1052. if not(supreg in initialusedregs) then
  1053. begin
  1054. hp := tai_regalloc.alloc(reg,nil);
  1055. insertllItem(asmL,p1.previous,p1,hp);
  1056. end;
  1057. while assigned(p1) and
  1058. (p1 <> p2) do
  1059. begin
  1060. if assigned(p1.optinfo) then
  1061. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1062. p1 := tai(p1.next);
  1063. repeat
  1064. while assigned(p1) and
  1065. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1066. p1 := tai(p1.next);
  1067. { remove all allocation/deallocation info about the register in between }
  1068. if assigned(p1) and
  1069. (p1.typ = ait_regalloc) then
  1070. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1071. begin
  1072. if not removedSomething then
  1073. begin
  1074. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1075. removedSomething := true;
  1076. end;
  1077. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1078. hp := tai(p1.Next);
  1079. asml.Remove(p1);
  1080. p1.free;
  1081. p1 := hp;
  1082. end
  1083. else p1 := tai(p1.next);
  1084. until not(assigned(p1)) or
  1085. not(p1.typ in SkipInstr);
  1086. end;
  1087. if assigned(p1) then
  1088. begin
  1089. if firstRemovedWasAlloc then
  1090. begin
  1091. hp := tai_regalloc.Alloc(reg,nil);
  1092. insertLLItem(asmL,start.previous,start,hp);
  1093. end;
  1094. if lastRemovedWasDealloc then
  1095. begin
  1096. hp := tai_regalloc.DeAlloc(reg,nil);
  1097. insertLLItem(asmL,p1.previous,p1,hp);
  1098. end;
  1099. end;
  1100. end;
  1101. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1102. var
  1103. hp: tai;
  1104. first: boolean;
  1105. begin
  1106. findregdealloc := false;
  1107. first := true;
  1108. while assigned(p.previous) and
  1109. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1110. ((tai(p.previous).typ = ait_label) and
  1111. labelCanBeSkipped(tai_label(p.previous)))) do
  1112. begin
  1113. p := tai(p.previous);
  1114. if (p.typ = ait_regalloc) and
  1115. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1116. if (tai_regalloc(p).ratype=ra_dealloc) then
  1117. if first then
  1118. begin
  1119. findregdealloc := true;
  1120. break;
  1121. end
  1122. else
  1123. begin
  1124. findRegDealloc :=
  1125. getNextInstruction(p,hp) and
  1126. regLoadedWithNewValue(supreg,false,hp);
  1127. break
  1128. end
  1129. else
  1130. first := false;
  1131. end
  1132. end;
  1133. procedure incState(var S: Byte; amount: longint);
  1134. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1135. errors}
  1136. begin
  1137. if (s <= $ff - amount) then
  1138. inc(s, amount)
  1139. else s := longint(s) + amount - $ff;
  1140. end;
  1141. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1142. { Content is the sequence of instructions that describes the contents of }
  1143. { seqReg. reg is being overwritten by the current instruction. if the }
  1144. { content of seqReg depends on reg (ie. because of a }
  1145. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1146. var
  1147. p: tai;
  1148. Counter: Word;
  1149. TmpResult: Boolean;
  1150. RegsChecked: TRegSet;
  1151. begin
  1152. RegsChecked := [];
  1153. p := Content.StartMod;
  1154. TmpResult := False;
  1155. Counter := 1;
  1156. while not(TmpResult) and
  1157. (Counter <= Content.NrOfMods) Do
  1158. begin
  1159. if (p.typ = ait_instruction) and
  1160. ((taicpu(p).opcode = A_MOV) or
  1161. (taicpu(p).opcode = A_MOVZX) or
  1162. (taicpu(p).opcode = A_MOVSX) or
  1163. (taicpu(p).opcode = A_LEA)) and
  1164. (taicpu(p).oper[0]^.typ = top_ref) then
  1165. With taicpu(p).oper[0]^.ref^ Do
  1166. if ((base = current_procinfo.FramePointer) or
  1167. (assigned(symbol) and (base = NR_NO))) and
  1168. (index = NR_NO) then
  1169. begin
  1170. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1171. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1172. break;
  1173. end
  1174. else
  1175. tmpResult :=
  1176. regReadByInstruction(supreg,p) and
  1177. regModifiedByInstruction(seqReg,p)
  1178. else
  1179. tmpResult :=
  1180. regReadByInstruction(supreg,p) and
  1181. regModifiedByInstruction(seqReg,p);
  1182. inc(Counter);
  1183. GetNextInstruction(p,p)
  1184. end;
  1185. sequenceDependsonReg := TmpResult
  1186. end;
  1187. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1188. var
  1189. counter: tsuperregister;
  1190. begin
  1191. for counter := RS_EAX to RS_EDI do
  1192. if counter <> supreg then
  1193. with p1^.regs[counter] Do
  1194. begin
  1195. if (typ in [con_ref,con_noRemoveRef]) and
  1196. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1197. if typ in [con_ref, con_invalid] then
  1198. typ := con_invalid
  1199. { con_noRemoveRef = con_unknown }
  1200. else
  1201. typ := con_unknown;
  1202. if assigned(memwrite) and
  1203. regInRef(counter,memwrite.oper[1]^.ref^) then
  1204. memwrite := nil;
  1205. end;
  1206. end;
  1207. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1208. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1209. contents of registers are loaded with a memory location based on reg.
  1210. doincState is false when this register has to be destroyed not because
  1211. it's contents are directly modified/overwritten, but because of an indirect
  1212. action (e.g. this register holds the contents of a variable and the value
  1213. of the variable in memory is changed) }
  1214. begin
  1215. { the following happens for fpu registers }
  1216. if (supreg < low(NrOfInstrSinceLastMod)) or
  1217. (supreg > high(NrOfInstrSinceLastMod)) then
  1218. exit;
  1219. NrOfInstrSinceLastMod[supreg] := 0;
  1220. with p1^.regs[supreg] do
  1221. begin
  1222. if doincState then
  1223. begin
  1224. incState(wstate,1);
  1225. typ := con_unknown;
  1226. startmod := nil;
  1227. end
  1228. else
  1229. if typ in [con_ref,con_const,con_invalid] then
  1230. typ := con_invalid
  1231. { con_noRemoveRef = con_unknown }
  1232. else
  1233. typ := con_unknown;
  1234. memwrite := nil;
  1235. end;
  1236. invalidateDependingRegs(p1,supreg);
  1237. end;
  1238. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1239. begin
  1240. if (p.typ = ait_instruction) then
  1241. begin
  1242. case taicpu(p).oper[0]^.typ Of
  1243. top_reg:
  1244. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1245. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1246. top_ref:
  1247. With TReference(taicpu(p).oper[0]^) Do
  1248. begin
  1249. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1250. then RegSet := RegSet + [base];
  1251. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1252. then RegSet := RegSet + [index];
  1253. end;
  1254. end;
  1255. case taicpu(p).oper[1]^.typ Of
  1256. top_reg:
  1257. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1258. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1259. top_ref:
  1260. With TReference(taicpu(p).oper[1]^) Do
  1261. begin
  1262. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1263. then RegSet := RegSet + [base];
  1264. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1265. then RegSet := RegSet + [index];
  1266. end;
  1267. end;
  1268. end;
  1269. end;}
  1270. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1271. begin {checks whether the two ops are equivalent}
  1272. OpsEquivalent := False;
  1273. if o1.typ=o2.typ then
  1274. case o1.typ Of
  1275. top_reg:
  1276. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1277. top_ref:
  1278. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1279. Top_Const:
  1280. OpsEquivalent := o1.val = o2.val;
  1281. Top_None:
  1282. OpsEquivalent := True
  1283. end;
  1284. end;
  1285. function OpsEqual(const o1,o2:toper): Boolean;
  1286. begin {checks whether the two ops are equal}
  1287. OpsEqual := False;
  1288. if o1.typ=o2.typ then
  1289. case o1.typ Of
  1290. top_reg :
  1291. OpsEqual:=o1.reg=o2.reg;
  1292. top_ref :
  1293. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1294. Top_Const :
  1295. OpsEqual:=o1.val=o2.val;
  1296. Top_None :
  1297. OpsEqual := True
  1298. end;
  1299. end;
  1300. function sizescompatible(loadsize,newsize: topsize): boolean;
  1301. begin
  1302. case loadsize of
  1303. S_B,S_BW,S_BL:
  1304. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1305. S_W,S_WL:
  1306. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1307. else
  1308. sizescompatible := newsize = S_L;
  1309. end;
  1310. end;
  1311. function opscompatible(p1,p2: taicpu): boolean;
  1312. begin
  1313. case p1.opcode of
  1314. A_MOVZX,A_MOVSX:
  1315. opscompatible :=
  1316. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1317. sizescompatible(p1.opsize,p2.opsize);
  1318. else
  1319. opscompatible :=
  1320. (p1.opcode = p2.opcode) and
  1321. (p1.ops = p2.ops) and
  1322. (p1.opsize = p2.opsize);
  1323. end;
  1324. end;
  1325. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1326. {$ifdef csdebug}
  1327. var
  1328. hp: tai;
  1329. {$endif csdebug}
  1330. begin {checks whether two taicpu instructions are equal}
  1331. if assigned(p1) and assigned(p2) and
  1332. (tai(p1).typ = ait_instruction) and
  1333. (tai(p2).typ = ait_instruction) and
  1334. opscompatible(taicpu(p1),taicpu(p2)) and
  1335. (not(assigned(taicpu(p1).oper[0])) or
  1336. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1337. (not(assigned(taicpu(p1).oper[1])) or
  1338. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1339. (not(assigned(taicpu(p1).oper[2])) or
  1340. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1341. {both instructions have the same structure:
  1342. "<operator> <operand of type1>, <operand of type 2>"}
  1343. if ((taicpu(p1).opcode = A_MOV) or
  1344. (taicpu(p1).opcode = A_MOVZX) or
  1345. (taicpu(p1).opcode = A_MOVSX) or
  1346. (taicpu(p1).opcode = A_LEA)) and
  1347. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1348. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1349. {the "old" instruction is a load of a register with a new value, not with
  1350. a value based on the contents of this register (so no "mov (reg), reg")}
  1351. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1352. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1353. {the "new" instruction is also a load of a register with a new value, and
  1354. this value is fetched from the same memory location}
  1355. begin
  1356. With taicpu(p2).oper[0]^.ref^ Do
  1357. begin
  1358. if (base <> NR_NO) and
  1359. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1360. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1361. if (index <> NR_NO) and
  1362. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1363. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1364. end;
  1365. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1366. from the reference are the same in the old and in the new instruction
  1367. sequence}
  1368. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1369. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1370. InstructionsEquivalent :=
  1371. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1372. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1373. end
  1374. {the registers are loaded with values from different memory locations. if
  1375. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1376. would be considered equivalent}
  1377. else
  1378. InstructionsEquivalent := False
  1379. else
  1380. {load register with a value based on the current value of this register}
  1381. begin
  1382. With taicpu(p2).oper[0]^.ref^ Do
  1383. begin
  1384. if (base <> NR_NO) and
  1385. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1386. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1387. {it won't do any harm if the register is already in RegsLoadedForRef}
  1388. begin
  1389. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1390. {$ifdef csdebug}
  1391. Writeln(std_regname(base), ' added');
  1392. {$endif csdebug}
  1393. end;
  1394. if (index <> NR_NO) and
  1395. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1396. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1397. begin
  1398. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1399. {$ifdef csdebug}
  1400. Writeln(std_regname(index), ' added');
  1401. {$endif csdebug}
  1402. end;
  1403. end;
  1404. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1405. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1406. begin
  1407. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1408. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1409. {$ifdef csdebug}
  1410. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1411. {$endif csdebug}
  1412. end;
  1413. InstructionsEquivalent :=
  1414. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1415. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1416. end
  1417. else
  1418. {an instruction <> mov, movzx, movsx}
  1419. begin
  1420. {$ifdef csdebug}
  1421. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1422. hp.previous := p2;
  1423. hp.next := p2.next;
  1424. p2.next.previous := hp;
  1425. p2.next := hp;
  1426. {$endif csdebug}
  1427. InstructionsEquivalent :=
  1428. (not(assigned(taicpu(p1).oper[0])) or
  1429. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1430. (not(assigned(taicpu(p1).oper[1])) or
  1431. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1432. (not(assigned(taicpu(p1).oper[2])) or
  1433. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1434. end
  1435. {the instructions haven't even got the same structure, so they're certainly
  1436. not equivalent}
  1437. else
  1438. begin
  1439. {$ifdef csdebug}
  1440. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1441. hp.previous := p2;
  1442. hp.next := p2.next;
  1443. p2.next.previous := hp;
  1444. p2.next := hp;
  1445. {$endif csdebug}
  1446. InstructionsEquivalent := False;
  1447. end;
  1448. {$ifdef csdebug}
  1449. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1450. hp.previous := p2;
  1451. hp.next := p2.next;
  1452. p2.next.previous := hp;
  1453. p2.next := hp;
  1454. {$endif csdebug}
  1455. end;
  1456. (*
  1457. function InstructionsEqual(p1, p2: tai): Boolean;
  1458. begin {checks whether two taicpu instructions are equal}
  1459. InstructionsEqual :=
  1460. assigned(p1) and assigned(p2) and
  1461. ((tai(p1).typ = ait_instruction) and
  1462. (tai(p1).typ = ait_instruction) and
  1463. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1464. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1465. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1466. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1467. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1468. end;
  1469. *)
  1470. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1471. begin
  1472. if supreg in [RS_EAX..RS_EDI] then
  1473. incState(p^.regs[supreg].rstate,1)
  1474. end;
  1475. procedure readref(p: ptaiprop; const ref: preference);
  1476. begin
  1477. if ref^.base <> NR_NO then
  1478. readreg(p, getsupreg(ref^.base));
  1479. if ref^.index <> NR_NO then
  1480. readreg(p, getsupreg(ref^.index));
  1481. end;
  1482. procedure ReadOp(p: ptaiprop;const o:toper);
  1483. begin
  1484. case o.typ Of
  1485. top_reg: readreg(p, getsupreg(o.reg));
  1486. top_ref: readref(p, o.ref);
  1487. end;
  1488. end;
  1489. function RefInInstruction(const ref: TReference; p: tai;
  1490. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1491. {checks whehter ref is used in p}
  1492. var
  1493. mysize: tcgsize;
  1494. TmpResult: Boolean;
  1495. begin
  1496. TmpResult := False;
  1497. if (p.typ = ait_instruction) then
  1498. begin
  1499. mysize := topsize2tcgsize[taicpu(p).opsize];
  1500. if (taicpu(p).ops >= 1) and
  1501. (taicpu(p).oper[0]^.typ = top_ref) then
  1502. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1503. if not(TmpResult) and
  1504. (taicpu(p).ops >= 2) and
  1505. (taicpu(p).oper[1]^.typ = top_ref) then
  1506. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1507. if not(TmpResult) and
  1508. (taicpu(p).ops >= 3) and
  1509. (taicpu(p).oper[2]^.typ = top_ref) then
  1510. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1511. end;
  1512. RefInInstruction := TmpResult;
  1513. end;
  1514. function RefInSequence(const ref: TReference; Content: TContent;
  1515. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1516. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1517. tai objects) to see whether ref is used somewhere}
  1518. var p: tai;
  1519. Counter: Word;
  1520. TmpResult: Boolean;
  1521. begin
  1522. p := Content.StartMod;
  1523. TmpResult := False;
  1524. Counter := 1;
  1525. while not(TmpResult) and
  1526. (Counter <= Content.NrOfMods) Do
  1527. begin
  1528. if (p.typ = ait_instruction) and
  1529. RefInInstruction(ref, p, RefsEq, size)
  1530. then TmpResult := True;
  1531. inc(Counter);
  1532. GetNextInstruction(p,p)
  1533. end;
  1534. RefInSequence := TmpResult
  1535. end;
  1536. {$ifdef q+}
  1537. {$q-}
  1538. {$define overflowon}
  1539. {$endif q+}
  1540. // checks whether a write to r2 of size "size" contains address r1
  1541. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1542. var
  1543. realsize1, realsize2: aint;
  1544. begin
  1545. realsize1 := tcgsize2size[size1];
  1546. realsize2 := tcgsize2size[size2];
  1547. arrayrefsoverlapping :=
  1548. (r2.offset <= r1.offset+realsize1) and
  1549. (r1.offset <= r2.offset+realsize2) and
  1550. (r1.segment = r2.segment) and
  1551. (r1.symbol=r2.symbol) and
  1552. (r1.base = r2.base)
  1553. end;
  1554. {$ifdef overflowon}
  1555. {$q+}
  1556. {$undef overflowon}
  1557. {$endif overflowon}
  1558. function isSimpleRef(const ref: treference): boolean;
  1559. { returns true if ref is reference to a local or global variable, to a }
  1560. { parameter or to an object field (this includes arrays). Returns false }
  1561. { otherwise. }
  1562. begin
  1563. isSimpleRef :=
  1564. assigned(ref.symbol) or
  1565. (ref.base = current_procinfo.framepointer);
  1566. end;
  1567. function containsPointerRef(p: tai): boolean;
  1568. { checks if an instruction contains a reference which is a pointer location }
  1569. var
  1570. hp: taicpu;
  1571. count: longint;
  1572. begin
  1573. containsPointerRef := false;
  1574. if p.typ <> ait_instruction then
  1575. exit;
  1576. hp := taicpu(p);
  1577. for count := 0 to hp.ops-1 do
  1578. begin
  1579. case hp.oper[count]^.typ of
  1580. top_ref:
  1581. if not isSimpleRef(hp.oper[count]^.ref^) then
  1582. begin
  1583. containsPointerRef := true;
  1584. exit;
  1585. end;
  1586. top_none:
  1587. exit;
  1588. end;
  1589. end;
  1590. end;
  1591. function containsPointerLoad(c: tcontent): boolean;
  1592. { checks whether the contents of a register contain a pointer reference }
  1593. var
  1594. p: tai;
  1595. count: longint;
  1596. begin
  1597. containsPointerLoad := false;
  1598. p := c.startmod;
  1599. for count := c.nrOfMods downto 1 do
  1600. begin
  1601. if containsPointerRef(p) then
  1602. begin
  1603. containsPointerLoad := true;
  1604. exit;
  1605. end;
  1606. getnextinstruction(p,p);
  1607. end;
  1608. end;
  1609. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1610. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1611. { returns whether the contents c of reg are invalid after regWritten is }
  1612. { is written to ref }
  1613. var
  1614. refsEq: trefCompare;
  1615. begin
  1616. if isSimpleRef(ref) then
  1617. begin
  1618. if (ref.index <> NR_NO) or
  1619. (assigned(ref.symbol) and
  1620. (ref.base <> NR_NO)) then
  1621. { local/global variable or parameter which is an array }
  1622. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1623. else
  1624. { local/global variable or parameter which is not an array }
  1625. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1626. invalsmemwrite :=
  1627. assigned(c.memwrite) and
  1628. ((not(cs_uncertainOpts in aktglobalswitches) and
  1629. containsPointerRef(c.memwrite)) or
  1630. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1631. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1632. begin
  1633. writeToMemDestroysContents := false;
  1634. exit;
  1635. end;
  1636. { write something to a parameter, a local or global variable, so }
  1637. { * with uncertain optimizations on: }
  1638. { - destroy the contents of registers whose contents have somewhere a }
  1639. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1640. { are being written to memory) is not destroyed if it's StartMod is }
  1641. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1642. { expression based on ref) }
  1643. { * with uncertain optimizations off: }
  1644. { - also destroy registers that contain any pointer }
  1645. with c do
  1646. writeToMemDestroysContents :=
  1647. (typ in [con_ref,con_noRemoveRef]) and
  1648. ((not(cs_uncertainOpts in aktglobalswitches) and
  1649. containsPointerLoad(c)
  1650. ) or
  1651. (refInSequence(ref,c,refsEq,size) and
  1652. ((supreg <> regWritten) or
  1653. not((nrOfMods = 1) and
  1654. {StarMod is always of the type ait_instruction}
  1655. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1656. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1657. )
  1658. )
  1659. )
  1660. );
  1661. end
  1662. else
  1663. { write something to a pointer location, so }
  1664. { * with uncertain optimzations on: }
  1665. { - do not destroy registers which contain a local/global variable or }
  1666. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1667. { * with uncertain optimzations off: }
  1668. { - destroy every register which contains a memory location }
  1669. begin
  1670. invalsmemwrite :=
  1671. assigned(c.memwrite) and
  1672. (not(cs_UncertainOpts in aktglobalswitches) or
  1673. containsPointerRef(c.memwrite));
  1674. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1675. begin
  1676. writeToMemDestroysContents := false;
  1677. exit;
  1678. end;
  1679. with c do
  1680. writeToMemDestroysContents :=
  1681. (typ in [con_ref,con_noRemoveRef]) and
  1682. (not(cs_UncertainOpts in aktglobalswitches) or
  1683. { for movsl }
  1684. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1685. { don't destroy if reg contains a parameter, local or global variable }
  1686. containsPointerLoad(c)
  1687. );
  1688. end;
  1689. end;
  1690. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1691. const c: tcontent): boolean;
  1692. { returns whether the contents c of reg are invalid after destReg is }
  1693. { modified }
  1694. begin
  1695. writeToRegDestroysContents :=
  1696. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1697. sequenceDependsOnReg(c,supreg,destReg);
  1698. end;
  1699. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1700. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1701. { returns whether the contents c of reg are invalid after regWritten is }
  1702. { is written to op }
  1703. begin
  1704. memwritedestroyed := false;
  1705. case op.typ of
  1706. top_reg:
  1707. writeDestroysContents :=
  1708. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1709. top_ref:
  1710. writeDestroysContents :=
  1711. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1712. else
  1713. writeDestroysContents := false;
  1714. end;
  1715. end;
  1716. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1717. { destroys all registers which possibly contain a reference to ref, regWritten }
  1718. { is the register whose contents are being written to memory (if this proc }
  1719. { is called because of a "mov?? %reg, (mem)" instruction) }
  1720. var
  1721. counter: tsuperregister;
  1722. destroymemwrite: boolean;
  1723. begin
  1724. for counter := RS_EAX to RS_EDI Do
  1725. begin
  1726. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1727. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1728. destroyReg(ptaiprop(p.optInfo), counter, false)
  1729. else if destroymemwrite then
  1730. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1731. end;
  1732. end;
  1733. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1734. var Counter: tsuperregister;
  1735. begin {initializes/desrtoys all registers}
  1736. For Counter := RS_EAX To RS_EDI Do
  1737. begin
  1738. if read then
  1739. readreg(p, Counter);
  1740. DestroyReg(p, Counter, written);
  1741. p^.regs[counter].MemWrite := nil;
  1742. end;
  1743. p^.DirFlag := F_Unknown;
  1744. end;
  1745. procedure DestroyOp(taiObj: tai; const o:Toper);
  1746. {$ifdef statedebug}
  1747. var
  1748. hp: tai;
  1749. {$endif statedebug}
  1750. begin
  1751. case o.typ Of
  1752. top_reg:
  1753. begin
  1754. {$ifdef statedebug}
  1755. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1756. hp.next := taiobj.next;
  1757. hp.previous := taiobj;
  1758. taiobj.next := hp;
  1759. if assigned(hp.next) then
  1760. hp.next.previous := hp;
  1761. {$endif statedebug}
  1762. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1763. end;
  1764. top_ref:
  1765. begin
  1766. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1767. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1768. end;
  1769. end;
  1770. end;
  1771. procedure AddInstr2RegContents({$ifdef statedebug} asml: taasmoutput; {$endif}
  1772. p: taicpu; supreg: tsuperregister);
  1773. {$ifdef statedebug}
  1774. var
  1775. hp: tai;
  1776. {$endif statedebug}
  1777. begin
  1778. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1779. if (typ in [con_ref,con_noRemoveRef]) then
  1780. begin
  1781. incState(wstate,1);
  1782. { also store how many instructions are part of the sequence in the first }
  1783. { instructions ptaiprop, so it can be easily accessed from within }
  1784. { CheckSequence}
  1785. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1786. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1787. NrOfInstrSinceLastMod[supreg] := 0;
  1788. invalidateDependingRegs(p.optinfo,supreg);
  1789. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1790. {$ifdef StateDebug}
  1791. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1792. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1793. InsertLLItem(AsmL, p, p.next, hp);
  1794. {$endif StateDebug}
  1795. end
  1796. else
  1797. begin
  1798. {$ifdef statedebug}
  1799. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1800. insertllitem(asml,p,p.next,hp);
  1801. {$endif statedebug}
  1802. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1803. {$ifdef StateDebug}
  1804. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1805. InsertLLItem(AsmL, p, p.next, hp);
  1806. {$endif StateDebug}
  1807. end
  1808. end;
  1809. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAAsmoutput; {$endif}
  1810. p: taicpu; const oper: TOper);
  1811. begin
  1812. if oper.typ = top_reg then
  1813. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1814. else
  1815. begin
  1816. ReadOp(ptaiprop(p.optinfo), oper);
  1817. DestroyOp(p, oper);
  1818. end
  1819. end;
  1820. {*************************************************************************************}
  1821. {************************************** TDFAOBJ **************************************}
  1822. {*************************************************************************************}
  1823. constructor tdfaobj.create(_list: taasmoutput);
  1824. begin
  1825. list := _list;
  1826. blockstart := nil;
  1827. blockend := nil;
  1828. nroftaiobjs := 0;
  1829. taipropblock := nil;
  1830. lolab := 0;
  1831. hilab := 0;
  1832. labdif := 0;
  1833. labeltable := nil;
  1834. end;
  1835. procedure tdfaobj.initlabeltable;
  1836. var
  1837. labelfound: boolean;
  1838. p, prev: tai;
  1839. hp1, hp2: tai;
  1840. {$ifdef i386}
  1841. regcounter,
  1842. supreg : tsuperregister;
  1843. {$endif i386}
  1844. usedregs, nodeallocregs: tregset;
  1845. begin
  1846. labelfound := false;
  1847. lolab := maxlongint;
  1848. hilab := 0;
  1849. p := blockstart;
  1850. prev := p;
  1851. while assigned(p) do
  1852. begin
  1853. if (tai(p).typ = ait_label) then
  1854. if not labelcanbeskipped(tai_label(p)) then
  1855. begin
  1856. labelfound := true;
  1857. if (tai_Label(p).labsym.labelnr < lolab) then
  1858. lolab := tai_label(p).labsym.labelnr;
  1859. if (tai_Label(p).labsym.labelnr > hilab) then
  1860. hilab := tai_label(p).labsym.labelnr;
  1861. end;
  1862. prev := p;
  1863. getnextinstruction(p, p);
  1864. end;
  1865. if (prev.typ = ait_marker) and
  1866. (tai_marker(prev).kind = asmblockstart) then
  1867. blockend := prev
  1868. else blockend := nil;
  1869. if labelfound then
  1870. labdif := hilab+1-lolab
  1871. else labdif := 0;
  1872. usedregs := [];
  1873. if (labdif <> 0) then
  1874. begin
  1875. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1876. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1877. end;
  1878. p := blockstart;
  1879. prev := p;
  1880. while (p <> blockend) do
  1881. begin
  1882. case p.typ of
  1883. ait_label:
  1884. if not labelcanbeskipped(tai_label(p)) then
  1885. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1886. {$ifdef i386}
  1887. ait_regalloc:
  1888. begin
  1889. supreg:=getsupreg(tai_regalloc(p).reg);
  1890. case tai_regalloc(p).ratype of
  1891. ra_alloc :
  1892. begin
  1893. if not(supreg in usedregs) then
  1894. include(usedregs, supreg)
  1895. else
  1896. begin
  1897. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1898. hp1 := tai(p.previous);
  1899. list.remove(p);
  1900. p.free;
  1901. p := hp1;
  1902. end;
  1903. end;
  1904. ra_dealloc :
  1905. begin
  1906. exclude(usedregs, supreg);
  1907. hp1 := p;
  1908. hp2 := nil;
  1909. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1910. getnextinstruction(hp1, hp1) and
  1911. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1912. hp2 := hp1;
  1913. if hp2 <> nil then
  1914. begin
  1915. hp1 := tai(p.previous);
  1916. list.remove(p);
  1917. insertllitem(list, hp2, tai(hp2.next), p);
  1918. p := hp1;
  1919. end
  1920. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1921. and getnextinstruction(p,hp1) then
  1922. begin
  1923. hp1 := tai(p.previous);
  1924. list.remove(p);
  1925. p.free;
  1926. p := hp1;
  1927. // don't include here, since then the allocation will be removed when it's processed
  1928. // include(usedregs,supreg);
  1929. end;
  1930. end;
  1931. end;
  1932. end;
  1933. {$endif i386}
  1934. end;
  1935. repeat
  1936. prev := p;
  1937. p := tai(p.next);
  1938. until not(assigned(p)) or
  1939. (p = blockend) or
  1940. not(p.typ in (skipinstr - [ait_regalloc]));
  1941. end;
  1942. {$ifdef i386}
  1943. { don't add deallocation for function result variable or for regvars}
  1944. getNoDeallocRegs(noDeallocRegs);
  1945. usedRegs := usedRegs - noDeallocRegs;
  1946. for regCounter := RS_EAX to RS_EDI do
  1947. if regCounter in usedRegs then
  1948. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1949. {$endif i386}
  1950. end;
  1951. function tdfaobj.pass_1(_blockstart: tai): tai;
  1952. begin
  1953. blockstart := _blockstart;
  1954. initlabeltable;
  1955. pass_1 := blockend;
  1956. end;
  1957. function tdfaobj.initdfapass2: boolean;
  1958. {reserves memory for the PtaiProps in one big memory block when not using
  1959. TP, returns False if not enough memory is available for the optimizer in all
  1960. cases}
  1961. var
  1962. p: tai;
  1963. count: Longint;
  1964. { TmpStr: String; }
  1965. begin
  1966. p := blockstart;
  1967. skiphead(p);
  1968. nroftaiobjs := 0;
  1969. while (p <> blockend) do
  1970. begin
  1971. {$ifDef JumpAnal}
  1972. case p.typ of
  1973. ait_label:
  1974. begin
  1975. if not labelcanbeskipped(tai_label(p)) then
  1976. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1977. end;
  1978. ait_instruction:
  1979. begin
  1980. if taicpu(p).is_jmp then
  1981. begin
  1982. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1983. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1984. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1985. end;
  1986. end;
  1987. { ait_instruction:
  1988. begin
  1989. if (taicpu(p).opcode = A_PUSH) and
  1990. (taicpu(p).oper[0]^.typ = top_symbol) and
  1991. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1992. begin
  1993. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1994. if}
  1995. end;
  1996. {$endif JumpAnal}
  1997. inc(NrOftaiObjs);
  1998. getnextinstruction(p,p);
  1999. end;
  2000. if nroftaiobjs <> 0 then
  2001. begin
  2002. initdfapass2 := True;
  2003. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2004. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2005. p := blockstart;
  2006. skiphead(p);
  2007. for count := 1 To nroftaiobjs do
  2008. begin
  2009. ptaiprop(p.optinfo) := @taipropblock^[count];
  2010. getnextinstruction(p, p);
  2011. end;
  2012. end
  2013. else
  2014. initdfapass2 := false;
  2015. end;
  2016. procedure tdfaobj.dodfapass2;
  2017. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2018. contents for the instructions starting with p. Returns the last tai which has
  2019. been processed}
  2020. var
  2021. curprop, LastFlagsChangeProp: ptaiprop;
  2022. Cnt, InstrCnt : Longint;
  2023. InstrProp: TInsProp;
  2024. UsedRegs: TRegSet;
  2025. prev,p : tai;
  2026. tmpref: TReference;
  2027. tmpsupreg: tsuperregister;
  2028. {$ifdef statedebug}
  2029. hp : tai;
  2030. {$endif}
  2031. {$ifdef AnalyzeLoops}
  2032. hp : tai;
  2033. TmpState: Byte;
  2034. {$endif AnalyzeLoops}
  2035. begin
  2036. p := BlockStart;
  2037. LastFlagsChangeProp := nil;
  2038. prev := nil;
  2039. UsedRegs := [];
  2040. UpdateUsedregs(UsedRegs, p);
  2041. SkipHead(p);
  2042. BlockStart := p;
  2043. InstrCnt := 1;
  2044. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2045. while (p <> Blockend) Do
  2046. begin
  2047. curprop := @taiPropBlock^[InstrCnt];
  2048. if assigned(prev)
  2049. then
  2050. begin
  2051. {$ifdef JumpAnal}
  2052. if (p.Typ <> ait_label) then
  2053. {$endif JumpAnal}
  2054. begin
  2055. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2056. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2057. curprop^.FlagsUsed := false;
  2058. end
  2059. end
  2060. else
  2061. begin
  2062. fillchar(curprop^, SizeOf(curprop^), 0);
  2063. { For tmpreg := RS_EAX to RS_EDI Do
  2064. curprop^.regs[tmpreg].WState := 1;}
  2065. end;
  2066. curprop^.UsedRegs := UsedRegs;
  2067. curprop^.CanBeRemoved := False;
  2068. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2069. For tmpsupreg := RS_EAX To RS_EDI Do
  2070. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2071. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2072. else
  2073. begin
  2074. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2075. curprop^.regs[tmpsupreg].typ := con_unknown;
  2076. end;
  2077. case p.typ Of
  2078. ait_marker:;
  2079. ait_label:
  2080. {$ifndef JumpAnal}
  2081. if not labelCanBeSkipped(tai_label(p)) then
  2082. DestroyAllRegs(curprop,false,false);
  2083. {$else JumpAnal}
  2084. begin
  2085. if not labelCanBeSkipped(tai_label(p)) then
  2086. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2087. {$ifDef AnalyzeLoops}
  2088. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2089. {$else AnalyzeLoops}
  2090. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2091. {$endif AnalyzeLoops}
  2092. then
  2093. {all jumps to this label have been found}
  2094. {$ifDef AnalyzeLoops}
  2095. if (JmpsProcessed > 0)
  2096. then
  2097. {$endif AnalyzeLoops}
  2098. {we've processed at least one jump to this label}
  2099. begin
  2100. if (GetLastInstruction(p, hp) and
  2101. not(((hp.typ = ait_instruction)) and
  2102. (taicpu_labeled(hp).is_jmp))
  2103. then
  2104. {previous instruction not a JMP -> the contents of the registers after the
  2105. previous intruction has been executed have to be taken into account as well}
  2106. For tmpsupreg := RS_EAX to RS_EDI Do
  2107. begin
  2108. if (curprop^.regs[tmpsupreg].WState <>
  2109. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2110. then DestroyReg(curprop, tmpsupreg, true)
  2111. end
  2112. end
  2113. {$ifDef AnalyzeLoops}
  2114. else
  2115. {a label from a backward jump (e.g. a loop), no jump to this label has
  2116. already been processed}
  2117. if GetLastInstruction(p, hp) and
  2118. not(hp.typ = ait_instruction) and
  2119. (taicpu_labeled(hp).opcode = A_JMP))
  2120. then
  2121. {previous instruction not a jmp, so keep all the registers' contents from the
  2122. previous instruction}
  2123. begin
  2124. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2125. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2126. end
  2127. else
  2128. {previous instruction a jmp and no jump to this label processed yet}
  2129. begin
  2130. hp := p;
  2131. Cnt := InstrCnt;
  2132. {continue until we find a jump to the label or a label which has already
  2133. been processed}
  2134. while GetNextInstruction(hp, hp) and
  2135. not((hp.typ = ait_instruction) and
  2136. (taicpu(hp).is_jmp) and
  2137. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2138. not((hp.typ = ait_label) and
  2139. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2140. = tai_Label(hp).labsym^.RefCount) and
  2141. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2142. inc(Cnt);
  2143. if (hp.typ = ait_label)
  2144. then
  2145. {there's a processed label after the current one}
  2146. begin
  2147. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2148. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2149. end
  2150. else
  2151. {there's no label anymore after the current one, or they haven't been
  2152. processed yet}
  2153. begin
  2154. GetLastInstruction(p, hp);
  2155. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2156. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2157. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2158. end
  2159. end
  2160. {$endif AnalyzeLoops}
  2161. else
  2162. {not all references to this label have been found, so destroy all registers}
  2163. begin
  2164. GetLastInstruction(p, hp);
  2165. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2166. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2167. DestroyAllRegs(curprop,true,true)
  2168. end;
  2169. end;
  2170. {$endif JumpAnal}
  2171. ait_stab, ait_force_line, ait_function_name:;
  2172. ait_align: ; { may destroy flags !!! }
  2173. ait_instruction:
  2174. begin
  2175. if taicpu(p).is_jmp or
  2176. (taicpu(p).opcode = A_JMP) then
  2177. begin
  2178. {$ifNDef JumpAnal}
  2179. for tmpsupreg := RS_EAX to RS_EDI do
  2180. with curprop^.regs[tmpsupreg] do
  2181. case typ of
  2182. con_ref: typ := con_noRemoveRef;
  2183. con_const: typ := con_noRemoveConst;
  2184. con_invalid: typ := con_unknown;
  2185. end;
  2186. {$else JumpAnal}
  2187. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2188. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2189. begin
  2190. if (InstrCnt < InstrNr)
  2191. then
  2192. {forward jump}
  2193. if (JmpsProcessed = 0) then
  2194. {no jump to this label has been processed yet}
  2195. begin
  2196. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2197. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2198. inc(JmpsProcessed);
  2199. end
  2200. else
  2201. begin
  2202. For tmpreg := RS_EAX to RS_EDI Do
  2203. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2204. curprop^.regs[tmpreg].WState) then
  2205. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2206. inc(JmpsProcessed);
  2207. end
  2208. {$ifdef AnalyzeLoops}
  2209. else
  2210. { backward jump, a loop for example}
  2211. { if (JmpsProcessed > 0) or
  2212. not(GetLastInstruction(taiObj, hp) and
  2213. (hp.typ = ait_labeled_instruction) and
  2214. (taicpu_labeled(hp).opcode = A_JMP))
  2215. then}
  2216. {instruction prior to label is not a jmp, or at least one jump to the label
  2217. has yet been processed}
  2218. begin
  2219. inc(JmpsProcessed);
  2220. For tmpreg := RS_EAX to RS_EDI Do
  2221. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2222. curprop^.regs[tmpreg].WState)
  2223. then
  2224. begin
  2225. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2226. Cnt := InstrNr;
  2227. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2228. begin
  2229. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2230. inc(Cnt);
  2231. end;
  2232. while (Cnt <= InstrCnt) Do
  2233. begin
  2234. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2235. inc(Cnt)
  2236. end
  2237. end;
  2238. end
  2239. { else }
  2240. {instruction prior to label is a jmp and no jumps to the label have yet been
  2241. processed}
  2242. { begin
  2243. inc(JmpsProcessed);
  2244. For tmpreg := RS_EAX to RS_EDI Do
  2245. begin
  2246. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2247. Cnt := InstrNr;
  2248. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2249. begin
  2250. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2251. inc(Cnt);
  2252. end;
  2253. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2254. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2255. begin
  2256. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2257. inc(Cnt);
  2258. end;
  2259. while (Cnt <= InstrCnt) Do
  2260. begin
  2261. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2262. inc(Cnt)
  2263. end
  2264. end
  2265. end}
  2266. {$endif AnalyzeLoops}
  2267. end;
  2268. {$endif JumpAnal}
  2269. end
  2270. else
  2271. begin
  2272. InstrProp := InsProp[taicpu(p).opcode];
  2273. case taicpu(p).opcode Of
  2274. A_MOV, A_MOVZX, A_MOVSX:
  2275. begin
  2276. case taicpu(p).oper[0]^.typ Of
  2277. top_ref, top_reg:
  2278. case taicpu(p).oper[1]^.typ Of
  2279. top_reg:
  2280. begin
  2281. {$ifdef statedebug}
  2282. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2283. insertllitem(list,p,p.next,hp);
  2284. {$endif statedebug}
  2285. readOp(curprop, taicpu(p).oper[0]^);
  2286. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2287. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2288. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2289. begin
  2290. with curprop^.regs[tmpsupreg] Do
  2291. begin
  2292. incState(wstate,1);
  2293. { also store how many instructions are part of the sequence in the first }
  2294. { instruction's ptaiprop, so it can be easily accessed from within }
  2295. { CheckSequence }
  2296. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2297. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2298. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2299. { Destroy the contents of the registers }
  2300. { that depended on the previous value of }
  2301. { this register }
  2302. invalidateDependingRegs(curprop,tmpsupreg);
  2303. curprop^.regs[tmpsupreg].memwrite := nil;
  2304. end;
  2305. end
  2306. else
  2307. begin
  2308. {$ifdef statedebug}
  2309. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2310. insertllitem(list,p,p.next,hp);
  2311. {$endif statedebug}
  2312. destroyReg(curprop, tmpsupreg, true);
  2313. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2314. with curprop^.regs[tmpsupreg] Do
  2315. begin
  2316. typ := con_ref;
  2317. startmod := p;
  2318. nrOfMods := 1;
  2319. end
  2320. end;
  2321. {$ifdef StateDebug}
  2322. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2323. insertllitem(list,p,p.next,hp);
  2324. {$endif StateDebug}
  2325. end;
  2326. top_ref:
  2327. begin
  2328. readref(curprop, taicpu(p).oper[1]^.ref);
  2329. if taicpu(p).oper[0]^.typ = top_reg then
  2330. begin
  2331. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2332. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2333. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2334. taicpu(p);
  2335. end
  2336. else
  2337. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2338. end;
  2339. end;
  2340. top_Const:
  2341. begin
  2342. case taicpu(p).oper[1]^.typ Of
  2343. top_reg:
  2344. begin
  2345. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2346. {$ifdef statedebug}
  2347. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2348. insertllitem(list,p,p.next,hp);
  2349. {$endif statedebug}
  2350. With curprop^.regs[tmpsupreg] Do
  2351. begin
  2352. DestroyReg(curprop, tmpsupreg, true);
  2353. typ := Con_Const;
  2354. StartMod := p;
  2355. end
  2356. end;
  2357. top_ref:
  2358. begin
  2359. readref(curprop, taicpu(p).oper[1]^.ref);
  2360. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2361. end;
  2362. end;
  2363. end;
  2364. end;
  2365. end;
  2366. A_DIV, A_IDIV, A_MUL:
  2367. begin
  2368. ReadOp(curprop, taicpu(p).oper[0]^);
  2369. readreg(curprop,RS_EAX);
  2370. if (taicpu(p).OpCode = A_IDIV) or
  2371. (taicpu(p).OpCode = A_DIV) then
  2372. begin
  2373. readreg(curprop,RS_EDX);
  2374. end;
  2375. {$ifdef statedebug}
  2376. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2377. insertllitem(list,p,p.next,hp);
  2378. {$endif statedebug}
  2379. { DestroyReg(curprop, RS_EAX, true);}
  2380. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2381. taicpu(p), RS_EAX);
  2382. DestroyReg(curprop, RS_EDX, true);
  2383. LastFlagsChangeProp := curprop;
  2384. end;
  2385. A_IMUL:
  2386. begin
  2387. ReadOp(curprop,taicpu(p).oper[0]^);
  2388. if (taicpu(p).ops >= 2) then
  2389. ReadOp(curprop,taicpu(p).oper[1]^);
  2390. if (taicpu(p).ops <= 2) then
  2391. if (taicpu(p).ops=1) then
  2392. begin
  2393. readreg(curprop,RS_EAX);
  2394. {$ifdef statedebug}
  2395. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2396. insertllitem(list,p,p.next,hp);
  2397. {$endif statedebug}
  2398. { DestroyReg(curprop, RS_EAX, true); }
  2399. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2400. taicpu(p), RS_EAX);
  2401. DestroyReg(curprop,RS_EDX, true)
  2402. end
  2403. else
  2404. AddInstr2OpContents(
  2405. {$ifdef statedebug}list,{$endif}
  2406. taicpu(p), taicpu(p).oper[1]^)
  2407. else
  2408. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2409. taicpu(p), taicpu(p).oper[2]^);
  2410. LastFlagsChangeProp := curprop;
  2411. end;
  2412. A_LEA:
  2413. begin
  2414. readop(curprop,taicpu(p).oper[0]^);
  2415. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2416. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2417. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2418. else
  2419. begin
  2420. {$ifdef statedebug}
  2421. hp := tai_comment.Create(strpnew('destroying & initing'+
  2422. std_regname(taicpu(p).oper[1]^.reg)));
  2423. insertllitem(list,p,p.next,hp);
  2424. {$endif statedebug}
  2425. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2426. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2427. begin
  2428. typ := con_ref;
  2429. startmod := p;
  2430. nrOfMods := 1;
  2431. end
  2432. end;
  2433. end;
  2434. else
  2435. begin
  2436. Cnt := 1;
  2437. while (Cnt <= maxinschanges) and
  2438. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2439. begin
  2440. case InstrProp.Ch[Cnt] Of
  2441. Ch_REAX..Ch_REDI:
  2442. begin
  2443. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2444. readreg(curprop,tmpsupreg);
  2445. end;
  2446. Ch_WEAX..Ch_RWEDI:
  2447. begin
  2448. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2449. begin
  2450. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2451. readreg(curprop,tmpsupreg);
  2452. end;
  2453. {$ifdef statedebug}
  2454. hp := tai_comment.Create(strpnew('destroying '+
  2455. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2456. insertllitem(list,p,p.next,hp);
  2457. {$endif statedebug}
  2458. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2459. DestroyReg(curprop,tmpsupreg, true);
  2460. end;
  2461. Ch_MEAX..Ch_MEDI:
  2462. begin
  2463. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2464. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2465. taicpu(p),tmpsupreg);
  2466. end;
  2467. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2468. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2469. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2470. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2471. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2472. Ch_Wop1..Ch_RWop1:
  2473. begin
  2474. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2475. ReadOp(curprop, taicpu(p).oper[0]^);
  2476. DestroyOp(p, taicpu(p).oper[0]^);
  2477. end;
  2478. Ch_Mop1:
  2479. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2480. taicpu(p), taicpu(p).oper[0]^);
  2481. Ch_Wop2..Ch_RWop2:
  2482. begin
  2483. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2484. ReadOp(curprop, taicpu(p).oper[1]^);
  2485. DestroyOp(p, taicpu(p).oper[1]^);
  2486. end;
  2487. Ch_Mop2:
  2488. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2489. taicpu(p), taicpu(p).oper[1]^);
  2490. Ch_WOp3..Ch_RWOp3:
  2491. begin
  2492. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2493. ReadOp(curprop, taicpu(p).oper[2]^);
  2494. DestroyOp(p, taicpu(p).oper[2]^);
  2495. end;
  2496. Ch_Mop3:
  2497. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2498. taicpu(p), taicpu(p).oper[2]^);
  2499. Ch_WMemEDI:
  2500. begin
  2501. readreg(curprop, RS_EDI);
  2502. fillchar(tmpref, SizeOf(tmpref), 0);
  2503. tmpref.base := NR_EDI;
  2504. tmpref.index := NR_EDI;
  2505. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2506. end;
  2507. Ch_RFlags:
  2508. if assigned(LastFlagsChangeProp) then
  2509. LastFlagsChangeProp^.FlagsUsed := true;
  2510. Ch_WFlags:
  2511. LastFlagsChangeProp := curprop;
  2512. Ch_RWFlags:
  2513. begin
  2514. if assigned(LastFlagsChangeProp) then
  2515. LastFlagsChangeProp^.FlagsUsed := true;
  2516. LastFlagsChangeProp := curprop;
  2517. end;
  2518. Ch_FPU:;
  2519. else
  2520. begin
  2521. {$ifdef statedebug}
  2522. hp := tai_comment.Create(strpnew(
  2523. 'destroying all regs for prev instruction'));
  2524. insertllitem(list,p, p.next,hp);
  2525. {$endif statedebug}
  2526. DestroyAllRegs(curprop,true,true);
  2527. LastFlagsChangeProp := curprop;
  2528. end;
  2529. end;
  2530. inc(Cnt);
  2531. end
  2532. end;
  2533. end;
  2534. end;
  2535. end
  2536. else
  2537. begin
  2538. {$ifdef statedebug}
  2539. hp := tai_comment.Create(strpnew(
  2540. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2541. insertllitem(list,p, p.next,hp);
  2542. {$endif statedebug}
  2543. DestroyAllRegs(curprop,true,true);
  2544. end;
  2545. end;
  2546. inc(InstrCnt);
  2547. prev := p;
  2548. GetNextInstruction(p, p);
  2549. end;
  2550. end;
  2551. function tdfaobj.pass_2: boolean;
  2552. begin
  2553. if initdfapass2 then
  2554. begin
  2555. dodfapass2;
  2556. pass_2 := true
  2557. end
  2558. else
  2559. pass_2 := false;
  2560. end;
  2561. {$ifopt r+}
  2562. {$define rangewason}
  2563. {$r-}
  2564. {$endif}
  2565. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2566. begin
  2567. if (sym.labelnr >= lolab) and
  2568. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2569. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2570. else
  2571. getlabelwithsym := nil;
  2572. end;
  2573. {$ifdef rangewason}
  2574. {$r+}
  2575. {$undef rangewason}
  2576. {$endif}
  2577. procedure tdfaobj.clear;
  2578. begin
  2579. if labdif <> 0 then
  2580. begin
  2581. freemem(labeltable);
  2582. labeltable := nil;
  2583. end;
  2584. if assigned(taipropblock) then
  2585. begin
  2586. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2587. taipropblock := nil;
  2588. end;
  2589. end;
  2590. end.