ncgset.pas 56 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. end;
  41. tcgcasenode = class(tcasenode)
  42. {
  43. Emits the case node statement. Contrary to the intel
  44. 80x86 version, this version does not emit jump tables,
  45. because of portability problems.
  46. }
  47. procedure pass_generate_code;override;
  48. protected
  49. with_sign : boolean;
  50. opsize : tdef;
  51. jmp_gt,jmp_lt,jmp_le : topcmp;
  52. { register with case expression }
  53. hregister,hregister2 : tregister;
  54. endlabel,elselabel : tasmlabel;
  55. { true, if we can omit the range check of the jump table }
  56. jumptable_no_range : boolean;
  57. { has the implementation jumptable support }
  58. min_label : tconstexprint;
  59. function blocklabel(id:longint):tasmlabel;
  60. procedure optimizevalues(var max_linear_list:aint;var max_dist:aword);virtual;
  61. function has_jumptable : boolean;virtual;
  62. procedure genjumptable(hp : pcaselabel;min_,max_ : aint); virtual;
  63. procedure genlinearlist(hp : pcaselabel); virtual;
  64. procedure genlinearcmplist(hp : pcaselabel); virtual;
  65. end;
  66. implementation
  67. uses
  68. systems,
  69. verbose,
  70. symconst,symdef,defutil,
  71. paramgr,
  72. procinfo,pass_2,tgobj,
  73. nbas,ncon,nflw,
  74. ncgutil,hlcgobj;
  75. {*****************************************************************************
  76. TCGSETELEMENTNODE
  77. *****************************************************************************}
  78. procedure tcgsetelementnode.pass_generate_code;
  79. begin
  80. { load the set element's value }
  81. secondpass(left);
  82. { also a second value ? }
  83. if assigned(right) then
  84. internalerror(2015111106);
  85. { we don't modify the left side, we only check the location type; our
  86. parent node (an add-node) will use the resulting location to perform
  87. the set operation without creating an intermediate set }
  88. location_copy(location,left.location);
  89. end;
  90. {*****************************************************************************
  91. *****************************************************************************}
  92. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  93. var
  94. compares,maxcompares:word;
  95. i:byte;
  96. begin
  97. analizeset:=false;
  98. fillchar(setparts,sizeof(setparts),0);
  99. numparts:=0;
  100. compares:=0;
  101. { Lots of comparisions take a lot of time, so do not allow
  102. too much comparisions. 8 comparisions are, however, still
  103. smalller than emitting the set }
  104. if cs_opt_size in current_settings.optimizerswitches then
  105. maxcompares:=8
  106. else
  107. maxcompares:=5;
  108. { when smallset is possible allow only 3 compares the smallset
  109. code is for littlesize also smaller when more compares are used }
  110. if is_small then
  111. maxcompares:=3;
  112. for i:=0 to 255 do
  113. if i in Aset then
  114. begin
  115. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  116. begin
  117. {Set element is a separate element.}
  118. inc(compares);
  119. if compares>maxcompares then
  120. exit;
  121. inc(numparts);
  122. setparts[numparts].range:=false;
  123. setparts[numparts].stop:=i;
  124. end
  125. else
  126. {Set element is part of a range.}
  127. if not setparts[numparts].range then
  128. begin
  129. {Transform an element into a range.}
  130. setparts[numparts].range:=true;
  131. setparts[numparts].start:=setparts[numparts].stop;
  132. setparts[numparts].stop:=i;
  133. { there's only one compare per range anymore. Only a }
  134. { sub is added, but that's much faster than a }
  135. { cmp/jcc combo so neglect its effect }
  136. { inc(compares);
  137. if compares>maxcompares then
  138. exit; }
  139. end
  140. else
  141. begin
  142. {Extend a range.}
  143. setparts[numparts].stop:=i;
  144. end;
  145. end;
  146. analizeset:=true;
  147. end;
  148. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  149. begin
  150. { location is always LOC_REGISTER }
  151. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  152. { allocate a register for the result }
  153. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  154. {**************************** SMALL SET **********************}
  155. if left.location.loc=LOC_CONSTANT then
  156. begin
  157. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  158. right.resultdef, resultdef,
  159. left.location.value-setbase, right.location,
  160. location.register);
  161. end
  162. else
  163. begin
  164. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  165. left.resultdef, opdef, true);
  166. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
  167. setbase);
  168. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
  169. right.resultdef, resultdef, left.location.register, right.location,
  170. location.register);
  171. end;
  172. end;
  173. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  174. begin
  175. { check if we can use smallset operation using btl which is limited
  176. to 32 bits, the left side may also not contain higher values !! }
  177. use_small:=is_smallset(right.resultdef) and
  178. not is_signed(left.resultdef) and
  179. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  180. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  181. { Can we generate jumps? Possible for all types of sets }
  182. checkgenjumps:=(right.nodetype=setconstn) and
  183. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  184. end;
  185. function tcginnode.pass_1: tnode;
  186. var
  187. setparts: Tsetparts;
  188. numparts: byte;
  189. use_small: boolean;
  190. begin
  191. result := inherited pass_1;
  192. if not(assigned(result)) and
  193. checkgenjumps(setparts,numparts,use_small) then
  194. expectloc := LOC_JUMP;
  195. end;
  196. procedure tcginnode.pass_generate_code;
  197. var
  198. adjustment,
  199. setbase : aint;
  200. l, l2 : tasmlabel;
  201. hr,
  202. pleftreg : tregister;
  203. setparts : Tsetparts;
  204. opsize : tcgsize;
  205. opdef : tdef;
  206. uopsize : tcgsize;
  207. uopdef : tdef;
  208. orgopsize : tcgsize;
  209. genjumps,
  210. use_small : boolean;
  211. i,numparts : byte;
  212. needslabel : Boolean;
  213. begin
  214. l2:=nil;
  215. { We check first if we can generate jumps, this can be done
  216. because the resultdef is already set in firstpass }
  217. genjumps := checkgenjumps(setparts,numparts,use_small);
  218. orgopsize := def_cgsize(left.resultdef);
  219. uopsize := OS_32;
  220. uopdef := u32inttype;
  221. if is_signed(left.resultdef) then
  222. begin
  223. opsize := OS_S32;
  224. opdef := s32inttype;
  225. end
  226. else
  227. begin
  228. opsize := uopsize;
  229. opdef := uopdef;
  230. end;
  231. needslabel := false;
  232. if not genjumps then
  233. { calculate both operators }
  234. { the complex one first }
  235. { not in case of genjumps, because then we don't secondpass }
  236. { right at all (so we have to make sure that "right" really is }
  237. { "right" and not "swapped left" in that case) }
  238. firstcomplex(self);
  239. secondpass(left);
  240. if (left.expectloc=LOC_JUMP)<>
  241. (left.location.loc=LOC_JUMP) then
  242. internalerror(2007070101);
  243. { Only process the right if we are not generating jumps }
  244. if not genjumps then
  245. secondpass(right);
  246. if codegenerror then
  247. exit;
  248. { ofcourse not commutative }
  249. if nf_swapped in flags then
  250. swapleftright;
  251. setbase:=tsetdef(right.resultdef).setbase;
  252. if genjumps then
  253. begin
  254. { location is always LOC_JUMP }
  255. current_asmdata.getjumplabel(l);
  256. current_asmdata.getjumplabel(l2);
  257. location_reset_jump(location,l,l2);
  258. { If register is used, use only lower 8 bits }
  259. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  260. pleftreg := left.location.register;
  261. { how much have we already substracted from the x in the }
  262. { "x in [y..z]" expression }
  263. adjustment := 0;
  264. hr:=NR_NO;
  265. for i:=1 to numparts do
  266. if setparts[i].range then
  267. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  268. begin
  269. { is the range different from all legal values? }
  270. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  271. begin
  272. { yes, is the lower bound <> 0? }
  273. if (setparts[i].start <> 0) then
  274. { we're going to substract from the left register, }
  275. { so in case of a LOC_CREGISTER first move the value }
  276. { to edi (not done before because now we can do the }
  277. { move and substract in one instruction with LEA) }
  278. if (left.location.loc = LOC_CREGISTER) and
  279. (hr<>pleftreg) then
  280. begin
  281. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  282. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  283. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  284. pleftreg:=hr;
  285. end
  286. else
  287. begin
  288. { otherwise, the value is already in a register }
  289. { that can be modified }
  290. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  291. setparts[i].start-adjustment,pleftreg)
  292. end;
  293. { new total value substracted from x: }
  294. { adjustment + (setparts[i].start - adjustment) }
  295. adjustment := setparts[i].start;
  296. { check if result < b-a+1 (not "result <= b-a", since }
  297. { we need a carry in case the element is in the range }
  298. { (this will never overflow since we check at the }
  299. { beginning whether stop-start <> 255) }
  300. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  301. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  302. end
  303. else
  304. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  305. { it's always true since "in" is only allowed for bytes }
  306. begin
  307. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  308. end;
  309. end
  310. else
  311. begin
  312. { Emit code to check if left is an element }
  313. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  314. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  315. end;
  316. { To compensate for not doing a second pass }
  317. right.location.reference.symbol:=nil;
  318. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  319. end
  320. else
  321. {*****************************************************************}
  322. { NO JUMP TABLE GENERATION }
  323. {*****************************************************************}
  324. begin
  325. { We will now generated code to check the set itself, no jmps,
  326. handle smallsets separate, because it allows faster checks }
  327. if use_small then
  328. begin
  329. in_smallset(opdef, setbase);
  330. end
  331. else
  332. {************************** NOT SMALL SET ********************}
  333. begin
  334. { location is always LOC_REGISTER }
  335. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  336. { allocate a register for the result }
  337. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  338. if right.location.loc=LOC_CONSTANT then
  339. begin
  340. { can it actually occur currently? CEC }
  341. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  342. { note: this code assumes that left in [0..255], which is a valid }
  343. { assumption (other cases will be caught by range checking) (JM) }
  344. { load left in register }
  345. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  346. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
  347. { emit bit test operation -- warning: do not use
  348. location_force_reg() to force a set into a register, except
  349. to a register of the same size as the set. The reason is
  350. that on big endian systems, this would require moving the
  351. set to the most significant part of the new register,
  352. and location_force_register can't do that (it does not
  353. know the type).
  354. a_bit_test_reg_loc_reg() properly takes into account the
  355. size of the set to adjust the register index to test }
  356. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  357. left.resultdef,right.resultdef,uopdef,
  358. left.location.register,right.location,location.register);
  359. { now zero the result if left > nr_of_bits_in_right_register }
  360. hr := hlcg.getintregister(current_asmdata.CurrAsmList,uopdef);
  361. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  362. { (left.location.size = location.size at this point) }
  363. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef, tcgsize2size[opsize]*8, left.location.register, hr);
  364. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size[opsize]*8)-1, hr);
  365. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  366. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr, location.register);
  367. end { of right.location.loc=LOC_CONSTANT }
  368. { do search in a normal set which could have >32 elements
  369. but also used if the left side contains higher values > 32 }
  370. else if (left.location.loc=LOC_CONSTANT) then
  371. begin
  372. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  373. {should be caught earlier }
  374. internalerror(2007020402);
  375. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  376. right.location,location.register);
  377. end
  378. else
  379. begin
  380. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  381. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
  382. pleftreg := left.location.register;
  383. if (opsize >= OS_S8) or { = if signed }
  384. ((left.resultdef.typ=orddef) and
  385. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  386. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  387. ((left.resultdef.typ=enumdef) and
  388. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  389. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  390. begin
  391. current_asmdata.getjumplabel(l);
  392. current_asmdata.getjumplabel(l2);
  393. needslabel := True;
  394. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  395. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  396. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  397. hlcg.a_label(current_asmdata.CurrAsmList, l);
  398. end;
  399. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  400. pleftreg,right.location,location.register);
  401. if needslabel then
  402. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  403. end;
  404. {$ifndef cpuhighleveltarget}
  405. location.size := def_cgsize(resultdef);
  406. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  407. {$else not cpuhighleveltarget}
  408. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  409. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  410. location.register:=hr;
  411. location.size := def_cgsize(resultdef);
  412. {$endif not cpuhighleveltarget}
  413. end;
  414. end;
  415. location_freetemp(current_asmdata.CurrAsmList, right.location);
  416. end;
  417. {*****************************************************************************
  418. TCGCASENODE
  419. *****************************************************************************}
  420. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  421. begin
  422. if not assigned(blocks[id]) then
  423. internalerror(200411301);
  424. result:=pcaseblock(blocks[id])^.blocklabel;
  425. end;
  426. procedure tcgcasenode.optimizevalues(var max_linear_list:aint;var max_dist:aword);
  427. begin
  428. { no changes by default }
  429. end;
  430. function tcgcasenode.has_jumptable : boolean;
  431. begin
  432. { No jumptable support in the default implementation }
  433. has_jumptable:=false;
  434. end;
  435. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : aint);
  436. begin
  437. internalerror(200209161);
  438. end;
  439. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  440. var
  441. first : boolean;
  442. last : TConstExprInt;
  443. scratch_reg: tregister;
  444. newsize: tcgsize;
  445. newdef: tdef;
  446. procedure genitem(t : pcaselabel);
  447. procedure gensub(value:tcgint);
  448. begin
  449. { here, since the sub and cmp are separate we need
  450. to move the result before subtract to help
  451. the register allocator
  452. }
  453. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  454. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  455. end;
  456. begin
  457. if assigned(t^.less) then
  458. genitem(t^.less);
  459. { do we need to test the first value? }
  460. if first and (t^._low>get_min_value(left.resultdef)) then
  461. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  462. if t^._low=t^._high then
  463. begin
  464. if t^._low-last=0 then
  465. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  466. else
  467. begin
  468. gensub(tcgint(t^._low.svalue-last.svalue));
  469. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  470. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  471. end;
  472. last:=t^._low;
  473. end
  474. else
  475. begin
  476. { it begins with the smallest label, if the value }
  477. { is even smaller then jump immediately to the }
  478. { ELSE-label }
  479. if first then
  480. begin
  481. { have we to ajust the first value ? }
  482. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  483. gensub(tcgint(t^._low.svalue));
  484. end
  485. else
  486. begin
  487. { if there is no unused label between the last and the }
  488. { present label then the lower limit can be checked }
  489. { immediately. else check the range in between: }
  490. gensub(tcgint(t^._low.svalue-last.svalue));
  491. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  492. end;
  493. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  494. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  495. last:=t^._high;
  496. end;
  497. first:=false;
  498. if assigned(t^.greater) then
  499. genitem(t^.greater);
  500. end;
  501. begin
  502. { do we need to generate cmps? }
  503. if (with_sign and (min_label<0)) then
  504. genlinearcmplist(hp)
  505. else
  506. begin
  507. { sign/zero extend the value to a full register before starting to
  508. subtract values, so that on platforms that don't have
  509. subregisters of the same size as the value we don't generate
  510. sign/zero-extensions after every subtraction
  511. make newsize always signed, since we only do this if the size in
  512. bytes of the register is larger than the original opsize, so
  513. the value can always be represented by a larger signed type }
  514. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  515. if tcgsize2size[newsize]>opsize.size then
  516. begin
  517. newdef:=cgsize_orddef(newsize);
  518. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  519. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  520. hregister:=scratch_reg;
  521. opsize:=newdef;
  522. end;
  523. last:=0;
  524. first:=true;
  525. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  526. genitem(hp);
  527. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  528. end;
  529. end;
  530. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  531. var
  532. last : TConstExprInt;
  533. lastwasrange: boolean;
  534. procedure genitem(t : pcaselabel);
  535. {$ifndef cpu64bitalu}
  536. var
  537. l1 : tasmlabel;
  538. {$endif not cpu64bitalu}
  539. begin
  540. if assigned(t^.less) then
  541. genitem(t^.less);
  542. if t^._low=t^._high then
  543. begin
  544. {$if defined(cpu32bitalu)}
  545. if def_cgsize(opsize) in [OS_S64,OS_64] then
  546. begin
  547. current_asmdata.getjumplabel(l1);
  548. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  549. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  550. cg.a_label(current_asmdata.CurrAsmList,l1);
  551. end
  552. else
  553. {$elseif defined(cpu16bitalu)}
  554. if def_cgsize(opsize) in [OS_S64,OS_64] then
  555. begin
  556. current_asmdata.getjumplabel(l1);
  557. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),GetNextReg(hregister2),l1);
  558. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  559. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),GetNextReg(hregister),l1);
  560. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  561. cg.a_label(current_asmdata.CurrAsmList,l1);
  562. end
  563. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  564. begin
  565. current_asmdata.getjumplabel(l1);
  566. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),GetNextReg(hregister),l1);
  567. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  568. cg.a_label(current_asmdata.CurrAsmList,l1);
  569. end
  570. else
  571. {$elseif defined(cpu8bitalu)}
  572. if def_cgsize(opsize) in [OS_S64,OS_64] then
  573. begin
  574. current_asmdata.getjumplabel(l1);
  575. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  576. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  577. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1);
  578. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  579. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  580. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  581. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1);
  582. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  583. cg.a_label(current_asmdata.CurrAsmList,l1);
  584. end
  585. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  586. begin
  587. current_asmdata.getjumplabel(l1);
  588. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  589. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  590. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1);
  591. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  592. cg.a_label(current_asmdata.CurrAsmList,l1);
  593. end
  594. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  595. begin
  596. current_asmdata.getjumplabel(l1);
  597. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1);
  598. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  599. cg.a_label(current_asmdata.CurrAsmList,l1);
  600. end
  601. else
  602. {$endif}
  603. begin
  604. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, aint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  605. end;
  606. { Reset last here, because we've only checked for one value and need to compare
  607. for the next range both the lower and upper bound }
  608. lastwasrange := false;
  609. end
  610. else
  611. begin
  612. { it begins with the smallest label, if the value }
  613. { is even smaller then jump immediately to the }
  614. { ELSE-label }
  615. if not lastwasrange or (t^._low-last>1) then
  616. begin
  617. {$if defined(cpu32bitalu)}
  618. if def_cgsize(opsize) in [OS_64,OS_S64] then
  619. begin
  620. current_asmdata.getjumplabel(l1);
  621. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  622. hregister2, elselabel);
  623. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  624. hregister2, l1);
  625. { the comparisation of the low dword must be always unsigned! }
  626. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  627. cg.a_label(current_asmdata.CurrAsmList,l1);
  628. end
  629. else
  630. {$elseif defined(cpu16bitalu)}
  631. if def_cgsize(opsize) in [OS_64,OS_S64] then
  632. begin
  633. current_asmdata.getjumplabel(l1);
  634. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  635. GetNextReg(hregister2), elselabel);
  636. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  637. GetNextReg(hregister2), l1);
  638. { the comparison of the low words must be always unsigned! }
  639. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  640. hregister2, elselabel);
  641. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  642. hregister2, l1);
  643. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  644. GetNextReg(hregister), elselabel);
  645. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  646. GetNextReg(hregister), l1);
  647. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  648. cg.a_label(current_asmdata.CurrAsmList,l1);
  649. end
  650. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  651. begin
  652. current_asmdata.getjumplabel(l1);
  653. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  654. GetNextReg(hregister), elselabel);
  655. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  656. GetNextReg(hregister), l1);
  657. { the comparisation of the low dword must be always unsigned! }
  658. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  659. cg.a_label(current_asmdata.CurrAsmList,l1);
  660. end
  661. else
  662. {$elseif defined(cpu8bitalu)}
  663. if def_cgsize(opsize) in [OS_64,OS_S64] then
  664. begin
  665. current_asmdata.getjumplabel(l1);
  666. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),elselabel);
  667. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  668. { the comparison of the low words must be always unsigned! }
  669. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),elselabel);
  670. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  671. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),elselabel);
  672. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1);
  673. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  674. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  675. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel);
  676. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  677. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),elselabel);
  678. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  679. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),elselabel);
  680. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1);
  681. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  682. cg.a_label(current_asmdata.CurrAsmList,l1);
  683. end
  684. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  685. begin
  686. current_asmdata.getjumplabel(l1);
  687. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel);
  688. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  689. { the comparison of the low words must be always unsigned! }
  690. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),elselabel);
  691. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  692. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),elselabel);
  693. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1);
  694. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  695. cg.a_label(current_asmdata.CurrAsmList,l1);
  696. end
  697. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  698. begin
  699. current_asmdata.getjumplabel(l1);
  700. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),elselabel);
  701. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1);
  702. { the comparisation of the low dword must be always unsigned! }
  703. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  704. cg.a_label(current_asmdata.CurrAsmList,l1);
  705. end
  706. else
  707. {$endif}
  708. begin
  709. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, aint(t^._low.svalue), hregister,
  710. elselabel);
  711. end;
  712. end;
  713. {$if defined(cpu32bitalu)}
  714. if def_cgsize(opsize) in [OS_S64,OS_64] then
  715. begin
  716. current_asmdata.getjumplabel(l1);
  717. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  718. blocklabel(t^.blockid));
  719. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  720. l1);
  721. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  722. cg.a_label(current_asmdata.CurrAsmList,l1);
  723. end
  724. else
  725. {$elseif defined(cpu16bitalu)}
  726. if def_cgsize(opsize) in [OS_S64,OS_64] then
  727. begin
  728. current_asmdata.getjumplabel(l1);
  729. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
  730. blocklabel(t^.blockid));
  731. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
  732. l1);
  733. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  734. blocklabel(t^.blockid));
  735. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  736. l1);
  737. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
  738. blocklabel(t^.blockid));
  739. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
  740. l1);
  741. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  742. cg.a_label(current_asmdata.CurrAsmList,l1);
  743. end
  744. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  745. begin
  746. current_asmdata.getjumplabel(l1);
  747. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
  748. blocklabel(t^.blockid));
  749. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
  750. l1);
  751. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  752. cg.a_label(current_asmdata.CurrAsmList,l1);
  753. end
  754. else
  755. {$elseif defined(cpu8bitalu)}
  756. if def_cgsize(opsize) in [OS_S64,OS_64] then
  757. begin
  758. current_asmdata.getjumplabel(l1);
  759. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),blocklabel(t^.blockid));
  760. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  761. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),blocklabel(t^.blockid));
  762. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  763. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),blocklabel(t^.blockid));
  764. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),l1);
  765. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  766. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  767. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid));
  768. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  769. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid));
  770. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  771. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),blocklabel(t^.blockid));
  772. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),l1);
  773. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  774. cg.a_label(current_asmdata.CurrAsmList,l1);
  775. end
  776. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  777. begin
  778. current_asmdata.getjumplabel(l1);
  779. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid));
  780. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  781. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid));
  782. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  783. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),blocklabel(t^.blockid));
  784. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),l1);
  785. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  786. cg.a_label(current_asmdata.CurrAsmList,l1);
  787. end
  788. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  789. begin
  790. current_asmdata.getjumplabel(l1);
  791. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),blocklabel(t^.blockid));
  792. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),l1);
  793. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  794. cg.a_label(current_asmdata.CurrAsmList,l1);
  795. end
  796. else
  797. {$endif}
  798. begin
  799. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, aint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  800. end;
  801. last:=t^._high;
  802. lastwasrange := true;
  803. end;
  804. if assigned(t^.greater) then
  805. genitem(t^.greater);
  806. end;
  807. begin
  808. last:=0;
  809. lastwasrange:=false;
  810. genitem(hp);
  811. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  812. end;
  813. procedure tcgcasenode.pass_generate_code;
  814. var
  815. oldflowcontrol: tflowcontrol;
  816. i : longint;
  817. distv,
  818. lv,hv,
  819. max_label: tconstexprint;
  820. labelcnt : tcgint;
  821. max_linear_list : aint;
  822. max_dist,
  823. dist : aword;
  824. oldexecutionweight : longint;
  825. begin
  826. location_reset(location,LOC_VOID,OS_NO);
  827. oldflowcontrol := flowcontrol;
  828. include(flowcontrol,fc_inflowcontrol);
  829. { Allocate labels }
  830. current_asmdata.getjumplabel(endlabel);
  831. current_asmdata.getjumplabel(elselabel);
  832. for i:=0 to blocks.count-1 do
  833. current_asmdata.getjumplabel(pcaseblock(blocks[i])^.blocklabel);
  834. with_sign:=is_signed(left.resultdef);
  835. if with_sign then
  836. begin
  837. jmp_gt:=OC_GT;
  838. jmp_lt:=OC_LT;
  839. jmp_le:=OC_LTE;
  840. end
  841. else
  842. begin
  843. jmp_gt:=OC_A;
  844. jmp_lt:=OC_B;
  845. jmp_le:=OC_BE;
  846. end;
  847. secondpass(left);
  848. if (left.expectloc=LOC_JUMP)<>
  849. (left.location.loc=LOC_JUMP) then
  850. internalerror(2006050501);
  851. { determines the size of the operand }
  852. opsize:=left.resultdef;
  853. { copy the case expression to a register }
  854. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  855. {$ifndef cpu64bitalu}
  856. if def_cgsize(opsize) in [OS_S64,OS_64] then
  857. begin
  858. hregister:=left.location.register64.reglo;
  859. hregister2:=left.location.register64.reghi;
  860. end
  861. else
  862. {$endif not cpu64bitalu}
  863. hregister:=left.location.register;
  864. { we need the min_label always to choose between }
  865. { cmps and subs/decs }
  866. min_label:=case_get_min(labels);
  867. { Generate the jumps }
  868. {$ifdef OLDREGVARS}
  869. load_all_regvars(current_asmdata.CurrAsmList);
  870. {$endif OLDREGVARS}
  871. {$ifndef cpu64bitalu}
  872. if def_cgsize(opsize) in [OS_64,OS_S64] then
  873. genlinearcmplist(labels)
  874. else
  875. {$endif not cpu64bitalu}
  876. begin
  877. if cs_opt_level1 in current_settings.optimizerswitches then
  878. begin
  879. { procedures are empirically passed on }
  880. { consumption can also be calculated }
  881. { but does it pay on the different }
  882. { processors? }
  883. { moreover can the size only be appro- }
  884. { ximated as it is not known if rel8, }
  885. { rel16 or rel32 jumps are used }
  886. max_label:=case_get_max(labels);
  887. labelcnt:=case_count_labels(labels);
  888. { can we omit the range check of the jump table ? }
  889. getrange(left.resultdef,lv,hv);
  890. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  891. { hack a little bit, because the range can be greater }
  892. { than the positive range of a aint }
  893. if (min_label<0) and (max_label>0) then
  894. distv:=max_label+min_label
  895. else
  896. distv:=max_label-min_label;
  897. if (distv>=0) then
  898. dist:=distv.uvalue
  899. else
  900. dist:=-distv.svalue;
  901. { optimize for size ? }
  902. if cs_opt_size in current_settings.optimizerswitches then
  903. begin
  904. if has_jumptable and
  905. (min_label>=int64(low(aint))) and
  906. (max_label<=high(aint)) and
  907. not((labelcnt<=2) or
  908. ((max_label-min_label)<0) or
  909. ((max_label-min_label)>3*labelcnt)) then
  910. begin
  911. { if the labels less or more a continuum then }
  912. genjumptable(labels,min_label.svalue,max_label.svalue);
  913. end
  914. else
  915. begin
  916. { a linear list is always smaller than a jump tree }
  917. genlinearlist(labels);
  918. end;
  919. end
  920. else
  921. begin
  922. max_dist:=4*labelcnt;
  923. if jumptable_no_range then
  924. max_linear_list:=4
  925. else
  926. max_linear_list:=2;
  927. { allow processor specific values }
  928. optimizevalues(max_linear_list,max_dist);
  929. if (labelcnt<=max_linear_list) then
  930. genlinearlist(labels)
  931. else
  932. begin
  933. if (has_jumptable) and
  934. (dist<max_dist) and
  935. (min_label>=int64(low(aint))) and
  936. (max_label<=high(aint)) then
  937. genjumptable(labels,min_label.svalue,max_label.svalue)
  938. else
  939. genlinearlist(labels);
  940. end;
  941. end;
  942. end
  943. else
  944. { it's always not bad }
  945. genlinearlist(labels);
  946. end;
  947. { estimates the repeat of each instruction }
  948. oldexecutionweight:=cg.executionweight;
  949. cg.executionweight:=cg.executionweight div case_count_labels(labels);
  950. if cg.executionweight<1 then
  951. cg.executionweight:=1;
  952. { generate the instruction blocks }
  953. for i:=0 to blocks.count-1 do
  954. begin
  955. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  956. cg.a_label(current_asmdata.CurrAsmList,pcaseblock(blocks[i])^.blocklabel);
  957. secondpass(pcaseblock(blocks[i])^.statement);
  958. { don't come back to case line }
  959. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  960. {$ifdef OLDREGVARS}
  961. load_all_regvars(current_asmdata.CurrAsmList);
  962. {$endif OLDREGVARS}
  963. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  964. end;
  965. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  966. { ...and the else block }
  967. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  968. if assigned(elseblock) then
  969. begin
  970. secondpass(elseblock);
  971. {$ifdef OLDREGVARS}
  972. load_all_regvars(current_asmdata.CurrAsmList);
  973. {$endif OLDREGVARS}
  974. end;
  975. cg.executionweight:=oldexecutionweight;
  976. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  977. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  978. { Reset labels }
  979. for i:=0 to blocks.count-1 do
  980. pcaseblock(blocks[i])^.blocklabel:=nil;
  981. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  982. end;
  983. begin
  984. csetelementnode:=tcgsetelementnode;
  985. cinnode:=tcginnode;
  986. ccasenode:=tcgcasenode;
  987. end.