cgobj.pas 148 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_extend_backwards(b: boolean);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. This must be overriden for each CPU target.
  102. @param(size size of the operand in the register)
  103. @param(r register source of the operand)
  104. @param(cgpara where the parameter will be stored)
  105. }
  106. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  107. {# Pass a parameter, which is a constant, to a routine.
  108. A generic version is provided. This routine should
  109. be overriden for optimization purposes if the cpu
  110. permits directly sending this type of parameter.
  111. @param(size size of the operand in constant)
  112. @param(a value of constant to send)
  113. @param(cgpara where the parameter will be stored)
  114. }
  115. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  116. {# Pass the value of a parameter, which is located in memory, to a routine.
  117. A generic version is provided. This routine should
  118. be overriden for optimization purposes if the cpu
  119. permits directly sending this type of parameter.
  120. @param(size size of the operand in constant)
  121. @param(r Memory reference of value to send)
  122. @param(cgpara where the parameter will be stored)
  123. }
  124. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  125. {# Pass the value of a parameter, which can be located either in a register or memory location,
  126. to a routine.
  127. A generic version is provided.
  128. @param(l location of the operand to send)
  129. @param(nr parameter number (starting from one) of routine (from left to right))
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  133. {# Pass the address of a reference to a routine. This routine
  134. will calculate the address of the reference, and pass this
  135. calculated address as a parameter.
  136. A generic version is provided. This routine should
  137. be overriden for optimization purposes if the cpu
  138. permits directly sending this type of parameter.
  139. @param(r reference to get address from)
  140. @param(nr parameter number (starting from one) of routine (from left to right))
  141. }
  142. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. {# Emits instruction to call the method specified by symbol name.
  160. This routine must be overriden for each new target cpu.
  161. There is no a_call_ref because loading the reference will use
  162. a temp register on most cpu's resulting in conflicts with the
  163. registers used for the parameters (PFV)
  164. }
  165. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  166. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  167. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  168. { same as a_call_name, might be overriden on certain architectures to emit
  169. static calls without usage of a got trampoline }
  170. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  171. { move instructions }
  172. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  177. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  178. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  179. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  180. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  181. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  182. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  183. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  184. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  185. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  186. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  187. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  188. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  189. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  191. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  192. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  193. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  194. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  195. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  196. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  197. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  198. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  199. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  200. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  201. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  202. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  203. { fpu move instructions }
  204. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  205. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  206. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  207. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  208. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  209. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  210. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  211. { vector register move instructions }
  212. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  213. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  214. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  215. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  216. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  217. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  218. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  219. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  220. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  221. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  222. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  223. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  224. { basic arithmetic operations }
  225. { note: for operators which require only one argument (not, neg), use }
  226. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  227. { that in this case the *second* operand is used as both source and }
  228. { destination (JM) }
  229. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  230. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  231. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  232. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  233. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  234. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  235. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  236. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  237. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  238. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  239. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  240. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  241. { trinary operations for processors that support them, 'emulated' }
  242. { on others. None with "ref" arguments since I don't think there }
  243. { are any processors that support it (JM) }
  244. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  245. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  246. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  247. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  248. { comparison operations }
  249. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  250. l : tasmlabel);virtual; abstract;
  251. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  252. l : tasmlabel); virtual;
  253. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  254. l : tasmlabel);
  255. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  256. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  257. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  258. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  259. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  260. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  261. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  262. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  263. l : tasmlabel);
  264. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  265. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  266. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  267. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  268. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  269. }
  270. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  271. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  272. {
  273. This routine tries to optimize the op_const_reg/ref opcode, and should be
  274. called at the start of a_op_const_reg/ref. It returns the actual opcode
  275. to emit, and the constant value to emit. This function can opcode OP_NONE to
  276. remove the opcode and OP_MOVE to replace it with a simple load
  277. @param(op The opcode to emit, returns the opcode which must be emitted)
  278. @param(a The constant which should be emitted, returns the constant which must
  279. be emitted)
  280. }
  281. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  282. {#
  283. This routine is used in exception management nodes. It should
  284. save the exception reason currently in the FUNCTION_RETURN_REG. The
  285. save should be done either to a temp (pointed to by href).
  286. or on the stack (pushing the value on the stack).
  287. The size of the value to save is OS_S32. The default version
  288. saves the exception reason to a temp. memory area.
  289. }
  290. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  291. {#
  292. This routine is used in exception management nodes. It should
  293. save the exception reason constant. The
  294. save should be done either to a temp (pointed to by href).
  295. or on the stack (pushing the value on the stack).
  296. The size of the value to save is OS_S32. The default version
  297. saves the exception reason to a temp. memory area.
  298. }
  299. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  300. {#
  301. This routine is used in exception management nodes. It should
  302. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  303. should either be in the temp. area (pointed to by href , href should
  304. *NOT* be freed) or on the stack (the value should be popped).
  305. The size of the value to save is OS_S32. The default version
  306. saves the exception reason to a temp. memory area.
  307. }
  308. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  309. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  310. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  311. {# This should emit the opcode to copy len bytes from the source
  312. to destination.
  313. It must be overriden for each new target processor.
  314. @param(source Source reference of copy)
  315. @param(dest Destination reference of copy)
  316. }
  317. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  318. {# This should emit the opcode to copy len bytes from the an unaligned source
  319. to destination.
  320. It must be overriden for each new target processor.
  321. @param(source Source reference of copy)
  322. @param(dest Destination reference of copy)
  323. }
  324. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  325. {# This should emit the opcode to a shortrstring from the source
  326. to destination.
  327. @param(source Source reference of copy)
  328. @param(dest Destination reference of copy)
  329. }
  330. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  331. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  332. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  333. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  334. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  335. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  336. {# Generates range checking code. It is to note
  337. that this routine does not need to be overriden,
  338. as it takes care of everything.
  339. @param(p Node which contains the value to check)
  340. @param(todef Type definition of node to range check)
  341. }
  342. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  343. {# Generates overflow checking code for a node }
  344. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  345. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  346. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  347. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  348. {# Emits instructions when compilation is done in profile
  349. mode (this is set as a command line option). The default
  350. behavior does nothing, should be overriden as required.
  351. }
  352. procedure g_profilecode(list : TAsmList);virtual;
  353. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  354. @param(size Number of bytes to allocate)
  355. }
  356. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  357. {# Emits instruction for allocating the locals in entry
  358. code of a routine. This is one of the first
  359. routine called in @var(genentrycode).
  360. @param(localsize Number of bytes to allocate as locals)
  361. }
  362. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  363. {# Emits instructions for returning from a subroutine.
  364. Should also restore the framepointer and stack.
  365. @param(parasize Number of bytes of parameters to deallocate from stack)
  366. }
  367. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  368. {# This routine is called when generating the code for the entry point
  369. of a routine. It should save all registers which are not used in this
  370. routine, and which should be declared as saved in the std_saved_registers
  371. set.
  372. This routine is mainly used when linking to code which is generated
  373. by ABI-compliant compilers (like GCC), to make sure that the reserved
  374. registers of that ABI are not clobbered.
  375. @param(usedinproc Registers which are used in the code of this routine)
  376. }
  377. procedure g_save_standard_registers(list:TAsmList);virtual;
  378. {# This routine is called when generating the code for the exit point
  379. of a routine. It should restore all registers which were previously
  380. saved in @var(g_save_standard_registers).
  381. @param(usedinproc Registers which are used in the code of this routine)
  382. }
  383. procedure g_restore_standard_registers(list:TAsmList);virtual;
  384. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  385. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  386. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  387. protected
  388. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  389. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  390. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  391. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  392. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  393. end;
  394. {$ifndef cpu64bit}
  395. {# @abstract(Abstract code generator for 64 Bit operations)
  396. This class implements an abstract code generator class
  397. for 64 Bit operations.
  398. }
  399. tcg64 = class
  400. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  401. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  402. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  403. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  404. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  405. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  406. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  407. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  408. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  409. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  410. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  411. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  412. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  413. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  414. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  415. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  416. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  417. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  418. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  419. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  420. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  421. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  422. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  423. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  424. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  425. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  426. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  427. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  428. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  429. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  430. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  431. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  432. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  433. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  434. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  435. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  436. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  437. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  438. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  439. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  440. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  441. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  442. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  443. {
  444. This routine tries to optimize the const_reg opcode, and should be
  445. called at the start of a_op64_const_reg. It returns the actual opcode
  446. to emit, and the constant value to emit. If this routine returns
  447. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  448. @param(op The opcode to emit, returns the opcode which must be emitted)
  449. @param(a The constant which should be emitted, returns the constant which must
  450. be emitted)
  451. @param(reg The register to emit the opcode with, returns the register with
  452. which the opcode will be emitted)
  453. }
  454. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  455. { override to catch 64bit rangechecks }
  456. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  457. end;
  458. {$endif cpu64bit}
  459. var
  460. {# Main code generator class }
  461. cg : tcg;
  462. {$ifndef cpu64bit}
  463. {# Code generator class for all operations working with 64-Bit operands }
  464. cg64 : tcg64;
  465. {$endif cpu64bit}
  466. implementation
  467. uses
  468. globals,options,systems,
  469. verbose,defutil,paramgr,symsym,
  470. tgobj,cutils,procinfo,
  471. ncgrtti;
  472. {*****************************************************************************
  473. basic functionallity
  474. ******************************************************************************}
  475. constructor tcg.create;
  476. begin
  477. end;
  478. {*****************************************************************************
  479. register allocation
  480. ******************************************************************************}
  481. procedure tcg.init_register_allocators;
  482. begin
  483. fillchar(rg,sizeof(rg),0);
  484. add_reg_instruction_hook:=@add_reg_instruction;
  485. end;
  486. procedure tcg.done_register_allocators;
  487. begin
  488. { Safety }
  489. fillchar(rg,sizeof(rg),0);
  490. add_reg_instruction_hook:=nil;
  491. end;
  492. {$ifdef flowgraph}
  493. procedure Tcg.init_flowgraph;
  494. begin
  495. aktflownode:=0;
  496. end;
  497. procedure Tcg.done_flowgraph;
  498. begin
  499. end;
  500. {$endif}
  501. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  502. begin
  503. if not assigned(rg[R_INTREGISTER]) then
  504. internalerror(200312122);
  505. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  506. end;
  507. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  508. begin
  509. if not assigned(rg[R_FPUREGISTER]) then
  510. internalerror(200312123);
  511. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  512. end;
  513. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  514. begin
  515. if not assigned(rg[R_MMREGISTER]) then
  516. internalerror(2003121214);
  517. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  518. end;
  519. function tcg.getaddressregister(list:TAsmList):Tregister;
  520. begin
  521. if assigned(rg[R_ADDRESSREGISTER]) then
  522. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  523. else
  524. begin
  525. if not assigned(rg[R_INTREGISTER]) then
  526. internalerror(200312121);
  527. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  528. end;
  529. end;
  530. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  531. var
  532. subreg:Tsubregister;
  533. begin
  534. subreg:=cgsize2subreg(size);
  535. result:=reg;
  536. setsubreg(result,subreg);
  537. { notify RA }
  538. if result<>reg then
  539. list.concat(tai_regalloc.resize(result));
  540. end;
  541. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  542. begin
  543. if not assigned(rg[getregtype(r)]) then
  544. internalerror(200312125);
  545. rg[getregtype(r)].getcpuregister(list,r);
  546. end;
  547. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  548. begin
  549. if not assigned(rg[getregtype(r)]) then
  550. internalerror(200312126);
  551. rg[getregtype(r)].ungetcpuregister(list,r);
  552. end;
  553. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  554. begin
  555. if assigned(rg[rt]) then
  556. rg[rt].alloccpuregisters(list,r)
  557. else
  558. internalerror(200310092);
  559. end;
  560. procedure tcg.allocallcpuregisters(list:TAsmList);
  561. begin
  562. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  563. {$ifndef i386}
  564. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  565. {$ifdef cpumm}
  566. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  567. {$endif cpumm}
  568. {$endif i386}
  569. end;
  570. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  571. begin
  572. if assigned(rg[rt]) then
  573. rg[rt].dealloccpuregisters(list,r)
  574. else
  575. internalerror(200310093);
  576. end;
  577. procedure tcg.deallocallcpuregisters(list:TAsmList);
  578. begin
  579. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  580. {$ifndef i386}
  581. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  582. {$ifdef cpumm}
  583. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  584. {$endif cpumm}
  585. {$endif i386}
  586. end;
  587. function tcg.uses_registers(rt:Tregistertype):boolean;
  588. begin
  589. if assigned(rg[rt]) then
  590. result:=rg[rt].uses_registers
  591. else
  592. result:=false;
  593. end;
  594. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  595. var
  596. rt : tregistertype;
  597. begin
  598. rt:=getregtype(r);
  599. { Only add it when a register allocator is configured.
  600. No IE can be generated, because the VMT is written
  601. without a valid rg[] }
  602. if assigned(rg[rt]) then
  603. rg[rt].add_reg_instruction(instr,r);
  604. end;
  605. procedure tcg.add_move_instruction(instr:Taicpu);
  606. var
  607. rt : tregistertype;
  608. begin
  609. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  610. if assigned(rg[rt]) then
  611. rg[rt].add_move_instruction(instr)
  612. else
  613. internalerror(200310095);
  614. end;
  615. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  616. var
  617. rt : tregistertype;
  618. begin
  619. for rt:=low(rg) to high(rg) do
  620. begin
  621. if assigned(rg[rt]) then
  622. rg[rt].extend_live_range_backwards := b;;
  623. end;
  624. end;
  625. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  626. var
  627. rt : tregistertype;
  628. begin
  629. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  630. begin
  631. if assigned(rg[rt]) then
  632. rg[rt].do_register_allocation(list,headertai);
  633. end;
  634. { running the other register allocator passes could require addition int/addr. registers
  635. when spilling so run int/addr register allocation at the end }
  636. if assigned(rg[R_INTREGISTER]) then
  637. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  638. if assigned(rg[R_ADDRESSREGISTER]) then
  639. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  640. end;
  641. procedure tcg.translate_register(var reg : tregister);
  642. begin
  643. rg[getregtype(reg)].translate_register(reg);
  644. end;
  645. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  646. begin
  647. list.concat(tai_regalloc.alloc(r,nil));
  648. end;
  649. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  650. begin
  651. list.concat(tai_regalloc.dealloc(r,nil));
  652. end;
  653. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  654. var
  655. instr : tai;
  656. begin
  657. instr:=tai_regalloc.sync(r);
  658. list.concat(instr);
  659. add_reg_instruction(instr,r);
  660. end;
  661. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  662. begin
  663. list.concat(tai_label.create(l));
  664. end;
  665. {*****************************************************************************
  666. for better code generation these methods should be overridden
  667. ******************************************************************************}
  668. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  669. var
  670. ref : treference;
  671. begin
  672. cgpara.check_simple_location;
  673. case cgpara.location^.loc of
  674. LOC_REGISTER,LOC_CREGISTER:
  675. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  676. LOC_REFERENCE,LOC_CREFERENCE:
  677. begin
  678. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  679. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  680. end
  681. else
  682. internalerror(2002071004);
  683. end;
  684. end;
  685. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  686. var
  687. ref : treference;
  688. begin
  689. cgpara.check_simple_location;
  690. case cgpara.location^.loc of
  691. LOC_REGISTER,LOC_CREGISTER:
  692. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  693. LOC_REFERENCE,LOC_CREFERENCE:
  694. begin
  695. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  696. a_load_const_ref(list,cgpara.location^.size,a,ref);
  697. end
  698. else
  699. internalerror(2002071004);
  700. end;
  701. end;
  702. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  703. var
  704. ref : treference;
  705. begin
  706. cgpara.check_simple_location;
  707. case cgpara.location^.loc of
  708. LOC_REGISTER,LOC_CREGISTER:
  709. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  710. LOC_REFERENCE,LOC_CREFERENCE:
  711. begin
  712. reference_reset(ref);
  713. ref.base:=cgpara.location^.reference.index;
  714. ref.offset:=cgpara.location^.reference.offset;
  715. if (size <> OS_NO) and
  716. (tcgsize2size[size] < sizeof(aint)) then
  717. begin
  718. if (cgpara.size = OS_NO) or
  719. assigned(cgpara.location^.next) then
  720. internalerror(2006052401);
  721. a_load_ref_ref(list,size,cgpara.size,r,ref);
  722. end
  723. else
  724. { use concatcopy, because the parameter can be larger than }
  725. { what the OS_* constants can handle }
  726. g_concatcopy(list,r,ref,cgpara.intsize);
  727. end
  728. else
  729. internalerror(2002071004);
  730. end;
  731. end;
  732. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  733. begin
  734. case l.loc of
  735. LOC_REGISTER,
  736. LOC_CREGISTER :
  737. a_param_reg(list,l.size,l.register,cgpara);
  738. LOC_CONSTANT :
  739. a_param_const(list,l.size,l.value,cgpara);
  740. LOC_CREFERENCE,
  741. LOC_REFERENCE :
  742. a_param_ref(list,l.size,l.reference,cgpara);
  743. else
  744. internalerror(2002032211);
  745. end;
  746. end;
  747. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  748. var
  749. hr : tregister;
  750. begin
  751. cgpara.check_simple_location;
  752. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  753. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  754. else
  755. begin
  756. hr:=getaddressregister(list);
  757. a_loadaddr_ref_reg(list,r,hr);
  758. a_param_reg(list,OS_ADDR,hr,cgpara);
  759. end;
  760. end;
  761. {****************************************************************************
  762. some generic implementations
  763. ****************************************************************************}
  764. {$ifopt r+}
  765. {$define rangeon}
  766. {$r-}
  767. {$endif}
  768. {$ifopt q+}
  769. {$define overflowon}
  770. {$q-}
  771. {$endif}
  772. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  773. var
  774. bitmask: aword;
  775. tmpreg: tregister;
  776. stopbit: byte;
  777. begin
  778. tmpreg:=getintregister(list,sreg.subsetregsize);
  779. if (subsetsize in [OS_S8..OS_S128]) then
  780. begin
  781. { sign extend in case the value has a bitsize mod 8 <> 0 }
  782. { both instructions will be optimized away if not }
  783. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  784. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  785. end
  786. else
  787. begin
  788. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  789. stopbit := sreg.startbit + sreg.bitlen;
  790. // on x86(64), 1 shl 32(64) = 1 instead of 0
  791. // use aword to prevent overflow with 1 shl 31
  792. if (stopbit - sreg.startbit <> AIntBits) then
  793. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  794. else
  795. bitmask := high(aword);
  796. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  797. end;
  798. tmpreg := makeregsize(list,tmpreg,subsetsize);
  799. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  800. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  801. end;
  802. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  803. begin
  804. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  805. end;
  806. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  807. var
  808. bitmask: aword;
  809. tmpreg: tregister;
  810. stopbit: byte;
  811. begin
  812. stopbit := sreg.startbit + sreg.bitlen;
  813. // on x86(64), 1 shl 32(64) = 1 instead of 0
  814. if (stopbit <> AIntBits) then
  815. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  816. else
  817. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  818. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  819. begin
  820. tmpreg:=getintregister(list,sreg.subsetregsize);
  821. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  822. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  823. if (slopt <> SL_REGNOSRCMASK) then
  824. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  825. end;
  826. if (slopt <> SL_SETMAX) then
  827. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  828. case slopt of
  829. SL_SETZERO : ;
  830. SL_SETMAX :
  831. if (sreg.bitlen <> AIntBits) then
  832. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  833. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  834. sreg.subsetreg)
  835. else
  836. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  837. else
  838. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  839. end;
  840. end;
  841. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  842. var
  843. tmpreg: tregister;
  844. bitmask: aword;
  845. stopbit: byte;
  846. begin
  847. if (fromsreg.bitlen >= tosreg.bitlen) then
  848. begin
  849. tmpreg := getintregister(list,tosreg.subsetregsize);
  850. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  851. if (fromsreg.startbit <= tosreg.startbit) then
  852. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  853. else
  854. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  855. stopbit := tosreg.startbit + tosreg.bitlen;
  856. // on x86(64), 1 shl 32(64) = 1 instead of 0
  857. if (stopbit <> AIntBits) then
  858. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  859. else
  860. bitmask := (aword(1) shl tosreg.startbit) - 1;
  861. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  862. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  863. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  864. end
  865. else
  866. begin
  867. tmpreg := getintregister(list,tosubsetsize);
  868. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  869. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  870. end;
  871. end;
  872. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  873. var
  874. tmpreg: tregister;
  875. begin
  876. tmpreg := getintregister(list,tosize);
  877. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  878. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  879. end;
  880. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  881. var
  882. tmpreg: tregister;
  883. begin
  884. tmpreg := getintregister(list,subsetsize);
  885. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  886. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  887. end;
  888. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  889. var
  890. bitmask: aword;
  891. stopbit: byte;
  892. begin
  893. stopbit := sreg.startbit + sreg.bitlen;
  894. // on x86(64), 1 shl 32(64) = 1 instead of 0
  895. if (stopbit <> AIntBits) then
  896. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  897. else
  898. bitmask := (aword(1) shl sreg.startbit) - 1;
  899. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  900. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  901. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  902. end;
  903. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  904. begin
  905. case loc.loc of
  906. LOC_REFERENCE,LOC_CREFERENCE:
  907. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  908. LOC_REGISTER,LOC_CREGISTER:
  909. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  910. LOC_CONSTANT:
  911. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  912. LOC_SUBSETREG,LOC_CSUBSETREG:
  913. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  914. LOC_SUBSETREF,LOC_CSUBSETREF:
  915. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  916. else
  917. internalerror(200608053);
  918. end;
  919. end;
  920. (*
  921. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  922. in memory. They are like a regular reference, but contain an extra bit
  923. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  924. and a bit length (always constant).
  925. Bit packed values are stored differently in memory depending on whether we
  926. are on a big or a little endian system (compatible with at least GPC). The
  927. size of the basic working unit is always the smallest power-of-2 byte size
  928. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  929. bytes, 17..32 bits -> 4 bytes etc).
  930. On a big endian, 5-bit: values are stored like this:
  931. 11111222 22333334 44445555 56666677 77788888
  932. The leftmost bit of each 5-bit value corresponds to the most significant
  933. bit.
  934. On little endian, it goes like this:
  935. 22211111 43333322 55554444 77666665 88888777
  936. In this case, per byte the left-most bit is more significant than those on
  937. the right, but the bits in the next byte are all more significant than
  938. those in the previous byte (e.g., the 222 in the first byte are the low
  939. three bits of that value, while the 22 in the second byte are the upper
  940. two bits.
  941. Big endian, 9 bit values:
  942. 11111111 12222222 22333333 33344444 ...
  943. Little endian, 9 bit values:
  944. 11111111 22222221 33333322 44444333 ...
  945. This is memory representation and the 16 bit values are byteswapped.
  946. Similarly as in the previous case, the 2222222 string contains the lower
  947. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  948. registers (two 16 bit registers in the current implementation, although a
  949. single 32 bit register would be possible too, in particular if 32 bit
  950. alignment can be guaranteed), this becomes:
  951. 22222221 11111111 44444333 33333322 ...
  952. (l)ow u l l u l u
  953. The startbit/bitindex in a subsetreference always refers to
  954. a) on big endian: the most significant bit of the value
  955. (bits counted from left to right, both memory an registers)
  956. b) on little endian: the least significant bit when the value
  957. is loaded in a register (bit counted from right to left)
  958. Although a) results in more complex code for big endian systems, it's
  959. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  960. Apple's universal interfaces which depend on these layout differences).
  961. Note: when changing the loadsize calculated in get_subsetref_load_info,
  962. make sure the appropriate alignment is guaranteed, at least in case of
  963. {$defined cpurequiresproperalignment}.
  964. *)
  965. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  966. var
  967. intloadsize: aint;
  968. begin
  969. intloadsize := packedbitsloadsize(sref.bitlen);
  970. {$if not(defined(arm)) and not(defined(sparc))}
  971. { may need to be split into several smaller loads/stores }
  972. if (tf_requires_proper_alignment in target_info.flags) and
  973. (intloadsize <> 1) and
  974. (intloadsize <> sref.ref.alignment) then
  975. internalerror(2006082011);
  976. {$endif not(defined(arm)) and not(defined(sparc))}
  977. if (intloadsize = 0) then
  978. internalerror(2006081310);
  979. if (intloadsize > sizeof(aint)) then
  980. intloadsize := sizeof(aint);
  981. loadsize := int_cgsize(intloadsize);
  982. if (loadsize = OS_NO) then
  983. internalerror(2006081311);
  984. if (sref.bitlen > sizeof(aint)*8) then
  985. internalerror(2006081312);
  986. extra_load :=
  987. (sref.bitlen <> 1) and
  988. ((sref.bitindexreg <> NR_NO) or
  989. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  990. end;
  991. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  992. var
  993. restbits: byte;
  994. begin
  995. if (target_info.endian = endian_big) then
  996. begin
  997. { valuereg contains the upper bits, extra_value_reg the lower }
  998. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  999. if (subsetsize in [OS_S8..OS_S128]) then
  1000. begin
  1001. { sign extend }
  1002. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1003. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1004. end
  1005. else
  1006. begin
  1007. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1008. { mask other bits }
  1009. if (sref.bitlen <> AIntBits) then
  1010. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1011. end;
  1012. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1013. end
  1014. else
  1015. begin
  1016. { valuereg contains the lower bits, extra_value_reg the upper }
  1017. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1018. if (subsetsize in [OS_S8..OS_S128]) then
  1019. begin
  1020. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1021. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1022. end
  1023. else
  1024. begin
  1025. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1026. { mask other bits }
  1027. if (sref.bitlen <> AIntBits) then
  1028. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1029. end;
  1030. end;
  1031. { merge }
  1032. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1033. end;
  1034. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1035. var
  1036. tmpreg: tregister;
  1037. begin
  1038. tmpreg := getintregister(list,OS_INT);
  1039. if (target_info.endian = endian_big) then
  1040. begin
  1041. { since this is a dynamic index, it's possible that the value }
  1042. { is entirely in valuereg. }
  1043. { get the data in valuereg in the right place }
  1044. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1045. if (subsetsize in [OS_S8..OS_S128]) then
  1046. begin
  1047. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1048. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1049. end
  1050. else
  1051. begin
  1052. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1053. if (loadbitsize <> AIntBits) then
  1054. { mask left over bits }
  1055. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1056. end;
  1057. tmpreg := getintregister(list,OS_INT);
  1058. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1059. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1060. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1061. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1062. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1063. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1064. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1065. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1066. { => extra_value_reg is now 0 }
  1067. { merge }
  1068. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1069. { no need to mask, necessary masking happened earlier on }
  1070. end
  1071. else
  1072. begin
  1073. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1074. { Y-x = -(Y-x) }
  1075. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1076. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1077. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1078. { if all bits are in valuereg }
  1079. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1080. {$ifdef x86}
  1081. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1082. if (loadbitsize = AIntBits) then
  1083. begin
  1084. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1085. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1086. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1087. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1088. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1089. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1090. end;
  1091. {$endif x86}
  1092. { merge }
  1093. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1094. { sign extend or mask other bits }
  1095. if (subsetsize in [OS_S8..OS_S128]) then
  1096. begin
  1097. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1098. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1099. end
  1100. else
  1101. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1102. end;
  1103. end;
  1104. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1105. var
  1106. tmpref: treference;
  1107. valuereg,extra_value_reg: tregister;
  1108. tosreg: tsubsetregister;
  1109. loadsize: tcgsize;
  1110. loadbitsize: byte;
  1111. extra_load: boolean;
  1112. begin
  1113. get_subsetref_load_info(sref,loadsize,extra_load);
  1114. loadbitsize := tcgsize2size[loadsize]*8;
  1115. { load the (first part) of the bit sequence }
  1116. valuereg := cg.getintregister(list,OS_INT);
  1117. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1118. if not extra_load then
  1119. begin
  1120. { everything is guaranteed to be in a single register of loadsize }
  1121. if (sref.bitindexreg = NR_NO) then
  1122. begin
  1123. { use subsetreg routine, it may have been overridden with an optimized version }
  1124. tosreg.subsetreg := valuereg;
  1125. tosreg.subsetregsize := OS_INT;
  1126. { subsetregs always count bits from right to left }
  1127. if (target_info.endian = endian_big) then
  1128. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1129. else
  1130. tosreg.startbit := sref.startbit;
  1131. tosreg.bitlen := sref.bitlen;
  1132. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1133. exit;
  1134. end
  1135. else
  1136. begin
  1137. if (sref.startbit <> 0) then
  1138. internalerror(2006081510);
  1139. if (target_info.endian = endian_big) then
  1140. begin
  1141. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1142. if (subsetsize in [OS_S8..OS_S128]) then
  1143. begin
  1144. { sign extend to entire register }
  1145. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1146. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1147. end
  1148. else
  1149. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1150. end
  1151. else
  1152. begin
  1153. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1154. if (subsetsize in [OS_S8..OS_S128]) then
  1155. begin
  1156. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1157. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1158. end
  1159. end;
  1160. { mask other bits/sign extend }
  1161. if not(subsetsize in [OS_S8..OS_S128]) then
  1162. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1163. end
  1164. end
  1165. else
  1166. begin
  1167. { load next value as well }
  1168. extra_value_reg := getintregister(list,OS_INT);
  1169. tmpref := sref.ref;
  1170. inc(tmpref.offset,loadbitsize div 8);
  1171. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1172. if (sref.bitindexreg = NR_NO) then
  1173. { can be overridden to optimize }
  1174. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1175. else
  1176. begin
  1177. if (sref.startbit <> 0) then
  1178. internalerror(2006080610);
  1179. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1180. end;
  1181. end;
  1182. { store in destination }
  1183. { avoid unnecessary sign extension and zeroing }
  1184. valuereg := makeregsize(list,valuereg,OS_INT);
  1185. destreg := makeregsize(list,destreg,OS_INT);
  1186. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1187. destreg := makeregsize(list,destreg,tosize);
  1188. end;
  1189. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1190. begin
  1191. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1192. end;
  1193. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1194. var
  1195. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1196. tosreg, fromsreg: tsubsetregister;
  1197. tmpref: treference;
  1198. loadsize: tcgsize;
  1199. loadbitsize: byte;
  1200. extra_load: boolean;
  1201. begin
  1202. { the register must be able to contain the requested value }
  1203. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1204. internalerror(2006081613);
  1205. get_subsetref_load_info(sref,loadsize,extra_load);
  1206. loadbitsize := tcgsize2size[loadsize]*8;
  1207. { load the (first part) of the bit sequence }
  1208. valuereg := cg.getintregister(list,OS_INT);
  1209. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1210. { constant offset of bit sequence? }
  1211. if not extra_load then
  1212. begin
  1213. if (sref.bitindexreg = NR_NO) then
  1214. begin
  1215. { use subsetreg routine, it may have been overridden with an optimized version }
  1216. tosreg.subsetreg := valuereg;
  1217. tosreg.subsetregsize := OS_INT;
  1218. { subsetregs always count bits from right to left }
  1219. if (target_info.endian = endian_big) then
  1220. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1221. else
  1222. tosreg.startbit := sref.startbit;
  1223. tosreg.bitlen := sref.bitlen;
  1224. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1225. end
  1226. else
  1227. begin
  1228. if (sref.startbit <> 0) then
  1229. internalerror(2006081710);
  1230. { should be handled by normal code and will give wrong result }
  1231. { on x86 for the '1 shl bitlen' below }
  1232. if (sref.bitlen = AIntBits) then
  1233. internalerror(2006081711);
  1234. { calculated correct shiftcount for big endian }
  1235. tmpindexreg := getintregister(list,OS_INT);
  1236. a_load_reg_reg(list,OS_INT,OS_INT,sref.bitindexreg,tmpindexreg);
  1237. if (target_info.endian = endian_big) then
  1238. begin
  1239. a_op_const_reg(list,OP_SUB,OS_INT,loadbitsize-sref.bitlen,tmpindexreg);
  1240. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1241. end;
  1242. { zero the bits we have to insert }
  1243. if (slopt <> SL_SETMAX) then
  1244. begin
  1245. maskreg := getintregister(list,OS_INT);
  1246. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1247. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1248. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1249. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1250. end;
  1251. { insert the value }
  1252. if (slopt <> SL_SETZERO) then
  1253. begin
  1254. tmpreg := getintregister(list,OS_INT);
  1255. if (slopt <> SL_SETMAX) then
  1256. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1257. else if (sref.bitlen <> AIntBits) then
  1258. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1259. else
  1260. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1261. if (slopt <> SL_REGNOSRCMASK) then
  1262. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1263. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg);
  1264. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1265. end;
  1266. end;
  1267. { store back to memory }
  1268. valuereg := makeregsize(list,valuereg,loadsize);
  1269. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1270. exit;
  1271. end
  1272. else
  1273. begin
  1274. { load next value }
  1275. extra_value_reg := getintregister(list,OS_INT);
  1276. tmpref := sref.ref;
  1277. inc(tmpref.offset,loadbitsize div 8);
  1278. { should maybe be taken out too, can be done more efficiently }
  1279. { on e.g. i386 with shld/shrd }
  1280. if (sref.bitindexreg = NR_NO) then
  1281. begin
  1282. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1283. fromsreg.subsetreg := fromreg;
  1284. fromsreg.subsetregsize := fromsize;
  1285. tosreg.subsetreg := valuereg;
  1286. tosreg.subsetregsize := OS_INT;
  1287. { transfer first part }
  1288. fromsreg.bitlen := loadbitsize-sref.startbit;
  1289. tosreg.bitlen := fromsreg.bitlen;
  1290. if (target_info.endian = endian_big) then
  1291. begin
  1292. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1293. { upper bits of the value ... }
  1294. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1295. { ... to bit 0 }
  1296. tosreg.startbit := 0
  1297. end
  1298. else
  1299. begin
  1300. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1301. { lower bits of the value ... }
  1302. fromsreg.startbit := 0;
  1303. { ... to startbit }
  1304. tosreg.startbit := sref.startbit;
  1305. end;
  1306. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1307. valuereg := makeregsize(list,valuereg,loadsize);
  1308. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1309. { transfer second part }
  1310. if (target_info.endian = endian_big) then
  1311. begin
  1312. { extra_value_reg must contain the lower bits of the value at bits }
  1313. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1314. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1315. { - bitlen - startbit }
  1316. fromsreg.startbit := 0;
  1317. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1318. end
  1319. else
  1320. begin
  1321. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1322. fromsreg.startbit := fromsreg.bitlen;
  1323. tosreg.startbit := 0;
  1324. end;
  1325. tosreg.subsetreg := extra_value_reg;
  1326. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1327. tosreg.bitlen := fromsreg.bitlen;
  1328. a_load_subsetreg_subsetreg(list,fromsize,subsetsize,fromsreg,tosreg);
  1329. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1330. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1331. exit;
  1332. end
  1333. else
  1334. begin
  1335. if (sref.startbit <> 0) then
  1336. internalerror(2006081812);
  1337. { should be handled by normal code and will give wrong result }
  1338. { on x86 for the '1 shl bitlen' below }
  1339. if (sref.bitlen = AIntBits) then
  1340. internalerror(2006081713);
  1341. { generate mask to zero the bits we have to insert }
  1342. if (slopt <> SL_SETMAX) then
  1343. begin
  1344. maskreg := getintregister(list,OS_INT);
  1345. if (target_info.endian = endian_big) then
  1346. begin
  1347. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1348. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1349. end
  1350. else
  1351. begin
  1352. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1353. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1354. end;
  1355. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1356. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1357. end;
  1358. { insert the value }
  1359. if (slopt <> SL_SETZERO) then
  1360. begin
  1361. tmpreg := getintregister(list,OS_INT);
  1362. if (slopt <> SL_SETMAX) then
  1363. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1364. else if (sref.bitlen <> AIntBits) then
  1365. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1366. else
  1367. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1368. if (target_info.endian = endian_big) then
  1369. begin
  1370. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1371. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1372. { mask left over bits }
  1373. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1374. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1375. end
  1376. else
  1377. begin
  1378. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1379. { mask left over bits }
  1380. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1381. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1382. end;
  1383. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1384. end;
  1385. valuereg := makeregsize(list,valuereg,loadsize);
  1386. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1387. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1388. tmpindexreg := getintregister(list,OS_INT);
  1389. { load current array value }
  1390. if (slopt <> SL_SETZERO) then
  1391. begin
  1392. tmpreg := getintregister(list,OS_INT);
  1393. if (slopt <> SL_SETMAX) then
  1394. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1395. else if (sref.bitlen <> AIntBits) then
  1396. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1397. else
  1398. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1399. end;
  1400. { generate mask to zero the bits we have to insert }
  1401. if (slopt <> SL_SETMAX) then
  1402. begin
  1403. maskreg := getintregister(list,OS_INT);
  1404. if (target_info.endian = endian_big) then
  1405. begin
  1406. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1407. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1408. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1409. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1410. end
  1411. else
  1412. begin
  1413. { Y-x = -(Y-x) }
  1414. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1415. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1416. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1417. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1418. {$ifdef x86}
  1419. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1420. if (loadbitsize = AIntBits) then
  1421. begin
  1422. valuereg := getintregister(list,OS_INT);
  1423. { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1424. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1425. { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1426. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1427. { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1428. if (slopt <> SL_SETZERO) then
  1429. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1430. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1431. end;
  1432. {$endif x86}
  1433. end;
  1434. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1435. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1436. end;
  1437. if (slopt <> SL_SETZERO) then
  1438. begin
  1439. if (target_info.endian = endian_big) then
  1440. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1441. else
  1442. begin
  1443. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1444. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1445. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1446. end;
  1447. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1448. end;
  1449. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1450. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1451. end;
  1452. end;
  1453. end;
  1454. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1455. var
  1456. tmpreg: tregister;
  1457. begin
  1458. tmpreg := getintregister(list,tosubsetsize);
  1459. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1460. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1461. end;
  1462. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1463. var
  1464. tmpreg: tregister;
  1465. begin
  1466. tmpreg := getintregister(list,tosize);
  1467. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1468. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1469. end;
  1470. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1471. var
  1472. tmpreg: tregister;
  1473. begin
  1474. tmpreg := getintregister(list,subsetsize);
  1475. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1476. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1477. end;
  1478. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1479. var
  1480. tmpreg: tregister;
  1481. slopt: tsubsetloadopt;
  1482. begin
  1483. { perform masking of the source value in advance }
  1484. slopt := SL_REGNOSRCMASK;
  1485. if (sref.bitlen <> AIntBits) then
  1486. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1487. if (
  1488. { broken x86 "x shl regbitsize = x" }
  1489. ((sref.bitlen <> AIntBits) and
  1490. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1491. ((sref.bitlen = AIntBits) and
  1492. (a = -1))
  1493. ) then
  1494. slopt := SL_SETMAX
  1495. else if (a = 0) then
  1496. slopt := SL_SETZERO;
  1497. tmpreg := getintregister(list,subsetsize);
  1498. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1499. a_load_const_reg(list,subsetsize,a,tmpreg);
  1500. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1501. end;
  1502. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1503. begin
  1504. case loc.loc of
  1505. LOC_REFERENCE,LOC_CREFERENCE:
  1506. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1507. LOC_REGISTER,LOC_CREGISTER:
  1508. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1509. LOC_SUBSETREG,LOC_CSUBSETREG:
  1510. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1511. LOC_SUBSETREF,LOC_CSUBSETREF:
  1512. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1513. else
  1514. internalerror(200608054);
  1515. end;
  1516. end;
  1517. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1518. var
  1519. tmpreg: tregister;
  1520. begin
  1521. tmpreg := getintregister(list,tosubsetsize);
  1522. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1523. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1524. end;
  1525. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1526. var
  1527. tmpreg: tregister;
  1528. begin
  1529. tmpreg := getintregister(list,tosubsetsize);
  1530. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1531. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1532. end;
  1533. {$ifdef rangeon}
  1534. {$r+}
  1535. {$undef rangeon}
  1536. {$endif}
  1537. {$ifdef overflowon}
  1538. {$q+}
  1539. {$undef overflowon}
  1540. {$endif}
  1541. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1542. var
  1543. tmpref : treference;
  1544. tmpreg : tregister;
  1545. i : longint;
  1546. begin
  1547. if ref.alignment<>0 then
  1548. begin
  1549. tmpref:=ref;
  1550. { we take care of the alignment now }
  1551. tmpref.alignment:=0;
  1552. case FromSize of
  1553. OS_16,OS_S16:
  1554. begin
  1555. if target_info.endian=endian_big then
  1556. inc(tmpref.offset);
  1557. register:=makeregsize(list,register,OS_8);
  1558. a_load_reg_ref(list,OS_8,OS_8,register,tmpref);
  1559. register:=makeregsize(list,register,OS_16);
  1560. a_op_const_reg(list,OP_SHR,OS_16,8,register);
  1561. if target_info.endian=endian_big then
  1562. dec(tmpref.offset)
  1563. else
  1564. inc(tmpref.offset);
  1565. register:=makeregsize(list,register,OS_8);
  1566. a_load_reg_ref(list,OS_8,OS_8,register,tmpref);
  1567. register:=makeregsize(list,register,OS_16);
  1568. end;
  1569. OS_32,OS_S32:
  1570. begin
  1571. if target_info.endian=endian_big then
  1572. inc(tmpref.offset,3);
  1573. register:=makeregsize(list,register,OS_8);
  1574. a_load_reg_ref(list,OS_8,OS_8,register,tmpref);
  1575. register:=makeregsize(list,register,OS_32);
  1576. for i:=1 to 3 do
  1577. begin
  1578. a_op_const_reg(list,OP_SHR,OS_32,8,register);
  1579. if target_info.endian=endian_big then
  1580. dec(tmpref.offset)
  1581. else
  1582. inc(tmpref.offset);
  1583. register:=makeregsize(list,register,OS_8);
  1584. a_load_reg_ref(list,OS_8,OS_8,register,tmpref);
  1585. register:=makeregsize(list,register,OS_32);
  1586. end;
  1587. end
  1588. else
  1589. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1590. end;
  1591. end
  1592. else
  1593. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1594. end;
  1595. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1596. var
  1597. tmpref : treference;
  1598. tmpreg : tregister;
  1599. i : longint;
  1600. begin
  1601. if ref.alignment<>0 then
  1602. begin
  1603. tmpref:=ref;
  1604. { we take care of the alignment now }
  1605. tmpref.alignment:=0;
  1606. case FromSize of
  1607. OS_16,OS_S16:
  1608. begin
  1609. if target_info.endian=endian_little then
  1610. inc(tmpref.offset);
  1611. register:=makeregsize(list,register,OS_8);
  1612. a_load_ref_reg(list,OS_8,OS_8,tmpref,register);
  1613. register:=makeregsize(list,register,OS_16);
  1614. a_op_const_reg(list,OP_SHL,OS_16,8,register);
  1615. if target_info.endian=endian_little then
  1616. dec(tmpref.offset)
  1617. else
  1618. inc(tmpref.offset);
  1619. tmpreg:=getintregister(list,OS_16);
  1620. a_load_ref_reg(list,OS_8,OS_16,tmpref,tmpreg);
  1621. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1622. end;
  1623. OS_32,OS_S32:
  1624. begin
  1625. if target_info.endian=endian_little then
  1626. inc(tmpref.offset,3);
  1627. register:=makeregsize(list,register,OS_8);
  1628. a_load_ref_reg(list,OS_8,OS_8,tmpref,register);
  1629. register:=makeregsize(list,register,OS_32);
  1630. for i:=1 to 3 do
  1631. begin
  1632. a_op_const_reg(list,OP_SHL,OS_32,8,register);
  1633. if target_info.endian=endian_little then
  1634. dec(tmpref.offset)
  1635. else
  1636. inc(tmpref.offset);
  1637. tmpreg:=getintregister(list,OS_32);
  1638. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1639. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1640. end;
  1641. end
  1642. else
  1643. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1644. end;
  1645. end
  1646. else
  1647. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1648. end;
  1649. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1650. var
  1651. tmpreg: tregister;
  1652. begin
  1653. { verify if we have the same reference }
  1654. if references_equal(sref,dref) then
  1655. exit;
  1656. tmpreg:=getintregister(list,tosize);
  1657. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1658. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1659. end;
  1660. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1661. var
  1662. tmpreg: tregister;
  1663. begin
  1664. tmpreg:=getintregister(list,size);
  1665. a_load_const_reg(list,size,a,tmpreg);
  1666. a_load_reg_ref(list,size,size,tmpreg,ref);
  1667. end;
  1668. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1669. begin
  1670. case loc.loc of
  1671. LOC_REFERENCE,LOC_CREFERENCE:
  1672. a_load_const_ref(list,loc.size,a,loc.reference);
  1673. LOC_REGISTER,LOC_CREGISTER:
  1674. a_load_const_reg(list,loc.size,a,loc.register);
  1675. LOC_SUBSETREG,LOC_CSUBSETREG:
  1676. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1677. LOC_SUBSETREF,LOC_CSUBSETREF:
  1678. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1679. else
  1680. internalerror(200203272);
  1681. end;
  1682. end;
  1683. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1684. begin
  1685. case loc.loc of
  1686. LOC_REFERENCE,LOC_CREFERENCE:
  1687. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1688. LOC_REGISTER,LOC_CREGISTER:
  1689. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1690. LOC_SUBSETREG,LOC_CSUBSETREG:
  1691. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1692. LOC_SUBSETREF,LOC_CSUBSETREF:
  1693. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1694. else
  1695. internalerror(200203271);
  1696. end;
  1697. end;
  1698. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1699. begin
  1700. case loc.loc of
  1701. LOC_REFERENCE,LOC_CREFERENCE:
  1702. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1703. LOC_REGISTER,LOC_CREGISTER:
  1704. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1705. LOC_CONSTANT:
  1706. a_load_const_reg(list,tosize,loc.value,reg);
  1707. LOC_SUBSETREG,LOC_CSUBSETREG:
  1708. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  1709. LOC_SUBSETREF,LOC_CSUBSETREF:
  1710. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  1711. else
  1712. internalerror(200109092);
  1713. end;
  1714. end;
  1715. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1716. begin
  1717. case loc.loc of
  1718. LOC_REFERENCE,LOC_CREFERENCE:
  1719. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1720. LOC_REGISTER,LOC_CREGISTER:
  1721. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1722. LOC_CONSTANT:
  1723. a_load_const_ref(list,tosize,loc.value,ref);
  1724. LOC_SUBSETREG,LOC_CSUBSETREG:
  1725. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  1726. LOC_SUBSETREF,LOC_CSUBSETREF:
  1727. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  1728. else
  1729. internalerror(200109302);
  1730. end;
  1731. end;
  1732. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  1733. begin
  1734. case loc.loc of
  1735. LOC_REFERENCE,LOC_CREFERENCE:
  1736. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  1737. LOC_REGISTER,LOC_CREGISTER:
  1738. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  1739. LOC_CONSTANT:
  1740. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  1741. LOC_SUBSETREG,LOC_CSUBSETREG:
  1742. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  1743. LOC_SUBSETREF,LOC_CSUBSETREF:
  1744. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  1745. else
  1746. internalerror(2006052310);
  1747. end;
  1748. end;
  1749. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  1750. begin
  1751. case loc.loc of
  1752. LOC_REFERENCE,LOC_CREFERENCE:
  1753. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  1754. LOC_REGISTER,LOC_CREGISTER:
  1755. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  1756. LOC_SUBSETREG,LOC_CSUBSETREG:
  1757. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  1758. LOC_SUBSETREF,LOC_CSUBSETREF:
  1759. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  1760. else
  1761. internalerror(2006051510);
  1762. end;
  1763. end;
  1764. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  1765. var
  1766. powerval : longint;
  1767. begin
  1768. case op of
  1769. OP_OR :
  1770. begin
  1771. { or with zero returns same result }
  1772. if a = 0 then
  1773. op:=OP_NONE
  1774. else
  1775. { or with max returns max }
  1776. if a = -1 then
  1777. op:=OP_MOVE;
  1778. end;
  1779. OP_AND :
  1780. begin
  1781. { and with max returns same result }
  1782. if (a = -1) then
  1783. op:=OP_NONE
  1784. else
  1785. { and with 0 returns 0 }
  1786. if a=0 then
  1787. op:=OP_MOVE;
  1788. end;
  1789. OP_DIV :
  1790. begin
  1791. { division by 1 returns result }
  1792. if a = 1 then
  1793. op:=OP_NONE
  1794. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1795. begin
  1796. a := powerval;
  1797. op:= OP_SHR;
  1798. end;
  1799. end;
  1800. OP_IDIV:
  1801. begin
  1802. if a = 1 then
  1803. op:=OP_NONE;
  1804. end;
  1805. OP_MUL,OP_IMUL:
  1806. begin
  1807. if a = 1 then
  1808. op:=OP_NONE
  1809. else
  1810. if a=0 then
  1811. op:=OP_MOVE
  1812. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1813. begin
  1814. a := powerval;
  1815. op:= OP_SHL;
  1816. end;
  1817. end;
  1818. OP_ADD,OP_SUB:
  1819. begin
  1820. if a = 0 then
  1821. op:=OP_NONE;
  1822. end;
  1823. OP_SAR,OP_SHL,OP_SHR:
  1824. begin
  1825. if a = 0 then
  1826. op:=OP_NONE;
  1827. end;
  1828. end;
  1829. end;
  1830. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  1831. begin
  1832. case loc.loc of
  1833. LOC_REFERENCE, LOC_CREFERENCE:
  1834. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1835. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1836. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  1837. else
  1838. internalerror(200203301);
  1839. end;
  1840. end;
  1841. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  1842. begin
  1843. case loc.loc of
  1844. LOC_REFERENCE, LOC_CREFERENCE:
  1845. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1846. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1847. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1848. else
  1849. internalerror(48991);
  1850. end;
  1851. end;
  1852. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1853. var
  1854. ref : treference;
  1855. begin
  1856. case cgpara.location^.loc of
  1857. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1858. begin
  1859. cgpara.check_simple_location;
  1860. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  1861. end;
  1862. LOC_REFERENCE,LOC_CREFERENCE:
  1863. begin
  1864. cgpara.check_simple_location;
  1865. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1866. a_loadfpu_reg_ref(list,size,size,r,ref);
  1867. end;
  1868. LOC_REGISTER,LOC_CREGISTER:
  1869. begin
  1870. { paramfpu_ref does the check_simpe_location check here if necessary }
  1871. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  1872. a_loadfpu_reg_ref(list,size,size,r,ref);
  1873. a_paramfpu_ref(list,size,ref,cgpara);
  1874. tg.Ungettemp(list,ref);
  1875. end;
  1876. else
  1877. internalerror(2002071004);
  1878. end;
  1879. end;
  1880. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1881. var
  1882. href : treference;
  1883. begin
  1884. cgpara.check_simple_location;
  1885. case cgpara.location^.loc of
  1886. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1887. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  1888. LOC_REFERENCE,LOC_CREFERENCE:
  1889. begin
  1890. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1891. { concatcopy should choose the best way to copy the data }
  1892. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1893. end;
  1894. else
  1895. internalerror(200402201);
  1896. end;
  1897. end;
  1898. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  1899. var
  1900. tmpreg : tregister;
  1901. begin
  1902. tmpreg:=getintregister(list,size);
  1903. a_load_ref_reg(list,size,size,ref,tmpreg);
  1904. a_op_const_reg(list,op,size,a,tmpreg);
  1905. a_load_reg_ref(list,size,size,tmpreg,ref);
  1906. end;
  1907. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  1908. var
  1909. tmpreg: tregister;
  1910. begin
  1911. tmpreg := cg.getintregister(list, size);
  1912. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  1913. a_op_const_reg(list,op,size,a,tmpreg);
  1914. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  1915. end;
  1916. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  1917. var
  1918. tmpreg: tregister;
  1919. begin
  1920. tmpreg := cg.getintregister(list, size);
  1921. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  1922. a_op_const_reg(list,op,size,a,tmpreg);
  1923. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  1924. end;
  1925. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  1926. begin
  1927. case loc.loc of
  1928. LOC_REGISTER, LOC_CREGISTER:
  1929. a_op_const_reg(list,op,loc.size,a,loc.register);
  1930. LOC_REFERENCE, LOC_CREFERENCE:
  1931. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1932. LOC_SUBSETREG, LOC_CSUBSETREG:
  1933. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  1934. LOC_SUBSETREF, LOC_CSUBSETREF:
  1935. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  1936. else
  1937. internalerror(200109061);
  1938. end;
  1939. end;
  1940. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1941. var
  1942. tmpreg : tregister;
  1943. begin
  1944. tmpreg:=getintregister(list,size);
  1945. a_load_ref_reg(list,size,size,ref,tmpreg);
  1946. a_op_reg_reg(list,op,size,reg,tmpreg);
  1947. a_load_reg_ref(list,size,size,tmpreg,ref);
  1948. end;
  1949. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1950. var
  1951. tmpreg: tregister;
  1952. begin
  1953. case op of
  1954. OP_NOT,OP_NEG:
  1955. { handle it as "load ref,reg; op reg" }
  1956. begin
  1957. a_load_ref_reg(list,size,size,ref,reg);
  1958. a_op_reg_reg(list,op,size,reg,reg);
  1959. end;
  1960. else
  1961. begin
  1962. tmpreg:=getintregister(list,size);
  1963. a_load_ref_reg(list,size,size,ref,tmpreg);
  1964. a_op_reg_reg(list,op,size,tmpreg,reg);
  1965. end;
  1966. end;
  1967. end;
  1968. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  1969. var
  1970. tmpreg: tregister;
  1971. begin
  1972. tmpreg := cg.getintregister(list, opsize);
  1973. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  1974. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1975. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  1976. end;
  1977. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  1978. var
  1979. tmpreg: tregister;
  1980. begin
  1981. tmpreg := cg.getintregister(list, opsize);
  1982. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  1983. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1984. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  1985. end;
  1986. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1987. begin
  1988. case loc.loc of
  1989. LOC_REGISTER, LOC_CREGISTER:
  1990. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1991. LOC_REFERENCE, LOC_CREFERENCE:
  1992. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1993. LOC_SUBSETREG, LOC_CSUBSETREG:
  1994. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  1995. LOC_SUBSETREF, LOC_CSUBSETREF:
  1996. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  1997. else
  1998. internalerror(200109061);
  1999. end;
  2000. end;
  2001. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2002. var
  2003. tmpreg: tregister;
  2004. begin
  2005. case loc.loc of
  2006. LOC_REGISTER,LOC_CREGISTER:
  2007. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2008. LOC_REFERENCE,LOC_CREFERENCE:
  2009. begin
  2010. tmpreg:=getintregister(list,loc.size);
  2011. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2012. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2013. end;
  2014. LOC_SUBSETREG, LOC_CSUBSETREG:
  2015. begin
  2016. tmpreg:=getintregister(list,loc.size);
  2017. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2018. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2019. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2020. end;
  2021. LOC_SUBSETREF, LOC_CSUBSETREF:
  2022. begin
  2023. tmpreg:=getintregister(list,loc.size);
  2024. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2025. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2026. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2027. end;
  2028. else
  2029. internalerror(200109061);
  2030. end;
  2031. end;
  2032. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2033. a:aint;src,dst:Tregister);
  2034. begin
  2035. a_load_reg_reg(list,size,size,src,dst);
  2036. a_op_const_reg(list,op,size,a,dst);
  2037. end;
  2038. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2039. size: tcgsize; src1, src2, dst: tregister);
  2040. var
  2041. tmpreg: tregister;
  2042. begin
  2043. if (dst<>src1) then
  2044. begin
  2045. a_load_reg_reg(list,size,size,src2,dst);
  2046. a_op_reg_reg(list,op,size,src1,dst);
  2047. end
  2048. else
  2049. begin
  2050. tmpreg:=getintregister(list,size);
  2051. a_load_reg_reg(list,size,size,src2,tmpreg);
  2052. a_op_reg_reg(list,op,size,src1,tmpreg);
  2053. a_load_reg_reg(list,size,size,tmpreg,dst);
  2054. end;
  2055. end;
  2056. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2057. begin
  2058. a_op_const_reg_reg(list,op,size,a,src,dst);
  2059. ovloc.loc:=LOC_VOID;
  2060. end;
  2061. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2062. begin
  2063. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2064. ovloc.loc:=LOC_VOID;
  2065. end;
  2066. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2067. l : tasmlabel);
  2068. var
  2069. tmpreg: tregister;
  2070. begin
  2071. tmpreg:=getintregister(list,size);
  2072. a_load_ref_reg(list,size,size,ref,tmpreg);
  2073. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2074. end;
  2075. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2076. l : tasmlabel);
  2077. var
  2078. tmpreg : tregister;
  2079. begin
  2080. case loc.loc of
  2081. LOC_REGISTER,LOC_CREGISTER:
  2082. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2083. LOC_REFERENCE,LOC_CREFERENCE:
  2084. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2085. LOC_SUBSETREG, LOC_CSUBSETREG:
  2086. begin
  2087. tmpreg:=getintregister(list,size);
  2088. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2089. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2090. end;
  2091. LOC_SUBSETREF, LOC_CSUBSETREF:
  2092. begin
  2093. tmpreg:=getintregister(list,size);
  2094. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2095. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2096. end;
  2097. else
  2098. internalerror(200109061);
  2099. end;
  2100. end;
  2101. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2102. var
  2103. tmpreg: tregister;
  2104. begin
  2105. tmpreg:=getintregister(list,size);
  2106. a_load_ref_reg(list,size,size,ref,tmpreg);
  2107. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2108. end;
  2109. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2110. var
  2111. tmpreg: tregister;
  2112. begin
  2113. tmpreg:=getintregister(list,size);
  2114. a_load_ref_reg(list,size,size,ref,tmpreg);
  2115. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2116. end;
  2117. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2118. begin
  2119. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2120. end;
  2121. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2122. begin
  2123. case loc.loc of
  2124. LOC_REGISTER,
  2125. LOC_CREGISTER:
  2126. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2127. LOC_REFERENCE,
  2128. LOC_CREFERENCE :
  2129. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2130. LOC_CONSTANT:
  2131. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2132. LOC_SUBSETREG,
  2133. LOC_CSUBSETREG:
  2134. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2135. LOC_SUBSETREF,
  2136. LOC_CSUBSETREF:
  2137. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2138. else
  2139. internalerror(200203231);
  2140. end;
  2141. end;
  2142. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2143. var
  2144. tmpreg: tregister;
  2145. begin
  2146. tmpreg:=getintregister(list, cmpsize);
  2147. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2148. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2149. end;
  2150. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2151. var
  2152. tmpreg: tregister;
  2153. begin
  2154. tmpreg:=getintregister(list, cmpsize);
  2155. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2156. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2157. end;
  2158. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2159. l : tasmlabel);
  2160. var
  2161. tmpreg: tregister;
  2162. begin
  2163. case loc.loc of
  2164. LOC_REGISTER,LOC_CREGISTER:
  2165. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2166. LOC_REFERENCE,LOC_CREFERENCE:
  2167. begin
  2168. tmpreg:=getintregister(list,size);
  2169. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2170. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2171. end;
  2172. LOC_SUBSETREG, LOC_CSUBSETREG:
  2173. begin
  2174. tmpreg:=getintregister(list, size);
  2175. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2176. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2177. end;
  2178. LOC_SUBSETREF, LOC_CSUBSETREF:
  2179. begin
  2180. tmpreg:=getintregister(list, size);
  2181. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2182. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2183. end;
  2184. else
  2185. internalerror(200109061);
  2186. end;
  2187. end;
  2188. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2189. begin
  2190. case loc.loc of
  2191. LOC_MMREGISTER,LOC_CMMREGISTER:
  2192. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2193. LOC_REFERENCE,LOC_CREFERENCE:
  2194. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2195. else
  2196. internalerror(200310121);
  2197. end;
  2198. end;
  2199. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2200. begin
  2201. case loc.loc of
  2202. LOC_MMREGISTER,LOC_CMMREGISTER:
  2203. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2204. LOC_REFERENCE,LOC_CREFERENCE:
  2205. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2206. else
  2207. internalerror(200310122);
  2208. end;
  2209. end;
  2210. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2211. var
  2212. href : treference;
  2213. begin
  2214. cgpara.check_simple_location;
  2215. case cgpara.location^.loc of
  2216. LOC_MMREGISTER,LOC_CMMREGISTER:
  2217. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2218. LOC_REFERENCE,LOC_CREFERENCE:
  2219. begin
  2220. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2221. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2222. end
  2223. else
  2224. internalerror(200310123);
  2225. end;
  2226. end;
  2227. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2228. var
  2229. hr : tregister;
  2230. hs : tmmshuffle;
  2231. begin
  2232. cgpara.check_simple_location;
  2233. hr:=getmmregister(list,cgpara.location^.size);
  2234. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2235. if realshuffle(shuffle) then
  2236. begin
  2237. hs:=shuffle^;
  2238. removeshuffles(hs);
  2239. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2240. end
  2241. else
  2242. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2243. end;
  2244. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2245. begin
  2246. case loc.loc of
  2247. LOC_MMREGISTER,LOC_CMMREGISTER:
  2248. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2249. LOC_REFERENCE,LOC_CREFERENCE:
  2250. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2251. else
  2252. internalerror(200310123);
  2253. end;
  2254. end;
  2255. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2256. var
  2257. hr : tregister;
  2258. hs : tmmshuffle;
  2259. begin
  2260. hr:=getmmregister(list,size);
  2261. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2262. if realshuffle(shuffle) then
  2263. begin
  2264. hs:=shuffle^;
  2265. removeshuffles(hs);
  2266. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2267. end
  2268. else
  2269. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2270. end;
  2271. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2272. var
  2273. hr : tregister;
  2274. hs : tmmshuffle;
  2275. begin
  2276. hr:=getmmregister(list,size);
  2277. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2278. if realshuffle(shuffle) then
  2279. begin
  2280. hs:=shuffle^;
  2281. removeshuffles(hs);
  2282. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2283. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2284. end
  2285. else
  2286. begin
  2287. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2288. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2289. end;
  2290. end;
  2291. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2292. begin
  2293. case loc.loc of
  2294. LOC_CMMREGISTER,LOC_MMREGISTER:
  2295. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2296. LOC_CREFERENCE,LOC_REFERENCE:
  2297. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2298. else
  2299. internalerror(200312232);
  2300. end;
  2301. end;
  2302. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2303. begin
  2304. g_concatcopy(list,source,dest,len);
  2305. end;
  2306. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2307. var
  2308. cgpara1,cgpara2,cgpara3 : TCGPara;
  2309. begin
  2310. cgpara1.init;
  2311. cgpara2.init;
  2312. cgpara3.init;
  2313. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2314. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2315. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2316. paramanager.allocparaloc(list,cgpara3);
  2317. a_paramaddr_ref(list,dest,cgpara3);
  2318. paramanager.allocparaloc(list,cgpara2);
  2319. a_paramaddr_ref(list,source,cgpara2);
  2320. paramanager.allocparaloc(list,cgpara1);
  2321. a_param_const(list,OS_INT,len,cgpara1);
  2322. paramanager.freeparaloc(list,cgpara3);
  2323. paramanager.freeparaloc(list,cgpara2);
  2324. paramanager.freeparaloc(list,cgpara1);
  2325. allocallcpuregisters(list);
  2326. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2327. deallocallcpuregisters(list);
  2328. cgpara3.done;
  2329. cgpara2.done;
  2330. cgpara1.done;
  2331. end;
  2332. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2333. var
  2334. cgpara1,cgpara2 : TCGPara;
  2335. begin
  2336. cgpara1.init;
  2337. cgpara2.init;
  2338. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2339. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2340. paramanager.allocparaloc(list,cgpara2);
  2341. a_paramaddr_ref(list,dest,cgpara2);
  2342. paramanager.allocparaloc(list,cgpara1);
  2343. a_paramaddr_ref(list,source,cgpara1);
  2344. paramanager.freeparaloc(list,cgpara2);
  2345. paramanager.freeparaloc(list,cgpara1);
  2346. allocallcpuregisters(list);
  2347. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE');
  2348. deallocallcpuregisters(list);
  2349. cgpara2.done;
  2350. cgpara1.done;
  2351. end;
  2352. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2353. var
  2354. href : treference;
  2355. incrfunc : string;
  2356. cgpara1,cgpara2 : TCGPara;
  2357. begin
  2358. cgpara1.init;
  2359. cgpara2.init;
  2360. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2361. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2362. if is_interfacecom(t) then
  2363. incrfunc:='FPC_INTF_INCR_REF'
  2364. else if is_ansistring(t) then
  2365. incrfunc:='FPC_ANSISTR_INCR_REF'
  2366. else if is_widestring(t) then
  2367. incrfunc:='FPC_WIDESTR_INCR_REF'
  2368. else if is_dynamic_array(t) then
  2369. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2370. else
  2371. incrfunc:='';
  2372. { call the special incr function or the generic addref }
  2373. if incrfunc<>'' then
  2374. begin
  2375. paramanager.allocparaloc(list,cgpara1);
  2376. { widestrings aren't ref. counted on all platforms so we need the address
  2377. to create a real copy }
  2378. if is_widestring(t) then
  2379. a_paramaddr_ref(list,ref,cgpara1)
  2380. else
  2381. { these functions get the pointer by value }
  2382. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2383. paramanager.freeparaloc(list,cgpara1);
  2384. allocallcpuregisters(list);
  2385. a_call_name(list,incrfunc);
  2386. deallocallcpuregisters(list);
  2387. end
  2388. else
  2389. begin
  2390. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2391. paramanager.allocparaloc(list,cgpara2);
  2392. a_paramaddr_ref(list,href,cgpara2);
  2393. paramanager.allocparaloc(list,cgpara1);
  2394. a_paramaddr_ref(list,ref,cgpara1);
  2395. paramanager.freeparaloc(list,cgpara1);
  2396. paramanager.freeparaloc(list,cgpara2);
  2397. allocallcpuregisters(list);
  2398. a_call_name(list,'FPC_ADDREF');
  2399. deallocallcpuregisters(list);
  2400. end;
  2401. cgpara2.done;
  2402. cgpara1.done;
  2403. end;
  2404. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2405. var
  2406. href : treference;
  2407. decrfunc : string;
  2408. needrtti : boolean;
  2409. cgpara1,cgpara2 : TCGPara;
  2410. tempreg1,tempreg2 : TRegister;
  2411. begin
  2412. cgpara1.init;
  2413. cgpara2.init;
  2414. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2415. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2416. needrtti:=false;
  2417. if is_interfacecom(t) then
  2418. decrfunc:='FPC_INTF_DECR_REF'
  2419. else if is_ansistring(t) then
  2420. decrfunc:='FPC_ANSISTR_DECR_REF'
  2421. else if is_widestring(t) then
  2422. decrfunc:='FPC_WIDESTR_DECR_REF'
  2423. else if is_dynamic_array(t) then
  2424. begin
  2425. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2426. needrtti:=true;
  2427. end
  2428. else
  2429. decrfunc:='';
  2430. { call the special decr function or the generic decref }
  2431. if decrfunc<>'' then
  2432. begin
  2433. if needrtti then
  2434. begin
  2435. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2436. tempreg2:=getaddressregister(list);
  2437. a_loadaddr_ref_reg(list,href,tempreg2);
  2438. end;
  2439. tempreg1:=getaddressregister(list);
  2440. a_loadaddr_ref_reg(list,ref,tempreg1);
  2441. if needrtti then
  2442. begin
  2443. paramanager.allocparaloc(list,cgpara2);
  2444. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2445. paramanager.freeparaloc(list,cgpara2);
  2446. end;
  2447. paramanager.allocparaloc(list,cgpara1);
  2448. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2449. paramanager.freeparaloc(list,cgpara1);
  2450. allocallcpuregisters(list);
  2451. a_call_name(list,decrfunc);
  2452. deallocallcpuregisters(list);
  2453. end
  2454. else
  2455. begin
  2456. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2457. paramanager.allocparaloc(list,cgpara2);
  2458. a_paramaddr_ref(list,href,cgpara2);
  2459. paramanager.allocparaloc(list,cgpara1);
  2460. a_paramaddr_ref(list,ref,cgpara1);
  2461. paramanager.freeparaloc(list,cgpara1);
  2462. paramanager.freeparaloc(list,cgpara2);
  2463. allocallcpuregisters(list);
  2464. a_call_name(list,'FPC_DECREF');
  2465. deallocallcpuregisters(list);
  2466. end;
  2467. cgpara2.done;
  2468. cgpara1.done;
  2469. end;
  2470. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2471. var
  2472. href : treference;
  2473. cgpara1,cgpara2 : TCGPara;
  2474. begin
  2475. cgpara1.init;
  2476. cgpara2.init;
  2477. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2478. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2479. if is_ansistring(t) or
  2480. is_widestring(t) or
  2481. is_interfacecom(t) or
  2482. is_dynamic_array(t) then
  2483. a_load_const_ref(list,OS_ADDR,0,ref)
  2484. else
  2485. begin
  2486. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2487. paramanager.allocparaloc(list,cgpara2);
  2488. a_paramaddr_ref(list,href,cgpara2);
  2489. paramanager.allocparaloc(list,cgpara1);
  2490. a_paramaddr_ref(list,ref,cgpara1);
  2491. paramanager.freeparaloc(list,cgpara1);
  2492. paramanager.freeparaloc(list,cgpara2);
  2493. allocallcpuregisters(list);
  2494. a_call_name(list,'FPC_INITIALIZE');
  2495. deallocallcpuregisters(list);
  2496. end;
  2497. cgpara1.done;
  2498. cgpara2.done;
  2499. end;
  2500. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2501. var
  2502. href : treference;
  2503. cgpara1,cgpara2 : TCGPara;
  2504. begin
  2505. cgpara1.init;
  2506. cgpara2.init;
  2507. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2508. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2509. if is_ansistring(t) or
  2510. is_widestring(t) or
  2511. is_interfacecom(t) then
  2512. begin
  2513. g_decrrefcount(list,t,ref);
  2514. a_load_const_ref(list,OS_ADDR,0,ref);
  2515. end
  2516. else
  2517. begin
  2518. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2519. paramanager.allocparaloc(list,cgpara2);
  2520. a_paramaddr_ref(list,href,cgpara2);
  2521. paramanager.allocparaloc(list,cgpara1);
  2522. a_paramaddr_ref(list,ref,cgpara1);
  2523. paramanager.freeparaloc(list,cgpara1);
  2524. paramanager.freeparaloc(list,cgpara2);
  2525. allocallcpuregisters(list);
  2526. a_call_name(list,'FPC_FINALIZE');
  2527. deallocallcpuregisters(list);
  2528. end;
  2529. cgpara1.done;
  2530. cgpara2.done;
  2531. end;
  2532. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2533. { generate range checking code for the value at location p. The type }
  2534. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2535. { is the original type used at that location. When both defs are equal }
  2536. { the check is also insert (needed for succ,pref,inc,dec) }
  2537. const
  2538. aintmax=high(aint);
  2539. var
  2540. neglabel : tasmlabel;
  2541. hreg : tregister;
  2542. lto,hto,
  2543. lfrom,hfrom : TConstExprInt;
  2544. fromsize, tosize: cardinal;
  2545. from_signed, to_signed: boolean;
  2546. begin
  2547. { range checking on and range checkable value? }
  2548. if not(cs_check_range in current_settings.localswitches) or
  2549. not(fromdef.typ in [orddef,enumdef]) then
  2550. exit;
  2551. {$ifndef cpu64bit}
  2552. { handle 64bit rangechecks separate for 32bit processors }
  2553. if is_64bit(fromdef) or is_64bit(todef) then
  2554. begin
  2555. cg64.g_rangecheck64(list,l,fromdef,todef);
  2556. exit;
  2557. end;
  2558. {$endif cpu64bit}
  2559. { only check when assigning to scalar, subranges are different, }
  2560. { when todef=fromdef then the check is always generated }
  2561. getrange(fromdef,lfrom,hfrom);
  2562. getrange(todef,lto,hto);
  2563. from_signed := is_signed(fromdef);
  2564. to_signed := is_signed(todef);
  2565. { check the rangedef of the array, not the array itself }
  2566. { (only change now, since getrange needs the arraydef) }
  2567. if (todef.typ = arraydef) then
  2568. todef := tarraydef(todef).rangedef;
  2569. { no range check if from and to are equal and are both longint/dword }
  2570. { no range check if from and to are equal and are both longint/dword }
  2571. { (if we have a 32bit processor) or int64/qword, since such }
  2572. { operations can at most cause overflows (JM) }
  2573. { Note that these checks are mostly processor independent, they only }
  2574. { have to be changed once we introduce 64bit subrange types }
  2575. {$ifdef cpu64bit}
  2576. if (fromdef = todef) and
  2577. (fromdef.typ=orddef) and
  2578. (((((torddef(fromdef).ordtype = s64bit) and
  2579. (lfrom = low(int64)) and
  2580. (hfrom = high(int64))) or
  2581. ((torddef(fromdef).ordtype = u64bit) and
  2582. (lfrom = low(qword)) and
  2583. (hfrom = high(qword))) or
  2584. ((torddef(fromdef).ordtype = scurrency) and
  2585. (lfrom = low(int64)) and
  2586. (hfrom = high(int64)))))) then
  2587. exit;
  2588. {$else cpu64bit}
  2589. if (fromdef = todef) and
  2590. (fromdef.typ=orddef) and
  2591. (((((torddef(fromdef).ordtype = s32bit) and
  2592. (lfrom = low(longint)) and
  2593. (hfrom = high(longint))) or
  2594. ((torddef(fromdef).ordtype = u32bit) and
  2595. (lfrom = low(cardinal)) and
  2596. (hfrom = high(cardinal)))))) then
  2597. exit;
  2598. {$endif cpu64bit}
  2599. { optimize some range checks away in safe cases }
  2600. fromsize := fromdef.size;
  2601. tosize := todef.size;
  2602. if ((from_signed = to_signed) or
  2603. (not from_signed)) and
  2604. (lto<=lfrom) and (hto>=hfrom) and
  2605. (fromsize <= tosize) then
  2606. begin
  2607. { if fromsize < tosize, and both have the same signed-ness or }
  2608. { fromdef is unsigned, then all bit patterns from fromdef are }
  2609. { valid for todef as well }
  2610. if (fromsize < tosize) then
  2611. exit;
  2612. if (fromsize = tosize) and
  2613. (from_signed = to_signed) then
  2614. { only optimize away if all bit patterns which fit in fromsize }
  2615. { are valid for the todef }
  2616. begin
  2617. {$ifopt Q+}
  2618. {$define overflowon}
  2619. {$Q-}
  2620. {$endif}
  2621. if to_signed then
  2622. begin
  2623. { calculation of the low/high ranges must not overflow 64 bit
  2624. otherwise we end up comparing with zero for 64 bit data types on
  2625. 64 bit processors }
  2626. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2627. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2628. exit
  2629. end
  2630. else
  2631. begin
  2632. { calculation of the low/high ranges must not overflow 64 bit
  2633. otherwise we end up having all zeros for 64 bit data types on
  2634. 64 bit processors }
  2635. if (lto = 0) and
  2636. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2637. exit
  2638. end;
  2639. {$ifdef overflowon}
  2640. {$Q+}
  2641. {$undef overflowon}
  2642. {$endif}
  2643. end
  2644. end;
  2645. { generate the rangecheck code for the def where we are going to }
  2646. { store the result }
  2647. { use the trick that }
  2648. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2649. { To be able to do that, we have to make sure however that either }
  2650. { fromdef and todef are both signed or unsigned, or that we leave }
  2651. { the parts < 0 and > maxlongint out }
  2652. if from_signed xor to_signed then
  2653. begin
  2654. if from_signed then
  2655. { from is signed, to is unsigned }
  2656. begin
  2657. { if high(from) < 0 -> always range error }
  2658. if (hfrom < 0) or
  2659. { if low(to) > maxlongint also range error }
  2660. (lto > aintmax) then
  2661. begin
  2662. a_call_name(list,'FPC_RANGEERROR');
  2663. exit
  2664. end;
  2665. { from is signed and to is unsigned -> when looking at to }
  2666. { as an signed value, it must be < maxaint (otherwise }
  2667. { it will become negative, which is invalid since "to" is unsigned) }
  2668. if hto > aintmax then
  2669. hto := aintmax;
  2670. end
  2671. else
  2672. { from is unsigned, to is signed }
  2673. begin
  2674. if (lfrom > aintmax) or
  2675. (hto < 0) then
  2676. begin
  2677. a_call_name(list,'FPC_RANGEERROR');
  2678. exit
  2679. end;
  2680. { from is unsigned and to is signed -> when looking at to }
  2681. { as an unsigned value, it must be >= 0 (since negative }
  2682. { values are the same as values > maxlongint) }
  2683. if lto < 0 then
  2684. lto := 0;
  2685. end;
  2686. end;
  2687. hreg:=getintregister(list,OS_INT);
  2688. a_load_loc_reg(list,OS_INT,l,hreg);
  2689. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  2690. current_asmdata.getjumplabel(neglabel);
  2691. {
  2692. if from_signed then
  2693. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  2694. else
  2695. }
  2696. {$ifdef cpu64bit}
  2697. if qword(hto-lto)>qword(aintmax) then
  2698. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  2699. else
  2700. {$endif cpu64bit}
  2701. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  2702. a_call_name(list,'FPC_RANGEERROR');
  2703. a_label(list,neglabel);
  2704. end;
  2705. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2706. begin
  2707. g_overflowCheck(list,loc,def);
  2708. end;
  2709. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2710. var
  2711. tmpreg : tregister;
  2712. begin
  2713. tmpreg:=getintregister(list,size);
  2714. g_flags2reg(list,size,f,tmpreg);
  2715. a_load_reg_ref(list,size,size,tmpreg,ref);
  2716. end;
  2717. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2718. var
  2719. OKLabel : tasmlabel;
  2720. cgpara1 : TCGPara;
  2721. begin
  2722. if (cs_check_object in current_settings.localswitches) or
  2723. (cs_check_range in current_settings.localswitches) then
  2724. begin
  2725. current_asmdata.getjumplabel(oklabel);
  2726. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2727. cgpara1.init;
  2728. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2729. paramanager.allocparaloc(list,cgpara1);
  2730. a_param_const(list,OS_INT,210,cgpara1);
  2731. paramanager.freeparaloc(list,cgpara1);
  2732. a_call_name(list,'FPC_HANDLEERROR');
  2733. a_label(list,oklabel);
  2734. cgpara1.done;
  2735. end;
  2736. end;
  2737. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  2738. var
  2739. hrefvmt : treference;
  2740. cgpara1,cgpara2 : TCGPara;
  2741. begin
  2742. cgpara1.init;
  2743. cgpara2.init;
  2744. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2745. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2746. if (cs_check_object in current_settings.localswitches) then
  2747. begin
  2748. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  2749. paramanager.allocparaloc(list,cgpara2);
  2750. a_paramaddr_ref(list,hrefvmt,cgpara2);
  2751. paramanager.allocparaloc(list,cgpara1);
  2752. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2753. paramanager.freeparaloc(list,cgpara1);
  2754. paramanager.freeparaloc(list,cgpara2);
  2755. allocallcpuregisters(list);
  2756. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  2757. deallocallcpuregisters(list);
  2758. end
  2759. else
  2760. if (cs_check_range in current_settings.localswitches) then
  2761. begin
  2762. paramanager.allocparaloc(list,cgpara1);
  2763. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2764. paramanager.freeparaloc(list,cgpara1);
  2765. allocallcpuregisters(list);
  2766. a_call_name(list,'FPC_CHECK_OBJECT');
  2767. deallocallcpuregisters(list);
  2768. end;
  2769. cgpara1.done;
  2770. cgpara2.done;
  2771. end;
  2772. {*****************************************************************************
  2773. Entry/Exit Code Functions
  2774. *****************************************************************************}
  2775. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  2776. var
  2777. sizereg,sourcereg,lenreg : tregister;
  2778. cgpara1,cgpara2,cgpara3 : TCGPara;
  2779. begin
  2780. { because some abis don't support dynamic stack allocation properly
  2781. open array value parameters are copied onto the heap
  2782. }
  2783. { calculate necessary memory }
  2784. { read/write operations on one register make the life of the register allocator hard }
  2785. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  2786. begin
  2787. lenreg:=getintregister(list,OS_INT);
  2788. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  2789. end
  2790. else
  2791. lenreg:=lenloc.register;
  2792. sizereg:=getintregister(list,OS_INT);
  2793. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  2794. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  2795. { load source }
  2796. sourcereg:=getaddressregister(list);
  2797. a_loadaddr_ref_reg(list,ref,sourcereg);
  2798. { do getmem call }
  2799. cgpara1.init;
  2800. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2801. paramanager.allocparaloc(list,cgpara1);
  2802. a_param_reg(list,OS_INT,sizereg,cgpara1);
  2803. paramanager.freeparaloc(list,cgpara1);
  2804. allocallcpuregisters(list);
  2805. a_call_name(list,'FPC_GETMEM');
  2806. deallocallcpuregisters(list);
  2807. cgpara1.done;
  2808. { return the new address }
  2809. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  2810. { do move call }
  2811. cgpara1.init;
  2812. cgpara2.init;
  2813. cgpara3.init;
  2814. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2815. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2816. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2817. { load size }
  2818. paramanager.allocparaloc(list,cgpara3);
  2819. a_param_reg(list,OS_INT,sizereg,cgpara3);
  2820. { load destination }
  2821. paramanager.allocparaloc(list,cgpara2);
  2822. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  2823. { load source }
  2824. paramanager.allocparaloc(list,cgpara1);
  2825. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  2826. paramanager.freeparaloc(list,cgpara3);
  2827. paramanager.freeparaloc(list,cgpara2);
  2828. paramanager.freeparaloc(list,cgpara1);
  2829. allocallcpuregisters(list);
  2830. a_call_name(list,'FPC_MOVE');
  2831. deallocallcpuregisters(list);
  2832. cgpara3.done;
  2833. cgpara2.done;
  2834. cgpara1.done;
  2835. end;
  2836. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  2837. var
  2838. cgpara1 : TCGPara;
  2839. begin
  2840. { do move call }
  2841. cgpara1.init;
  2842. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2843. { load source }
  2844. paramanager.allocparaloc(list,cgpara1);
  2845. a_param_loc(list,l,cgpara1);
  2846. paramanager.freeparaloc(list,cgpara1);
  2847. allocallcpuregisters(list);
  2848. a_call_name(list,'FPC_FREEMEM');
  2849. deallocallcpuregisters(list);
  2850. cgpara1.done;
  2851. end;
  2852. procedure tcg.g_save_standard_registers(list:TAsmList);
  2853. var
  2854. href : treference;
  2855. size : longint;
  2856. r : integer;
  2857. begin
  2858. { Get temp }
  2859. size:=0;
  2860. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2861. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2862. inc(size,sizeof(aint));
  2863. if size>0 then
  2864. begin
  2865. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  2866. { Copy registers to temp }
  2867. href:=current_procinfo.save_regs_ref;
  2868. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2869. begin
  2870. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2871. begin
  2872. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  2873. inc(href.offset,sizeof(aint));
  2874. end;
  2875. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  2876. end;
  2877. end;
  2878. end;
  2879. procedure tcg.g_restore_standard_registers(list:TAsmList);
  2880. var
  2881. href : treference;
  2882. r : integer;
  2883. hreg : tregister;
  2884. begin
  2885. { Copy registers from temp }
  2886. href:=current_procinfo.save_regs_ref;
  2887. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2888. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2889. begin
  2890. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  2891. { Allocate register so the optimizer does not remove the load }
  2892. a_reg_alloc(list,hreg);
  2893. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  2894. inc(href.offset,sizeof(aint));
  2895. end;
  2896. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  2897. end;
  2898. procedure tcg.g_profilecode(list : TAsmList);
  2899. begin
  2900. end;
  2901. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  2902. begin
  2903. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  2904. end;
  2905. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  2906. begin
  2907. a_load_const_ref(list, OS_INT, a, href);
  2908. end;
  2909. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  2910. begin
  2911. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  2912. end;
  2913. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  2914. var
  2915. hsym : tsym;
  2916. href : treference;
  2917. paraloc : tcgparalocation;
  2918. begin
  2919. { calculate the parameter info for the procdef }
  2920. if not procdef.has_paraloc_info then
  2921. begin
  2922. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  2923. procdef.has_paraloc_info:=true;
  2924. end;
  2925. hsym:=tsym(procdef.parast.Find('self'));
  2926. if not(assigned(hsym) and
  2927. (hsym.typ=paravarsym)) then
  2928. internalerror(200305251);
  2929. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  2930. case paraloc.loc of
  2931. LOC_REGISTER:
  2932. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  2933. LOC_REFERENCE:
  2934. begin
  2935. { offset in the wrapper needs to be adjusted for the stored
  2936. return address }
  2937. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  2938. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  2939. end
  2940. else
  2941. internalerror(200309189);
  2942. end;
  2943. end;
  2944. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2945. begin
  2946. a_call_name(list,s);
  2947. end;
  2948. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  2949. var
  2950. l: tasmsymbol;
  2951. ref: treference;
  2952. begin
  2953. result := NR_NO;
  2954. case target_info.system of
  2955. system_powerpc_darwin,
  2956. system_i386_darwin,
  2957. system_powerpc64_darwin,
  2958. system_x86_64_darwin:
  2959. begin
  2960. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  2961. if not(assigned(l)) then
  2962. begin
  2963. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  2964. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2965. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  2966. {$ifdef cpu64bit}
  2967. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  2968. {$else cpu64bit}
  2969. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2970. {$endif cpu64bit}
  2971. end;
  2972. result := cg.getaddressregister(list);
  2973. reference_reset_symbol(ref,l,0);
  2974. { ref.base:=current_procinfo.got;
  2975. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  2976. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2977. end;
  2978. end;
  2979. end;
  2980. {*****************************************************************************
  2981. TCG64
  2982. *****************************************************************************}
  2983. {$ifndef cpu64bit}
  2984. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2985. begin
  2986. a_load64_reg_reg(list,regsrc,regdst);
  2987. a_op64_const_reg(list,op,size,value,regdst);
  2988. end;
  2989. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2990. var
  2991. tmpreg64 : tregister64;
  2992. begin
  2993. { when src1=dst then we need to first create a temp to prevent
  2994. overwriting src1 with src2 }
  2995. if (regsrc1.reghi=regdst.reghi) or
  2996. (regsrc1.reglo=regdst.reghi) or
  2997. (regsrc1.reghi=regdst.reglo) or
  2998. (regsrc1.reglo=regdst.reglo) then
  2999. begin
  3000. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3001. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3002. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3003. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3004. a_load64_reg_reg(list,tmpreg64,regdst);
  3005. end
  3006. else
  3007. begin
  3008. a_load64_reg_reg(list,regsrc2,regdst);
  3009. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3010. end;
  3011. end;
  3012. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3013. var
  3014. tmpreg64 : tregister64;
  3015. begin
  3016. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3017. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3018. a_load64_subsetref_reg(list,sref,tmpreg64);
  3019. a_op64_const_reg(list,op,size,a,tmpreg64);
  3020. a_load64_reg_subsetref(list,tmpreg64,sref);
  3021. end;
  3022. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3023. var
  3024. tmpreg64 : tregister64;
  3025. begin
  3026. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3027. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3028. a_load64_subsetref_reg(list,sref,tmpreg64);
  3029. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3030. a_load64_reg_subsetref(list,tmpreg64,sref);
  3031. end;
  3032. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3033. var
  3034. tmpreg64 : tregister64;
  3035. begin
  3036. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3037. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3038. a_load64_subsetref_reg(list,sref,tmpreg64);
  3039. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3040. a_load64_reg_subsetref(list,tmpreg64,sref);
  3041. end;
  3042. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3043. var
  3044. tmpreg64 : tregister64;
  3045. begin
  3046. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3047. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3048. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3049. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3050. end;
  3051. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3052. begin
  3053. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3054. ovloc.loc:=LOC_VOID;
  3055. end;
  3056. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3057. begin
  3058. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3059. ovloc.loc:=LOC_VOID;
  3060. end;
  3061. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3062. begin
  3063. case l.loc of
  3064. LOC_REFERENCE, LOC_CREFERENCE:
  3065. a_load64_ref_subsetref(list,l.reference,sref);
  3066. LOC_REGISTER,LOC_CREGISTER:
  3067. a_load64_reg_subsetref(list,l.register64,sref);
  3068. LOC_CONSTANT :
  3069. a_load64_const_subsetref(list,l.value64,sref);
  3070. LOC_SUBSETREF,LOC_CSUBSETREF:
  3071. a_load64_subsetref_subsetref(list,l.sref,sref);
  3072. else
  3073. internalerror(2006082210);
  3074. end;
  3075. end;
  3076. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3077. begin
  3078. case l.loc of
  3079. LOC_REFERENCE, LOC_CREFERENCE:
  3080. a_load64_subsetref_ref(list,sref,l.reference);
  3081. LOC_REGISTER,LOC_CREGISTER:
  3082. a_load64_subsetref_reg(list,sref,l.register64);
  3083. LOC_SUBSETREF,LOC_CSUBSETREF:
  3084. a_load64_subsetref_subsetref(list,sref,l.sref);
  3085. else
  3086. internalerror(2006082211);
  3087. end;
  3088. end;
  3089. {$endif cpu64bit}
  3090. initialization
  3091. ;
  3092. finalization
  3093. cg.free;
  3094. {$ifndef cpu64bit}
  3095. cg64.free;
  3096. {$endif cpu64bit}
  3097. end.