aoptcpu.pas 24 KB

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  1. {
  2. Copyright (c) 1998-2014 by the Free Pascal development team
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for m68k
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. {$define DEBUG_AOPTCPU}
  21. Interface
  22. uses
  23. cpubase, aoptobj, aoptcpub, aopt, aasmtai,
  24. cgbase;
  25. Type
  26. TCpuAsmOptimizer = class(TAsmOptimizer)
  27. function RegLoadedWithNewValue(reg: tregister; hp: tai): boolean; override;
  28. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  29. function TryToFoldDoubleAND(var p: tai): boolean;
  30. function TryToRemoveTST(var p: tai): boolean;
  31. function TryToOptimizeMove(var p: tai): boolean;
  32. function MaybeRealConstOperSimplify(var p: tai): boolean;
  33. function OptPass1LEA(var p: tai): Boolean;
  34. function OptPass1MOVEM(var p: tai): Boolean;
  35. function OptPass1Bitwise(var p: tai): Boolean;
  36. { outputs a debug message into the assembler file }
  37. procedure DebugMsg(const s: string; p: tai);
  38. End;
  39. Implementation
  40. uses
  41. cutils, aasmcpu, cgutils, globtype, globals, verbose, cpuinfo, itcpugas, procinfo, cpupi,
  42. aoptutils;
  43. { Range check must be disabled explicitly as conversions between signed and unsigned
  44. 32-bit values are done without explicit typecasts }
  45. {$R-}
  46. function opname(var p: tai): string;
  47. begin
  48. result:=upcase(gas_op2str[taicpu(p).opcode]);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. RefsEqual :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.volatility=[]) and
  59. (r2.volatility=[]);
  60. end;
  61. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean;
  62. begin
  63. result := oper1.typ = oper2.typ;
  64. if result then
  65. case oper1.typ of
  66. top_const:
  67. Result:=oper1.val = oper2.val;
  68. top_reg:
  69. Result:=oper1.reg = oper2.reg;
  70. top_ref:
  71. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  72. else
  73. internalerror(2016112401);
  74. end
  75. end;
  76. function MatchInstruction(const instr: tai; const op: TAsmOp; const opsize: topsizes): boolean;
  77. begin
  78. result :=
  79. (instr.typ = ait_instruction) and
  80. (taicpu(instr).opcode = op) and
  81. ((opsize = []) or (taicpu(instr).opsize in opsize));
  82. end;
  83. function MatchInstruction(const instr : tai;const ops : array of TAsmOp;
  84. const opsize : topsizes) : boolean;
  85. var
  86. op : TAsmOp;
  87. begin
  88. result:=false;
  89. for op in ops do
  90. begin
  91. if (instr.typ = ait_instruction) and
  92. (taicpu(instr).opcode = op) and
  93. ((opsize = []) or (taicpu(instr).opsize in opsize)) then
  94. begin
  95. result:=true;
  96. exit;
  97. end;
  98. end;
  99. end;
  100. function TCpuAsmOptimizer.MaybeRealConstOperSimplify(var p: tai): boolean;
  101. var
  102. tmpint64: int64;
  103. tmpsingle: single;
  104. begin
  105. result:=false;
  106. if (taicpu(p).oper[0]^.typ = top_realconst) then
  107. begin
  108. { if we work with actual integers, turn the operand into one }
  109. if frac(taicpu(p).oper[0]^.val_real) = 0 then
  110. begin
  111. tmpint64:=trunc(taicpu(p).oper[0]^.val_real);
  112. if (high(shortint) >= tmpint64) and (low(shortint) <= tmpint64) then
  113. begin
  114. taicpu(p).opsize := S_B;
  115. taicpu(p).oper[0]^.typ:=top_const;
  116. end
  117. else
  118. if (high(smallint) >= tmpint64) and (low(smallint) <= tmpint64) then
  119. begin
  120. taicpu(p).opsize := S_W;
  121. taicpu(p).oper[0]^.typ:=top_const;
  122. end
  123. else
  124. if (high(longint) >= tmpint64) and (low(longint) <= tmpint64) then
  125. begin
  126. taicpu(p).opsize := S_L;
  127. taicpu(p).oper[0]^.typ:=top_const;
  128. end;
  129. if (taicpu(p).oper[0]^.typ) = top_const then
  130. begin
  131. DebugMsg('Optimizer: FPU real const to integer',p);
  132. taicpu(p).oper[0]^.val:=tmpint64;
  133. result:=true;
  134. end;
  135. end
  136. else
  137. begin
  138. tmpsingle:=taicpu(p).oper[0]^.val_real;
  139. if (taicpu(p).opsize = S_FD) and
  140. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  141. begin
  142. DebugMsg('Optimizer: FPU real const to lesser precision',p);
  143. taicpu(p).opsize:=S_FS;
  144. result:=true;
  145. end;
  146. end;
  147. end;
  148. end;
  149. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  150. var
  151. p: taicpu;
  152. begin
  153. if not assigned(hp) or
  154. (hp.typ <> ait_instruction) then
  155. begin
  156. Result := false;
  157. exit;
  158. end;
  159. p := taicpu(hp);
  160. Result :=
  161. (((p.opcode=A_MOVE) or (p.opcode=A_MOVEA) or (p.opcode=A_MVS) or
  162. (p.opcode=A_MVZ) or (p.opcode=A_MOVEQ) or (p.opcode=A_LEA)) and
  163. (p.oper[1]^.typ = top_reg) and
  164. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  165. ((p.oper[0]^.typ = top_const) or
  166. ((p.oper[0]^.typ = top_reg) and
  167. not(SuperRegistersEqual(p.oper[0]^.reg,reg))) or
  168. ((p.oper[0]^.typ = top_ref) and
  169. not RegInRef(reg,p.oper[0]^.ref^)))) or
  170. ((p.opcode = A_FMOVE) and
  171. (p.oper[1]^.typ = top_reg) and
  172. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  173. ((p.oper[0]^.typ = top_realconst) or
  174. ((p.oper[0]^.typ = top_reg) and
  175. not(SuperRegistersEqual(p.oper[0]^.reg,reg))))) or
  176. ((p.opcode = A_MOVEM) and
  177. (p.oper[1]^.typ = top_regset) and
  178. ((getsupreg(reg) in p.oper[1]^.dataregset) or
  179. (getsupreg(reg) in p.oper[1]^.addrregset))) or
  180. ((p.opcode = A_FMOVEM) and
  181. (p.oper[1]^.typ = top_regset) and
  182. (getsupreg(reg) in p.oper[1]^.fpuregset));
  183. end;
  184. {$ifdef DEBUG_AOPTCPU}
  185. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);
  186. begin
  187. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  188. end;
  189. {$else DEBUG_AOPTCPU}
  190. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);inline;
  191. begin
  192. end;
  193. {$endif DEBUG_AOPTCPU}
  194. function TCpuAsmOptimizer.TryToFoldDoubleAND(var p: tai): boolean;
  195. var
  196. next, next2: tai;
  197. opstr: string[15];
  198. begin
  199. result:=false;
  200. if ((taicpu(p).oper[0]^.typ=top_const) and (taicpu(p).oper[1]^.typ=top_reg)) and
  201. GetNextInstruction(p,next) and
  202. MatchInstruction(next,A_AND,[taicpu(p).opsize]) and
  203. (taicpu(next).oper[0]^.typ=top_const) and
  204. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[1]^) then
  205. begin
  206. DebugMsg('Optimizer: folding double AND',p);
  207. taicpu(p).oper[0]^.val:=taicpu(p).oper[0]^.val and taicpu(next).oper[0]^.val;
  208. RemoveInstruction(next);
  209. result:=true;
  210. end;
  211. end;
  212. function TCpuAsmOptimizer.TryToRemoveTST(var p: tai): boolean;
  213. var
  214. next, next2: tai;
  215. opstr: string[15];
  216. begin
  217. result:=false;
  218. if not((taicpu(p).oper[1]^.typ=top_reg) and isaddressregister(taicpu(p).oper[1]^.reg)) and
  219. GetNextInstruction(p,next) and
  220. MatchInstruction(next,A_TST,[taicpu(p).opsize]) and
  221. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) and
  222. GetNextInstruction(next,next2) and
  223. MatchInstruction(next2,[A_BXX,A_SXX],[S_NO,S_B]) and
  224. (taicpu(next2).condition in [C_NE,C_EQ,C_PL,C_MI]) then
  225. begin
  226. opstr:=opname(p);
  227. DebugMsg('Optimizer: '+opstr+', TST, Jxx/Sxx to '+opstr+', Jxx/Sxx',p);
  228. RemoveInstruction(next);
  229. result:=true;
  230. end;
  231. end;
  232. function TCpuAsmOptimizer.TryToOptimizeMove(var p: tai): boolean;
  233. var
  234. next, next2: tai;
  235. opstr: string[15];
  236. begin
  237. result:=false;
  238. if (taicpu(p).opcode=A_MOVE) then
  239. begin
  240. result:=TryToRemoveTST(p);
  241. if result then
  242. exit;
  243. end;
  244. if GetNextInstruction(p,next) and
  245. (next.typ = ait_instruction) and
  246. (taicpu(next).opcode = taicpu(p).opcode) and
  247. (taicpu(p).opsize = taicpu(next).opsize) and
  248. (taicpu(p).oper[1]^.typ = top_reg) and
  249. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) then
  250. begin
  251. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[1]^)) and
  252. RegEndOfLife(taicpu(next).oper[0]^.reg, taicpu(next)) then
  253. begin
  254. opstr:=opname(p);
  255. case taicpu(p).oper[0]^.typ of
  256. top_reg:
  257. { do not optimize away FPU to INT to FPU reg moves. These are used for
  258. to-single-rounding on FPUs which have no FSMOVE/FDMOVE. (KB) }
  259. if not ((taicpu(p).opcode = A_FMOVE) and
  260. (getregtype(taicpu(p).oper[0]^.reg) <> getregtype(taicpu(p).oper[1]^.reg))) then
  261. begin
  262. { move %reg0, %tmpreg; move %tmpreg, <ea> -> move %reg0, <ea> }
  263. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  264. UpdateUsedRegs(p);
  265. RemoveInstruction(next);
  266. result:=true;
  267. { also remove leftover move %reg0, %reg0, which can occur as the result
  268. of the previous optimization, if %reg0 and %tmpreg was different types
  269. (addr vs. data), so these moves were left in by the cg }
  270. if MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
  271. begin
  272. DebugMsg('Optimizer: '+opstr+' + '+opstr+' removed',p);
  273. RemoveCurrentP(p);
  274. end
  275. else
  276. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #1',p)
  277. end;
  278. top_const:
  279. begin
  280. // DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #2',p);
  281. end;
  282. top_ref:
  283. begin
  284. { move ref, %tmpreg; move %tmpreg, <ea> -> move ref, <ea> }
  285. { we only want to do this when <ea> is a reg or a simple reference }
  286. with taicpu(next).oper[1]^ do
  287. if (taicpu(next).opcode <> A_FMOVE) and
  288. ((typ = top_reg) or
  289. ((typ = top_ref) and
  290. ((ref^.index = NR_NO) or
  291. (ref^.base = NR_NO)) and
  292. (ref^.symbol = nil) and
  293. (ref^.offset = 0))) then
  294. begin
  295. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #3',p);
  296. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  297. UpdateUsedRegs(p);
  298. RemoveInstruction(next);
  299. result:=true;
  300. end;
  301. end;
  302. else
  303. ;
  304. end;
  305. end;
  306. exit;
  307. end;
  308. if GetNextInstruction(p,next) and
  309. (next.typ = ait_instruction) and
  310. GetNextInstruction(next,next2) and
  311. (next2.typ = ait_instruction) and
  312. (taicpu(next).opcode <> taicpu(p).opcode) and
  313. (taicpu(next2).opcode = taicpu(p).opcode) and
  314. (taicpu(p).oper[0]^.typ = top_reg) and
  315. (taicpu(p).oper[1]^.typ = top_reg) and
  316. (getregtype(taicpu(p).oper[0]^.reg) = getregtype(taicpu(p).oper[1]^.reg)) and
  317. MatchOperand(taicpu(p).oper[1]^,taicpu(next2).oper[0]^) and
  318. MatchOperand(taicpu(next2).oper[1]^,taicpu(p).oper[0]^) and
  319. (taicpu(p).opsize = taicpu(next2).opsize) and
  320. ((taicpu(p).opcode = A_FMOVE) or
  321. (taicpu(p).opsize = taicpu(next).opsize)) then
  322. begin
  323. opstr:=opname(p);
  324. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next2).oper[1]^)) and
  325. not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[0]^)) and
  326. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(next2)) then
  327. begin
  328. { move %reg0, %tmpreg
  329. op ???, %tmpreg
  330. move %tmpreg, %reg0
  331. to:
  332. op ???, %reg0 }
  333. if MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[taicpu(next).ops-1]^) then
  334. begin
  335. {
  336. Disabled, because it breaks some tests... :( (KB)
  337. DebugMsg('Optimizer: '+opstr+' + OP + '+opstr+' to OP #1',next);
  338. taicpu(next).loadOper(taicpu(next).ops-1,taicpu(p).oper[0]^);
  339. asml.remove(p);
  340. asml.remove(next2);
  341. p.free;
  342. next2.free;
  343. result:=true;
  344. }
  345. end;
  346. end;
  347. end;
  348. end;
  349. function TCpuAsmOptimizer.OptPass1LEA(var p: tai): Boolean;
  350. var
  351. next: tai;
  352. begin
  353. Result:=false;
  354. { LEA (Ax),Ax is a NOP if src and dest reg is equal, so remove it. }
  355. if not assigned(taicpu(p).oper[0]^.ref^.symbol) and
  356. (((taicpu(p).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
  357. (taicpu(p).oper[0]^.ref^.index = NR_NO)) or
  358. ((taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
  359. (taicpu(p).oper[0]^.ref^.base = NR_NO))) and
  360. (taicpu(p).oper[0]^.ref^.offset = 0) then
  361. begin
  362. DebugMsg('Optimizer: LEA 0(Ax),Ax removed',p);
  363. result:=RemoveCurrentP(p);
  364. if result then
  365. exit;
  366. end;
  367. if (taicpu(p).oper[1]^.reg=NR_A7) and
  368. (taicpu(p).oper[0]^.ref^.base=NR_A7) and
  369. (taicpu(p).oper[0]^.ref^.index=NR_NO) and
  370. (taicpu(p).oper[0]^.ref^.symbol=nil) and
  371. (taicpu(p).oper[0]^.ref^.direction=dir_none) and
  372. GetNextInstruction(p,next) and
  373. MatchInstruction(next,A_MOVEM,[S_L]) and
  374. MatchOpType(taicpu(next),top_regset,top_ref) and
  375. ((taicpu(p).oper[0]^.ref^.offset=-(PopCnt(Byte(taicpu(next).oper[0]^.dataregset))+PopCnt(Byte(taicpu(next).oper[0]^.addrregset)))*4)) and
  376. (taicpu(next).oper[1]^.ref^.base=NR_A7) and
  377. (taicpu(next).oper[1]^.ref^.index=NR_NO) and
  378. (taicpu(next).oper[1]^.ref^.symbol=nil) and
  379. (taicpu(next).oper[1]^.ref^.direction=dir_none) and
  380. not (current_settings.cputype in cpu_coldfire) then
  381. begin
  382. DebugMsg('Optimizer: LEA, MOVE(M) to MOVE(M) predecremented',p);
  383. taicpu(next).oper[1]^.ref^.direction:=dir_dec;
  384. RemoveCurrentP(p,next);
  385. result:=true;
  386. exit;
  387. end;
  388. end;
  389. function TCpuAsmOptimizer.OptPass1MOVEM(var p: tai): Boolean;
  390. var
  391. next: tai;
  392. begin
  393. Result:=false;
  394. if MatchOpType(taicpu(p),top_ref,top_regset) and
  395. (taicpu(p).oper[0]^.ref^.base=NR_A7) and
  396. (taicpu(p).oper[0]^.ref^.index=NR_NO) and
  397. (taicpu(p).oper[0]^.ref^.symbol=nil) and
  398. (taicpu(p).oper[0]^.ref^.direction=dir_none) and
  399. GetNextInstruction(p,next) and
  400. MatchInstruction(next,A_LEA,[S_NO]) and
  401. (taicpu(next).oper[1]^.reg=NR_A7) and
  402. (taicpu(next).oper[0]^.ref^.base=NR_A7) and
  403. (taicpu(next).oper[0]^.ref^.index=NR_NO) and
  404. (taicpu(next).oper[0]^.ref^.symbol=nil) and
  405. (taicpu(next).oper[0]^.ref^.direction=dir_none) and
  406. ((taicpu(next).oper[0]^.ref^.offset=(PopCnt(Byte(taicpu(p).oper[1]^.dataregset))+PopCnt(Byte(taicpu(p).oper[1]^.addrregset)))*4)) and
  407. not (current_settings.cputype in cpu_coldfire) then
  408. begin
  409. DebugMsg('Optimizer: MOVE(M), LEA to MOVE(M) postincremented',p);
  410. taicpu(p).oper[0]^.ref^.direction:=dir_inc;
  411. RemoveInstruction(next);
  412. result:=true;
  413. exit;
  414. end;
  415. end;
  416. function TCpuAsmOptimizer.OptPass1Bitwise(var p: tai): Boolean;
  417. begin
  418. result:=false;
  419. case p.typ of
  420. ait_instruction:
  421. begin
  422. if taicpu(p).opcode = A_AND then
  423. result:=TryToFoldDoubleAND(p);
  424. if not result then
  425. result:=TryToRemoveTST(p);
  426. end;
  427. else
  428. ;
  429. end;
  430. end;
  431. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  432. var
  433. next: tai;
  434. tmpref: treference;
  435. begin
  436. result:=false;
  437. case p.typ of
  438. ait_instruction:
  439. begin
  440. //asml.insertbefore(tai_comment.Create(strpnew('pass1 called for instr')), p);
  441. case taicpu(p).opcode of
  442. A_MOVE:
  443. result:=TryToOptimizeMove(p);
  444. A_MOVEM:
  445. result:=OptPass1MOVEM(p);
  446. A_LEA:
  447. result:=OptPass1LEA(p);
  448. { Bitwise operations }
  449. A_AND,A_OR,A_EOR:
  450. result:=OptPass1Bitwise(p);
  451. { Address register sub/add can be replaced with ADDQ/SUBQ or LEA if the value is in the
  452. SmallInt range, which is shorter to encode and faster to execute on most 68k }
  453. A_SUB,A_SUBA,A_ADD,A_ADDA:
  454. if (taicpu(p).oper[1]^.typ = top_reg) and isaddressregister(taicpu(p).oper[1]^.reg) and
  455. (taicpu(p).oper[0]^.typ = top_const) then
  456. begin
  457. if isvalueforaddqsubq(taicpu(p).oper[0]^.val) then
  458. begin
  459. DebugMsg('Optimizer: SUB/ADD #val,Ax to SUBQ/ADDQ',p);
  460. taicpu(p).opsize:=S_L; // this is safe, because we're targetting an address reg
  461. if taicpu(p).opcode in [A_ADD,A_ADDA] then
  462. taicpu(p).opcode:=A_ADDQ
  463. else
  464. taicpu(p).opcode:=A_SUBQ;
  465. result:=true;
  466. end
  467. else
  468. if isvalue16bit(abs(taicpu(p).oper[0]^.val)) then
  469. begin
  470. DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
  471. if (taicpu(p).opcode=A_SUB) or (taicpu(p).opcode=A_SUBA) then
  472. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
  473. else
  474. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);
  475. taicpu(p).opcode:=A_LEA;
  476. taicpu(p).opsize:=S_NO;
  477. taicpu(p).loadref(0,tmpref);
  478. result:=true;
  479. end;
  480. end
  481. else
  482. result:=TryToRemoveTST(p);
  483. A_SUBQ,A_ADDQ:
  484. result:=TryToRemoveTST(p);
  485. { MOVEA #0,Ax to SUBA Ax,Ax, because it's shorter }
  486. A_MOVEA:
  487. if (taicpu(p).oper[0]^.typ = top_const) and
  488. (taicpu(p).oper[0]^.val = 0) then
  489. begin
  490. DebugMsg('Optimizer: MOVEA #0,Ax to SUBA Ax,Ax',p);
  491. taicpu(p).opcode:=A_SUBA;
  492. taicpu(p).opsize:=S_L; { otherwise it will be .W -> BOOM }
  493. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  494. result:=true;
  495. end;
  496. { CLR.L Dx on a 68000 is slower than MOVEQ #0,Dx }
  497. A_CLR:
  498. if (current_settings.cputype in [cpu_mc68000]) and
  499. (taicpu(p).oper[0]^.typ = top_reg) and
  500. (taicpu(p).opsize = S_L) and
  501. isintregister(taicpu(p).oper[0]^.reg) then
  502. begin
  503. //DebugMsg('Optimizer: CLR.L Dx to MOVEQ #0,Dx',p);
  504. taicpu(p).opcode:=A_MOVEQ;
  505. taicpu(p).loadoper(1,taicpu(p).oper[0]^);
  506. taicpu(p).loadconst(0,0);
  507. taicpu(p).ops:=2;
  508. result:=true;
  509. end;
  510. A_JSR:
  511. begin
  512. if (cs_opt_level4 in current_settings.optimizerswitches) and
  513. GetNextInstruction(p,next) and
  514. MatchInstruction(next,A_RTS,[S_NO]) and
  515. { play safe: if any parameter is pushed on the stack, we cannot to this optimization
  516. as the bottom stack element might be a parameter and not the return address as it is expected
  517. after a call (which we simulate by a jmp)
  518. Actually, as in this case the stack pointer is no used as a frame pointer and
  519. there will be more instructions to restore the stack frame before jsr, so this
  520. is unlikedly to happen }
  521. (current_procinfo.maxpushedparasize=0) then
  522. begin
  523. DebugMsg('Optimizer: JSR, RTS to JMP',p);
  524. taicpu(p).opcode:=A_JMP;
  525. RemoveInstruction(next);
  526. result:=true;
  527. end;
  528. end;
  529. { CMP #0,<ea> equals to TST <ea>, just shorter and TST is more flexible anyway }
  530. A_CMP,A_CMPI:
  531. if (taicpu(p).oper[0]^.typ = top_const) and
  532. (taicpu(p).oper[0]^.val = 0) then
  533. begin
  534. DebugMsg('Optimizer: CMP #0 to TST',p);
  535. taicpu(p).opcode:=A_TST;
  536. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  537. taicpu(p).clearop(1);
  538. taicpu(p).ops:=1;
  539. result:=true;
  540. end;
  541. A_FCMP:
  542. if (taicpu(p).oper[0]^.typ = top_realconst) then
  543. begin
  544. if (taicpu(p).oper[0]^.val_real = 0.0) then
  545. begin
  546. DebugMsg('Optimizer: FCMP #0.0 to FTST',p);
  547. taicpu(p).opcode:=A_FTST;
  548. taicpu(p).opsize:=S_FX;
  549. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  550. taicpu(p).clearop(1);
  551. taicpu(p).ops:=1;
  552. result:=true;
  553. end
  554. else
  555. result:=result or MaybeRealConstOperSimplify(p);
  556. end;
  557. A_FMOVE,A_FSMOVE,A_FDMOVE,
  558. A_FADD,A_FSADD,A_FDADD,A_FSUB,A_FSSUB,A_FDSUB,
  559. A_FMUL,A_FSMUL,A_FDMUL,A_FDIV,A_FSDIV,A_FDDIV,
  560. A_FSGLMUL,A_FSGLDIV:
  561. begin
  562. if (taicpu(p).opcode = A_FMOVE) and TryToOptimizeMove(p) then
  563. begin
  564. result:=true;
  565. exit;
  566. end;
  567. result:=result or MaybeRealConstOperSimplify(p);
  568. end;
  569. else
  570. ;
  571. end;
  572. end;
  573. else
  574. ;
  575. end;
  576. end;
  577. begin
  578. casmoptimizer:=TCpuAsmOptimizer;
  579. end.