daopt386.pas 95 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  52. TRegSet = Set of RS_EAX..RS_ESP;
  53. toptreginfo = Record
  54. NewRegsEncountered, OldRegsEncountered: TRegSet;
  55. RegsLoadedForRef: TRegSet;
  56. lastReload: array[RS_EAX..RS_ESP] of tai;
  57. New2OldReg: TRegArray;
  58. end;
  59. {possible actions on an operand: read, write or modify (= read & write)}
  60. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  61. {the possible states of a flag}
  62. TFlagContents = (F_Unknown, F_notSet, F_Set);
  63. TContent = Packed Record
  64. {start and end of block instructions that defines the
  65. content of this register.}
  66. StartMod: tai;
  67. MemWrite: taicpu;
  68. {how many instructions starting with StarMod does the block consist of}
  69. NrOfMods: Word;
  70. {the type of the content of the register: unknown, memory, constant}
  71. Typ: Byte;
  72. case byte of
  73. {starts at 0, gets increased everytime the register is written to}
  74. 1: (WState: Byte;
  75. {starts at 0, gets increased everytime the register is read from}
  76. RState: Byte);
  77. { to compare both states in one operation }
  78. 2: (state: word);
  79. end;
  80. {Contents of the integer registers}
  81. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  82. {contents of the FPU registers}
  83. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  84. {$ifdef tempOpts}
  85. { linked list which allows searching/deleting based on value, no extra frills}
  86. PSearchLinkedListItem = ^TSearchLinkedListItem;
  87. TSearchLinkedListItem = object(TLinkedList_Item)
  88. constructor init;
  89. function equals(p: PSearchLinkedListItem): boolean; virtual;
  90. end;
  91. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  92. TSearchDoubleIntItem = object(TLinkedList_Item)
  93. constructor init(_int1,_int2: longint);
  94. function equals(p: PSearchLinkedListItem): boolean; virtual;
  95. private
  96. int1, int2: longint;
  97. end;
  98. PSearchLinkedList = ^TSearchLinkedList;
  99. TSearchLinkedList = object(TLinkedList)
  100. function searchByValue(p: PSearchLinkedListItem): boolean;
  101. procedure removeByValue(p: PSearchLinkedListItem);
  102. end;
  103. {$endif tempOpts}
  104. {information record with the contents of every register. Every tai object
  105. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  106. TtaiProp = Record
  107. Regs: TRegContent;
  108. { FPURegs: TRegFPUContent;} {currently not yet used}
  109. { allocated Registers }
  110. UsedRegs: TRegSet;
  111. { status of the direction flag }
  112. DirFlag: TFlagContents;
  113. {$ifdef tempOpts}
  114. { currently used temps }
  115. tempAllocs: PSearchLinkedList;
  116. {$endif tempOpts}
  117. { can this instruction be removed? }
  118. CanBeRemoved: Boolean;
  119. { are the resultflags set by this instruction used? }
  120. FlagsUsed: Boolean;
  121. end;
  122. ptaiprop = ^TtaiProp;
  123. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  124. PtaiPropBlock = ^TtaiPropBlock;
  125. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  126. TLabelTableItem = Record
  127. taiObj: tai;
  128. {$ifDef JumpAnal}
  129. InstrNr: Longint;
  130. RefsFound: Word;
  131. JmpsProcessed: Word
  132. {$endif JumpAnal}
  133. end;
  134. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  135. PLabelTable = ^TLabelTable;
  136. {*********************** procedures and functions ************************}
  137. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  138. function RefsEqual(const R1, R2: TReference): Boolean;
  139. function isgp32reg(supreg: tsuperregister): Boolean;
  140. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  141. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  142. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function reginop(supreg: tsuperregister; const o:toper): boolean;
  145. function instrWritesFlags(p: tai): boolean;
  146. function instrReadsFlags(p: tai): boolean;
  147. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  148. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  149. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  150. const c: tcontent): boolean;
  151. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  152. const c: tcontent; var memwritedestroyed: boolean): boolean;
  153. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  154. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  155. procedure SkipHead(var p: tai);
  156. function labelCanBeSkipped(p: tai_label): boolean;
  157. procedure RemoveLastDeallocForFuncRes(asmL: TAAsmOutput; p: tai);
  158. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  159. hp: tai): boolean;
  160. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  161. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  162. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  163. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  164. function sizescompatible(loadsize,newsize: topsize): boolean;
  165. function OpsEqual(const o1,o2:toper): Boolean;
  166. type
  167. tdfaobj = class
  168. constructor create(_list: taasmoutput); virtual;
  169. function pass_1(_blockstart: tai): tai;
  170. function pass_2: boolean;
  171. procedure clear;
  172. function getlabelwithsym(sym: tasmlabel): tai;
  173. private
  174. { Walks through the list to find the lowest and highest label number, inits the }
  175. { labeltable and fixes/optimizes some regallocs }
  176. procedure initlabeltable;
  177. function initdfapass2: boolean;
  178. procedure dodfapass2;
  179. { asm list we're working on }
  180. list: taasmoutput;
  181. { current part of the asm list }
  182. blockstart, blockend: tai;
  183. { the amount of taiObjects in the current part of the assembler list }
  184. nroftaiobjs: longint;
  185. { Array which holds all TtaiProps }
  186. taipropblock: ptaipropblock;
  187. { all labels in the current block: their value mapped to their location }
  188. lolab, hilab, labdif: longint;
  189. labeltable: plabeltable;
  190. end;
  191. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  192. procedure incState(var S: Byte; amount: longint);
  193. {******************************* Variables *******************************}
  194. var
  195. dfa: tdfaobj;
  196. {*********************** end of Interface section ************************}
  197. Implementation
  198. Uses
  199. {$ifdef csdebug}
  200. cutils,
  201. {$else}
  202. {$ifdef statedebug}
  203. cutils,
  204. {$else}
  205. {$ifdef allocregdebug}
  206. cutils,
  207. {$endif}
  208. {$endif}
  209. {$endif}
  210. globals, systems, verbose, symconst, cgobj,procinfo;
  211. Type
  212. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  213. var
  214. {How many instructions are between the current instruction and the last one
  215. that modified the register}
  216. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  217. {$ifdef tempOpts}
  218. constructor TSearchLinkedListItem.init;
  219. begin
  220. end;
  221. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  222. begin
  223. equals := false;
  224. end;
  225. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  226. begin
  227. int1 := _int1;
  228. int2 := _int2;
  229. end;
  230. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  231. begin
  232. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  233. (TSearchDoubleIntItem(p).int2 = int2);
  234. end;
  235. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  236. var temp: PSearchLinkedListItem;
  237. begin
  238. temp := first;
  239. while (temp <> last.next) and
  240. not(temp.equals(p)) do
  241. temp := temp.next;
  242. searchByValue := temp <> last.next;
  243. end;
  244. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  245. begin
  246. temp := first;
  247. while (temp <> last.next) and
  248. not(temp.equals(p)) do
  249. temp := temp.next;
  250. if temp <> last.next then
  251. begin
  252. remove(temp);
  253. dispose(temp,done);
  254. end;
  255. end;
  256. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  257. {updates UsedRegs with the RegAlloc Information coming after p}
  258. begin
  259. repeat
  260. while assigned(p) and
  261. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  262. ((p.typ = ait_label) and
  263. labelCanBeSkipped(tai_label(current)))) Do
  264. p := tai(p.next);
  265. while assigned(p) and
  266. (p.typ=ait_RegAlloc) Do
  267. begin
  268. case tai_regalloc(p).ratype of
  269. ra_alloc :
  270. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  271. ra_dealloc :
  272. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  273. end;
  274. p := tai(p.next);
  275. end;
  276. until not(assigned(p)) or
  277. (not(p.typ in SkipInstr) and
  278. not((p.typ = ait_label) and
  279. labelCanBeSkipped(tai_label(current))));
  280. end;
  281. {$endif tempOpts}
  282. {************************ Create the Label table ************************}
  283. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  284. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  285. { starting with Starttai and ending with the next "real" instruction }
  286. begin
  287. findregalloc := false;
  288. repeat
  289. while assigned(starttai) and
  290. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  291. ((starttai.typ = ait_label) and
  292. labelcanbeskipped(tai_label(starttai)))) do
  293. starttai := tai(starttai.next);
  294. if assigned(starttai) and
  295. (starttai.typ = ait_regalloc) then
  296. begin
  297. if (tai_regalloc(Starttai).ratype = ratyp) and
  298. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  299. begin
  300. findregalloc:=true;
  301. break;
  302. end;
  303. starttai := tai(starttai.next);
  304. end
  305. else
  306. break;
  307. until false;
  308. end;
  309. procedure RemoveLastDeallocForFuncRes(asml: taasmoutput; p: tai);
  310. procedure DoRemoveLastDeallocForFuncRes(asml: taasmoutput; supreg: tsuperregister);
  311. var
  312. hp2: tai;
  313. begin
  314. hp2 := p;
  315. repeat
  316. hp2 := tai(hp2.previous);
  317. if assigned(hp2) and
  318. (hp2.typ = ait_regalloc) and
  319. (tai_regalloc(hp2).ratype=ra_dealloc) and
  320. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  321. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  322. begin
  323. asml.remove(hp2);
  324. hp2.free;
  325. break;
  326. end;
  327. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  328. end;
  329. begin
  330. case current_procinfo.procdef.rettype.def.deftype of
  331. arraydef,recorddef,pointerdef,
  332. stringdef,enumdef,procdef,objectdef,errordef,
  333. filedef,setdef,procvardef,
  334. classrefdef,forwarddef:
  335. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  336. orddef:
  337. if current_procinfo.procdef.rettype.def.size <> 0 then
  338. begin
  339. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  340. { for int64/qword }
  341. if current_procinfo.procdef.rettype.def.size = 8 then
  342. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  343. end;
  344. end;
  345. end;
  346. procedure getNoDeallocRegs(var regs: tregset);
  347. var
  348. regCounter: TSuperRegister;
  349. begin
  350. regs := [];
  351. case current_procinfo.procdef.rettype.def.deftype of
  352. arraydef,recorddef,pointerdef,
  353. stringdef,enumdef,procdef,objectdef,errordef,
  354. filedef,setdef,procvardef,
  355. classrefdef,forwarddef:
  356. regs := [RS_EAX];
  357. orddef:
  358. if current_procinfo.procdef.rettype.def.size <> 0 then
  359. begin
  360. regs := [RS_EAX];
  361. { for int64/qword }
  362. if current_procinfo.procdef.rettype.def.size = 8 then
  363. regs := regs + [RS_EDX];
  364. end;
  365. end;
  366. for regCounter := RS_EAX to RS_EBX do
  367. { if not(regCounter in rg.usableregsint) then}
  368. include(regs,regcounter);
  369. end;
  370. procedure AddRegDeallocFor(asml: taasmoutput; reg: tregister; p: tai);
  371. var
  372. hp1: tai;
  373. funcResRegs: tregset;
  374. funcResReg: boolean;
  375. begin
  376. { if not(supreg in rg.usableregsint) then
  377. exit;}
  378. { if not(supreg in [RS_EDI]) then
  379. exit;}
  380. getNoDeallocRegs(funcresregs);
  381. { funcResRegs := funcResRegs - rg.usableregsint;}
  382. { funcResRegs := funcResRegs - [RS_EDI];}
  383. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  384. funcResReg := getsupreg(reg) in funcresregs;
  385. hp1 := p;
  386. {
  387. while not(funcResReg and
  388. (p.typ = ait_instruction) and
  389. (taicpu(p).opcode = A_JMP) and
  390. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  391. getLastInstruction(p, p) and
  392. not(regInInstruction(supreg, p)) do
  393. hp1 := p;
  394. }
  395. { don't insert a dealloc for registers which contain the function result }
  396. { if they are followed by a jump to the exit label (for exit(...)) }
  397. { if not(funcResReg) or
  398. not((hp1.typ = ait_instruction) and
  399. (taicpu(hp1).opcode = A_JMP) and
  400. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  401. begin
  402. p := tai_regalloc.deAlloc(reg,nil);
  403. insertLLItem(AsmL, hp1.previous, hp1, p);
  404. end;
  405. end;
  406. {************************ Search the Label table ************************}
  407. function findlabel(l: tasmlabel; var hp: tai): boolean;
  408. {searches for the specified label starting from hp as long as the
  409. encountered instructions are labels, to be able to optimize constructs like
  410. jne l2 jmp l2
  411. jmp l3 and l1:
  412. l1: l2:
  413. l2:}
  414. var
  415. p: tai;
  416. begin
  417. p := hp;
  418. while assigned(p) and
  419. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  420. if (p.typ <> ait_Label) or
  421. (tai_label(p).l <> l) then
  422. GetNextInstruction(p, p)
  423. else
  424. begin
  425. hp := p;
  426. findlabel := true;
  427. exit
  428. end;
  429. findlabel := false;
  430. end;
  431. {************************ Some general functions ************************}
  432. function tch2reg(ch: tinschange): tsuperregister;
  433. {converts a TChange variable to a TRegister}
  434. const
  435. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  436. begin
  437. if (ch <= CH_REDI) then
  438. tch2reg := ch2reg[ch]
  439. else if (ch <= CH_WEDI) then
  440. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  441. else if (ch <= CH_RWEDI) then
  442. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  443. else if (ch <= CH_MEDI) then
  444. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  445. else
  446. InternalError($db)
  447. end;
  448. { inserts new_one between prev and foll }
  449. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  450. begin
  451. if assigned(prev) then
  452. if assigned(foll) then
  453. begin
  454. if assigned(new_one) then
  455. begin
  456. new_one.previous := prev;
  457. new_one.next := foll;
  458. prev.next := new_one;
  459. foll.previous := new_one;
  460. { shgould we update line information }
  461. if (not (tai(new_one).typ in SkipLineInfo)) and
  462. (not (tai(foll).typ in SkipLineInfo)) then
  463. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  464. end;
  465. end
  466. else
  467. asml.Concat(new_one)
  468. else
  469. if assigned(foll) then
  470. asml.Insert(new_one)
  471. end;
  472. {********************* Compare parts of tai objects *********************}
  473. function regssamesize(reg1, reg2: tregister): boolean;
  474. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  475. 8bit, 16bit or 32bit)}
  476. begin
  477. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  478. internalerror(2003111602);
  479. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  480. end;
  481. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  482. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  483. OldReg and NewReg have the same size (has to be chcked in advance with
  484. RegsSameSize) and that neither equals RS_INVALID}
  485. var
  486. newsupreg, oldsupreg: tsuperregister;
  487. begin
  488. if (newreg = NR_NO) or (oldreg = NR_NO) then
  489. internalerror(2003111601);
  490. newsupreg := getsupreg(newreg);
  491. oldsupreg := getsupreg(oldreg);
  492. with RegInfo Do
  493. begin
  494. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  495. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  496. New2OldReg[newsupreg] := oldsupreg;
  497. end;
  498. end;
  499. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  500. begin
  501. case o.typ Of
  502. top_reg:
  503. if (o.reg <> NR_NO) then
  504. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  505. top_ref:
  506. begin
  507. if o.ref^.base <> NR_NO then
  508. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  509. if o.ref^.index <> NR_NO then
  510. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  511. end;
  512. end;
  513. end;
  514. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  515. begin
  516. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  517. if RegsSameSize(oldreg, newreg) then
  518. with reginfo do
  519. {here we always check for the 32 bit component, because it is possible that
  520. the 8 bit component has not been set, event though NewReg already has been
  521. processed. This happens if it has been compared with a register that doesn't
  522. have an 8 bit component (such as EDI). in that case the 8 bit component is
  523. still set to RS_NO and the comparison in the else-part will fail}
  524. if (getsupreg(oldReg) in OldRegsEncountered) then
  525. if (getsupreg(NewReg) in NewRegsEncountered) then
  526. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  527. { if we haven't encountered the new register yet, but we have encountered the
  528. old one already, the new one can only be correct if it's being written to
  529. (and consequently the old one is also being written to), otherwise
  530. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  531. movl (%eax), %eax movl (%edx), %edx
  532. are considered equivalent}
  533. else
  534. if (opact = opact_write) then
  535. begin
  536. AddReg2RegInfo(oldreg, newreg, reginfo);
  537. RegsEquivalent := true
  538. end
  539. else
  540. Regsequivalent := false
  541. else
  542. if not(getsupreg(newreg) in NewRegsEncountered) and
  543. ((opact = opact_write) or
  544. ((newreg = oldreg) and
  545. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  546. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  547. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  548. begin
  549. AddReg2RegInfo(oldreg, newreg, reginfo);
  550. RegsEquivalent := true
  551. end
  552. else
  553. RegsEquivalent := false
  554. else
  555. RegsEquivalent := false
  556. else
  557. RegsEquivalent := oldreg = newreg
  558. end;
  559. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  560. begin
  561. RefsEquivalent :=
  562. (r1.offset = r2.offset) and
  563. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  564. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  565. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  566. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  567. (r1.relsymbol = r2.relsymbol);
  568. end;
  569. function refsequal(const r1, r2: treference): boolean;
  570. begin
  571. refsequal :=
  572. (r1.offset = r2.offset) and
  573. (r1.segment = r2.segment) and (r1.base = r2.base) and
  574. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  575. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  576. (r1.relsymbol = r2.relsymbol);
  577. end;
  578. {$ifdef q+}
  579. {$q-}
  580. {$define overflowon}
  581. {$endif q+}
  582. // checks whether a write to r2 of size "size" contains address r1
  583. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  584. var
  585. realsize1, realsize2: aint;
  586. begin
  587. realsize1 := tcgsize2size[size1];
  588. realsize2 := tcgsize2size[size2];
  589. refsoverlapping :=
  590. (r2.offset <= r1.offset+realsize1) and
  591. (r1.offset <= r2.offset+realsize2) and
  592. (r1.segment = r2.segment) and (r1.base = r2.base) and
  593. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  594. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  595. (r1.relsymbol = r2.relsymbol);
  596. end;
  597. {$ifdef overflowon}
  598. {$q+}
  599. {$undef overflowon}
  600. {$endif overflowon}
  601. function isgp32reg(supreg: tsuperregister): boolean;
  602. {Checks if the register is a 32 bit general purpose register}
  603. begin
  604. isgp32reg := false;
  605. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  606. isgp32reg := true
  607. end;
  608. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  609. begin {checks whether ref contains a reference to reg}
  610. reginref :=
  611. ((ref.base <> NR_NO) and
  612. (getsupreg(ref.base) = supreg)) or
  613. ((ref.index <> NR_NO) and
  614. (getsupreg(ref.index) = supreg))
  615. end;
  616. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  617. var
  618. p: taicpu;
  619. opcount: longint;
  620. begin
  621. RegReadByInstruction := false;
  622. if hp.typ <> ait_instruction then
  623. exit;
  624. p := taicpu(hp);
  625. case p.opcode of
  626. A_CALL:
  627. regreadbyinstruction := true;
  628. A_IMUL:
  629. case p.ops of
  630. 1:
  631. regReadByInstruction :=
  632. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  633. 2,3:
  634. regReadByInstruction :=
  635. reginop(supreg,p.oper[0]^) or
  636. reginop(supreg,p.oper[1]^);
  637. end;
  638. A_IDIV,A_DIV,A_MUL:
  639. begin
  640. regReadByInstruction :=
  641. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  642. end;
  643. else
  644. begin
  645. for opcount := 0 to p.ops-1 do
  646. if (p.oper[opCount]^.typ = top_ref) and
  647. reginref(supreg,p.oper[opcount]^.ref^) then
  648. begin
  649. RegReadByInstruction := true;
  650. exit
  651. end;
  652. for opcount := 1 to maxinschanges do
  653. case insprop[p.opcode].ch[opcount] of
  654. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  655. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  656. begin
  657. RegReadByInstruction := true;
  658. exit
  659. end;
  660. CH_RWOP1,CH_ROP1,CH_MOP1:
  661. if //(p.oper[0]^.typ = top_reg) and
  662. reginop(supreg,p.oper[0]^) then
  663. begin
  664. RegReadByInstruction := true;
  665. exit
  666. end;
  667. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  668. if //(p.oper[1]^.typ = top_reg) and
  669. reginop(supreg,p.oper[1]^) then
  670. begin
  671. RegReadByInstruction := true;
  672. exit
  673. end;
  674. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  675. if //(p.oper[2]^.typ = top_reg) and
  676. reginop(supreg,p.oper[2]^) then
  677. begin
  678. RegReadByInstruction := true;
  679. exit
  680. end;
  681. end;
  682. end;
  683. end;
  684. end;
  685. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  686. { Checks if reg is used by the instruction p1 }
  687. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  688. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  689. var
  690. p: taicpu;
  691. opcount: longint;
  692. begin
  693. regInInstruction := false;
  694. if p1.typ <> ait_instruction then
  695. exit;
  696. p := taicpu(p1);
  697. case p.opcode of
  698. A_CALL:
  699. regininstruction := true;
  700. A_IMUL:
  701. case p.ops of
  702. 1:
  703. regInInstruction :=
  704. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  705. 2,3:
  706. regInInstruction :=
  707. reginop(supreg,p.oper[0]^) or
  708. reginop(supreg,p.oper[1]^) or
  709. (assigned(p.oper[2]) and
  710. reginop(supreg,p.oper[2]^));
  711. end;
  712. A_IDIV,A_DIV,A_MUL:
  713. regInInstruction :=
  714. reginop(supreg,p.oper[0]^) or
  715. (supreg in [RS_EAX,RS_EDX])
  716. else
  717. begin
  718. for opcount := 1 to maxinschanges do
  719. case insprop[p.opcode].Ch[opCount] of
  720. CH_REAX..CH_MEDI:
  721. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  722. begin
  723. regInInstruction := true;
  724. exit;
  725. end;
  726. CH_ROp1..CH_MOp1:
  727. if reginop(supreg,p.oper[0]^) then
  728. begin
  729. regInInstruction := true;
  730. exit
  731. end;
  732. Ch_ROp2..Ch_MOp2:
  733. if reginop(supreg,p.oper[1]^) then
  734. begin
  735. regInInstruction := true;
  736. exit
  737. end;
  738. Ch_ROp3..Ch_MOp3:
  739. if reginop(supreg,p.oper[2]^) then
  740. begin
  741. regInInstruction := true;
  742. exit
  743. end;
  744. end;
  745. end;
  746. end;
  747. end;
  748. function reginop(supreg: tsuperregister; const o:toper): boolean;
  749. begin
  750. reginop := false;
  751. case o.typ Of
  752. top_reg:
  753. reginop :=
  754. (getregtype(o.reg) = R_INTREGISTER) and
  755. (supreg = getsupreg(o.reg));
  756. top_ref:
  757. reginop :=
  758. ((o.ref^.base <> NR_NO) and
  759. (supreg = getsupreg(o.ref^.base))) or
  760. ((o.ref^.index <> NR_NO) and
  761. (supreg = getsupreg(o.ref^.index)));
  762. end;
  763. end;
  764. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  765. var
  766. InstrProp: TInsProp;
  767. TmpResult: Boolean;
  768. Cnt: Word;
  769. begin
  770. TmpResult := False;
  771. if supreg = RS_INVALID then
  772. exit;
  773. if (p1.typ = ait_instruction) then
  774. case taicpu(p1).opcode of
  775. A_IMUL:
  776. With taicpu(p1) Do
  777. TmpResult :=
  778. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  779. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  780. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  781. A_DIV, A_IDIV, A_MUL:
  782. With taicpu(p1) Do
  783. TmpResult :=
  784. (supreg in [RS_EAX,RS_EDX]);
  785. else
  786. begin
  787. Cnt := 1;
  788. InstrProp := InsProp[taicpu(p1).OpCode];
  789. while (Cnt <= maxinschanges) and
  790. (InstrProp.Ch[Cnt] <> Ch_None) and
  791. not(TmpResult) Do
  792. begin
  793. case InstrProp.Ch[Cnt] Of
  794. Ch_WEAX..Ch_MEDI:
  795. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  796. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  797. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  798. reginop(supreg,taicpu(p1).oper[0]^);
  799. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  800. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  801. reginop(supreg,taicpu(p1).oper[1]^);
  802. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  803. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  804. reginop(supreg,taicpu(p1).oper[2]^);
  805. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  806. Ch_ALL: TmpResult := true;
  807. end;
  808. inc(Cnt)
  809. end
  810. end
  811. end;
  812. RegModifiedByInstruction := TmpResult
  813. end;
  814. function instrWritesFlags(p: tai): boolean;
  815. var
  816. l: longint;
  817. begin
  818. instrWritesFlags := true;
  819. case p.typ of
  820. ait_instruction:
  821. begin
  822. for l := 1 to maxinschanges do
  823. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  824. exit;
  825. end;
  826. ait_label:
  827. exit;
  828. end;
  829. instrWritesFlags := false;
  830. end;
  831. function instrReadsFlags(p: tai): boolean;
  832. var
  833. l: longint;
  834. begin
  835. instrReadsFlags := true;
  836. case p.typ of
  837. ait_instruction:
  838. begin
  839. for l := 1 to maxinschanges do
  840. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  841. exit;
  842. end;
  843. ait_label:
  844. exit;
  845. end;
  846. instrReadsFlags := false;
  847. end;
  848. {********************* GetNext and GetLastInstruction *********************}
  849. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  850. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  851. { next tai object in Next. Returns false if there isn't any }
  852. begin
  853. repeat
  854. if (Current.typ = ait_marker) and
  855. (tai_Marker(current).Kind = AsmBlockStart) then
  856. begin
  857. GetNextInstruction := False;
  858. Next := Nil;
  859. Exit
  860. end;
  861. Current := tai(current.Next);
  862. while assigned(Current) and
  863. ((current.typ in skipInstr) or
  864. ((current.typ = ait_label) and
  865. labelCanBeSkipped(tai_label(current)))) do
  866. Current := tai(current.Next);
  867. { if assigned(Current) and
  868. (current.typ = ait_Marker) and
  869. (tai_Marker(current).Kind = NoPropInfoStart) then
  870. begin
  871. while assigned(Current) and
  872. ((current.typ <> ait_Marker) or
  873. (tai_Marker(current).Kind <> NoPropInfoend)) Do
  874. Current := tai(current.Next);
  875. end;}
  876. until not(assigned(Current)) or
  877. (current.typ <> ait_Marker) or
  878. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  879. Next := Current;
  880. if assigned(Current) and
  881. not((current.typ in SkipInstr) or
  882. ((current.typ = ait_label) and
  883. labelCanBeSkipped(tai_label(current))))
  884. then
  885. GetNextInstruction :=
  886. not((current.typ = ait_marker) and
  887. (tai_marker(current).kind = asmBlockStart))
  888. else
  889. begin
  890. GetNextInstruction := False;
  891. Next := nil;
  892. end;
  893. end;
  894. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  895. {skips the ait-types in SkipInstr puts the previous tai object in
  896. Last. Returns false if there isn't any}
  897. begin
  898. repeat
  899. Current := tai(current.previous);
  900. while assigned(Current) and
  901. (((current.typ = ait_Marker) and
  902. not(tai_Marker(current).Kind in [AsmBlockend{,NoPropInfoend}])) or
  903. (current.typ in SkipInstr) or
  904. ((current.typ = ait_label) and
  905. labelCanBeSkipped(tai_label(current)))) Do
  906. Current := tai(current.previous);
  907. { if assigned(Current) and
  908. (current.typ = ait_Marker) and
  909. (tai_Marker(current).Kind = NoPropInfoend) then
  910. begin
  911. while assigned(Current) and
  912. ((current.typ <> ait_Marker) or
  913. (tai_Marker(current).Kind <> NoPropInfoStart)) Do
  914. Current := tai(current.previous);
  915. end;}
  916. until not(assigned(Current)) or
  917. (current.typ <> ait_Marker) or
  918. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  919. if not(assigned(Current)) or
  920. (current.typ in SkipInstr) or
  921. ((current.typ = ait_label) and
  922. labelCanBeSkipped(tai_label(current))) or
  923. ((current.typ = ait_Marker) and
  924. (tai_Marker(current).Kind = AsmBlockend))
  925. then
  926. begin
  927. Last := nil;
  928. GetLastInstruction := False
  929. end
  930. else
  931. begin
  932. Last := Current;
  933. GetLastInstruction := True;
  934. end;
  935. end;
  936. procedure SkipHead(var p: tai);
  937. var
  938. oldp: tai;
  939. begin
  940. repeat
  941. oldp := p;
  942. if (p.typ in SkipInstr) or
  943. ((p.typ = ait_marker) and
  944. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend])) then
  945. GetNextInstruction(p,p)
  946. else if ((p.Typ = Ait_Marker) and
  947. (tai_Marker(p).Kind = nopropinfostart)) then
  948. {a marker of the NoPropInfoStart can't be the first instruction of a
  949. TAAsmoutput list}
  950. GetNextInstruction(tai(p.previous),p);
  951. until p = oldp
  952. end;
  953. function labelCanBeSkipped(p: tai_label): boolean;
  954. begin
  955. labelCanBeSkipped := not(p.l.is_used) or (p.l.labeltype<>alt_jump);
  956. end;
  957. {******************* The Data Flow Analyzer functions ********************}
  958. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  959. hp: tai): boolean;
  960. { assumes reg is a 32bit register }
  961. var
  962. p: taicpu;
  963. begin
  964. if not assigned(hp) or
  965. (hp.typ <> ait_instruction) then
  966. begin
  967. regLoadedWithNewValue := false;
  968. exit;
  969. end;
  970. p := taicpu(hp);
  971. regLoadedWithNewValue :=
  972. (((p.opcode = A_MOV) or
  973. (p.opcode = A_MOVZX) or
  974. (p.opcode = A_MOVSX) or
  975. (p.opcode = A_LEA)) and
  976. (p.oper[1]^.typ = top_reg) and
  977. (getsupreg(p.oper[1]^.reg) = supreg) and
  978. (canDependOnPrevValue or
  979. (p.oper[0]^.typ <> top_ref) or
  980. not regInRef(supreg,p.oper[0]^.ref^)) or
  981. ((p.opcode = A_POP) and
  982. (getsupreg(p.oper[0]^.reg) = supreg)));
  983. end;
  984. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  985. {updates UsedRegs with the RegAlloc Information coming after p}
  986. begin
  987. repeat
  988. while assigned(p) and
  989. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  990. ((p.typ = ait_label) and
  991. labelCanBeSkipped(tai_label(p))) or
  992. ((p.typ = ait_marker) and
  993. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend]))) do
  994. p := tai(p.next);
  995. while assigned(p) and
  996. (p.typ=ait_RegAlloc) Do
  997. begin
  998. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  999. begin
  1000. case tai_regalloc(p).ratype of
  1001. ra_alloc :
  1002. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1003. ra_dealloc :
  1004. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1005. end;
  1006. end;
  1007. p := tai(p.next);
  1008. end;
  1009. until not(assigned(p)) or
  1010. (not(p.typ in SkipInstr) and
  1011. not((p.typ = ait_label) and
  1012. labelCanBeSkipped(tai_label(p))));
  1013. end;
  1014. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1015. { allocates register reg between (and including) instructions p1 and p2 }
  1016. { the type of p1 and p2 must not be in SkipInstr }
  1017. { note that this routine is both called from the peephole optimizer }
  1018. { where optinfo is not yet initialised) and from the cse (where it is) }
  1019. var
  1020. hp: tai;
  1021. lastRemovedWasDealloc: boolean;
  1022. supreg: tsuperregister;
  1023. begin
  1024. {$ifdef EXTDEBUG}
  1025. if assigned(p1.optinfo) and
  1026. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1027. internalerror(2004101010);
  1028. {$endif EXTDEBUG}
  1029. supreg := getsupreg(reg);
  1030. { if not(supreg in rg.usableregsint+[RS_EDI,RS_ESI]) or
  1031. not(assigned(p1)) then}
  1032. if not(supreg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_EDI,RS_ESI]) or
  1033. not(assigned(p1)) then
  1034. { this happens with registers which are loaded implicitely, outside the }
  1035. { current block (e.g. esi with self) }
  1036. exit;
  1037. { make sure we allocate it for this instruction }
  1038. getnextinstruction(p2,p2);
  1039. lastRemovedWasDealloc := false;
  1040. {$ifdef allocregdebug}
  1041. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1042. ' from here...'));
  1043. insertllitem(asml,p1.previous,p1,hp);
  1044. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1045. ' till here...'));
  1046. insertllitem(asml,p2,p1.next,hp);
  1047. {$endif allocregdebug}
  1048. if not(supreg in initialusedregs) then
  1049. begin
  1050. hp := tai_regalloc.alloc(reg,nil);
  1051. insertllItem(asmL,p1.previous,p1,hp);
  1052. end;
  1053. while assigned(p1) and
  1054. (p1 <> p2) do
  1055. begin
  1056. if assigned(p1.optinfo) then
  1057. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1058. p1 := tai(p1.next);
  1059. repeat
  1060. while assigned(p1) and
  1061. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1062. p1 := tai(p1.next);
  1063. { remove all allocation/deallocation info about the register in between }
  1064. if assigned(p1) and
  1065. (p1.typ = ait_regalloc) then
  1066. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1067. begin
  1068. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1069. hp := tai(p1.Next);
  1070. asml.Remove(p1);
  1071. p1.free;
  1072. p1 := hp;
  1073. end
  1074. else p1 := tai(p1.next);
  1075. until not(assigned(p1)) or
  1076. not(p1.typ in SkipInstr);
  1077. end;
  1078. if assigned(p1) then
  1079. begin
  1080. if lastRemovedWasDealloc then
  1081. begin
  1082. hp := tai_regalloc.DeAlloc(reg,nil);
  1083. insertLLItem(asmL,p1.previous,p1,hp);
  1084. end;
  1085. end;
  1086. end;
  1087. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1088. var
  1089. hp: tai;
  1090. first: boolean;
  1091. begin
  1092. findregdealloc := false;
  1093. first := true;
  1094. while assigned(p.previous) and
  1095. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1096. ((tai(p.previous).typ = ait_label) and
  1097. labelCanBeSkipped(tai_label(p.previous)))) do
  1098. begin
  1099. p := tai(p.previous);
  1100. if (p.typ = ait_regalloc) and
  1101. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1102. if (tai_regalloc(p).ratype=ra_dealloc) then
  1103. if first then
  1104. begin
  1105. findregdealloc := true;
  1106. break;
  1107. end
  1108. else
  1109. begin
  1110. findRegDealloc :=
  1111. getNextInstruction(p,hp) and
  1112. regLoadedWithNewValue(supreg,false,hp);
  1113. break
  1114. end
  1115. else
  1116. first := false;
  1117. end
  1118. end;
  1119. procedure incState(var S: Byte; amount: longint);
  1120. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1121. errors}
  1122. begin
  1123. if (s <= $ff - amount) then
  1124. inc(s, amount)
  1125. else s := longint(s) + amount - $ff;
  1126. end;
  1127. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1128. { Content is the sequence of instructions that describes the contents of }
  1129. { seqReg. reg is being overwritten by the current instruction. if the }
  1130. { content of seqReg depends on reg (ie. because of a }
  1131. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1132. var
  1133. p: tai;
  1134. Counter: Word;
  1135. TmpResult: Boolean;
  1136. RegsChecked: TRegSet;
  1137. begin
  1138. RegsChecked := [];
  1139. p := Content.StartMod;
  1140. TmpResult := False;
  1141. Counter := 1;
  1142. while not(TmpResult) and
  1143. (Counter <= Content.NrOfMods) Do
  1144. begin
  1145. if (p.typ = ait_instruction) and
  1146. ((taicpu(p).opcode = A_MOV) or
  1147. (taicpu(p).opcode = A_MOVZX) or
  1148. (taicpu(p).opcode = A_MOVSX) or
  1149. (taicpu(p).opcode = A_LEA)) and
  1150. (taicpu(p).oper[0]^.typ = top_ref) then
  1151. With taicpu(p).oper[0]^.ref^ Do
  1152. if ((base = current_procinfo.FramePointer) or
  1153. (assigned(symbol) and (base = NR_NO))) and
  1154. (index = NR_NO) then
  1155. begin
  1156. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1157. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1158. break;
  1159. end
  1160. else
  1161. tmpResult :=
  1162. regReadByInstruction(supreg,p) and
  1163. regModifiedByInstruction(seqReg,p)
  1164. else
  1165. tmpResult :=
  1166. regReadByInstruction(supreg,p) and
  1167. regModifiedByInstruction(seqReg,p);
  1168. inc(Counter);
  1169. GetNextInstruction(p,p)
  1170. end;
  1171. sequenceDependsonReg := TmpResult
  1172. end;
  1173. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1174. var
  1175. counter: tsuperregister;
  1176. begin
  1177. for counter := RS_EAX to RS_EDI do
  1178. if counter <> supreg then
  1179. with p1^.regs[counter] Do
  1180. begin
  1181. if (typ in [con_ref,con_noRemoveRef]) and
  1182. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1183. if typ in [con_ref, con_invalid] then
  1184. typ := con_invalid
  1185. { con_noRemoveRef = con_unknown }
  1186. else
  1187. typ := con_unknown;
  1188. if assigned(memwrite) and
  1189. regInRef(counter,memwrite.oper[1]^.ref^) then
  1190. memwrite := nil;
  1191. end;
  1192. end;
  1193. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1194. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1195. contents of registers are loaded with a memory location based on reg.
  1196. doincState is false when this register has to be destroyed not because
  1197. it's contents are directly modified/overwritten, but because of an indirect
  1198. action (e.g. this register holds the contents of a variable and the value
  1199. of the variable in memory is changed) }
  1200. begin
  1201. { the following happens for fpu registers }
  1202. if (supreg < low(NrOfInstrSinceLastMod)) or
  1203. (supreg > high(NrOfInstrSinceLastMod)) then
  1204. exit;
  1205. NrOfInstrSinceLastMod[supreg] := 0;
  1206. with p1^.regs[supreg] do
  1207. begin
  1208. if doincState then
  1209. begin
  1210. incState(wstate,1);
  1211. typ := con_unknown;
  1212. startmod := nil;
  1213. end
  1214. else
  1215. if typ in [con_ref,con_const,con_invalid] then
  1216. typ := con_invalid
  1217. { con_noRemoveRef = con_unknown }
  1218. else
  1219. typ := con_unknown;
  1220. memwrite := nil;
  1221. end;
  1222. invalidateDependingRegs(p1,supreg);
  1223. end;
  1224. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1225. begin
  1226. if (p.typ = ait_instruction) then
  1227. begin
  1228. case taicpu(p).oper[0]^.typ Of
  1229. top_reg:
  1230. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1231. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1232. top_ref:
  1233. With TReference(taicpu(p).oper[0]^) Do
  1234. begin
  1235. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1236. then RegSet := RegSet + [base];
  1237. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1238. then RegSet := RegSet + [index];
  1239. end;
  1240. end;
  1241. case taicpu(p).oper[1]^.typ Of
  1242. top_reg:
  1243. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1244. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1245. top_ref:
  1246. With TReference(taicpu(p).oper[1]^) Do
  1247. begin
  1248. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1249. then RegSet := RegSet + [base];
  1250. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1251. then RegSet := RegSet + [index];
  1252. end;
  1253. end;
  1254. end;
  1255. end;}
  1256. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1257. begin {checks whether the two ops are equivalent}
  1258. OpsEquivalent := False;
  1259. if o1.typ=o2.typ then
  1260. case o1.typ Of
  1261. top_reg:
  1262. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1263. top_ref:
  1264. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1265. Top_Const:
  1266. OpsEquivalent := o1.val = o2.val;
  1267. Top_None:
  1268. OpsEquivalent := True
  1269. end;
  1270. end;
  1271. function OpsEqual(const o1,o2:toper): Boolean;
  1272. begin {checks whether the two ops are equal}
  1273. OpsEqual := False;
  1274. if o1.typ=o2.typ then
  1275. case o1.typ Of
  1276. top_reg :
  1277. OpsEqual:=o1.reg=o2.reg;
  1278. top_ref :
  1279. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1280. Top_Const :
  1281. OpsEqual:=o1.val=o2.val;
  1282. Top_None :
  1283. OpsEqual := True
  1284. end;
  1285. end;
  1286. function sizescompatible(loadsize,newsize: topsize): boolean;
  1287. begin
  1288. case loadsize of
  1289. S_B,S_BW,S_BL:
  1290. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1291. S_W,S_WL:
  1292. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1293. else
  1294. sizescompatible := newsize = S_L;
  1295. end;
  1296. end;
  1297. function opscompatible(p1,p2: taicpu): boolean;
  1298. begin
  1299. case p1.opcode of
  1300. A_MOVZX,A_MOVSX:
  1301. opscompatible :=
  1302. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1303. sizescompatible(p1.opsize,p2.opsize);
  1304. else
  1305. opscompatible :=
  1306. (p1.opcode = p2.opcode) and
  1307. (p1.ops = p2.ops) and
  1308. (p1.opsize = p2.opsize);
  1309. end;
  1310. end;
  1311. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1312. {$ifdef csdebug}
  1313. var
  1314. hp: tai;
  1315. {$endif csdebug}
  1316. begin {checks whether two taicpu instructions are equal}
  1317. if assigned(p1) and assigned(p2) and
  1318. (tai(p1).typ = ait_instruction) and
  1319. (tai(p2).typ = ait_instruction) and
  1320. opscompatible(taicpu(p1),taicpu(p2)) and
  1321. (not(assigned(taicpu(p1).oper[0])) or
  1322. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1323. (not(assigned(taicpu(p1).oper[1])) or
  1324. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1325. (not(assigned(taicpu(p1).oper[2])) or
  1326. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1327. {both instructions have the same structure:
  1328. "<operator> <operand of type1>, <operand of type 2>"}
  1329. if ((taicpu(p1).opcode = A_MOV) or
  1330. (taicpu(p1).opcode = A_MOVZX) or
  1331. (taicpu(p1).opcode = A_MOVSX) or
  1332. (taicpu(p1).opcode = A_LEA)) and
  1333. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1334. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1335. {the "old" instruction is a load of a register with a new value, not with
  1336. a value based on the contents of this register (so no "mov (reg), reg")}
  1337. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1338. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1339. {the "new" instruction is also a load of a register with a new value, and
  1340. this value is fetched from the same memory location}
  1341. begin
  1342. With taicpu(p2).oper[0]^.ref^ Do
  1343. begin
  1344. if (base <> NR_NO) and
  1345. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1346. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1347. if (index <> NR_NO) and
  1348. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1349. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1350. end;
  1351. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1352. from the reference are the same in the old and in the new instruction
  1353. sequence}
  1354. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1355. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1356. InstructionsEquivalent :=
  1357. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1358. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1359. end
  1360. {the registers are loaded with values from different memory locations. if
  1361. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1362. would be considered equivalent}
  1363. else
  1364. InstructionsEquivalent := False
  1365. else
  1366. {load register with a value based on the current value of this register}
  1367. begin
  1368. With taicpu(p2).oper[0]^.ref^ Do
  1369. begin
  1370. if (base <> NR_NO) and
  1371. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1372. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1373. {it won't do any harm if the register is already in RegsLoadedForRef}
  1374. begin
  1375. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1376. {$ifdef csdebug}
  1377. Writeln(std_regname(base), ' added');
  1378. {$endif csdebug}
  1379. end;
  1380. if (index <> NR_NO) and
  1381. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1382. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1383. begin
  1384. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1385. {$ifdef csdebug}
  1386. Writeln(std_regname(index), ' added');
  1387. {$endif csdebug}
  1388. end;
  1389. end;
  1390. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1391. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1392. begin
  1393. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1394. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1395. {$ifdef csdebug}
  1396. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1397. {$endif csdebug}
  1398. end;
  1399. InstructionsEquivalent :=
  1400. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1401. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1402. end
  1403. else
  1404. {an instruction <> mov, movzx, movsx}
  1405. begin
  1406. {$ifdef csdebug}
  1407. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1408. hp.previous := p2;
  1409. hp.next := p2.next;
  1410. p2.next.previous := hp;
  1411. p2.next := hp;
  1412. {$endif csdebug}
  1413. InstructionsEquivalent :=
  1414. (not(assigned(taicpu(p1).oper[0])) or
  1415. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1416. (not(assigned(taicpu(p1).oper[1])) or
  1417. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1418. (not(assigned(taicpu(p1).oper[2])) or
  1419. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1420. end
  1421. {the instructions haven't even got the same structure, so they're certainly
  1422. not equivalent}
  1423. else
  1424. begin
  1425. {$ifdef csdebug}
  1426. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1427. hp.previous := p2;
  1428. hp.next := p2.next;
  1429. p2.next.previous := hp;
  1430. p2.next := hp;
  1431. {$endif csdebug}
  1432. InstructionsEquivalent := False;
  1433. end;
  1434. {$ifdef csdebug}
  1435. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1436. hp.previous := p2;
  1437. hp.next := p2.next;
  1438. p2.next.previous := hp;
  1439. p2.next := hp;
  1440. {$endif csdebug}
  1441. end;
  1442. (*
  1443. function InstructionsEqual(p1, p2: tai): Boolean;
  1444. begin {checks whether two taicpu instructions are equal}
  1445. InstructionsEqual :=
  1446. assigned(p1) and assigned(p2) and
  1447. ((tai(p1).typ = ait_instruction) and
  1448. (tai(p1).typ = ait_instruction) and
  1449. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1450. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1451. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1452. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1453. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1454. end;
  1455. *)
  1456. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1457. begin
  1458. if supreg in [RS_EAX..RS_EDI] then
  1459. incState(p^.regs[supreg].rstate,1)
  1460. end;
  1461. procedure readref(p: ptaiprop; const ref: preference);
  1462. begin
  1463. if ref^.base <> NR_NO then
  1464. readreg(p, getsupreg(ref^.base));
  1465. if ref^.index <> NR_NO then
  1466. readreg(p, getsupreg(ref^.index));
  1467. end;
  1468. procedure ReadOp(p: ptaiprop;const o:toper);
  1469. begin
  1470. case o.typ Of
  1471. top_reg: readreg(p, getsupreg(o.reg));
  1472. top_ref: readref(p, o.ref);
  1473. end;
  1474. end;
  1475. function RefInInstruction(const ref: TReference; p: tai;
  1476. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1477. {checks whehter ref is used in p}
  1478. var
  1479. mysize: tcgsize;
  1480. TmpResult: Boolean;
  1481. begin
  1482. TmpResult := False;
  1483. if (p.typ = ait_instruction) then
  1484. begin
  1485. mysize := topsize2tcgsize[taicpu(p).opsize];
  1486. if (taicpu(p).ops >= 1) and
  1487. (taicpu(p).oper[0]^.typ = top_ref) then
  1488. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1489. if not(TmpResult) and
  1490. (taicpu(p).ops >= 2) and
  1491. (taicpu(p).oper[1]^.typ = top_ref) then
  1492. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1493. if not(TmpResult) and
  1494. (taicpu(p).ops >= 3) and
  1495. (taicpu(p).oper[2]^.typ = top_ref) then
  1496. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1497. end;
  1498. RefInInstruction := TmpResult;
  1499. end;
  1500. function RefInSequence(const ref: TReference; Content: TContent;
  1501. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1502. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1503. tai objects) to see whether ref is used somewhere}
  1504. var p: tai;
  1505. Counter: Word;
  1506. TmpResult: Boolean;
  1507. begin
  1508. p := Content.StartMod;
  1509. TmpResult := False;
  1510. Counter := 1;
  1511. while not(TmpResult) and
  1512. (Counter <= Content.NrOfMods) Do
  1513. begin
  1514. if (p.typ = ait_instruction) and
  1515. RefInInstruction(ref, p, RefsEq, size)
  1516. then TmpResult := True;
  1517. inc(Counter);
  1518. GetNextInstruction(p,p)
  1519. end;
  1520. RefInSequence := TmpResult
  1521. end;
  1522. {$ifdef q+}
  1523. {$q-}
  1524. {$define overflowon}
  1525. {$endif q+}
  1526. // checks whether a write to r2 of size "size" contains address r1
  1527. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1528. var
  1529. realsize1, realsize2: aint;
  1530. begin
  1531. realsize1 := tcgsize2size[size1];
  1532. realsize2 := tcgsize2size[size2];
  1533. arrayrefsoverlapping :=
  1534. (r2.offset <= r1.offset+realsize1) and
  1535. (r1.offset <= r2.offset+realsize2) and
  1536. (r1.segment = r2.segment) and
  1537. (r1.symbol=r2.symbol) and
  1538. (r1.base = r2.base)
  1539. end;
  1540. {$ifdef overflowon}
  1541. {$q+}
  1542. {$undef overflowon}
  1543. {$endif overflowon}
  1544. function isSimpleRef(const ref: treference): boolean;
  1545. { returns true if ref is reference to a local or global variable, to a }
  1546. { parameter or to an object field (this includes arrays). Returns false }
  1547. { otherwise. }
  1548. begin
  1549. isSimpleRef :=
  1550. assigned(ref.symbol) or
  1551. (ref.base = current_procinfo.framepointer);
  1552. end;
  1553. function containsPointerRef(p: tai): boolean;
  1554. { checks if an instruction contains a reference which is a pointer location }
  1555. var
  1556. hp: taicpu;
  1557. count: longint;
  1558. begin
  1559. containsPointerRef := false;
  1560. if p.typ <> ait_instruction then
  1561. exit;
  1562. hp := taicpu(p);
  1563. for count := 0 to hp.ops-1 do
  1564. begin
  1565. case hp.oper[count]^.typ of
  1566. top_ref:
  1567. if not isSimpleRef(hp.oper[count]^.ref^) then
  1568. begin
  1569. containsPointerRef := true;
  1570. exit;
  1571. end;
  1572. top_none:
  1573. exit;
  1574. end;
  1575. end;
  1576. end;
  1577. function containsPointerLoad(c: tcontent): boolean;
  1578. { checks whether the contents of a register contain a pointer reference }
  1579. var
  1580. p: tai;
  1581. count: longint;
  1582. begin
  1583. containsPointerLoad := false;
  1584. p := c.startmod;
  1585. for count := c.nrOfMods downto 1 do
  1586. begin
  1587. if containsPointerRef(p) then
  1588. begin
  1589. containsPointerLoad := true;
  1590. exit;
  1591. end;
  1592. getnextinstruction(p,p);
  1593. end;
  1594. end;
  1595. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1596. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1597. { returns whether the contents c of reg are invalid after regWritten is }
  1598. { is written to ref }
  1599. var
  1600. refsEq: trefCompare;
  1601. begin
  1602. if isSimpleRef(ref) then
  1603. begin
  1604. if (ref.index <> NR_NO) or
  1605. (assigned(ref.symbol) and
  1606. (ref.base <> NR_NO)) then
  1607. { local/global variable or parameter which is an array }
  1608. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1609. else
  1610. { local/global variable or parameter which is not an array }
  1611. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1612. invalsmemwrite :=
  1613. assigned(c.memwrite) and
  1614. ((not(cs_uncertainOpts in aktglobalswitches) and
  1615. containsPointerRef(c.memwrite)) or
  1616. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1617. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1618. begin
  1619. writeToMemDestroysContents := false;
  1620. exit;
  1621. end;
  1622. { write something to a parameter, a local or global variable, so }
  1623. { * with uncertain optimizations on: }
  1624. { - destroy the contents of registers whose contents have somewhere a }
  1625. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1626. { are being written to memory) is not destroyed if it's StartMod is }
  1627. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1628. { expression based on ref) }
  1629. { * with uncertain optimizations off: }
  1630. { - also destroy registers that contain any pointer }
  1631. with c do
  1632. writeToMemDestroysContents :=
  1633. (typ in [con_ref,con_noRemoveRef]) and
  1634. ((not(cs_uncertainOpts in aktglobalswitches) and
  1635. containsPointerLoad(c)
  1636. ) or
  1637. (refInSequence(ref,c,refsEq,size) and
  1638. ((supreg <> regWritten) or
  1639. not((nrOfMods = 1) and
  1640. {StarMod is always of the type ait_instruction}
  1641. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1642. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1643. )
  1644. )
  1645. )
  1646. );
  1647. end
  1648. else
  1649. { write something to a pointer location, so }
  1650. { * with uncertain optimzations on: }
  1651. { - do not destroy registers which contain a local/global variable or }
  1652. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1653. { * with uncertain optimzations off: }
  1654. { - destroy every register which contains a memory location }
  1655. begin
  1656. invalsmemwrite :=
  1657. assigned(c.memwrite) and
  1658. (not(cs_UncertainOpts in aktglobalswitches) or
  1659. containsPointerRef(c.memwrite));
  1660. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1661. begin
  1662. writeToMemDestroysContents := false;
  1663. exit;
  1664. end;
  1665. with c do
  1666. writeToMemDestroysContents :=
  1667. (typ in [con_ref,con_noRemoveRef]) and
  1668. (not(cs_UncertainOpts in aktglobalswitches) or
  1669. { for movsl }
  1670. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1671. { don't destroy if reg contains a parameter, local or global variable }
  1672. containsPointerLoad(c)
  1673. );
  1674. end;
  1675. end;
  1676. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1677. const c: tcontent): boolean;
  1678. { returns whether the contents c of reg are invalid after destReg is }
  1679. { modified }
  1680. begin
  1681. writeToRegDestroysContents :=
  1682. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1683. sequenceDependsOnReg(c,supreg,destReg);
  1684. end;
  1685. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1686. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1687. { returns whether the contents c of reg are invalid after regWritten is }
  1688. { is written to op }
  1689. begin
  1690. memwritedestroyed := false;
  1691. case op.typ of
  1692. top_reg:
  1693. writeDestroysContents :=
  1694. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1695. top_ref:
  1696. writeDestroysContents :=
  1697. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1698. else
  1699. writeDestroysContents := false;
  1700. end;
  1701. end;
  1702. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1703. { destroys all registers which possibly contain a reference to ref, regWritten }
  1704. { is the register whose contents are being written to memory (if this proc }
  1705. { is called because of a "mov?? %reg, (mem)" instruction) }
  1706. var
  1707. counter: tsuperregister;
  1708. destroymemwrite: boolean;
  1709. begin
  1710. for counter := RS_EAX to RS_EDI Do
  1711. begin
  1712. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1713. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1714. destroyReg(ptaiprop(p.optInfo), counter, false)
  1715. else if destroymemwrite then
  1716. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1717. end;
  1718. end;
  1719. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1720. var Counter: tsuperregister;
  1721. begin {initializes/desrtoys all registers}
  1722. For Counter := RS_EAX To RS_EDI Do
  1723. begin
  1724. if read then
  1725. readreg(p, Counter);
  1726. DestroyReg(p, Counter, written);
  1727. p^.regs[counter].MemWrite := nil;
  1728. end;
  1729. p^.DirFlag := F_Unknown;
  1730. end;
  1731. procedure DestroyOp(taiObj: tai; const o:Toper);
  1732. {$ifdef statedebug}
  1733. var
  1734. hp: tai;
  1735. {$endif statedebug}
  1736. begin
  1737. case o.typ Of
  1738. top_reg:
  1739. begin
  1740. {$ifdef statedebug}
  1741. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1742. hp.next := taiobj.next;
  1743. hp.previous := taiobj;
  1744. taiobj.next := hp;
  1745. if assigned(hp.next) then
  1746. hp.next.previous := hp;
  1747. {$endif statedebug}
  1748. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1749. end;
  1750. top_ref:
  1751. begin
  1752. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1753. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1754. end;
  1755. end;
  1756. end;
  1757. procedure AddInstr2RegContents({$ifdef statedebug} asml: taasmoutput; {$endif}
  1758. p: taicpu; supreg: tsuperregister);
  1759. {$ifdef statedebug}
  1760. var
  1761. hp: tai;
  1762. {$endif statedebug}
  1763. begin
  1764. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1765. if (typ in [con_ref,con_noRemoveRef]) then
  1766. begin
  1767. incState(wstate,1);
  1768. { also store how many instructions are part of the sequence in the first }
  1769. { instructions ptaiprop, so it can be easily accessed from within }
  1770. { CheckSequence}
  1771. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1772. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1773. NrOfInstrSinceLastMod[supreg] := 0;
  1774. invalidateDependingRegs(p.optinfo,supreg);
  1775. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1776. {$ifdef StateDebug}
  1777. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1778. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1779. InsertLLItem(AsmL, p, p.next, hp);
  1780. {$endif StateDebug}
  1781. end
  1782. else
  1783. begin
  1784. {$ifdef statedebug}
  1785. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1786. insertllitem(asml,p,p.next,hp);
  1787. {$endif statedebug}
  1788. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1789. {$ifdef StateDebug}
  1790. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1791. InsertLLItem(AsmL, p, p.next, hp);
  1792. {$endif StateDebug}
  1793. end
  1794. end;
  1795. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAAsmoutput; {$endif}
  1796. p: taicpu; const oper: TOper);
  1797. begin
  1798. if oper.typ = top_reg then
  1799. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1800. else
  1801. begin
  1802. ReadOp(ptaiprop(p.optinfo), oper);
  1803. DestroyOp(p, oper);
  1804. end
  1805. end;
  1806. {*************************************************************************************}
  1807. {************************************** TDFAOBJ **************************************}
  1808. {*************************************************************************************}
  1809. constructor tdfaobj.create(_list: taasmoutput);
  1810. begin
  1811. list := _list;
  1812. blockstart := nil;
  1813. blockend := nil;
  1814. nroftaiobjs := 0;
  1815. taipropblock := nil;
  1816. lolab := 0;
  1817. hilab := 0;
  1818. labdif := 0;
  1819. labeltable := nil;
  1820. end;
  1821. procedure tdfaobj.initlabeltable;
  1822. var
  1823. labelfound: boolean;
  1824. p, prev: tai;
  1825. hp1, hp2: tai;
  1826. {$ifdef i386}
  1827. regcounter,
  1828. supreg : tsuperregister;
  1829. {$endif i386}
  1830. usedregs, nodeallocregs: tregset;
  1831. begin
  1832. labelfound := false;
  1833. lolab := maxlongint;
  1834. hilab := 0;
  1835. p := blockstart;
  1836. prev := p;
  1837. while assigned(p) do
  1838. begin
  1839. if (tai(p).typ = ait_label) then
  1840. if not labelcanbeskipped(tai_label(p)) then
  1841. begin
  1842. labelfound := true;
  1843. if (tai_Label(p).l.labelnr < lolab) then
  1844. lolab := tai_label(p).l.labelnr;
  1845. if (tai_Label(p).l.labelnr > hilab) then
  1846. hilab := tai_label(p).l.labelnr;
  1847. end;
  1848. prev := p;
  1849. getnextinstruction(p, p);
  1850. end;
  1851. if (prev.typ = ait_marker) and
  1852. (tai_marker(prev).kind = asmblockstart) then
  1853. blockend := prev
  1854. else blockend := nil;
  1855. if labelfound then
  1856. labdif := hilab+1-lolab
  1857. else labdif := 0;
  1858. usedregs := [];
  1859. if (labdif <> 0) then
  1860. begin
  1861. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1862. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1863. end;
  1864. p := blockstart;
  1865. prev := p;
  1866. while (p <> blockend) do
  1867. begin
  1868. case p.typ of
  1869. ait_label:
  1870. if not labelcanbeskipped(tai_label(p)) then
  1871. labeltable^[tai_label(p).l.labelnr-lolab].taiobj := p;
  1872. {$ifdef i386}
  1873. ait_regalloc:
  1874. begin
  1875. supreg:=getsupreg(tai_regalloc(p).reg);
  1876. case tai_regalloc(p).ratype of
  1877. ra_alloc :
  1878. begin
  1879. if not(supreg in usedregs) then
  1880. include(usedregs, supreg)
  1881. else
  1882. begin
  1883. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1884. hp1 := tai(p.previous);
  1885. list.remove(p);
  1886. p.free;
  1887. p := hp1;
  1888. end;
  1889. end;
  1890. ra_dealloc :
  1891. begin
  1892. exclude(usedregs, supreg);
  1893. hp1 := p;
  1894. hp2 := nil;
  1895. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1896. getnextinstruction(hp1, hp1) and
  1897. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1898. hp2 := hp1;
  1899. if hp2 <> nil then
  1900. begin
  1901. hp1 := tai(p.previous);
  1902. list.remove(p);
  1903. insertllitem(list, hp2, tai(hp2.next), p);
  1904. p := hp1;
  1905. end
  1906. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1907. and getnextinstruction(p,hp1) then
  1908. begin
  1909. hp1 := tai(p.previous);
  1910. list.remove(p);
  1911. p.free;
  1912. p := hp1;
  1913. // don't include here, since then the allocation will be removed when it's processed
  1914. // include(usedregs,supreg);
  1915. end;
  1916. end;
  1917. end;
  1918. end;
  1919. {$endif i386}
  1920. end;
  1921. repeat
  1922. prev := p;
  1923. p := tai(p.next);
  1924. until not(assigned(p)) or
  1925. (p = blockend) or
  1926. not(p.typ in (skipinstr - [ait_regalloc]));
  1927. end;
  1928. {$ifdef i386}
  1929. { don't add deallocation for function result variable or for regvars}
  1930. getNoDeallocRegs(noDeallocRegs);
  1931. usedRegs := usedRegs - noDeallocRegs;
  1932. for regCounter := RS_EAX to RS_EDI do
  1933. if regCounter in usedRegs then
  1934. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1935. {$endif i386}
  1936. end;
  1937. function tdfaobj.pass_1(_blockstart: tai): tai;
  1938. begin
  1939. blockstart := _blockstart;
  1940. initlabeltable;
  1941. pass_1 := blockend;
  1942. end;
  1943. function tdfaobj.initdfapass2: boolean;
  1944. {reserves memory for the PtaiProps in one big memory block when not using
  1945. TP, returns False if not enough memory is available for the optimizer in all
  1946. cases}
  1947. var
  1948. p: tai;
  1949. count: Longint;
  1950. { TmpStr: String; }
  1951. begin
  1952. p := blockstart;
  1953. skiphead(p);
  1954. nroftaiobjs := 0;
  1955. while (p <> blockend) do
  1956. begin
  1957. {$ifDef JumpAnal}
  1958. case p.typ of
  1959. ait_label:
  1960. begin
  1961. if not labelcanbeskipped(tai_label(p)) then
  1962. labeltable^[tai_label(p).l.labelnr-lolab].instrnr := nroftaiobjs
  1963. end;
  1964. ait_instruction:
  1965. begin
  1966. if taicpu(p).is_jmp then
  1967. begin
  1968. if (tasmlabel(taicpu(p).oper[0]^.sym).labelnr >= lolab) and
  1969. (tasmlabel(taicpu(p).oper[0]^.sym).labelnr <= hilab) then
  1970. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-lolab].refsfound);
  1971. end;
  1972. end;
  1973. { ait_instruction:
  1974. begin
  1975. if (taicpu(p).opcode = A_PUSH) and
  1976. (taicpu(p).oper[0]^.typ = top_symbol) and
  1977. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1978. begin
  1979. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1980. if}
  1981. end;
  1982. {$endif JumpAnal}
  1983. inc(NrOftaiObjs);
  1984. getnextinstruction(p,p);
  1985. end;
  1986. if nroftaiobjs <> 0 then
  1987. begin
  1988. initdfapass2 := True;
  1989. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  1990. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  1991. p := blockstart;
  1992. skiphead(p);
  1993. for count := 1 To nroftaiobjs do
  1994. begin
  1995. ptaiprop(p.optinfo) := @taipropblock^[count];
  1996. getnextinstruction(p, p);
  1997. end;
  1998. end
  1999. else
  2000. initdfapass2 := false;
  2001. end;
  2002. procedure tdfaobj.dodfapass2;
  2003. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2004. contents for the instructions starting with p. Returns the last tai which has
  2005. been processed}
  2006. var
  2007. curprop, LastFlagsChangeProp: ptaiprop;
  2008. Cnt, InstrCnt : Longint;
  2009. InstrProp: TInsProp;
  2010. UsedRegs: TRegSet;
  2011. prev,p : tai;
  2012. tmpref: TReference;
  2013. tmpsupreg: tsuperregister;
  2014. {$ifdef statedebug}
  2015. hp : tai;
  2016. {$endif}
  2017. {$ifdef AnalyzeLoops}
  2018. hp : tai;
  2019. TmpState: Byte;
  2020. {$endif AnalyzeLoops}
  2021. begin
  2022. p := BlockStart;
  2023. LastFlagsChangeProp := nil;
  2024. prev := nil;
  2025. UsedRegs := [];
  2026. UpdateUsedregs(UsedRegs, p);
  2027. SkipHead(p);
  2028. BlockStart := p;
  2029. InstrCnt := 1;
  2030. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2031. while (p <> Blockend) Do
  2032. begin
  2033. curprop := @taiPropBlock^[InstrCnt];
  2034. if assigned(prev)
  2035. then
  2036. begin
  2037. {$ifdef JumpAnal}
  2038. if (p.Typ <> ait_label) then
  2039. {$endif JumpAnal}
  2040. begin
  2041. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2042. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2043. curprop^.FlagsUsed := false;
  2044. end
  2045. end
  2046. else
  2047. begin
  2048. fillchar(curprop^, SizeOf(curprop^), 0);
  2049. { For tmpreg := RS_EAX to RS_EDI Do
  2050. curprop^.regs[tmpreg].WState := 1;}
  2051. end;
  2052. curprop^.UsedRegs := UsedRegs;
  2053. curprop^.CanBeRemoved := False;
  2054. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2055. For tmpsupreg := RS_EAX To RS_EDI Do
  2056. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2057. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2058. else
  2059. begin
  2060. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2061. curprop^.regs[tmpsupreg].typ := con_unknown;
  2062. end;
  2063. case p.typ Of
  2064. ait_marker:;
  2065. ait_label:
  2066. {$ifndef JumpAnal}
  2067. if not labelCanBeSkipped(tai_label(p)) then
  2068. DestroyAllRegs(curprop,false,false);
  2069. {$else JumpAnal}
  2070. begin
  2071. if not labelCanBeSkipped(tai_label(p)) then
  2072. With LTable^[tai_Label(p).l^.labelnr-LoLab] Do
  2073. {$ifDef AnalyzeLoops}
  2074. if (RefsFound = tai_Label(p).l^.RefCount)
  2075. {$else AnalyzeLoops}
  2076. if (JmpsProcessed = tai_Label(p).l^.RefCount)
  2077. {$endif AnalyzeLoops}
  2078. then
  2079. {all jumps to this label have been found}
  2080. {$ifDef AnalyzeLoops}
  2081. if (JmpsProcessed > 0)
  2082. then
  2083. {$endif AnalyzeLoops}
  2084. {we've processed at least one jump to this label}
  2085. begin
  2086. if (GetLastInstruction(p, hp) and
  2087. not(((hp.typ = ait_instruction)) and
  2088. (taicpu_labeled(hp).is_jmp))
  2089. then
  2090. {previous instruction not a JMP -> the contents of the registers after the
  2091. previous intruction has been executed have to be taken into account as well}
  2092. For tmpsupreg := RS_EAX to RS_EDI Do
  2093. begin
  2094. if (curprop^.regs[tmpsupreg].WState <>
  2095. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2096. then DestroyReg(curprop, tmpsupreg, true)
  2097. end
  2098. end
  2099. {$ifDef AnalyzeLoops}
  2100. else
  2101. {a label from a backward jump (e.g. a loop), no jump to this label has
  2102. already been processed}
  2103. if GetLastInstruction(p, hp) and
  2104. not(hp.typ = ait_instruction) and
  2105. (taicpu_labeled(hp).opcode = A_JMP))
  2106. then
  2107. {previous instruction not a jmp, so keep all the registers' contents from the
  2108. previous instruction}
  2109. begin
  2110. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2111. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2112. end
  2113. else
  2114. {previous instruction a jmp and no jump to this label processed yet}
  2115. begin
  2116. hp := p;
  2117. Cnt := InstrCnt;
  2118. {continue until we find a jump to the label or a label which has already
  2119. been processed}
  2120. while GetNextInstruction(hp, hp) and
  2121. not((hp.typ = ait_instruction) and
  2122. (taicpu(hp).is_jmp) and
  2123. (tasmlabel(taicpu(hp).oper[0]^.sym).labelnr = tai_Label(p).l^.labelnr)) and
  2124. not((hp.typ = ait_label) and
  2125. (LTable^[tai_Label(hp).l^.labelnr-LoLab].RefsFound
  2126. = tai_Label(hp).l^.RefCount) and
  2127. (LTable^[tai_Label(hp).l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2128. inc(Cnt);
  2129. if (hp.typ = ait_label)
  2130. then
  2131. {there's a processed label after the current one}
  2132. begin
  2133. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2134. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2135. end
  2136. else
  2137. {there's no label anymore after the current one, or they haven't been
  2138. processed yet}
  2139. begin
  2140. GetLastInstruction(p, hp);
  2141. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2142. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2143. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2144. end
  2145. end
  2146. {$endif AnalyzeLoops}
  2147. else
  2148. {not all references to this label have been found, so destroy all registers}
  2149. begin
  2150. GetLastInstruction(p, hp);
  2151. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2152. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2153. DestroyAllRegs(curprop,true,true)
  2154. end;
  2155. end;
  2156. {$endif JumpAnal}
  2157. ait_stab, ait_force_line, ait_function_name:;
  2158. ait_align: ; { may destroy flags !!! }
  2159. ait_instruction:
  2160. begin
  2161. if taicpu(p).is_jmp or
  2162. (taicpu(p).opcode = A_JMP) then
  2163. begin
  2164. {$ifNDef JumpAnal}
  2165. for tmpsupreg := RS_EAX to RS_EDI do
  2166. with curprop^.regs[tmpsupreg] do
  2167. case typ of
  2168. con_ref: typ := con_noRemoveRef;
  2169. con_const: typ := con_noRemoveConst;
  2170. con_invalid: typ := con_unknown;
  2171. end;
  2172. {$else JumpAnal}
  2173. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-LoLab] Do
  2174. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2175. begin
  2176. if (InstrCnt < InstrNr)
  2177. then
  2178. {forward jump}
  2179. if (JmpsProcessed = 0) then
  2180. {no jump to this label has been processed yet}
  2181. begin
  2182. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2183. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2184. inc(JmpsProcessed);
  2185. end
  2186. else
  2187. begin
  2188. For tmpreg := RS_EAX to RS_EDI Do
  2189. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2190. curprop^.regs[tmpreg].WState) then
  2191. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2192. inc(JmpsProcessed);
  2193. end
  2194. {$ifdef AnalyzeLoops}
  2195. else
  2196. { backward jump, a loop for example}
  2197. { if (JmpsProcessed > 0) or
  2198. not(GetLastInstruction(taiObj, hp) and
  2199. (hp.typ = ait_labeled_instruction) and
  2200. (taicpu_labeled(hp).opcode = A_JMP))
  2201. then}
  2202. {instruction prior to label is not a jmp, or at least one jump to the label
  2203. has yet been processed}
  2204. begin
  2205. inc(JmpsProcessed);
  2206. For tmpreg := RS_EAX to RS_EDI Do
  2207. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2208. curprop^.regs[tmpreg].WState)
  2209. then
  2210. begin
  2211. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2212. Cnt := InstrNr;
  2213. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2214. begin
  2215. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2216. inc(Cnt);
  2217. end;
  2218. while (Cnt <= InstrCnt) Do
  2219. begin
  2220. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2221. inc(Cnt)
  2222. end
  2223. end;
  2224. end
  2225. { else }
  2226. {instruction prior to label is a jmp and no jumps to the label have yet been
  2227. processed}
  2228. { begin
  2229. inc(JmpsProcessed);
  2230. For tmpreg := RS_EAX to RS_EDI Do
  2231. begin
  2232. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2233. Cnt := InstrNr;
  2234. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2235. begin
  2236. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2237. inc(Cnt);
  2238. end;
  2239. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2240. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2241. begin
  2242. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2243. inc(Cnt);
  2244. end;
  2245. while (Cnt <= InstrCnt) Do
  2246. begin
  2247. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2248. inc(Cnt)
  2249. end
  2250. end
  2251. end}
  2252. {$endif AnalyzeLoops}
  2253. end;
  2254. {$endif JumpAnal}
  2255. end
  2256. else
  2257. begin
  2258. InstrProp := InsProp[taicpu(p).opcode];
  2259. case taicpu(p).opcode Of
  2260. A_MOV, A_MOVZX, A_MOVSX:
  2261. begin
  2262. case taicpu(p).oper[0]^.typ Of
  2263. top_ref, top_reg:
  2264. case taicpu(p).oper[1]^.typ Of
  2265. top_reg:
  2266. begin
  2267. {$ifdef statedebug}
  2268. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2269. insertllitem(list,p,p.next,hp);
  2270. {$endif statedebug}
  2271. readOp(curprop, taicpu(p).oper[0]^);
  2272. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2273. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2274. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2275. begin
  2276. with curprop^.regs[tmpsupreg] Do
  2277. begin
  2278. incState(wstate,1);
  2279. { also store how many instructions are part of the sequence in the first }
  2280. { instruction's ptaiprop, so it can be easily accessed from within }
  2281. { CheckSequence }
  2282. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2283. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2284. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2285. { Destroy the contents of the registers }
  2286. { that depended on the previous value of }
  2287. { this register }
  2288. invalidateDependingRegs(curprop,tmpsupreg);
  2289. curprop^.regs[tmpsupreg].memwrite := nil;
  2290. end;
  2291. end
  2292. else
  2293. begin
  2294. {$ifdef statedebug}
  2295. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2296. insertllitem(list,p,p.next,hp);
  2297. {$endif statedebug}
  2298. destroyReg(curprop, tmpsupreg, true);
  2299. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2300. with curprop^.regs[tmpsupreg] Do
  2301. begin
  2302. typ := con_ref;
  2303. startmod := p;
  2304. nrOfMods := 1;
  2305. end
  2306. end;
  2307. {$ifdef StateDebug}
  2308. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2309. insertllitem(list,p,p.next,hp);
  2310. {$endif StateDebug}
  2311. end;
  2312. top_ref:
  2313. begin
  2314. readref(curprop, taicpu(p).oper[1]^.ref);
  2315. if taicpu(p).oper[0]^.typ = top_reg then
  2316. begin
  2317. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2318. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2319. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2320. taicpu(p);
  2321. end
  2322. else
  2323. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2324. end;
  2325. end;
  2326. top_Const:
  2327. begin
  2328. case taicpu(p).oper[1]^.typ Of
  2329. top_reg:
  2330. begin
  2331. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2332. {$ifdef statedebug}
  2333. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2334. insertllitem(list,p,p.next,hp);
  2335. {$endif statedebug}
  2336. With curprop^.regs[tmpsupreg] Do
  2337. begin
  2338. DestroyReg(curprop, tmpsupreg, true);
  2339. typ := Con_Const;
  2340. StartMod := p;
  2341. end
  2342. end;
  2343. top_ref:
  2344. begin
  2345. readref(curprop, taicpu(p).oper[1]^.ref);
  2346. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2347. end;
  2348. end;
  2349. end;
  2350. end;
  2351. end;
  2352. A_DIV, A_IDIV, A_MUL:
  2353. begin
  2354. ReadOp(curprop, taicpu(p).oper[0]^);
  2355. readreg(curprop,RS_EAX);
  2356. if (taicpu(p).OpCode = A_IDIV) or
  2357. (taicpu(p).OpCode = A_DIV) then
  2358. begin
  2359. readreg(curprop,RS_EDX);
  2360. end;
  2361. {$ifdef statedebug}
  2362. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2363. insertllitem(list,p,p.next,hp);
  2364. {$endif statedebug}
  2365. { DestroyReg(curprop, RS_EAX, true);}
  2366. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2367. taicpu(p), RS_EAX);
  2368. DestroyReg(curprop, RS_EDX, true);
  2369. LastFlagsChangeProp := curprop;
  2370. end;
  2371. A_IMUL:
  2372. begin
  2373. ReadOp(curprop,taicpu(p).oper[0]^);
  2374. if (taicpu(p).ops >= 2) then
  2375. ReadOp(curprop,taicpu(p).oper[1]^);
  2376. if (taicpu(p).ops <= 2) then
  2377. if (taicpu(p).ops=1) then
  2378. begin
  2379. readreg(curprop,RS_EAX);
  2380. {$ifdef statedebug}
  2381. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2382. insertllitem(list,p,p.next,hp);
  2383. {$endif statedebug}
  2384. { DestroyReg(curprop, RS_EAX, true); }
  2385. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2386. taicpu(p), RS_EAX);
  2387. DestroyReg(curprop,RS_EDX, true)
  2388. end
  2389. else
  2390. AddInstr2OpContents(
  2391. {$ifdef statedebug}list,{$endif}
  2392. taicpu(p), taicpu(p).oper[1]^)
  2393. else
  2394. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2395. taicpu(p), taicpu(p).oper[2]^);
  2396. LastFlagsChangeProp := curprop;
  2397. end;
  2398. A_LEA:
  2399. begin
  2400. readop(curprop,taicpu(p).oper[0]^);
  2401. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2402. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2403. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2404. else
  2405. begin
  2406. {$ifdef statedebug}
  2407. hp := tai_comment.Create(strpnew('destroying & initing'+
  2408. std_regname(taicpu(p).oper[1]^.reg)));
  2409. insertllitem(list,p,p.next,hp);
  2410. {$endif statedebug}
  2411. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2412. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2413. begin
  2414. typ := con_ref;
  2415. startmod := p;
  2416. nrOfMods := 1;
  2417. end
  2418. end;
  2419. end;
  2420. else
  2421. begin
  2422. Cnt := 1;
  2423. while (Cnt <= maxinschanges) and
  2424. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2425. begin
  2426. case InstrProp.Ch[Cnt] Of
  2427. Ch_REAX..Ch_REDI:
  2428. begin
  2429. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2430. readreg(curprop,tmpsupreg);
  2431. end;
  2432. Ch_WEAX..Ch_RWEDI:
  2433. begin
  2434. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2435. begin
  2436. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2437. readreg(curprop,tmpsupreg);
  2438. end;
  2439. {$ifdef statedebug}
  2440. hp := tai_comment.Create(strpnew('destroying '+
  2441. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2442. insertllitem(list,p,p.next,hp);
  2443. {$endif statedebug}
  2444. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2445. DestroyReg(curprop,tmpsupreg, true);
  2446. end;
  2447. Ch_MEAX..Ch_MEDI:
  2448. begin
  2449. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2450. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2451. taicpu(p),tmpsupreg);
  2452. end;
  2453. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2454. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2455. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2456. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2457. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2458. Ch_Wop1..Ch_RWop1:
  2459. begin
  2460. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2461. ReadOp(curprop, taicpu(p).oper[0]^);
  2462. DestroyOp(p, taicpu(p).oper[0]^);
  2463. end;
  2464. Ch_Mop1:
  2465. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2466. taicpu(p), taicpu(p).oper[0]^);
  2467. Ch_Wop2..Ch_RWop2:
  2468. begin
  2469. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2470. ReadOp(curprop, taicpu(p).oper[1]^);
  2471. DestroyOp(p, taicpu(p).oper[1]^);
  2472. end;
  2473. Ch_Mop2:
  2474. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2475. taicpu(p), taicpu(p).oper[1]^);
  2476. Ch_WOp3..Ch_RWOp3:
  2477. begin
  2478. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2479. ReadOp(curprop, taicpu(p).oper[2]^);
  2480. DestroyOp(p, taicpu(p).oper[2]^);
  2481. end;
  2482. Ch_Mop3:
  2483. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2484. taicpu(p), taicpu(p).oper[2]^);
  2485. Ch_WMemEDI:
  2486. begin
  2487. readreg(curprop, RS_EDI);
  2488. fillchar(tmpref, SizeOf(tmpref), 0);
  2489. tmpref.base := NR_EDI;
  2490. tmpref.index := NR_EDI;
  2491. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2492. end;
  2493. Ch_RFlags:
  2494. if assigned(LastFlagsChangeProp) then
  2495. LastFlagsChangeProp^.FlagsUsed := true;
  2496. Ch_WFlags:
  2497. LastFlagsChangeProp := curprop;
  2498. Ch_RWFlags:
  2499. begin
  2500. if assigned(LastFlagsChangeProp) then
  2501. LastFlagsChangeProp^.FlagsUsed := true;
  2502. LastFlagsChangeProp := curprop;
  2503. end;
  2504. Ch_FPU:;
  2505. else
  2506. begin
  2507. {$ifdef statedebug}
  2508. hp := tai_comment.Create(strpnew(
  2509. 'destroying all regs for prev instruction'));
  2510. insertllitem(list,p, p.next,hp);
  2511. {$endif statedebug}
  2512. DestroyAllRegs(curprop,true,true);
  2513. LastFlagsChangeProp := curprop;
  2514. end;
  2515. end;
  2516. inc(Cnt);
  2517. end
  2518. end;
  2519. end;
  2520. end;
  2521. end
  2522. else
  2523. begin
  2524. {$ifdef statedebug}
  2525. hp := tai_comment.Create(strpnew(
  2526. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2527. insertllitem(list,p, p.next,hp);
  2528. {$endif statedebug}
  2529. DestroyAllRegs(curprop,true,true);
  2530. end;
  2531. end;
  2532. inc(InstrCnt);
  2533. prev := p;
  2534. GetNextInstruction(p, p);
  2535. end;
  2536. end;
  2537. function tdfaobj.pass_2: boolean;
  2538. begin
  2539. if initdfapass2 then
  2540. begin
  2541. dodfapass2;
  2542. pass_2 := true
  2543. end
  2544. else
  2545. pass_2 := false;
  2546. end;
  2547. {$ifopt r+}
  2548. {$define rangewason}
  2549. {$r-}
  2550. {$endif}
  2551. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2552. begin
  2553. if (sym.labelnr >= lolab) and
  2554. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2555. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2556. else
  2557. getlabelwithsym := nil;
  2558. end;
  2559. {$ifdef rangewason}
  2560. {$r+}
  2561. {$undef rangewason}
  2562. {$endif}
  2563. procedure tdfaobj.clear;
  2564. begin
  2565. if labdif <> 0 then
  2566. begin
  2567. freemem(labeltable);
  2568. labeltable := nil;
  2569. end;
  2570. if assigned(taipropblock) then
  2571. begin
  2572. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2573. taipropblock := nil;
  2574. end;
  2575. end;
  2576. end.