ngppcadd.pas 19 KB

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  1. {
  2. Copyright (c) 2000-2006 by Florian Klaempfl and Jonas Maebe
  3. Code generation for add nodes on the PowerPC (32 and 64 bit generic)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ngppcadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,ncgadd,cpubase;
  22. type
  23. tgenppcaddnode = class(tcgaddnode)
  24. function pass_1: tnode; override;
  25. protected
  26. procedure pass_left_and_right;
  27. procedure load_left_right(cmpop, load_constants: boolean);
  28. function getresflags : tresflags;
  29. procedure emit_compare(unsigned: boolean); virtual; abstract;
  30. procedure second_addfloat;override;
  31. procedure second_addboolean;override;
  32. procedure second_addsmallset;override;
  33. end;
  34. implementation
  35. {*****************************************************************************
  36. Pass 1
  37. *****************************************************************************}
  38. uses
  39. globtype,systems,
  40. cutils,verbose,globals,
  41. symconst,symdef,paramgr,
  42. aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
  43. cgbase,cpuinfo,pass_1,pass_2,regvars,
  44. cpupara,cgcpu,cgutils,procinfo,
  45. ncon,nset,
  46. ncgutil,tgobj,rgobj,rgcpu,cgobj;
  47. {*****************************************************************************
  48. Pass 1
  49. *****************************************************************************}
  50. function tgenppcaddnode.pass_1: tnode;
  51. begin
  52. typecheckpass(left);
  53. if (nodetype in [equaln,unequaln]) and
  54. (left.resultdef.typ = orddef) and
  55. is_64bit(left.resultdef) then
  56. begin
  57. result := nil;
  58. firstpass(left);
  59. firstpass(right);
  60. expectloc := LOC_FLAGS;
  61. exit;
  62. end;
  63. result := inherited pass_1;
  64. end;
  65. {*****************************************************************************
  66. Helpers
  67. *****************************************************************************}
  68. procedure tgenppcaddnode.pass_left_and_right;
  69. begin
  70. { calculate the operator which is more difficult }
  71. firstcomplex(self);
  72. { in case of constant put it to the left }
  73. if (left.nodetype=ordconstn) then
  74. swapleftright;
  75. secondpass(left);
  76. secondpass(right);
  77. end;
  78. procedure tgenppcaddnode.load_left_right(cmpop, load_constants: boolean);
  79. procedure load_node(var n: tnode);
  80. begin
  81. case n.location.loc of
  82. LOC_REGISTER,
  83. LOC_CREGISTER:
  84. ;
  85. LOC_REFERENCE,LOC_CREFERENCE:
  86. location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
  87. LOC_CONSTANT:
  88. begin
  89. if load_constants then
  90. location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
  91. end;
  92. else
  93. location_force_reg(current_asmdata.CurrAsmList,n.location,def_cgsize(n.resultdef),false);
  94. end;
  95. end;
  96. begin
  97. load_node(left);
  98. load_node(right);
  99. if not(cmpop) then
  100. begin
  101. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  102. {$ifndef cpu64bitalu}
  103. if is_64bit(resultdef) then
  104. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  105. {$endif not cpu64bitalu}
  106. end;
  107. end;
  108. function tgenppcaddnode.getresflags : tresflags;
  109. begin
  110. if (left.resultdef.typ <> floatdef) then
  111. result.cr := RS_CR0
  112. else
  113. result.cr := RS_CR1;
  114. case nodetype of
  115. equaln : result.flag:=F_EQ;
  116. unequaln : result.flag:=F_NE;
  117. else
  118. if nf_swapped in flags then
  119. case nodetype of
  120. ltn : result.flag:=F_GT;
  121. lten : result.flag:=F_GE;
  122. gtn : result.flag:=F_LT;
  123. gten : result.flag:=F_LE;
  124. end
  125. else
  126. case nodetype of
  127. ltn : result.flag:=F_LT;
  128. lten : result.flag:=F_LE;
  129. gtn : result.flag:=F_GT;
  130. gten : result.flag:=F_GE;
  131. end;
  132. end
  133. end;
  134. {*****************************************************************************
  135. AddBoolean
  136. *****************************************************************************}
  137. procedure tgenppcaddnode.second_addboolean;
  138. var
  139. cgop : TOpCg;
  140. cgsize : TCgSize;
  141. cmpop,
  142. isjump : boolean;
  143. otl,ofl : tasmlabel;
  144. begin
  145. { calculate the operator which is more difficult }
  146. firstcomplex(self);
  147. cmpop:=false;
  148. if (torddef(left.resultdef).ordtype in [pasbool,bool8bit]) or
  149. (torddef(right.resultdef).ordtype in [pasbool,bool8bit]) then
  150. cgsize:=OS_8
  151. else
  152. if (torddef(left.resultdef).ordtype=bool16bit) or
  153. (torddef(right.resultdef).ordtype=bool16bit) then
  154. cgsize:=OS_16
  155. else
  156. cgsize:=OS_32;
  157. if ((cs_full_boolean_eval in current_settings.localswitches) and
  158. not(nf_short_bool in flags)) or
  159. (nodetype in [unequaln,ltn,lten,gtn,gten,equaln,xorn]) then
  160. begin
  161. if left.nodetype in [ordconstn,realconstn] then
  162. swapleftright;
  163. isjump:=(left.expectloc=LOC_JUMP);
  164. if isjump then
  165. begin
  166. otl:=current_procinfo.CurrTrueLabel;
  167. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  168. ofl:=current_procinfo.CurrFalseLabel;
  169. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  170. end;
  171. secondpass(left);
  172. if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
  173. location_force_reg(current_asmdata.CurrAsmList,left.location,cgsize,false);
  174. if isjump then
  175. begin
  176. current_procinfo.CurrTrueLabel:=otl;
  177. current_procinfo.CurrFalseLabel:=ofl;
  178. end
  179. else if left.location.loc=LOC_JUMP then
  180. internalerror(2003122901);
  181. isjump:=(right.expectloc=LOC_JUMP);
  182. if isjump then
  183. begin
  184. otl:=current_procinfo.CurrTrueLabel;
  185. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  186. ofl:=current_procinfo.CurrFalseLabel;
  187. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  188. end;
  189. secondpass(right);
  190. if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
  191. location_force_reg(current_asmdata.CurrAsmList,right.location,cgsize,false);
  192. if isjump then
  193. begin
  194. current_procinfo.CurrTrueLabel:=otl;
  195. current_procinfo.CurrFalseLabel:=ofl;
  196. end
  197. else if right.location.loc=LOC_JUMP then
  198. internalerror(200312292);
  199. cmpop := nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
  200. { set result location }
  201. if not cmpop then
  202. location_reset(location,LOC_REGISTER,def_cgsize(resultdef))
  203. else
  204. location_reset(location,LOC_FLAGS,OS_NO);
  205. load_left_right(cmpop,false);
  206. if (left.location.loc = LOC_CONSTANT) then
  207. swapleftright;
  208. { compare the }
  209. case nodetype of
  210. ltn,lten,gtn,gten,
  211. equaln,unequaln :
  212. begin
  213. if (right.location.loc <> LOC_CONSTANT) then
  214. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMPLW,
  215. left.location.register,right.location.register))
  216. else
  217. current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPLWI,
  218. left.location.register,longint(right.location.value)));
  219. location.resflags := getresflags;
  220. end;
  221. else
  222. begin
  223. case nodetype of
  224. xorn :
  225. cgop:=OP_XOR;
  226. orn :
  227. cgop:=OP_OR;
  228. andn :
  229. cgop:=OP_AND;
  230. else
  231. internalerror(200203247);
  232. end;
  233. if right.location.loc <> LOC_CONSTANT then
  234. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  235. left.location.register,right.location.register,
  236. location.register)
  237. else
  238. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  239. right.location.value,left.location.register,
  240. location.register);
  241. end;
  242. end;
  243. end
  244. else
  245. inherited second_addboolean;
  246. end;
  247. {*****************************************************************************
  248. AddFloat
  249. *****************************************************************************}
  250. procedure tgenppcaddnode.second_addfloat;
  251. var
  252. op : TAsmOp;
  253. cmpop,
  254. singleprec : boolean;
  255. begin
  256. pass_left_and_right;
  257. cmpop:=false;
  258. singleprec:=tfloatdef(left.resultdef).floattype=s32real;
  259. case nodetype of
  260. addn :
  261. if singleprec then
  262. op:=A_FADDS
  263. else
  264. op:=A_FADD;
  265. muln :
  266. if singleprec then
  267. op:=A_FMULS
  268. else
  269. op:=A_FMUL;
  270. subn :
  271. if singleprec then
  272. op:=A_FSUBS
  273. else
  274. op:=A_FSUB;
  275. slashn :
  276. if singleprec then
  277. op:=A_FDIVS
  278. else
  279. op:=A_FDIV;
  280. ltn,lten,gtn,gten,
  281. equaln,unequaln :
  282. begin
  283. op:=A_FCMPO;
  284. cmpop:=true;
  285. end;
  286. else
  287. internalerror(200403182);
  288. end;
  289. // get the operands in the correct order, there are no special cases
  290. // here, everything is register-based
  291. if nf_swapped in flags then
  292. swapleftright;
  293. // put both operands in a register
  294. location_force_fpureg(current_asmdata.CurrAsmList,right.location,true);
  295. location_force_fpureg(current_asmdata.CurrAsmList,left.location,true);
  296. // initialize de result
  297. if not cmpop then
  298. begin
  299. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  300. location.register := cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  301. end
  302. else
  303. begin
  304. location_reset(location,LOC_FLAGS,OS_NO);
  305. location.resflags := getresflags;
  306. end;
  307. // emit the actual operation
  308. if not cmpop then
  309. begin
  310. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,
  311. location.register,left.location.register,
  312. right.location.register))
  313. end
  314. else
  315. begin
  316. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,
  317. newreg(R_SPECIALREGISTER,location.resflags.cr,R_SUBNONE),left.location.register,right.location.register))
  318. end;
  319. end;
  320. {*****************************************************************************
  321. AddSmallSet
  322. *****************************************************************************}
  323. procedure tgenppcaddnode.second_addsmallset;
  324. var
  325. cgop : TOpCg;
  326. setbase: aint;
  327. tmpreg : tregister;
  328. opdone,
  329. cmpop : boolean;
  330. begin
  331. pass_left_and_right;
  332. { when a setdef is passed, it has to be a smallset }
  333. if not is_smallset(left.resultdef) or
  334. not is_smallset(right.resultdef) then
  335. internalerror(200203301);
  336. opdone := false;
  337. cmpop:=nodetype in [equaln,unequaln,lten,gten];
  338. { set result location }
  339. if not cmpop then
  340. location_reset(location,LOC_REGISTER,def_cgsize(resultdef))
  341. else
  342. location_reset(location,LOC_FLAGS,OS_NO);
  343. load_left_right(cmpop,false);
  344. if not(cmpop) then
  345. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  346. if (left.resultdef.typ=setdef) then
  347. setbase:=tsetdef(left.resultdef).setbase
  348. else
  349. setbase:=tsetdef(right.resultdef).setbase;
  350. case nodetype of
  351. addn :
  352. begin
  353. if (nf_swapped in flags) and (left.nodetype=setelementn) then
  354. swapleftright;
  355. { are we adding set elements ? }
  356. if right.nodetype=setelementn then
  357. begin
  358. { no range support for smallsets! }
  359. if assigned(tsetelementnode(right).right) then
  360. internalerror(43244);
  361. if (right.location.loc = LOC_CONSTANT) then
  362. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
  363. aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value-setbase)),
  364. left.location.register,location.register)
  365. else
  366. begin
  367. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  368. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,aint((aword(1) shl (resultdef.size*8-1))),tmpreg);
  369. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
  370. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_INT,
  371. right.location.register,tmpreg);
  372. if left.location.loc <> LOC_CONSTANT then
  373. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,tmpreg,
  374. left.location.register,location.register)
  375. else
  376. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
  377. left.location.value,tmpreg,location.register);
  378. end;
  379. opdone := true;
  380. end
  381. else
  382. cgop := OP_OR;
  383. end;
  384. symdifn :
  385. cgop:=OP_XOR;
  386. muln :
  387. cgop:=OP_AND;
  388. subn :
  389. begin
  390. cgop:=OP_AND;
  391. if (not(nf_swapped in flags)) then
  392. if (right.location.loc=LOC_CONSTANT) then
  393. right.location.value := not(right.location.value)
  394. else
  395. opdone := true
  396. else if (left.location.loc=LOC_CONSTANT) then
  397. left.location.value := not(left.location.value)
  398. else
  399. begin
  400. swapleftright;
  401. opdone := true;
  402. end;
  403. if opdone then
  404. begin
  405. if left.location.loc = LOC_CONSTANT then
  406. begin
  407. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  408. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
  409. left.location.value,tmpreg);
  410. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC,
  411. location.register,tmpreg,right.location.register));
  412. end
  413. else
  414. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC,
  415. location.register,left.location.register,
  416. right.location.register));
  417. end;
  418. end;
  419. equaln,
  420. unequaln :
  421. begin
  422. emit_compare(true);
  423. opdone := true;
  424. end;
  425. lten,gten:
  426. begin
  427. If (not(nf_swapped in flags) and
  428. (nodetype = lten)) or
  429. ((nf_swapped in flags) and
  430. (nodetype = gten)) then
  431. swapleftright;
  432. // now we have to check whether left >= right
  433. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  434. if left.location.loc = LOC_CONSTANT then
  435. begin
  436. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,
  437. not(left.location.value),right.location.register,tmpreg);
  438. current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMPWI,tmpreg,0));
  439. // the two instructions above should be folded together by
  440. // the peepholeoptimizer
  441. end
  442. else
  443. begin
  444. if right.location.loc = LOC_CONSTANT then
  445. begin
  446. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
  447. right.location.value,tmpreg);
  448. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
  449. tmpreg,left.location.register));
  450. end
  451. else
  452. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
  453. right.location.register,left.location.register));
  454. end;
  455. location.resflags.cr := RS_CR0;
  456. location.resflags.flag := F_EQ;
  457. opdone := true;
  458. end;
  459. else
  460. internalerror(2002072701);
  461. end;
  462. if not opdone then
  463. begin
  464. // these are all commutative operations
  465. if (left.location.loc = LOC_CONSTANT) then
  466. swapleftright;
  467. if (right.location.loc = LOC_CONSTANT) then
  468. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  469. right.location.value,left.location.register,
  470. location.register)
  471. else
  472. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  473. right.location.register,left.location.register,
  474. location.register);
  475. end;
  476. end;
  477. end.