cgcpu.pas 50 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  40. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  41. procedure a_call_ref(list : TAsmList;ref: treference);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { comparison operations }
  50. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  51. l : tasmlabel);override;
  52. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  53. procedure a_jmp_name(list : TAsmList;const s : string); override;
  54. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  55. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  56. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  57. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  58. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  59. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  60. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);override;
  61. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  62. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  63. procedure g_save_registers(list : TAsmList);override;
  64. procedure g_restore_registers(list : TAsmList);override;
  65. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  66. procedure fixref(list : TAsmList;var ref : treference);
  67. function normalize_ref(list:TAsmList;ref: treference):treference;
  68. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  69. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  70. procedure a_adjust_sp(list: TAsmList; value: longint);
  71. function GetLoad(const ref : treference) : tasmop;
  72. function GetStore(const ref: treference): tasmop;
  73. end;
  74. tcg64favr = class(tcg64f32)
  75. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  76. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  77. end;
  78. procedure create_codegen;
  79. const
  80. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  81. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  82. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  83. implementation
  84. uses
  85. globals,verbose,systems,cutils,
  86. fmodule,
  87. symconst,symsym,
  88. tgobj,
  89. procinfo,cpupi,
  90. paramgr;
  91. procedure tcgavr.init_register_allocators;
  92. begin
  93. inherited init_register_allocators;
  94. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  95. [RS_R8,RS_R9,
  96. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  97. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,RS_R0,
  98. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7],first_int_imreg,[]);
  99. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  100. [RS_R26,RS_R30],first_int_imreg,[]); }
  101. end;
  102. procedure tcgavr.done_register_allocators;
  103. begin
  104. rg[R_INTREGISTER].free;
  105. // rg[R_ADDRESSREGISTER].free;
  106. inherited done_register_allocators;
  107. end;
  108. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  109. var
  110. tmp1,tmp2,tmp3 : TRegister;
  111. begin
  112. case size of
  113. OS_8,OS_S8:
  114. Result:=inherited getintregister(list, size);
  115. OS_16,OS_S16:
  116. begin
  117. Result:=inherited getintregister(list, OS_8);
  118. { ensure that the high register can be retrieved by
  119. GetNextReg
  120. }
  121. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  122. internalerror(2011021331);
  123. end;
  124. OS_32,OS_S32:
  125. begin
  126. Result:=inherited getintregister(list, OS_8);
  127. tmp1:=inherited getintregister(list, OS_8);
  128. { ensure that the high register can be retrieved by
  129. GetNextReg
  130. }
  131. if tmp1<>GetNextReg(Result) then
  132. internalerror(2011021332);
  133. tmp2:=inherited getintregister(list, OS_8);
  134. { ensure that the upper register can be retrieved by
  135. GetNextReg
  136. }
  137. if tmp2<>GetNextReg(tmp1) then
  138. internalerror(2011021333);
  139. tmp3:=inherited getintregister(list, OS_8);
  140. { ensure that the upper register can be retrieved by
  141. GetNextReg
  142. }
  143. if tmp3<>GetNextReg(tmp2) then
  144. internalerror(2011021334);
  145. end;
  146. else
  147. internalerror(2011021330);
  148. end;
  149. end;
  150. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  151. begin
  152. Result:=getintregister(list,OS_ADDR);
  153. end;
  154. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);
  155. var
  156. ref: treference;
  157. begin
  158. paraloc.check_simple_location;
  159. paramanager.allocparaloc(list,paraloc.location);
  160. case paraloc.location^.loc of
  161. LOC_REGISTER,LOC_CREGISTER:
  162. a_load_const_reg(list,size,a,paraloc.location^.register);
  163. LOC_REFERENCE:
  164. begin
  165. reference_reset(ref,paraloc.alignment);
  166. ref.base:=paraloc.location^.reference.index;
  167. ref.offset:=paraloc.location^.reference.offset;
  168. a_load_const_ref(list,size,a,ref);
  169. end;
  170. else
  171. internalerror(2002081101);
  172. end;
  173. end;
  174. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  175. var
  176. tmpref, ref: treference;
  177. location: pcgparalocation;
  178. sizeleft: aint;
  179. begin
  180. location := paraloc.location;
  181. tmpref := r;
  182. sizeleft := paraloc.intsize;
  183. while assigned(location) do
  184. begin
  185. paramanager.allocparaloc(list,location);
  186. case location^.loc of
  187. LOC_REGISTER,LOC_CREGISTER:
  188. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  189. LOC_REFERENCE:
  190. begin
  191. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  192. { doubles in softemu mode have a strange order of registers and references }
  193. if location^.size=OS_32 then
  194. g_concatcopy(list,tmpref,ref,4)
  195. else
  196. begin
  197. g_concatcopy(list,tmpref,ref,sizeleft);
  198. if assigned(location^.next) then
  199. internalerror(2005010710);
  200. end;
  201. end;
  202. LOC_VOID:
  203. begin
  204. // nothing to do
  205. end;
  206. else
  207. internalerror(2002081103);
  208. end;
  209. inc(tmpref.offset,tcgsize2size[location^.size]);
  210. dec(sizeleft,tcgsize2size[location^.size]);
  211. location := location^.next;
  212. end;
  213. end;
  214. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  215. var
  216. ref: treference;
  217. tmpreg: tregister;
  218. begin
  219. paraloc.check_simple_location;
  220. paramanager.allocparaloc(list,paraloc.location);
  221. case paraloc.location^.loc of
  222. LOC_REGISTER,LOC_CREGISTER:
  223. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  224. LOC_REFERENCE:
  225. begin
  226. reference_reset(ref,paraloc.alignment);
  227. ref.base := paraloc.location^.reference.index;
  228. ref.offset := paraloc.location^.reference.offset;
  229. tmpreg := getintregister(list,OS_ADDR);
  230. a_loadaddr_ref_reg(list,r,tmpreg);
  231. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  232. end;
  233. else
  234. internalerror(2002080701);
  235. end;
  236. end;
  237. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  238. begin
  239. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  240. {
  241. the compiler does not properly set this flag anymore in pass 1, and
  242. for now we only need it after pass 2 (I hope) (JM)
  243. if not(pi_do_call in current_procinfo.flags) then
  244. internalerror(2003060703);
  245. }
  246. include(current_procinfo.flags,pi_do_call);
  247. end;
  248. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  249. begin
  250. a_reg_alloc(list,NR_ZLO);
  251. a_reg_alloc(list,NR_ZHI);
  252. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  253. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  254. list.concat(taicpu.op_none(A_ICALL));
  255. a_reg_dealloc(list,NR_ZLO);
  256. a_reg_dealloc(list,NR_ZHI);
  257. include(current_procinfo.flags,pi_do_call);
  258. end;
  259. procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
  260. begin
  261. a_reg_alloc(list,NR_ZLO);
  262. a_reg_alloc(list,NR_ZHI);
  263. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
  264. list.concat(taicpu.op_none(A_ICALL));
  265. a_reg_dealloc(list,NR_ZLO);
  266. a_reg_dealloc(list,NR_ZHI);
  267. include(current_procinfo.flags,pi_do_call);
  268. end;
  269. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister);
  270. var
  271. mask : qword;
  272. shift : byte;
  273. i : byte;
  274. tmpreg : tregister;
  275. begin
  276. mask:=$ff;
  277. shift:=0;
  278. case op of
  279. OP_OR:
  280. begin
  281. for i:=1 to tcgsize2size[size] do
  282. begin
  283. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  284. reg:=GetNextReg(reg);
  285. mask:=mask shl 8;
  286. inc(shift,8);
  287. end;
  288. end;
  289. OP_AND:
  290. begin
  291. for i:=1 to tcgsize2size[size] do
  292. begin
  293. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  294. reg:=GetNextReg(reg);
  295. mask:=mask shl 8;
  296. inc(shift,8);
  297. end;
  298. end;
  299. OP_SUB:
  300. begin
  301. list.concat(taicpu.op_reg_const(A_SUBI,reg,a));
  302. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  303. begin
  304. for i:=2 to tcgsize2size[size] do
  305. begin
  306. reg:=GetNextReg(reg);
  307. mask:=mask shl 8;
  308. inc(shift,8);
  309. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  310. end;
  311. end;
  312. end;
  313. else
  314. begin
  315. tmpreg:=getintregister(list,size);
  316. a_load_const_reg(list,size,a,tmpreg);
  317. a_op_reg_reg(list,op,size,tmpreg,reg);
  318. end;
  319. end;
  320. end;
  321. procedure tcgavr.a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister);
  322. var
  323. tmpreg: tregister;
  324. i : integer;
  325. instr : taicpu;
  326. paraloc1,paraloc2,paraloc3 : TCGPara;
  327. begin
  328. case op of
  329. OP_ADD:
  330. begin
  331. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  332. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  333. begin
  334. for i:=2 to tcgsize2size[size] do
  335. begin
  336. dst:=GetNextReg(dst);
  337. src:=GetNextReg(src);
  338. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  339. end;
  340. end
  341. else
  342. end;
  343. OP_SUB:
  344. begin
  345. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  346. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  347. begin
  348. for i:=2 to tcgsize2size[size] do
  349. begin
  350. dst:=GetNextReg(dst);
  351. src:=GetNextReg(src);
  352. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  353. end;
  354. end;
  355. end;
  356. OP_NEG:
  357. begin
  358. if src<>dst then
  359. a_load_reg_reg(list,size,size,src,dst);
  360. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  361. begin
  362. tmpreg:=GetNextReg(dst);
  363. for i:=2 to tcgsize2size[size] do
  364. begin
  365. list.concat(taicpu.op_reg(A_COM,tmpreg));
  366. tmpreg:=GetNextReg(tmpreg);
  367. end;
  368. list.concat(taicpu.op_reg(A_NEG,dst));
  369. tmpreg:=GetNextReg(dst);
  370. for i:=2 to tcgsize2size[size] do
  371. begin
  372. list.concat(taicpu.op_reg_const(A_SBCI,dst,-1));
  373. tmpreg:=GetNextReg(tmpreg);
  374. end;
  375. end
  376. else
  377. list.concat(taicpu.op_reg(A_NEG,dst));
  378. end;
  379. OP_NOT:
  380. begin
  381. for i:=1 to tcgsize2size[size] do
  382. begin
  383. if src<>dst then
  384. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  385. list.concat(taicpu.op_reg(A_COM,dst));
  386. src:=GetNextReg(src);
  387. dst:=GetNextReg(dst);
  388. end;
  389. end;
  390. OP_MUL,OP_IMUL:
  391. begin
  392. if size in [OS_8,OS_S8] then
  393. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  394. else if size=OS_16 then
  395. begin
  396. paraloc1.init;
  397. paraloc2.init;
  398. paraloc3.init;
  399. paramanager.getintparaloc(pocall_default,1,paraloc1);
  400. paramanager.getintparaloc(pocall_default,2,paraloc2);
  401. paramanager.getintparaloc(pocall_default,3,paraloc3);
  402. a_load_const_cgpara(list,OS_8,0,paraloc3);
  403. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  404. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  405. paramanager.freecgpara(list,paraloc3);
  406. paramanager.freecgpara(list,paraloc2);
  407. paramanager.freecgpara(list,paraloc1);
  408. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  409. a_call_name(list,'FPC_MUL_WORD',false);
  410. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  411. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  412. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  413. paraloc3.done;
  414. paraloc2.done;
  415. paraloc1.done;
  416. end
  417. else
  418. internalerror(2011022002);
  419. end;
  420. OP_DIV,OP_IDIV:
  421. { special stuff, needs separate handling inside code }
  422. { generator }
  423. internalerror(2011022001);
  424. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  425. begin
  426. { TODO : Shift operators }
  427. end;
  428. OP_AND,OP_OR,OP_XOR:
  429. begin
  430. for i:=1 to tcgsize2size[size] do
  431. begin
  432. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  433. dst:=GetNextReg(dst);
  434. src:=GetNextReg(src);
  435. end;
  436. end;
  437. else
  438. internalerror(2011022004);
  439. end;
  440. end;
  441. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);
  442. var
  443. mask : qword;
  444. shift : byte;
  445. i : byte;
  446. begin
  447. mask:=$ff;
  448. shift:=0;
  449. for i:=1 to tcgsize2size[size] do
  450. begin
  451. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  452. mask:=mask shl 8;
  453. inc(shift,8);
  454. reg:=GetNextReg(reg);
  455. end;
  456. end;
  457. function tcgavr.normalize_ref(list:TAsmList;ref: treference):treference;
  458. var
  459. tmpreg : tregister;
  460. tmpref : treference;
  461. l : tasmlabel;
  462. begin
  463. tmpreg:=NR_NO;
  464. Result:=ref;
  465. if ref.addressmode<>AM_UNCHANGED then
  466. internalerror(2011021701);
  467. { Be sure to have a base register }
  468. if (ref.base=NR_NO) then
  469. begin
  470. { only symbol+offset? }
  471. if ref.index=NR_NO then
  472. exit;
  473. ref.base:=ref.index;
  474. ref.index:=NR_NO;
  475. end;
  476. if assigned(ref.symbol) or (ref.offset<>0) then
  477. begin
  478. getcpuregister(list,NR_R30);
  479. getcpuregister(list,NR_R31);
  480. tmpreg:=NR_R30;
  481. reference_reset(tmpref,0);
  482. tmpref.symbol:=ref.symbol;
  483. tmpref.offset:=ref.offset;
  484. tmpref.refaddr:=addr_lo8;
  485. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  486. tmpref.refaddr:=addr_hi8;
  487. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  488. if (ref.base<>NR_NO) then
  489. begin
  490. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  491. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  492. end;
  493. if (ref.index<>NR_NO) then
  494. begin
  495. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  496. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  497. end;
  498. ref.symbol:=nil;
  499. ref.offset:=0;
  500. ref.base:=tmpreg;
  501. ref.index:=NR_NO;
  502. end
  503. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  504. begin
  505. getcpuregister(list,NR_R30);
  506. getcpuregister(list,NR_R31);
  507. tmpreg:=NR_R30;
  508. list.concat(taicpu.op_reg_reg(A_MOV,tmpreg,ref.index));
  509. list.concat(taicpu.op_reg_reg(A_MOV,GetNextReg(tmpreg),GetNextReg(ref.index)));
  510. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  511. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  512. ref.base:=tmpreg;
  513. ref.index:=NR_NO;
  514. end
  515. else if (ref.base<>NR_NO) then
  516. begin
  517. getcpuregister(list,NR_R30);
  518. getcpuregister(list,NR_R31);
  519. tmpreg:=NR_R30;
  520. list.concat(taicpu.op_reg_reg(A_MOV,tmpreg,ref.base));
  521. list.concat(taicpu.op_reg_reg(A_MOV,GetNextReg(tmpreg),GetNextReg(ref.base)));
  522. ref.base:=tmpreg;
  523. ref.index:=NR_NO;
  524. end
  525. else if (ref.index<>NR_NO) then
  526. begin
  527. getcpuregister(list,NR_R30);
  528. getcpuregister(list,NR_R31);
  529. tmpreg:=NR_R30;
  530. list.concat(taicpu.op_reg_reg(A_MOV,tmpreg,ref.index));
  531. list.concat(taicpu.op_reg_reg(A_MOV,GetNextReg(tmpreg),GetNextReg(ref.index)));
  532. ref.base:=tmpreg;
  533. ref.index:=NR_NO;
  534. end;
  535. Result:=ref;
  536. end;
  537. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  538. var
  539. href : treference;
  540. conv_done: boolean;
  541. tmpreg : tregister;
  542. i : integer;
  543. QuickRef : Boolean;
  544. begin
  545. if not((Ref.addressmode=AM_UNCHANGED) and
  546. (Ref.symbol=nil) and
  547. ((Ref.base=NR_R28) or
  548. (Ref.base=NR_R29)) and
  549. (Ref.Index=NR_No) and
  550. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  551. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  552. href:=normalize_ref(list,Ref)
  553. else
  554. begin
  555. QuickRef:=true;
  556. href:=Ref;
  557. end;
  558. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  559. internalerror(2011021307);
  560. conv_done:=false;
  561. if tosize<>fromsize then
  562. begin
  563. conv_done:=true;
  564. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  565. fromsize:=tosize;
  566. case fromsize of
  567. OS_8:
  568. begin
  569. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  570. href.addressmode:=AM_POSTINCREMENT;
  571. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  572. for i:=2 to tcgsize2size[tosize] do
  573. begin
  574. if QuickRef then
  575. inc(href.offset);
  576. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  577. href.addressmode:=AM_POSTINCREMENT
  578. else
  579. href.addressmode:=AM_UNCHANGED;
  580. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  581. end;
  582. end;
  583. OS_S8:
  584. begin
  585. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  586. href.addressmode:=AM_POSTINCREMENT;
  587. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  588. if tcgsize2size[tosize]>1 then
  589. begin
  590. tmpreg:=getintregister(list,OS_8);
  591. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  592. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  593. list.concat(taicpu.op_reg(A_COM,tmpreg));
  594. for i:=2 to tcgsize2size[tosize] do
  595. begin
  596. if QuickRef then
  597. inc(href.offset);
  598. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  599. href.addressmode:=AM_POSTINCREMENT
  600. else
  601. href.addressmode:=AM_UNCHANGED;
  602. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  603. end;
  604. end;
  605. end;
  606. OS_16:
  607. begin
  608. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  609. href.addressmode:=AM_POSTINCREMENT;
  610. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  611. if QuickRef then
  612. inc(href.offset)
  613. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  614. href.addressmode:=AM_POSTINCREMENT
  615. else
  616. href.addressmode:=AM_UNCHANGED;
  617. reg:=GetNextReg(reg);
  618. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  619. for i:=3 to tcgsize2size[tosize] do
  620. begin
  621. if QuickRef then
  622. inc(href.offset);
  623. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  624. href.addressmode:=AM_POSTINCREMENT
  625. else
  626. href.addressmode:=AM_UNCHANGED;
  627. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  628. end;
  629. end;
  630. OS_S16:
  631. begin
  632. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  633. href.addressmode:=AM_POSTINCREMENT;
  634. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  635. if QuickRef then
  636. inc(href.offset)
  637. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  638. href.addressmode:=AM_POSTINCREMENT
  639. else
  640. href.addressmode:=AM_UNCHANGED;
  641. reg:=GetNextReg(reg);
  642. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  643. if tcgsize2size[tosize]>2 then
  644. begin
  645. tmpreg:=getintregister(list,OS_8);
  646. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  647. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  648. list.concat(taicpu.op_reg(A_COM,tmpreg));
  649. for i:=3 to tcgsize2size[tosize] do
  650. begin
  651. if QuickRef then
  652. inc(href.offset);
  653. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  654. href.addressmode:=AM_POSTINCREMENT
  655. else
  656. href.addressmode:=AM_UNCHANGED;
  657. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  658. end;
  659. end;
  660. end;
  661. else
  662. conv_done:=false;
  663. end;
  664. end;
  665. if not conv_done then
  666. begin
  667. for i:=1 to tcgsize2size[fromsize] do
  668. begin
  669. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  670. href.addressmode:=AM_POSTINCREMENT
  671. else
  672. href.addressmode:=AM_UNCHANGED;
  673. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  674. if QuickRef then
  675. inc(href.offset);
  676. reg:=GetNextReg(reg);
  677. end;
  678. end;
  679. end;
  680. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  681. const Ref : treference;reg : tregister);
  682. var
  683. href : treference;
  684. conv_done: boolean;
  685. tmpreg : tregister;
  686. i : integer;
  687. QuickRef : boolean;
  688. begin
  689. if not((Ref.addressmode=AM_UNCHANGED) and
  690. (Ref.symbol=nil) and
  691. ((Ref.base=NR_R28) or
  692. (Ref.base=NR_R29)) and
  693. (Ref.Index=NR_No) and
  694. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  695. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  696. href:=normalize_ref(list,Ref)
  697. else
  698. begin
  699. QuickRef:=true;
  700. href:=Ref;
  701. end;
  702. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  703. internalerror(2011021307);
  704. conv_done:=false;
  705. if tosize<>fromsize then
  706. begin
  707. conv_done:=true;
  708. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  709. fromsize:=tosize;
  710. case fromsize of
  711. OS_8:
  712. begin
  713. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  714. for i:=2 to tcgsize2size[tosize] do
  715. begin
  716. reg:=GetNextReg(reg);
  717. list.concat(taicpu.op_reg(A_CLR,reg));
  718. end;
  719. end;
  720. OS_S8:
  721. begin
  722. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  723. tmpreg:=reg;
  724. if tcgsize2size[tosize]>1 then
  725. begin
  726. reg:=GetNextReg(reg);
  727. list.concat(taicpu.op_reg(A_CLR,reg));
  728. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  729. list.concat(taicpu.op_reg(A_COM,reg));
  730. tmpreg:=reg;
  731. for i:=3 to tcgsize2size[tosize] do
  732. begin
  733. reg:=GetNextReg(reg);
  734. emit_mov(list,reg,tmpreg);
  735. end;
  736. end;
  737. end;
  738. OS_16:
  739. begin
  740. if not(QuickRef) then
  741. href.addressmode:=AM_POSTINCREMENT;
  742. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  743. if QuickRef then
  744. inc(href.offset);
  745. href.addressmode:=AM_UNCHANGED;
  746. reg:=GetNextReg(reg);
  747. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  748. for i:=3 to tcgsize2size[tosize] do
  749. begin
  750. reg:=GetNextReg(reg);
  751. list.concat(taicpu.op_reg(A_CLR,reg));
  752. end;
  753. end;
  754. OS_S16:
  755. begin
  756. if not(QuickRef) then
  757. href.addressmode:=AM_POSTINCREMENT;
  758. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  759. if QuickRef then
  760. inc(href.offset);
  761. href.addressmode:=AM_UNCHANGED;
  762. reg:=GetNextReg(reg);
  763. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  764. tmpreg:=reg;
  765. reg:=GetNextReg(reg);
  766. list.concat(taicpu.op_reg(A_CLR,reg));
  767. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  768. list.concat(taicpu.op_reg(A_COM,reg));
  769. tmpreg:=reg;
  770. for i:=4 to tcgsize2size[tosize] do
  771. begin
  772. reg:=GetNextReg(reg);
  773. emit_mov(list,reg,tmpreg);
  774. end;
  775. end;
  776. else
  777. conv_done:=false;
  778. end;
  779. end;
  780. if not conv_done then
  781. begin
  782. for i:=1 to tcgsize2size[fromsize] do
  783. begin
  784. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  785. href.addressmode:=AM_POSTINCREMENT
  786. else
  787. href.addressmode:=AM_UNCHANGED;
  788. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  789. if QuickRef then
  790. inc(href.offset);
  791. reg:=GetNextReg(reg);
  792. end;
  793. end;
  794. end;
  795. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  796. var
  797. conv_done: boolean;
  798. tmpreg : tregister;
  799. i : integer;
  800. begin
  801. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  802. internalerror(2011021310);
  803. conv_done:=false;
  804. if tosize<>fromsize then
  805. begin
  806. conv_done:=true;
  807. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  808. fromsize:=tosize;
  809. case fromsize of
  810. OS_8:
  811. begin
  812. emit_mov(list,reg2,reg1);
  813. for i:=2 to tcgsize2size[tosize] do
  814. begin
  815. reg2:=GetNextReg(reg2);
  816. list.concat(taicpu.op_reg(A_CLR,reg2));
  817. end;
  818. end;
  819. OS_S8:
  820. begin
  821. { dest is always at least 16 bit at this point }
  822. emit_mov(list,reg2,reg1);
  823. reg2:=GetNextReg(reg2);
  824. list.concat(taicpu.op_reg(A_CLR,reg2));
  825. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  826. list.concat(taicpu.op_reg(A_COM,reg2));
  827. tmpreg:=reg2;
  828. for i:=3 to tcgsize2size[tosize] do
  829. begin
  830. reg2:=GetNextReg(reg2);
  831. emit_mov(list,reg2,tmpreg);
  832. end;
  833. end;
  834. OS_16:
  835. begin
  836. emit_mov(list,reg2,reg1);
  837. reg1:=GetNextReg(reg1);
  838. reg2:=GetNextReg(reg2);
  839. emit_mov(list,reg2,reg1);
  840. for i:=3 to tcgsize2size[tosize] do
  841. begin
  842. reg2:=GetNextReg(reg2);
  843. list.concat(taicpu.op_reg(A_CLR,reg2));
  844. end;
  845. end;
  846. OS_S16:
  847. begin
  848. { dest is always at least 32 bit at this point }
  849. emit_mov(list,reg2,reg1);
  850. reg1:=GetNextReg(reg1);
  851. reg2:=GetNextReg(reg2);
  852. emit_mov(list,reg2,reg1);
  853. reg2:=GetNextReg(reg2);
  854. list.concat(taicpu.op_reg(A_CLR,reg2));
  855. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  856. list.concat(taicpu.op_reg(A_COM,reg2));
  857. tmpreg:=reg2;
  858. for i:=4 to tcgsize2size[tosize] do
  859. begin
  860. reg2:=GetNextReg(reg2);
  861. emit_mov(list,reg2,tmpreg);
  862. end;
  863. end;
  864. else
  865. conv_done:=false;
  866. end;
  867. end;
  868. if not conv_done and (reg1<>reg2) then
  869. begin
  870. for i:=1 to tcgsize2size[fromsize] do
  871. begin
  872. emit_mov(list,reg2,reg1);
  873. reg1:=GetNextReg(reg1);
  874. reg2:=GetNextReg(reg2);
  875. end;
  876. end;
  877. end;
  878. { comparison operations }
  879. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  880. l : tasmlabel);
  881. begin
  882. { TODO : a_cmp_const_reg_label }
  883. end;
  884. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  885. begin
  886. { TODO : a_cmp_reg_reg_label }
  887. end;
  888. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  889. begin
  890. internalerror(2011021313);
  891. end;
  892. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  893. var
  894. ai : taicpu;
  895. begin
  896. ai:=taicpu.op_sym(A_JMP,l);
  897. ai.is_jmp:=true;
  898. list.concat(ai);
  899. end;
  900. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  901. var
  902. ai : taicpu;
  903. begin
  904. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  905. ai.is_jmp:=true;
  906. list.concat(ai);
  907. end;
  908. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  909. begin
  910. { TODO : implement g_flags2reg }
  911. end;
  912. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  913. var
  914. i : integer;
  915. begin
  916. case value of
  917. 0:
  918. ;
  919. -14..-1:
  920. begin
  921. if ((-value) mod 2)<>0 then
  922. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  923. for i:=1 to (-value) div 2 do
  924. list.concat(taicpu.op_const(A_RCALL,0));
  925. end;
  926. 1..7:
  927. begin
  928. for i:=1 to value do
  929. list.concat(taicpu.op_reg(A_POP,NR_R0));
  930. end;
  931. else
  932. begin
  933. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  934. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  935. // get SREG
  936. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  937. // block interrupts
  938. list.concat(taicpu.op_none(A_CLI));
  939. // write high SP
  940. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  941. // release interrupts
  942. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  943. // write low SP
  944. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  945. end;
  946. end;
  947. end;
  948. function tcgavr.GetLoad(const ref: treference) : tasmop;
  949. begin
  950. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  951. result:=A_LDS
  952. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  953. result:=A_LDD
  954. else
  955. result:=A_LD;
  956. end;
  957. function tcgavr.GetStore(const ref: treference) : tasmop;
  958. begin
  959. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  960. result:=A_STS
  961. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  962. result:=A_STD
  963. else
  964. result:=A_ST;
  965. end;
  966. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  967. var
  968. regs : tcpuregisterset;
  969. reg : tsuperregister;
  970. begin
  971. if not(nostackframe) then
  972. begin
  973. { save int registers }
  974. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  975. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  976. regs:=regs+[RS_R28,RS_R29];
  977. for reg:=RS_R31 downto RS_R0 do
  978. if reg in regs then
  979. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  980. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  981. begin
  982. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  983. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  984. end
  985. else
  986. { the framepointer cannot be omitted on avr because sp
  987. is not a register but part of the i/o map
  988. }
  989. internalerror(2011021901);
  990. a_adjust_sp(list,-localsize);
  991. end;
  992. end;
  993. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  994. var
  995. regs : tcpuregisterset;
  996. reg : TSuperRegister;
  997. LocalSize : longint;
  998. begin
  999. if not(nostackframe) then
  1000. begin
  1001. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1002. begin
  1003. LocalSize:=current_procinfo.calc_stackframe_size;
  1004. a_adjust_sp(list,LocalSize);
  1005. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1006. for reg:=RS_R0 to RS_R31 do
  1007. if reg in regs then
  1008. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1009. end
  1010. else
  1011. { the framepointer cannot be omitted on avr because sp
  1012. is not a register but part of the i/o map
  1013. }
  1014. internalerror(2011021902);
  1015. end;
  1016. list.concat(taicpu.op_none(A_RET));
  1017. end;
  1018. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1019. var
  1020. tmpref : treference;
  1021. begin
  1022. if ref.addressmode<>AM_UNCHANGED then
  1023. internalerror(2011021701);
  1024. if assigned(ref.symbol) or (ref.offset<>0) then
  1025. begin
  1026. reference_reset(tmpref,0);
  1027. tmpref.symbol:=ref.symbol;
  1028. tmpref.offset:=ref.offset;
  1029. tmpref.refaddr:=addr_lo8;
  1030. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1031. tmpref.refaddr:=addr_hi8;
  1032. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1033. if (ref.base<>NR_NO) then
  1034. begin
  1035. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1036. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1037. end;
  1038. if (ref.index<>NR_NO) then
  1039. begin
  1040. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1041. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1042. end;
  1043. end
  1044. else if (ref.base<>NR_NO)then
  1045. begin
  1046. emit_mov(list,r,ref.base);
  1047. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1048. if (ref.index<>NR_NO) then
  1049. begin
  1050. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1051. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1052. end;
  1053. end
  1054. else if (ref.index<>NR_NO) then
  1055. begin
  1056. emit_mov(list,r,ref.index);
  1057. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1058. end;
  1059. end;
  1060. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1061. begin
  1062. internalerror(2011021320);
  1063. end;
  1064. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  1065. var
  1066. paraloc1,paraloc2,paraloc3 : TCGPara;
  1067. begin
  1068. paraloc1.init;
  1069. paraloc2.init;
  1070. paraloc3.init;
  1071. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1072. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1073. paramanager.getintparaloc(pocall_default,3,paraloc3);
  1074. a_load_const_cgpara(list,OS_INT,len,paraloc3);
  1075. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1076. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1077. paramanager.freecgpara(list,paraloc3);
  1078. paramanager.freecgpara(list,paraloc2);
  1079. paramanager.freecgpara(list,paraloc1);
  1080. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1081. a_call_name_static(list,'FPC_MOVE');
  1082. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1083. paraloc3.done;
  1084. paraloc2.done;
  1085. paraloc1.done;
  1086. end;
  1087. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);
  1088. var
  1089. countreg,tmpreg : tregister;
  1090. srcref,dstref : treference;
  1091. copysize,countregsize : tcgsize;
  1092. l : TAsmLabel;
  1093. i : longint;
  1094. begin
  1095. if len>16 then
  1096. begin
  1097. current_asmdata.getjumplabel(l);
  1098. reference_reset(srcref,0);
  1099. reference_reset(dstref,0);
  1100. srcref.base:=NR_R30;
  1101. srcref.addressmode:=AM_POSTINCREMENT;
  1102. dstref.base:=NR_R26;
  1103. dstref.addressmode:=AM_POSTINCREMENT;
  1104. copysize:=OS_8;
  1105. if len<256 then
  1106. countregsize:=OS_8
  1107. else if len<65536 then
  1108. countregsize:=OS_16
  1109. else
  1110. internalerror(2011022007);
  1111. countreg:=getintregister(list,countregsize);
  1112. a_load_const_reg(list,countregsize,len,countreg);
  1113. a_loadaddr_ref_reg(list,source,NR_R30);
  1114. tmpreg:=getaddressregister(list);
  1115. a_loadaddr_ref_reg(list,dest,tmpreg);
  1116. { X is used for spilling code so we can load it
  1117. only by a push/pop sequence, this can be
  1118. optimized later on by the peephole optimizer
  1119. }
  1120. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1121. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1122. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1123. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1124. cg.a_label(list,l);
  1125. tmpreg:=getintregister(list,copysize);
  1126. list.concat(taicpu.op_reg_ref(GetLoad(srcref),tmpreg,srcref));
  1127. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,tmpreg));
  1128. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1129. a_jmp_flags(list,F_NE,l);
  1130. // keep registers alive
  1131. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1132. end
  1133. else
  1134. begin
  1135. for i:=1 to len do
  1136. begin
  1137. srcref:=normalize_ref(list,source);
  1138. dstref:=normalize_ref(list,source);
  1139. copysize:=OS_8;
  1140. tmpreg:=getintregister(list,copysize);
  1141. if (srcref.base<>NR_NO) and (i<len) then
  1142. srcref.addressmode:=AM_POSTINCREMENT
  1143. else
  1144. srcref.addressmode:=AM_UNCHANGED;
  1145. if (dstref.base<>NR_NO) and (i<len) then
  1146. dstref.addressmode:=AM_POSTINCREMENT
  1147. else
  1148. dstref.addressmode:=AM_UNCHANGED;
  1149. list.concat(taicpu.op_reg_ref(GetLoad(srcref),tmpreg,srcref));
  1150. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,tmpreg));
  1151. if (dstref.offset<>0) or assigned(dstref.symbol) then
  1152. inc(dstref.offset);
  1153. if (srcref.offset<>0) or assigned(srcref.symbol) then
  1154. inc(srcref.offset);
  1155. end;
  1156. end;
  1157. end;
  1158. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1159. var
  1160. hl : tasmlabel;
  1161. ai : taicpu;
  1162. cond : TAsmCond;
  1163. begin
  1164. if not(cs_check_overflow in current_settings.localswitches) then
  1165. exit;
  1166. current_asmdata.getjumplabel(hl);
  1167. if not ((def.typ=pointerdef) or
  1168. ((def.typ=orddef) and
  1169. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,pasbool]))) then
  1170. cond:=C_VC
  1171. else
  1172. cond:=C_CC;
  1173. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1174. ai.SetCondition(cond);
  1175. ai.is_jmp:=true;
  1176. list.concat(ai);
  1177. a_call_name(list,'FPC_OVERFLOW',false);
  1178. a_label(list,hl);
  1179. end;
  1180. procedure tcgavr.g_save_registers(list: TAsmList);
  1181. begin
  1182. { this is done by the entry code }
  1183. end;
  1184. procedure tcgavr.g_restore_registers(list: TAsmList);
  1185. begin
  1186. { this is done by the exit code }
  1187. end;
  1188. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1189. var
  1190. ai : taicpu;
  1191. begin
  1192. { TODO : fix a_jmp_cond }
  1193. {
  1194. ai:=Taicpu.Op_sym(A_BRxx,l);
  1195. case cond of
  1196. OC_EQ:
  1197. ai.SetCondition(C_EQ);
  1198. OC_GT
  1199. OC_LT
  1200. OC_GTE
  1201. OC_LTE
  1202. OC_NE
  1203. OC_BE
  1204. OC_B
  1205. OC_AE
  1206. OC_A:
  1207. ai.is_jmp:=true;
  1208. list.concat(ai);
  1209. }
  1210. end;
  1211. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1212. begin
  1213. internalerror(2011021324);
  1214. end;
  1215. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1216. var
  1217. instr: taicpu;
  1218. begin
  1219. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1220. list.Concat(instr);
  1221. { Notify the register allocator that we have written a move instruction so
  1222. it can try to eliminate it. }
  1223. add_move_instruction(instr);
  1224. end;
  1225. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1226. begin
  1227. { TODO : a_op64_reg_reg }
  1228. end;
  1229. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1230. begin
  1231. { TODO : a_op64_const_reg }
  1232. end;
  1233. procedure create_codegen;
  1234. begin
  1235. cg:=tcgavr.create;
  1236. cg64:=tcg64favr.create;
  1237. end;
  1238. end.