cgobj.pas 87 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. {# @abstract(Abstract code generator)
  38. This class implements an abstract instruction generator. Some of
  39. the methods of this class are generic, while others must
  40. be overriden for all new processors which will be supported
  41. by Free Pascal. For 32-bit processors, the base class
  42. sould be @link(tcg64f32) and not @var(tcg).
  43. }
  44. tcg = class
  45. public
  46. alignment : talignment;
  47. rg : array[tregistertype] of trgobj;
  48. t_times : longint;
  49. {$ifdef flowgraph}
  50. aktflownode:word;
  51. {$endif}
  52. {************************************************}
  53. { basic routines }
  54. constructor create;
  55. {# Initialize the register allocators needed for the codegenerator.}
  56. procedure init_register_allocators;virtual;
  57. {# Clean up the register allocators needed for the codegenerator.}
  58. procedure done_register_allocators;virtual;
  59. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  60. procedure set_regalloc_extend_backwards(b: boolean);
  61. {$ifdef flowgraph}
  62. procedure init_flowgraph;
  63. procedure done_flowgraph;
  64. {$endif}
  65. {# Gets a register suitable to do integer operations on.}
  66. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  67. {# Gets a register suitable to do integer operations on.}
  68. function getaddressregister(list:TAsmList):Tregister;virtual;
  69. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  70. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  72. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  73. the cpu specific child cg object have such a method?}
  74. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  75. procedure add_move_instruction(instr:Taicpu);virtual;
  76. function uses_registers(rt:Tregistertype):boolean;virtual;
  77. {# Get a specific register.}
  78. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  79. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  80. {# Get multiple registers specified.}
  81. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  82. {# Free multiple registers specified.}
  83. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. procedure allocallcpuregisters(list:TAsmList);virtual;
  85. procedure deallocallcpuregisters(list:TAsmList);virtual;
  86. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  87. procedure translate_register(var reg : tregister);
  88. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  89. {# Emit a label to the instruction stream. }
  90. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  91. {# Allocates register r by inserting a pai_realloc record }
  92. procedure a_reg_alloc(list : TAsmList;r : tregister);
  93. {# Deallocates register r by inserting a pa_regdealloc record}
  94. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  95. { Synchronize register, make sure it is still valid }
  96. procedure a_reg_sync(list : TAsmList;r : tregister);
  97. {# Pass a parameter, which is located in a register, to a routine.
  98. This routine should push/send the parameter to the routine, as
  99. required by the specific processor ABI and routine modifiers.
  100. This must be overriden for each CPU target.
  101. @param(size size of the operand in the register)
  102. @param(r register source of the operand)
  103. @param(cgpara where the parameter will be stored)
  104. }
  105. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  106. {# Pass a parameter, which is a constant, to a routine.
  107. A generic version is provided. This routine should
  108. be overriden for optimization purposes if the cpu
  109. permits directly sending this type of parameter.
  110. @param(size size of the operand in constant)
  111. @param(a value of constant to send)
  112. @param(cgpara where the parameter will be stored)
  113. }
  114. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  115. {# Pass the value of a parameter, which is located in memory, to a routine.
  116. A generic version is provided. This routine should
  117. be overriden for optimization purposes if the cpu
  118. permits directly sending this type of parameter.
  119. @param(size size of the operand in constant)
  120. @param(r Memory reference of value to send)
  121. @param(cgpara where the parameter will be stored)
  122. }
  123. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  124. {# Pass the value of a parameter, which can be located either in a register or memory location,
  125. to a routine.
  126. A generic version is provided.
  127. @param(l location of the operand to send)
  128. @param(nr parameter number (starting from one) of routine (from left to right))
  129. @param(cgpara where the parameter will be stored)
  130. }
  131. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  132. {# Pass the address of a reference to a routine. This routine
  133. will calculate the address of the reference, and pass this
  134. calculated address as a parameter.
  135. A generic version is provided. This routine should
  136. be overriden for optimization purposes if the cpu
  137. permits directly sending this type of parameter.
  138. @param(r reference to get address from)
  139. @param(nr parameter number (starting from one) of routine (from left to right))
  140. }
  141. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  142. { Remarks:
  143. * If a method specifies a size you have only to take care
  144. of that number of bits, i.e. load_const_reg with OP_8 must
  145. only load the lower 8 bit of the specified register
  146. the rest of the register can be undefined
  147. if necessary the compiler will call a method
  148. to zero or sign extend the register
  149. * The a_load_XX_XX with OP_64 needn't to be
  150. implemented for 32 bit
  151. processors, the code generator takes care of that
  152. * the addr size is for work with the natural pointer
  153. size
  154. * the procedures without fpu/mm are only for integer usage
  155. * normally the first location is the source and the
  156. second the destination
  157. }
  158. {# Emits instruction to call the method specified by symbol name.
  159. This routine must be overriden for each new target cpu.
  160. There is no a_call_ref because loading the reference will use
  161. a temp register on most cpu's resulting in conflicts with the
  162. registers used for the parameters (PFV)
  163. }
  164. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  165. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  166. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  167. { same as a_call_name, might be overriden on certain architectures to emit
  168. static calls without usage of a got trampoline }
  169. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  170. { move instructions }
  171. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  172. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  173. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  174. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  175. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  176. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  177. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  178. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  179. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  180. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  181. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  182. { fpu move instructions }
  183. procedure a_loadfpu_reg_reg(list: TAsmList; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  184. procedure a_loadfpu_ref_reg(list: TAsmList; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  185. procedure a_loadfpu_reg_ref(list: TAsmList; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  186. procedure a_loadfpu_loc_reg(list: TAsmList; const loc: tlocation; const reg: tregister);
  187. procedure a_loadfpu_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation);
  188. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  189. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  190. { vector register move instructions }
  191. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  192. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  193. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  194. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  195. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  196. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  197. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  198. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  199. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  200. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  201. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  202. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  203. { basic arithmetic operations }
  204. { note: for operators which require only one argument (not, neg), use }
  205. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  206. { that in this case the *second* operand is used as both source and }
  207. { destination (JM) }
  208. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  209. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  210. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  211. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  212. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  213. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  214. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  215. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  216. { trinary operations for processors that support them, 'emulated' }
  217. { on others. None with "ref" arguments since I don't think there }
  218. { are any processors that support it (JM) }
  219. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  220. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  221. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  222. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  223. { comparison operations }
  224. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  225. l : tasmlabel);virtual; abstract;
  226. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  227. l : tasmlabel); virtual;
  228. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  229. l : tasmlabel);
  230. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  231. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  232. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  233. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  234. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  235. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  236. l : tasmlabel);
  237. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  238. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  239. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  240. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  241. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  242. }
  243. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  244. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  245. {
  246. This routine tries to optimize the op_const_reg/ref opcode, and should be
  247. called at the start of a_op_const_reg/ref. It returns the actual opcode
  248. to emit, and the constant value to emit. This function can opcode OP_NONE to
  249. remove the opcode and OP_MOVE to replace it with a simple load
  250. @param(op The opcode to emit, returns the opcode which must be emitted)
  251. @param(a The constant which should be emitted, returns the constant which must
  252. be emitted)
  253. }
  254. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  255. {#
  256. This routine is used in exception management nodes. It should
  257. save the exception reason currently in the FUNCTION_RETURN_REG. The
  258. save should be done either to a temp (pointed to by href).
  259. or on the stack (pushing the value on the stack).
  260. The size of the value to save is OS_S32. The default version
  261. saves the exception reason to a temp. memory area.
  262. }
  263. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  264. {#
  265. This routine is used in exception management nodes. It should
  266. save the exception reason constant. The
  267. save should be done either to a temp (pointed to by href).
  268. or on the stack (pushing the value on the stack).
  269. The size of the value to save is OS_S32. The default version
  270. saves the exception reason to a temp. memory area.
  271. }
  272. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  273. {#
  274. This routine is used in exception management nodes. It should
  275. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  276. should either be in the temp. area (pointed to by href , href should
  277. *NOT* be freed) or on the stack (the value should be popped).
  278. The size of the value to save is OS_S32. The default version
  279. saves the exception reason to a temp. memory area.
  280. }
  281. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  282. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  283. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  284. {# This should emit the opcode to copy len bytes from the source
  285. to destination.
  286. It must be overriden for each new target processor.
  287. @param(source Source reference of copy)
  288. @param(dest Destination reference of copy)
  289. }
  290. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  291. {# This should emit the opcode to copy len bytes from the an unaligned source
  292. to destination.
  293. It must be overriden for each new target processor.
  294. @param(source Source reference of copy)
  295. @param(dest Destination reference of copy)
  296. }
  297. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  298. {# This should emit the opcode to a shortrstring from the source
  299. to destination.
  300. @param(source Source reference of copy)
  301. @param(dest Destination reference of copy)
  302. }
  303. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  304. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  305. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  306. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  307. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  308. {# Generates range checking code. It is to note
  309. that this routine does not need to be overriden,
  310. as it takes care of everything.
  311. @param(p Node which contains the value to check)
  312. @param(todef Type definition of node to range check)
  313. }
  314. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  315. {# Generates overflow checking code for a node }
  316. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  317. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  318. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  319. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  320. {# Emits instructions when compilation is done in profile
  321. mode (this is set as a command line option). The default
  322. behavior does nothing, should be overriden as required.
  323. }
  324. procedure g_profilecode(list : TAsmList);virtual;
  325. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  326. @param(size Number of bytes to allocate)
  327. }
  328. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  329. {# Emits instruction for allocating the locals in entry
  330. code of a routine. This is one of the first
  331. routine called in @var(genentrycode).
  332. @param(localsize Number of bytes to allocate as locals)
  333. }
  334. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  335. {# Emits instructions for returning from a subroutine.
  336. Should also restore the framepointer and stack.
  337. @param(parasize Number of bytes of parameters to deallocate from stack)
  338. }
  339. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  340. {# This routine is called when generating the code for the entry point
  341. of a routine. It should save all registers which are not used in this
  342. routine, and which should be declared as saved in the std_saved_registers
  343. set.
  344. This routine is mainly used when linking to code which is generated
  345. by ABI-compliant compilers (like GCC), to make sure that the reserved
  346. registers of that ABI are not clobbered.
  347. @param(usedinproc Registers which are used in the code of this routine)
  348. }
  349. procedure g_save_standard_registers(list:TAsmList);virtual;
  350. {# This routine is called when generating the code for the exit point
  351. of a routine. It should restore all registers which were previously
  352. saved in @var(g_save_standard_registers).
  353. @param(usedinproc Registers which are used in the code of this routine)
  354. }
  355. procedure g_restore_standard_registers(list:TAsmList);virtual;
  356. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  357. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  358. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  359. end;
  360. {$ifndef cpu64bit}
  361. {# @abstract(Abstract code generator for 64 Bit operations)
  362. This class implements an abstract code generator class
  363. for 64 Bit operations.
  364. }
  365. tcg64 = class
  366. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  367. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  368. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  369. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  370. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  371. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  372. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  373. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  374. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  375. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  376. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  377. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  378. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  379. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  380. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  381. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  382. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  383. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  384. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  385. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  386. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  387. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  388. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  389. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  390. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  391. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  392. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  393. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  394. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  395. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  396. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  397. {
  398. This routine tries to optimize the const_reg opcode, and should be
  399. called at the start of a_op64_const_reg. It returns the actual opcode
  400. to emit, and the constant value to emit. If this routine returns
  401. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  402. @param(op The opcode to emit, returns the opcode which must be emitted)
  403. @param(a The constant which should be emitted, returns the constant which must
  404. be emitted)
  405. @param(reg The register to emit the opcode with, returns the register with
  406. which the opcode will be emitted)
  407. }
  408. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  409. { override to catch 64bit rangechecks }
  410. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  411. end;
  412. {$endif cpu64bit}
  413. var
  414. {# Main code generator class }
  415. cg : tcg;
  416. {$ifndef cpu64bit}
  417. {# Code generator class for all operations working with 64-Bit operands }
  418. cg64 : tcg64;
  419. {$endif cpu64bit}
  420. implementation
  421. uses
  422. globals,options,systems,
  423. verbose,defutil,paramgr,symsym,
  424. tgobj,cutils,procinfo;
  425. {*****************************************************************************
  426. basic functionallity
  427. ******************************************************************************}
  428. constructor tcg.create;
  429. begin
  430. end;
  431. {*****************************************************************************
  432. register allocation
  433. ******************************************************************************}
  434. procedure tcg.init_register_allocators;
  435. begin
  436. fillchar(rg,sizeof(rg),0);
  437. add_reg_instruction_hook:=@add_reg_instruction;
  438. end;
  439. procedure tcg.done_register_allocators;
  440. begin
  441. { Safety }
  442. fillchar(rg,sizeof(rg),0);
  443. add_reg_instruction_hook:=nil;
  444. end;
  445. {$ifdef flowgraph}
  446. procedure Tcg.init_flowgraph;
  447. begin
  448. aktflownode:=0;
  449. end;
  450. procedure Tcg.done_flowgraph;
  451. begin
  452. end;
  453. {$endif}
  454. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  455. begin
  456. if not assigned(rg[R_INTREGISTER]) then
  457. internalerror(200312122);
  458. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  459. end;
  460. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  461. begin
  462. if not assigned(rg[R_FPUREGISTER]) then
  463. internalerror(200312123);
  464. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  465. end;
  466. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  467. begin
  468. if not assigned(rg[R_MMREGISTER]) then
  469. internalerror(2003121214);
  470. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  471. end;
  472. function tcg.getaddressregister(list:TAsmList):Tregister;
  473. begin
  474. if assigned(rg[R_ADDRESSREGISTER]) then
  475. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  476. else
  477. begin
  478. if not assigned(rg[R_INTREGISTER]) then
  479. internalerror(200312121);
  480. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  481. end;
  482. end;
  483. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  484. var
  485. subreg:Tsubregister;
  486. begin
  487. subreg:=cgsize2subreg(size);
  488. result:=reg;
  489. setsubreg(result,subreg);
  490. { notify RA }
  491. if result<>reg then
  492. list.concat(tai_regalloc.resize(result));
  493. end;
  494. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  495. begin
  496. if not assigned(rg[getregtype(r)]) then
  497. internalerror(200312125);
  498. rg[getregtype(r)].getcpuregister(list,r);
  499. end;
  500. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  501. begin
  502. if not assigned(rg[getregtype(r)]) then
  503. internalerror(200312126);
  504. rg[getregtype(r)].ungetcpuregister(list,r);
  505. end;
  506. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  507. begin
  508. if assigned(rg[rt]) then
  509. rg[rt].alloccpuregisters(list,r)
  510. else
  511. internalerror(200310092);
  512. end;
  513. procedure tcg.allocallcpuregisters(list:TAsmList);
  514. begin
  515. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  516. {$ifndef i386}
  517. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  518. {$ifdef cpumm}
  519. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  520. {$endif cpumm}
  521. {$endif i386}
  522. end;
  523. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  524. begin
  525. if assigned(rg[rt]) then
  526. rg[rt].dealloccpuregisters(list,r)
  527. else
  528. internalerror(200310093);
  529. end;
  530. procedure tcg.deallocallcpuregisters(list:TAsmList);
  531. begin
  532. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  533. {$ifndef i386}
  534. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  535. {$ifdef cpumm}
  536. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  537. {$endif cpumm}
  538. {$endif i386}
  539. end;
  540. function tcg.uses_registers(rt:Tregistertype):boolean;
  541. begin
  542. if assigned(rg[rt]) then
  543. result:=rg[rt].uses_registers
  544. else
  545. result:=false;
  546. end;
  547. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  548. var
  549. rt : tregistertype;
  550. begin
  551. rt:=getregtype(r);
  552. { Only add it when a register allocator is configured.
  553. No IE can be generated, because the VMT is written
  554. without a valid rg[] }
  555. if assigned(rg[rt]) then
  556. rg[rt].add_reg_instruction(instr,r);
  557. end;
  558. procedure tcg.add_move_instruction(instr:Taicpu);
  559. var
  560. rt : tregistertype;
  561. begin
  562. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  563. if assigned(rg[rt]) then
  564. rg[rt].add_move_instruction(instr)
  565. else
  566. internalerror(200310095);
  567. end;
  568. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  569. var
  570. rt : tregistertype;
  571. begin
  572. for rt:=low(rg) to high(rg) do
  573. begin
  574. if assigned(rg[rt]) then
  575. rg[rt].extend_live_range_backwards := b;;
  576. end;
  577. end;
  578. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  579. var
  580. rt : tregistertype;
  581. begin
  582. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  583. begin
  584. if assigned(rg[rt]) then
  585. rg[rt].do_register_allocation(list,headertai);
  586. end;
  587. { running the other register allocator passes could require addition int/addr. registers
  588. when spilling so run int/addr register allocation at the end }
  589. if assigned(rg[R_INTREGISTER]) then
  590. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  591. if assigned(rg[R_ADDRESSREGISTER]) then
  592. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  593. end;
  594. procedure tcg.translate_register(var reg : tregister);
  595. begin
  596. rg[getregtype(reg)].translate_register(reg);
  597. end;
  598. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  599. begin
  600. list.concat(tai_regalloc.alloc(r,nil));
  601. end;
  602. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  603. begin
  604. list.concat(tai_regalloc.dealloc(r,nil));
  605. end;
  606. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  607. var
  608. instr : tai;
  609. begin
  610. instr:=tai_regalloc.sync(r);
  611. list.concat(instr);
  612. add_reg_instruction(instr,r);
  613. end;
  614. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  615. begin
  616. list.concat(tai_label.create(l));
  617. end;
  618. {*****************************************************************************
  619. for better code generation these methods should be overridden
  620. ******************************************************************************}
  621. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  622. var
  623. ref : treference;
  624. begin
  625. cgpara.check_simple_location;
  626. case cgpara.location^.loc of
  627. LOC_REGISTER,LOC_CREGISTER:
  628. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  629. LOC_REFERENCE,LOC_CREFERENCE:
  630. begin
  631. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  632. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  633. end
  634. else
  635. internalerror(2002071004);
  636. end;
  637. end;
  638. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  639. var
  640. ref : treference;
  641. begin
  642. cgpara.check_simple_location;
  643. case cgpara.location^.loc of
  644. LOC_REGISTER,LOC_CREGISTER:
  645. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  646. LOC_REFERENCE,LOC_CREFERENCE:
  647. begin
  648. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  649. a_load_const_ref(list,cgpara.location^.size,a,ref);
  650. end
  651. else
  652. internalerror(2002071004);
  653. end;
  654. end;
  655. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  656. var
  657. ref : treference;
  658. begin
  659. cgpara.check_simple_location;
  660. case cgpara.location^.loc of
  661. LOC_REGISTER,LOC_CREGISTER:
  662. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  663. LOC_REFERENCE,LOC_CREFERENCE:
  664. begin
  665. reference_reset(ref);
  666. ref.base:=cgpara.location^.reference.index;
  667. ref.offset:=cgpara.location^.reference.offset;
  668. { use concatcopy, because it can also be a float which fails when
  669. load_ref_ref is used }
  670. g_concatcopy(list,r,ref,cgpara.intsize);
  671. end
  672. else
  673. internalerror(2002071004);
  674. end;
  675. end;
  676. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  677. begin
  678. case l.loc of
  679. LOC_REGISTER,
  680. LOC_CREGISTER :
  681. a_param_reg(list,l.size,l.register,cgpara);
  682. LOC_CONSTANT :
  683. a_param_const(list,l.size,l.value,cgpara);
  684. LOC_CREFERENCE,
  685. LOC_REFERENCE :
  686. a_param_ref(list,l.size,l.reference,cgpara);
  687. else
  688. internalerror(2002032211);
  689. end;
  690. end;
  691. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  692. var
  693. hr : tregister;
  694. begin
  695. cgpara.check_simple_location;
  696. hr:=getaddressregister(list);
  697. a_loadaddr_ref_reg(list,r,hr);
  698. a_param_reg(list,OS_ADDR,hr,cgpara);
  699. end;
  700. {****************************************************************************
  701. some generic implementations
  702. ****************************************************************************}
  703. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  704. var
  705. tmpreg: tregister;
  706. begin
  707. { verify if we have the same reference }
  708. if references_equal(sref,dref) then
  709. exit;
  710. tmpreg:=getintregister(list,tosize);
  711. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  712. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  713. end;
  714. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  715. var
  716. tmpreg: tregister;
  717. begin
  718. tmpreg:=getintregister(list,size);
  719. a_load_const_reg(list,size,a,tmpreg);
  720. a_load_reg_ref(list,size,size,tmpreg,ref);
  721. end;
  722. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  723. begin
  724. case loc.loc of
  725. LOC_REFERENCE,LOC_CREFERENCE:
  726. a_load_const_ref(list,loc.size,a,loc.reference);
  727. LOC_REGISTER,LOC_CREGISTER:
  728. a_load_const_reg(list,loc.size,a,loc.register);
  729. else
  730. internalerror(200203272);
  731. end;
  732. end;
  733. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  734. begin
  735. case loc.loc of
  736. LOC_REFERENCE,LOC_CREFERENCE:
  737. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  738. LOC_REGISTER,LOC_CREGISTER:
  739. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  740. else
  741. internalerror(200203271);
  742. end;
  743. end;
  744. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  745. begin
  746. case loc.loc of
  747. LOC_REFERENCE,LOC_CREFERENCE:
  748. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  749. LOC_REGISTER,LOC_CREGISTER:
  750. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  751. LOC_CONSTANT:
  752. a_load_const_reg(list,tosize,loc.value,reg);
  753. else
  754. internalerror(200109092);
  755. end;
  756. end;
  757. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  758. begin
  759. case loc.loc of
  760. LOC_REFERENCE,LOC_CREFERENCE:
  761. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  762. LOC_REGISTER,LOC_CREGISTER:
  763. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  764. LOC_CONSTANT:
  765. a_load_const_ref(list,tosize,loc.value,ref);
  766. else
  767. internalerror(200109302);
  768. end;
  769. end;
  770. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  771. var
  772. powerval : longint;
  773. begin
  774. case op of
  775. OP_OR :
  776. begin
  777. { or with zero returns same result }
  778. if a = 0 then
  779. op:=OP_NONE
  780. else
  781. { or with max returns max }
  782. if a = -1 then
  783. op:=OP_MOVE;
  784. end;
  785. OP_AND :
  786. begin
  787. { and with max returns same result }
  788. if (a = -1) then
  789. op:=OP_NONE
  790. else
  791. { and with 0 returns 0 }
  792. if a=0 then
  793. op:=OP_MOVE;
  794. end;
  795. OP_DIV :
  796. begin
  797. { division by 1 returns result }
  798. if a = 1 then
  799. op:=OP_NONE
  800. else if ispowerof2(int64(a), powerval) then
  801. begin
  802. a := powerval;
  803. op:= OP_SHR;
  804. end;
  805. end;
  806. OP_IDIV:
  807. begin
  808. if a = 1 then
  809. op:=OP_NONE;
  810. end;
  811. OP_MUL,OP_IMUL:
  812. begin
  813. if a = 1 then
  814. op:=OP_NONE
  815. else
  816. if a=0 then
  817. op:=OP_MOVE
  818. else if ispowerof2(int64(a), powerval) then
  819. begin
  820. a := powerval;
  821. op:= OP_SHL;
  822. end;
  823. end;
  824. OP_ADD,OP_SUB:
  825. begin
  826. if a = 0 then
  827. op:=OP_NONE;
  828. end;
  829. OP_SAR,OP_SHL,OP_SHR:
  830. begin
  831. if a = 0 then
  832. op:=OP_NONE;
  833. end;
  834. end;
  835. end;
  836. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; const loc: tlocation; const reg: tregister);
  837. begin
  838. case loc.loc of
  839. LOC_REFERENCE, LOC_CREFERENCE:
  840. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  841. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  842. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  843. else
  844. internalerror(200203301);
  845. end;
  846. end;
  847. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation);
  848. begin
  849. case loc.loc of
  850. LOC_REFERENCE, LOC_CREFERENCE:
  851. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  852. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  853. a_loadfpu_reg_reg(list,size,reg,loc.register);
  854. else
  855. internalerror(48991);
  856. end;
  857. end;
  858. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  859. var
  860. ref : treference;
  861. begin
  862. case cgpara.location^.loc of
  863. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  864. begin
  865. cgpara.check_simple_location;
  866. a_loadfpu_reg_reg(list,size,r,cgpara.location^.register);
  867. end;
  868. LOC_REFERENCE,LOC_CREFERENCE:
  869. begin
  870. cgpara.check_simple_location;
  871. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  872. a_loadfpu_reg_ref(list,size,r,ref);
  873. end;
  874. LOC_REGISTER,LOC_CREGISTER:
  875. begin
  876. { paramfpu_ref does the check_simpe_location check here if necessary }
  877. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  878. a_loadfpu_reg_ref(list,size,r,ref);
  879. a_paramfpu_ref(list,size,ref,cgpara);
  880. tg.Ungettemp(list,ref);
  881. end;
  882. else
  883. internalerror(2002071004);
  884. end;
  885. end;
  886. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  887. var
  888. href : treference;
  889. begin
  890. cgpara.check_simple_location;
  891. case cgpara.location^.loc of
  892. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  893. a_loadfpu_ref_reg(list,size,ref,cgpara.location^.register);
  894. LOC_REFERENCE,LOC_CREFERENCE:
  895. begin
  896. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  897. { concatcopy should choose the best way to copy the data }
  898. g_concatcopy(list,ref,href,tcgsize2size[size]);
  899. end;
  900. else
  901. internalerror(200402201);
  902. end;
  903. end;
  904. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  905. var
  906. tmpreg : tregister;
  907. begin
  908. tmpreg:=getintregister(list,size);
  909. a_load_ref_reg(list,size,size,ref,tmpreg);
  910. a_op_const_reg(list,op,size,a,tmpreg);
  911. a_load_reg_ref(list,size,size,tmpreg,ref);
  912. end;
  913. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  914. begin
  915. case loc.loc of
  916. LOC_REGISTER, LOC_CREGISTER:
  917. a_op_const_reg(list,op,loc.size,a,loc.register);
  918. LOC_REFERENCE, LOC_CREFERENCE:
  919. a_op_const_ref(list,op,loc.size,a,loc.reference);
  920. else
  921. internalerror(200109061);
  922. end;
  923. end;
  924. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  925. var
  926. tmpreg : tregister;
  927. begin
  928. tmpreg:=getintregister(list,size);
  929. a_load_ref_reg(list,size,size,ref,tmpreg);
  930. a_op_reg_reg(list,op,size,reg,tmpreg);
  931. a_load_reg_ref(list,size,size,tmpreg,ref);
  932. end;
  933. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  934. var
  935. tmpreg: tregister;
  936. begin
  937. case op of
  938. OP_NOT,OP_NEG:
  939. { handle it as "load ref,reg; op reg" }
  940. begin
  941. a_load_ref_reg(list,size,size,ref,reg);
  942. a_op_reg_reg(list,op,size,reg,reg);
  943. end;
  944. else
  945. begin
  946. tmpreg:=getintregister(list,size);
  947. a_load_ref_reg(list,size,size,ref,tmpreg);
  948. a_op_reg_reg(list,op,size,tmpreg,reg);
  949. end;
  950. end;
  951. end;
  952. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  953. begin
  954. case loc.loc of
  955. LOC_REGISTER, LOC_CREGISTER:
  956. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  957. LOC_REFERENCE, LOC_CREFERENCE:
  958. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  959. else
  960. internalerror(200109061);
  961. end;
  962. end;
  963. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  964. var
  965. tmpreg: tregister;
  966. begin
  967. case loc.loc of
  968. LOC_REGISTER,LOC_CREGISTER:
  969. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  970. LOC_REFERENCE,LOC_CREFERENCE:
  971. begin
  972. tmpreg:=getintregister(list,loc.size);
  973. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  974. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  975. end;
  976. else
  977. internalerror(200109061);
  978. end;
  979. end;
  980. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  981. a:aint;src,dst:Tregister);
  982. begin
  983. a_load_reg_reg(list,size,size,src,dst);
  984. a_op_const_reg(list,op,size,a,dst);
  985. end;
  986. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  987. size: tcgsize; src1, src2, dst: tregister);
  988. var
  989. tmpreg: tregister;
  990. begin
  991. if (dst<>src1) then
  992. begin
  993. a_load_reg_reg(list,size,size,src2,dst);
  994. a_op_reg_reg(list,op,size,src1,dst);
  995. end
  996. else
  997. begin
  998. tmpreg:=getintregister(list,size);
  999. a_load_reg_reg(list,size,size,src2,tmpreg);
  1000. a_op_reg_reg(list,op,size,src1,tmpreg);
  1001. a_load_reg_reg(list,size,size,tmpreg,dst);
  1002. end;
  1003. end;
  1004. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1005. begin
  1006. a_op_const_reg_reg(list,op,size,a,src,dst);
  1007. ovloc.loc:=LOC_VOID;
  1008. end;
  1009. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1010. begin
  1011. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  1012. ovloc.loc:=LOC_VOID;
  1013. end;
  1014. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  1015. l : tasmlabel);
  1016. var
  1017. tmpreg: tregister;
  1018. begin
  1019. tmpreg:=getintregister(list,size);
  1020. a_load_ref_reg(list,size,size,ref,tmpreg);
  1021. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1022. end;
  1023. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  1024. l : tasmlabel);
  1025. begin
  1026. case loc.loc of
  1027. LOC_REGISTER,LOC_CREGISTER:
  1028. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1029. LOC_REFERENCE,LOC_CREFERENCE:
  1030. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1031. else
  1032. internalerror(200109061);
  1033. end;
  1034. end;
  1035. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1036. var
  1037. tmpreg: tregister;
  1038. begin
  1039. tmpreg:=getintregister(list,size);
  1040. a_load_ref_reg(list,size,size,ref,tmpreg);
  1041. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1042. end;
  1043. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1044. var
  1045. tmpreg: tregister;
  1046. begin
  1047. tmpreg:=getintregister(list,size);
  1048. a_load_ref_reg(list,size,size,ref,tmpreg);
  1049. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1050. end;
  1051. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  1052. begin
  1053. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  1054. end;
  1055. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1056. begin
  1057. case loc.loc of
  1058. LOC_REGISTER,
  1059. LOC_CREGISTER:
  1060. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1061. LOC_REFERENCE,
  1062. LOC_CREFERENCE :
  1063. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1064. LOC_CONSTANT:
  1065. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1066. else
  1067. internalerror(200203231);
  1068. end;
  1069. end;
  1070. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1071. l : tasmlabel);
  1072. var
  1073. tmpreg: tregister;
  1074. begin
  1075. case loc.loc of
  1076. LOC_REGISTER,LOC_CREGISTER:
  1077. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1078. LOC_REFERENCE,LOC_CREFERENCE:
  1079. begin
  1080. tmpreg:=getintregister(list,size);
  1081. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1082. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1083. end
  1084. else
  1085. internalerror(200109061);
  1086. end;
  1087. end;
  1088. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1089. begin
  1090. case loc.loc of
  1091. LOC_MMREGISTER,LOC_CMMREGISTER:
  1092. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1093. LOC_REFERENCE,LOC_CREFERENCE:
  1094. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1095. else
  1096. internalerror(200310121);
  1097. end;
  1098. end;
  1099. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1100. begin
  1101. case loc.loc of
  1102. LOC_MMREGISTER,LOC_CMMREGISTER:
  1103. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1104. LOC_REFERENCE,LOC_CREFERENCE:
  1105. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1106. else
  1107. internalerror(200310122);
  1108. end;
  1109. end;
  1110. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  1111. var
  1112. href : treference;
  1113. begin
  1114. cgpara.check_simple_location;
  1115. case cgpara.location^.loc of
  1116. LOC_MMREGISTER,LOC_CMMREGISTER:
  1117. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  1118. LOC_REFERENCE,LOC_CREFERENCE:
  1119. begin
  1120. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1121. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  1122. end
  1123. else
  1124. internalerror(200310123);
  1125. end;
  1126. end;
  1127. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  1128. var
  1129. hr : tregister;
  1130. hs : tmmshuffle;
  1131. begin
  1132. cgpara.check_simple_location;
  1133. hr:=getmmregister(list,cgpara.location^.size);
  1134. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  1135. if realshuffle(shuffle) then
  1136. begin
  1137. hs:=shuffle^;
  1138. removeshuffles(hs);
  1139. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  1140. end
  1141. else
  1142. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  1143. end;
  1144. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  1145. begin
  1146. case loc.loc of
  1147. LOC_MMREGISTER,LOC_CMMREGISTER:
  1148. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  1149. LOC_REFERENCE,LOC_CREFERENCE:
  1150. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  1151. else
  1152. internalerror(200310123);
  1153. end;
  1154. end;
  1155. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1156. var
  1157. hr : tregister;
  1158. hs : tmmshuffle;
  1159. begin
  1160. hr:=getmmregister(list,size);
  1161. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1162. if realshuffle(shuffle) then
  1163. begin
  1164. hs:=shuffle^;
  1165. removeshuffles(hs);
  1166. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1167. end
  1168. else
  1169. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1170. end;
  1171. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1172. var
  1173. hr : tregister;
  1174. hs : tmmshuffle;
  1175. begin
  1176. hr:=getmmregister(list,size);
  1177. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1178. if realshuffle(shuffle) then
  1179. begin
  1180. hs:=shuffle^;
  1181. removeshuffles(hs);
  1182. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1183. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1184. end
  1185. else
  1186. begin
  1187. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1188. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1189. end;
  1190. end;
  1191. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1192. begin
  1193. case loc.loc of
  1194. LOC_CMMREGISTER,LOC_MMREGISTER:
  1195. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1196. LOC_CREFERENCE,LOC_REFERENCE:
  1197. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1198. else
  1199. internalerror(200312232);
  1200. end;
  1201. end;
  1202. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  1203. begin
  1204. g_concatcopy(list,source,dest,len);
  1205. end;
  1206. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  1207. var
  1208. cgpara1,cgpara2,cgpara3 : TCGPara;
  1209. begin
  1210. cgpara1.init;
  1211. cgpara2.init;
  1212. cgpara3.init;
  1213. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1214. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1215. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1216. paramanager.allocparaloc(list,cgpara3);
  1217. a_paramaddr_ref(list,dest,cgpara3);
  1218. paramanager.allocparaloc(list,cgpara2);
  1219. a_paramaddr_ref(list,source,cgpara2);
  1220. paramanager.allocparaloc(list,cgpara1);
  1221. a_param_const(list,OS_INT,len,cgpara1);
  1222. paramanager.freeparaloc(list,cgpara3);
  1223. paramanager.freeparaloc(list,cgpara2);
  1224. paramanager.freeparaloc(list,cgpara1);
  1225. allocallcpuregisters(list);
  1226. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1227. deallocallcpuregisters(list);
  1228. cgpara3.done;
  1229. cgpara2.done;
  1230. cgpara1.done;
  1231. end;
  1232. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  1233. var
  1234. href : treference;
  1235. incrfunc : string;
  1236. cgpara1,cgpara2 : TCGPara;
  1237. begin
  1238. cgpara1.init;
  1239. cgpara2.init;
  1240. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1241. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1242. if is_interfacecom(t) then
  1243. incrfunc:='FPC_INTF_INCR_REF'
  1244. else if is_ansistring(t) then
  1245. incrfunc:='FPC_ANSISTR_INCR_REF'
  1246. else if is_widestring(t) then
  1247. incrfunc:='FPC_WIDESTR_INCR_REF'
  1248. else if is_dynamic_array(t) then
  1249. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1250. else
  1251. incrfunc:='';
  1252. { call the special incr function or the generic addref }
  1253. if incrfunc<>'' then
  1254. begin
  1255. paramanager.allocparaloc(list,cgpara1);
  1256. { these functions get the pointer by value }
  1257. a_param_ref(list,OS_ADDR,ref,cgpara1);
  1258. paramanager.freeparaloc(list,cgpara1);
  1259. allocallcpuregisters(list);
  1260. a_call_name(list,incrfunc);
  1261. deallocallcpuregisters(list);
  1262. end
  1263. else
  1264. begin
  1265. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1266. paramanager.allocparaloc(list,cgpara2);
  1267. a_paramaddr_ref(list,href,cgpara2);
  1268. paramanager.allocparaloc(list,cgpara1);
  1269. a_paramaddr_ref(list,ref,cgpara1);
  1270. paramanager.freeparaloc(list,cgpara1);
  1271. paramanager.freeparaloc(list,cgpara2);
  1272. allocallcpuregisters(list);
  1273. a_call_name(list,'FPC_ADDREF');
  1274. deallocallcpuregisters(list);
  1275. end;
  1276. cgpara2.done;
  1277. cgpara1.done;
  1278. end;
  1279. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  1280. var
  1281. href : treference;
  1282. decrfunc : string;
  1283. needrtti : boolean;
  1284. cgpara1,cgpara2 : TCGPara;
  1285. tempreg1,tempreg2 : TRegister;
  1286. begin
  1287. cgpara1.init;
  1288. cgpara2.init;
  1289. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1290. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1291. needrtti:=false;
  1292. if is_interfacecom(t) then
  1293. decrfunc:='FPC_INTF_DECR_REF'
  1294. else if is_ansistring(t) then
  1295. decrfunc:='FPC_ANSISTR_DECR_REF'
  1296. else if is_widestring(t) then
  1297. decrfunc:='FPC_WIDESTR_DECR_REF'
  1298. else if is_dynamic_array(t) then
  1299. begin
  1300. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1301. needrtti:=true;
  1302. end
  1303. else
  1304. decrfunc:='';
  1305. { call the special decr function or the generic decref }
  1306. if decrfunc<>'' then
  1307. begin
  1308. if needrtti then
  1309. begin
  1310. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1311. tempreg2:=getaddressregister(list);
  1312. a_loadaddr_ref_reg(list,href,tempreg2);
  1313. end;
  1314. tempreg1:=getaddressregister(list);
  1315. a_loadaddr_ref_reg(list,ref,tempreg1);
  1316. if needrtti then
  1317. begin
  1318. paramanager.allocparaloc(list,cgpara2);
  1319. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  1320. paramanager.freeparaloc(list,cgpara2);
  1321. end;
  1322. paramanager.allocparaloc(list,cgpara1);
  1323. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  1324. paramanager.freeparaloc(list,cgpara1);
  1325. allocallcpuregisters(list);
  1326. a_call_name(list,decrfunc);
  1327. deallocallcpuregisters(list);
  1328. end
  1329. else
  1330. begin
  1331. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1332. paramanager.allocparaloc(list,cgpara2);
  1333. a_paramaddr_ref(list,href,cgpara2);
  1334. paramanager.allocparaloc(list,cgpara1);
  1335. a_paramaddr_ref(list,ref,cgpara1);
  1336. paramanager.freeparaloc(list,cgpara1);
  1337. paramanager.freeparaloc(list,cgpara2);
  1338. allocallcpuregisters(list);
  1339. a_call_name(list,'FPC_DECREF');
  1340. deallocallcpuregisters(list);
  1341. end;
  1342. cgpara2.done;
  1343. cgpara1.done;
  1344. end;
  1345. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  1346. var
  1347. href : treference;
  1348. cgpara1,cgpara2 : TCGPara;
  1349. begin
  1350. cgpara1.init;
  1351. cgpara2.init;
  1352. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1353. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1354. if is_ansistring(t) or
  1355. is_widestring(t) or
  1356. is_interfacecom(t) or
  1357. is_dynamic_array(t) then
  1358. a_load_const_ref(list,OS_ADDR,0,ref)
  1359. else
  1360. begin
  1361. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1362. paramanager.allocparaloc(list,cgpara2);
  1363. a_paramaddr_ref(list,href,cgpara2);
  1364. paramanager.allocparaloc(list,cgpara1);
  1365. a_paramaddr_ref(list,ref,cgpara1);
  1366. paramanager.freeparaloc(list,cgpara1);
  1367. paramanager.freeparaloc(list,cgpara2);
  1368. allocallcpuregisters(list);
  1369. a_call_name(list,'FPC_INITIALIZE');
  1370. deallocallcpuregisters(list);
  1371. end;
  1372. cgpara1.done;
  1373. cgpara2.done;
  1374. end;
  1375. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  1376. var
  1377. href : treference;
  1378. cgpara1,cgpara2 : TCGPara;
  1379. begin
  1380. cgpara1.init;
  1381. cgpara2.init;
  1382. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1383. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1384. if is_ansistring(t) or
  1385. is_widestring(t) or
  1386. is_interfacecom(t) then
  1387. begin
  1388. g_decrrefcount(list,t,ref);
  1389. a_load_const_ref(list,OS_ADDR,0,ref);
  1390. end
  1391. else
  1392. begin
  1393. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1394. paramanager.allocparaloc(list,cgpara2);
  1395. a_paramaddr_ref(list,href,cgpara2);
  1396. paramanager.allocparaloc(list,cgpara1);
  1397. a_paramaddr_ref(list,ref,cgpara1);
  1398. paramanager.freeparaloc(list,cgpara1);
  1399. paramanager.freeparaloc(list,cgpara2);
  1400. allocallcpuregisters(list);
  1401. a_call_name(list,'FPC_FINALIZE');
  1402. deallocallcpuregisters(list);
  1403. end;
  1404. cgpara1.done;
  1405. cgpara2.done;
  1406. end;
  1407. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  1408. { generate range checking code for the value at location p. The type }
  1409. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1410. { is the original type used at that location. When both defs are equal }
  1411. { the check is also insert (needed for succ,pref,inc,dec) }
  1412. const
  1413. aintmax=high(aint);
  1414. var
  1415. neglabel : tasmlabel;
  1416. hreg : tregister;
  1417. lto,hto,
  1418. lfrom,hfrom : TConstExprInt;
  1419. fromsize, tosize: cardinal;
  1420. from_signed, to_signed: boolean;
  1421. begin
  1422. { range checking on and range checkable value? }
  1423. if not(cs_check_range in aktlocalswitches) or
  1424. not(fromdef.deftype in [orddef,enumdef]) then
  1425. exit;
  1426. {$ifndef cpu64bit}
  1427. { handle 64bit rangechecks separate for 32bit processors }
  1428. if is_64bit(fromdef) or is_64bit(todef) then
  1429. begin
  1430. cg64.g_rangecheck64(list,l,fromdef,todef);
  1431. exit;
  1432. end;
  1433. {$endif cpu64bit}
  1434. { only check when assigning to scalar, subranges are different, }
  1435. { when todef=fromdef then the check is always generated }
  1436. getrange(fromdef,lfrom,hfrom);
  1437. getrange(todef,lto,hto);
  1438. from_signed := is_signed(fromdef);
  1439. to_signed := is_signed(todef);
  1440. { check the rangetype of the array, not the array itself }
  1441. { (only change now, since getrange needs the arraydef) }
  1442. if (todef.deftype = arraydef) then
  1443. todef := tarraydef(todef).rangetype.def;
  1444. { no range check if from and to are equal and are both longint/dword }
  1445. { no range check if from and to are equal and are both longint/dword }
  1446. { (if we have a 32bit processor) or int64/qword, since such }
  1447. { operations can at most cause overflows (JM) }
  1448. { Note that these checks are mostly processor independent, they only }
  1449. { have to be changed once we introduce 64bit subrange types }
  1450. {$ifdef cpu64bit}
  1451. if (fromdef = todef) and
  1452. (fromdef.deftype=orddef) and
  1453. (((((torddef(fromdef).typ = s64bit) and
  1454. (lfrom = low(int64)) and
  1455. (hfrom = high(int64))) or
  1456. ((torddef(fromdef).typ = u64bit) and
  1457. (lfrom = low(qword)) and
  1458. (hfrom = high(qword))) or
  1459. ((torddef(fromdef).typ = scurrency) and
  1460. (lfrom = low(int64)) and
  1461. (hfrom = high(int64)))))) then
  1462. exit;
  1463. {$else cpu64bit}
  1464. if (fromdef = todef) and
  1465. (fromdef.deftype=orddef) and
  1466. (((((torddef(fromdef).typ = s32bit) and
  1467. (lfrom = low(longint)) and
  1468. (hfrom = high(longint))) or
  1469. ((torddef(fromdef).typ = u32bit) and
  1470. (lfrom = low(cardinal)) and
  1471. (hfrom = high(cardinal)))))) then
  1472. exit;
  1473. {$endif cpu64bit}
  1474. { optimize some range checks away in safe cases }
  1475. fromsize := fromdef.size;
  1476. tosize := todef.size;
  1477. if ((from_signed = to_signed) or
  1478. (not from_signed)) and
  1479. (lto<=lfrom) and (hto>=hfrom) and
  1480. (fromsize <= tosize) then
  1481. begin
  1482. { if fromsize < tosize, and both have the same signed-ness or }
  1483. { fromdef is unsigned, then all bit patterns from fromdef are }
  1484. { valid for todef as well }
  1485. if (fromsize < tosize) then
  1486. exit;
  1487. if (fromsize = tosize) and
  1488. (from_signed = to_signed) then
  1489. { only optimize away if all bit patterns which fit in fromsize }
  1490. { are valid for the todef }
  1491. begin
  1492. {$ifopt Q+}
  1493. {$define overflowon}
  1494. {$Q-}
  1495. {$endif}
  1496. if to_signed then
  1497. begin
  1498. { calculation of the low/high ranges must not overflow 64 bit
  1499. otherwise we end up comparing with zero for 64 bit data types on
  1500. 64 bit processors }
  1501. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  1502. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  1503. exit
  1504. end
  1505. else
  1506. begin
  1507. { calculation of the low/high ranges must not overflow 64 bit
  1508. otherwise we end up having all zeros for 64 bit data types on
  1509. 64 bit processors }
  1510. if (lto = 0) and
  1511. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  1512. exit
  1513. end;
  1514. {$ifdef overflowon}
  1515. {$Q+}
  1516. {$undef overflowon}
  1517. {$endif}
  1518. end
  1519. end;
  1520. { generate the rangecheck code for the def where we are going to }
  1521. { store the result }
  1522. { use the trick that }
  1523. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1524. { To be able to do that, we have to make sure however that either }
  1525. { fromdef and todef are both signed or unsigned, or that we leave }
  1526. { the parts < 0 and > maxlongint out }
  1527. if from_signed xor to_signed then
  1528. begin
  1529. if from_signed then
  1530. { from is signed, to is unsigned }
  1531. begin
  1532. { if high(from) < 0 -> always range error }
  1533. if (hfrom < 0) or
  1534. { if low(to) > maxlongint also range error }
  1535. (lto > aintmax) then
  1536. begin
  1537. a_call_name(list,'FPC_RANGEERROR');
  1538. exit
  1539. end;
  1540. { from is signed and to is unsigned -> when looking at to }
  1541. { as an signed value, it must be < maxaint (otherwise }
  1542. { it will become negative, which is invalid since "to" is unsigned) }
  1543. if hto > aintmax then
  1544. hto := aintmax;
  1545. end
  1546. else
  1547. { from is unsigned, to is signed }
  1548. begin
  1549. if (lfrom > aintmax) or
  1550. (hto < 0) then
  1551. begin
  1552. a_call_name(list,'FPC_RANGEERROR');
  1553. exit
  1554. end;
  1555. { from is unsigned and to is signed -> when looking at to }
  1556. { as an unsigned value, it must be >= 0 (since negative }
  1557. { values are the same as values > maxlongint) }
  1558. if lto < 0 then
  1559. lto := 0;
  1560. end;
  1561. end;
  1562. hreg:=getintregister(list,OS_INT);
  1563. a_load_loc_reg(list,OS_INT,l,hreg);
  1564. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  1565. current_asmdata.getjumplabel(neglabel);
  1566. {
  1567. if from_signed then
  1568. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  1569. else
  1570. }
  1571. {$ifdef cpu64bit}
  1572. if qword(hto-lto)>qword(aintmax) then
  1573. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  1574. else
  1575. {$endif cpu64bit}
  1576. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  1577. a_call_name(list,'FPC_RANGEERROR');
  1578. a_label(list,neglabel);
  1579. end;
  1580. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  1581. begin
  1582. g_overflowCheck(list,loc,def);
  1583. end;
  1584. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  1585. var
  1586. tmpreg : tregister;
  1587. begin
  1588. tmpreg:=getintregister(list,size);
  1589. g_flags2reg(list,size,f,tmpreg);
  1590. a_load_reg_ref(list,size,size,tmpreg,ref);
  1591. end;
  1592. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  1593. var
  1594. OKLabel : tasmlabel;
  1595. cgpara1 : TCGPara;
  1596. begin
  1597. if (cs_check_object in aktlocalswitches) or
  1598. (cs_check_range in aktlocalswitches) then
  1599. begin
  1600. current_asmdata.getjumplabel(oklabel);
  1601. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1602. cgpara1.init;
  1603. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1604. paramanager.allocparaloc(list,cgpara1);
  1605. a_param_const(list,OS_INT,210,cgpara1);
  1606. paramanager.freeparaloc(list,cgpara1);
  1607. a_call_name(list,'FPC_HANDLEERROR');
  1608. a_label(list,oklabel);
  1609. cgpara1.done;
  1610. end;
  1611. end;
  1612. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  1613. var
  1614. hrefvmt : treference;
  1615. cgpara1,cgpara2 : TCGPara;
  1616. begin
  1617. cgpara1.init;
  1618. cgpara2.init;
  1619. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1620. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1621. if (cs_check_object in aktlocalswitches) then
  1622. begin
  1623. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  1624. paramanager.allocparaloc(list,cgpara2);
  1625. a_paramaddr_ref(list,hrefvmt,cgpara2);
  1626. paramanager.allocparaloc(list,cgpara1);
  1627. a_param_reg(list,OS_ADDR,reg,cgpara1);
  1628. paramanager.freeparaloc(list,cgpara1);
  1629. paramanager.freeparaloc(list,cgpara2);
  1630. allocallcpuregisters(list);
  1631. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1632. deallocallcpuregisters(list);
  1633. end
  1634. else
  1635. if (cs_check_range in aktlocalswitches) then
  1636. begin
  1637. paramanager.allocparaloc(list,cgpara1);
  1638. a_param_reg(list,OS_ADDR,reg,cgpara1);
  1639. paramanager.freeparaloc(list,cgpara1);
  1640. allocallcpuregisters(list);
  1641. a_call_name(list,'FPC_CHECK_OBJECT');
  1642. deallocallcpuregisters(list);
  1643. end;
  1644. cgpara1.done;
  1645. cgpara2.done;
  1646. end;
  1647. {*****************************************************************************
  1648. Entry/Exit Code Functions
  1649. *****************************************************************************}
  1650. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  1651. var
  1652. sizereg,sourcereg,lenreg : tregister;
  1653. cgpara1,cgpara2,cgpara3 : TCGPara;
  1654. begin
  1655. { because some abis don't support dynamic stack allocation properly
  1656. open array value parameters are copied onto the heap
  1657. }
  1658. { calculate necessary memory }
  1659. { read/write operations on one register make the life of the register allocator hard }
  1660. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  1661. begin
  1662. lenreg:=getintregister(list,OS_INT);
  1663. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  1664. end
  1665. else
  1666. lenreg:=lenloc.register;
  1667. sizereg:=getintregister(list,OS_INT);
  1668. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  1669. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  1670. { load source }
  1671. sourcereg:=getaddressregister(list);
  1672. a_loadaddr_ref_reg(list,ref,sourcereg);
  1673. { do getmem call }
  1674. cgpara1.init;
  1675. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1676. paramanager.allocparaloc(list,cgpara1);
  1677. a_param_reg(list,OS_INT,sizereg,cgpara1);
  1678. paramanager.freeparaloc(list,cgpara1);
  1679. allocallcpuregisters(list);
  1680. a_call_name(list,'FPC_GETMEM');
  1681. deallocallcpuregisters(list);
  1682. cgpara1.done;
  1683. { return the new address }
  1684. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1685. { do move call }
  1686. cgpara1.init;
  1687. cgpara2.init;
  1688. cgpara3.init;
  1689. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1690. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1691. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1692. { load size }
  1693. paramanager.allocparaloc(list,cgpara3);
  1694. a_param_reg(list,OS_INT,sizereg,cgpara3);
  1695. { load destination }
  1696. paramanager.allocparaloc(list,cgpara2);
  1697. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  1698. { load source }
  1699. paramanager.allocparaloc(list,cgpara1);
  1700. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  1701. paramanager.freeparaloc(list,cgpara3);
  1702. paramanager.freeparaloc(list,cgpara2);
  1703. paramanager.freeparaloc(list,cgpara1);
  1704. allocallcpuregisters(list);
  1705. a_call_name(list,'FPC_MOVE');
  1706. deallocallcpuregisters(list);
  1707. cgpara3.done;
  1708. cgpara2.done;
  1709. cgpara1.done;
  1710. end;
  1711. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  1712. var
  1713. cgpara1 : TCGPara;
  1714. begin
  1715. { do move call }
  1716. cgpara1.init;
  1717. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1718. { load source }
  1719. paramanager.allocparaloc(list,cgpara1);
  1720. a_param_loc(list,l,cgpara1);
  1721. paramanager.freeparaloc(list,cgpara1);
  1722. allocallcpuregisters(list);
  1723. a_call_name(list,'FPC_FREEMEM');
  1724. deallocallcpuregisters(list);
  1725. cgpara1.done;
  1726. end;
  1727. procedure tcg.g_save_standard_registers(list:TAsmList);
  1728. var
  1729. href : treference;
  1730. size : longint;
  1731. r : integer;
  1732. begin
  1733. { Get temp }
  1734. size:=0;
  1735. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1736. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1737. inc(size,sizeof(aint));
  1738. if size>0 then
  1739. begin
  1740. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  1741. { Copy registers to temp }
  1742. href:=current_procinfo.save_regs_ref;
  1743. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1744. begin
  1745. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1746. begin
  1747. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  1748. inc(href.offset,sizeof(aint));
  1749. end;
  1750. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  1751. end;
  1752. end;
  1753. end;
  1754. procedure tcg.g_restore_standard_registers(list:TAsmList);
  1755. var
  1756. href : treference;
  1757. r : integer;
  1758. hreg : tregister;
  1759. begin
  1760. { Copy registers from temp }
  1761. href:=current_procinfo.save_regs_ref;
  1762. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1763. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1764. begin
  1765. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  1766. { Allocate register so the optimizer does not remove the load }
  1767. a_reg_alloc(list,hreg);
  1768. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  1769. inc(href.offset,sizeof(aint));
  1770. end;
  1771. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  1772. end;
  1773. procedure tcg.g_profilecode(list : TAsmList);
  1774. begin
  1775. end;
  1776. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  1777. begin
  1778. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  1779. end;
  1780. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  1781. begin
  1782. a_load_const_ref(list, OS_INT, a, href);
  1783. end;
  1784. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  1785. begin
  1786. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  1787. end;
  1788. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  1789. var
  1790. hsym : tsym;
  1791. href : treference;
  1792. paraloc : tcgparalocation;
  1793. begin
  1794. { calculate the parameter info for the procdef }
  1795. if not procdef.has_paraloc_info then
  1796. begin
  1797. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  1798. procdef.has_paraloc_info:=true;
  1799. end;
  1800. hsym:=tsym(procdef.parast.search('self'));
  1801. if not(assigned(hsym) and
  1802. (hsym.typ=paravarsym)) then
  1803. internalerror(200305251);
  1804. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  1805. case paraloc.loc of
  1806. LOC_REGISTER:
  1807. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  1808. LOC_REFERENCE:
  1809. begin
  1810. { offset in the wrapper needs to be adjusted for the stored
  1811. return address }
  1812. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  1813. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  1814. end
  1815. else
  1816. internalerror(200309189);
  1817. end;
  1818. end;
  1819. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  1820. begin
  1821. a_call_name(list,s);
  1822. end;
  1823. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  1824. var
  1825. l: tasmsymbol;
  1826. ref: treference;
  1827. begin
  1828. result := NR_NO;
  1829. case target_info.system of
  1830. system_powerpc_darwin,
  1831. system_i386_darwin:
  1832. begin
  1833. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  1834. if not(assigned(l)) then
  1835. begin
  1836. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  1837. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  1838. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  1839. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  1840. end;
  1841. result := cg.getaddressregister(list);
  1842. reference_reset_symbol(ref,l,0);
  1843. { ref.base:=current_procinfo.got;
  1844. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  1845. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  1846. end;
  1847. end;
  1848. end;
  1849. {*****************************************************************************
  1850. TCG64
  1851. *****************************************************************************}
  1852. {$ifndef cpu64bit}
  1853. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  1854. begin
  1855. a_load64_reg_reg(list,regsrc,regdst);
  1856. a_op64_const_reg(list,op,size,value,regdst);
  1857. end;
  1858. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  1859. var
  1860. tmpreg64 : tregister64;
  1861. begin
  1862. { when src1=dst then we need to first create a temp to prevent
  1863. overwriting src1 with src2 }
  1864. if (regsrc1.reghi=regdst.reghi) or
  1865. (regsrc1.reglo=regdst.reghi) or
  1866. (regsrc1.reghi=regdst.reglo) or
  1867. (regsrc1.reglo=regdst.reglo) then
  1868. begin
  1869. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  1870. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  1871. a_load64_reg_reg(list,regsrc2,tmpreg64);
  1872. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  1873. a_load64_reg_reg(list,tmpreg64,regdst);
  1874. end
  1875. else
  1876. begin
  1877. a_load64_reg_reg(list,regsrc2,regdst);
  1878. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  1879. end;
  1880. end;
  1881. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  1882. begin
  1883. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  1884. ovloc.loc:=LOC_VOID;
  1885. end;
  1886. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  1887. begin
  1888. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  1889. ovloc.loc:=LOC_VOID;
  1890. end;
  1891. {$endif cpu64bit}
  1892. initialization
  1893. ;
  1894. finalization
  1895. cg.free;
  1896. {$ifndef cpu64bit}
  1897. cg64.free;
  1898. {$endif cpu64bit}
  1899. end.