aoptcpu.pas 44 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. aoptutils,
  42. globals,globtype,
  43. cgutils;
  44. type
  45. TAsmOpSet = set of TAsmOp;
  46. function CanBeCond(p : tai) : boolean;
  47. begin
  48. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. refsequal :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.addressmode = r2.addressmode) and
  59. (r1.volatility=[]) and
  60. (r2.volatility=[]);
  61. end;
  62. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  63. begin
  64. result:=oper1.typ=oper2.typ;
  65. if result then
  66. case oper1.typ of
  67. top_const:
  68. Result:=oper1.val = oper2.val;
  69. top_reg:
  70. Result:=oper1.reg = oper2.reg;
  71. top_ref:
  72. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  73. else Result:=false;
  74. end
  75. end;
  76. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  77. begin
  78. result := (oper.typ = top_reg) and (oper.reg = reg);
  79. end;
  80. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  81. begin
  82. result :=
  83. (instr.typ = ait_instruction) and
  84. (taicpu(instr).opcode = op);
  85. end;
  86. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  87. begin
  88. result :=
  89. (instr.typ = ait_instruction) and
  90. (taicpu(instr).opcode in ops);
  91. end;
  92. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  93. begin
  94. result :=
  95. (instr.typ = ait_instruction) and
  96. (taicpu(instr).opcode in ops) and
  97. (taicpu(instr).ops=opcount);
  98. end;
  99. {$ifdef DEBUG_AOPTCPU}
  100. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  101. begin
  102. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  103. end;
  104. {$else DEBUG_AOPTCPU}
  105. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  106. begin
  107. end;
  108. {$endif DEBUG_AOPTCPU}
  109. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  110. begin
  111. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  112. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  113. Result:=true
  114. else if (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_MOVW) and
  115. ((TRegister(ord(taicpu(p1).oper[0]^.reg)+1)=reg) or (TRegister(ord(taicpu(p1).oper[1]^.reg)+1)=reg) or
  116. (taicpu(p1).oper[0]^.reg=reg) or (taicpu(p1).oper[1]^.reg=reg)) then
  117. Result:=true
  118. else
  119. Result:=inherited RegInInstruction(Reg, p1);
  120. end;
  121. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  122. var Next: tai; reg: TRegister): Boolean;
  123. begin
  124. Next:=Current;
  125. repeat
  126. Result:=GetNextInstruction(Next,Next);
  127. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  128. (is_calljmp(taicpu(Next).opcode));
  129. end;
  130. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  131. var
  132. p: taicpu;
  133. begin
  134. if not assigned(hp) or
  135. (hp.typ <> ait_instruction) then
  136. begin
  137. Result := false;
  138. exit;
  139. end;
  140. p := taicpu(hp);
  141. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  142. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  143. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  144. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  145. end;
  146. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  147. var
  148. p: taicpu;
  149. i: longint;
  150. begin
  151. Result := false;
  152. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  153. exit;
  154. p:=taicpu(hp);
  155. i:=0;
  156. { we do not care about the stack pointer }
  157. if p.opcode in [A_POP] then
  158. exit;
  159. { first operand only written?
  160. then skip it }
  161. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  162. i:=1;
  163. while i<p.ops do
  164. begin
  165. case p.oper[i]^.typ of
  166. top_reg:
  167. Result := (p.oper[i]^.reg = reg) or
  168. { MOVW }
  169. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  170. top_ref:
  171. Result :=
  172. (p.oper[i]^.ref^.base = reg) or
  173. (p.oper[i]^.ref^.index = reg);
  174. end;
  175. { Bailout if we found something }
  176. if Result then
  177. exit;
  178. Inc(i);
  179. end;
  180. end;
  181. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  182. var
  183. hp1,hp2,hp3,hp4,hp5: tai;
  184. alloc, dealloc: tai_regalloc;
  185. i: integer;
  186. l: TAsmLabel;
  187. TmpUsedRegs : TAllUsedRegs;
  188. begin
  189. result := false;
  190. case p.typ of
  191. ait_instruction:
  192. begin
  193. {
  194. change
  195. <op> reg,x,y
  196. cp reg,r1
  197. into
  198. <op>s reg,x,y
  199. }
  200. { this optimization can applied only to the currently enabled operations because
  201. the other operations do not update all flags and FPC does not track flag usage }
  202. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  203. A_INC,A_LSL,A_LSR,
  204. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  205. GetNextInstruction(p, hp1) and
  206. ((MatchInstruction(hp1, A_CP) and
  207. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  208. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  209. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  210. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  211. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  212. A_LSL,A_LSR,
  213. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  214. (MatchInstruction(hp1, A_CPI) and
  215. (taicpu(p).opcode = A_ANDI) and
  216. (taicpu(p).oper[1]^.typ=top_const) and
  217. (taicpu(hp1).oper[1]^.typ=top_const) and
  218. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  219. GetNextInstruction(hp1, hp2) and
  220. { be careful here, following instructions could use other flags
  221. however after a jump fpc never depends on the value of flags }
  222. { All above instructions set Z and N according to the following
  223. Z := result = 0;
  224. N := result[31];
  225. EQ = Z=1; NE = Z=0;
  226. MI = N=1; PL = N=0; }
  227. MatchInstruction(hp2, A_BRxx) and
  228. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  229. { sub/sbc set all flags }
  230. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  231. no flag allocation tracking implemented yet on avr
  232. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  233. begin
  234. { move flag allocation if possible }
  235. { no flag allocation tracking implemented yet on avr
  236. GetLastInstruction(hp1, hp2);
  237. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  238. if assigned(hp2) then
  239. begin
  240. asml.Remove(hp2);
  241. asml.insertbefore(hp2, p);
  242. end;
  243. }
  244. // If we compare to the same value we are masking then invert the comparison
  245. if (taicpu(hp1).opcode=A_CPI) or
  246. { sub/sbc with reverted? }
  247. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  248. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  249. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  250. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  251. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  252. DebugMsg('Peephole OpCp2Op performed', p);
  253. asml.remove(hp1);
  254. hp1.free;
  255. Result:=true;
  256. end
  257. else
  258. case taicpu(p).opcode of
  259. A_LDI:
  260. begin
  261. { turn
  262. ldi reg0, imm
  263. cp/mov reg1, reg0
  264. dealloc reg0
  265. into
  266. cpi/ldi reg1, imm
  267. }
  268. if MatchOpType(taicpu(p),top_reg,top_const) and
  269. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  270. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  271. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  272. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  273. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  274. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  275. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  276. begin
  277. CopyUsedRegs(TmpUsedRegs);
  278. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  279. begin
  280. case taicpu(hp1).opcode of
  281. A_CP:
  282. taicpu(hp1).opcode:=A_CPI;
  283. A_MOV:
  284. taicpu(hp1).opcode:=A_LDI;
  285. else
  286. internalerror(2016111901);
  287. end;
  288. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  289. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  290. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  291. if assigned(alloc) and assigned(dealloc) then
  292. begin
  293. asml.Remove(alloc);
  294. alloc.Free;
  295. asml.Remove(dealloc);
  296. dealloc.Free;
  297. end;
  298. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  299. RemoveCurrentP(p);
  300. end;
  301. ReleaseUsedRegs(TmpUsedRegs);
  302. end;
  303. end;
  304. A_STS:
  305. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  306. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  307. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  308. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  309. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  310. (taicpu(p).oper[0]^.ref^.offset>=32) and
  311. (taicpu(p).oper[0]^.ref^.offset<=95) then
  312. begin
  313. DebugMsg('Peephole Sts2Out performed', p);
  314. taicpu(p).opcode:=A_OUT;
  315. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  316. end;
  317. A_LDS:
  318. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  319. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  320. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  321. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  322. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  323. (taicpu(p).oper[1]^.ref^.offset>=32) and
  324. (taicpu(p).oper[1]^.ref^.offset<=95) then
  325. begin
  326. DebugMsg('Peephole Lds2In performed', p);
  327. taicpu(p).opcode:=A_IN;
  328. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  329. end;
  330. A_IN:
  331. if GetNextInstruction(p,hp1) then
  332. begin
  333. {
  334. in rX,Y
  335. ori rX,n
  336. out Y,rX
  337. into
  338. sbi rX,lg(n)
  339. }
  340. if (taicpu(p).oper[1]^.val<=31) and
  341. MatchInstruction(hp1,A_ORI) and
  342. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  343. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  344. GetNextInstruction(hp1,hp2) and
  345. MatchInstruction(hp2,A_OUT) and
  346. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  347. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  348. begin
  349. DebugMsg('Peephole InOriOut2Sbi performed', p);
  350. taicpu(p).opcode:=A_SBI;
  351. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  352. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  353. asml.Remove(hp1);
  354. hp1.Free;
  355. asml.Remove(hp2);
  356. hp2.Free;
  357. result:=true;
  358. end
  359. {
  360. in rX,Y
  361. andi rX,not(n)
  362. out Y,rX
  363. into
  364. cbi rX,lg(n)
  365. }
  366. else if (taicpu(p).oper[1]^.val<=31) and
  367. MatchInstruction(hp1,A_ANDI) and
  368. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  369. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  370. GetNextInstruction(hp1,hp2) and
  371. MatchInstruction(hp2,A_OUT) and
  372. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  373. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  374. begin
  375. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  376. taicpu(p).opcode:=A_CBI;
  377. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  378. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  379. asml.Remove(hp1);
  380. hp1.Free;
  381. asml.Remove(hp2);
  382. hp2.Free;
  383. result:=true;
  384. end
  385. {
  386. in rX,Y
  387. andi rX,n
  388. breq/brne L1
  389. into
  390. sbis/sbic Y,lg(n)
  391. jmp L1
  392. .Ltemp:
  393. }
  394. else if (taicpu(p).oper[1]^.val<=31) and
  395. MatchInstruction(hp1,A_ANDI) and
  396. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  397. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  398. GetNextInstruction(hp1,hp2) and
  399. MatchInstruction(hp2,A_BRxx) and
  400. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  401. begin
  402. if taicpu(hp2).condition=C_EQ then
  403. taicpu(p).opcode:=A_SBIS
  404. else
  405. taicpu(p).opcode:=A_SBIC;
  406. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  407. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  408. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  409. asml.Remove(hp1);
  410. hp1.Free;
  411. taicpu(hp2).condition:=C_None;
  412. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  413. taicpu(hp2).opcode:=A_JMP
  414. else
  415. taicpu(hp2).opcode:=A_RJMP;
  416. current_asmdata.getjumplabel(l);
  417. l.increfs;
  418. asml.InsertAfter(tai_label.create(l), hp2);
  419. result:=true;
  420. end;
  421. end;
  422. A_ANDI:
  423. begin
  424. {
  425. Turn
  426. andi rx, #pow2
  427. brne l
  428. <op>
  429. l:
  430. Into
  431. sbrs rx, #(1 shl imm)
  432. <op>
  433. l:
  434. }
  435. if (taicpu(p).ops=2) and
  436. (taicpu(p).oper[1]^.typ=top_const) and
  437. ispowerof2(taicpu(p).oper[1]^.val,i) and
  438. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  439. GetNextInstruction(p,hp1) and
  440. (hp1.typ=ait_instruction) and
  441. (taicpu(hp1).opcode=A_BRxx) and
  442. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  443. (taicpu(hp1).ops>0) and
  444. (taicpu(hp1).oper[0]^.typ = top_ref) and
  445. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  446. GetNextInstruction(hp1,hp2) and
  447. (hp2.typ=ait_instruction) and
  448. GetNextInstruction(hp2,hp3) and
  449. (hp3.typ=ait_label) and
  450. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  451. begin
  452. DebugMsg('Peephole AndiBr2Sbr performed', p);
  453. taicpu(p).oper[1]^.val:=i;
  454. if taicpu(hp1).condition=C_NE then
  455. taicpu(p).opcode:=A_SBRS
  456. else
  457. taicpu(p).opcode:=A_SBRC;
  458. asml.Remove(hp1);
  459. hp1.free;
  460. result:=true;
  461. end
  462. {
  463. Remove
  464. andi rx, #y
  465. dealloc rx
  466. }
  467. else if (taicpu(p).ops=2) and
  468. (taicpu(p).oper[0]^.typ=top_reg) and
  469. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  470. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  471. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  472. begin
  473. DebugMsg('Redundant Andi removed', p);
  474. result:=RemoveCurrentP(p);
  475. end;
  476. end;
  477. A_ADD:
  478. begin
  479. if (taicpu(p).oper[1]^.reg=NR_R1) and
  480. GetNextInstruction(p, hp1) and
  481. MatchInstruction(hp1,A_ADC) then
  482. begin
  483. DebugMsg('Peephole AddAdc2Add performed', p);
  484. result:=RemoveCurrentP(p);
  485. end;
  486. end;
  487. A_SUB:
  488. begin
  489. if (taicpu(p).oper[1]^.reg=NR_R1) and
  490. GetNextInstruction(p, hp1) and
  491. MatchInstruction(hp1,A_SBC) then
  492. begin
  493. DebugMsg('Peephole SubSbc2Sub performed', p);
  494. taicpu(hp1).opcode:=A_SUB;
  495. result:=RemoveCurrentP(p);
  496. end;
  497. end;
  498. A_CLR:
  499. begin
  500. { turn the common
  501. clr rX
  502. mov/ld rX, rY
  503. into
  504. mov/ld rX, rY
  505. }
  506. if (taicpu(p).ops=1) and
  507. (taicpu(p).oper[0]^.typ=top_reg) and
  508. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  509. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  510. (hp1.typ=ait_instruction) and
  511. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  512. (taicpu(hp1).ops>0) and
  513. (taicpu(hp1).oper[0]^.typ=top_reg) and
  514. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  515. begin
  516. DebugMsg('Peephole ClrMov2Mov performed', p);
  517. result:=RemoveCurrentP(p);
  518. end
  519. { turn
  520. clr rX
  521. ...
  522. adc rY, rX
  523. into
  524. ...
  525. adc rY, r1
  526. }
  527. else if (taicpu(p).ops=1) and
  528. (taicpu(p).oper[0]^.typ=top_reg) and
  529. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  530. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  531. (hp1.typ=ait_instruction) and
  532. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  533. (taicpu(hp1).ops=2) and
  534. (taicpu(hp1).oper[1]^.typ=top_reg) and
  535. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  536. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  537. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  538. begin
  539. DebugMsg('Peephole ClrAdc2Adc performed', p);
  540. taicpu(hp1).oper[1]^.reg:=NR_R1;
  541. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  542. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  543. if assigned(alloc) and assigned(dealloc) then
  544. begin
  545. asml.Remove(alloc);
  546. alloc.Free;
  547. asml.Remove(dealloc);
  548. dealloc.Free;
  549. end;
  550. result:=RemoveCurrentP(p);
  551. end;
  552. end;
  553. A_PUSH:
  554. begin
  555. { turn
  556. push reg0
  557. push reg1
  558. pop reg3
  559. pop reg2
  560. into
  561. movw reg2,reg0
  562. or
  563. mov reg3,reg1
  564. mov reg2,reg0
  565. }
  566. if GetNextInstruction(p,hp1) and
  567. MatchInstruction(hp1,A_PUSH) and
  568. GetNextInstruction(hp1,hp2) and
  569. MatchInstruction(hp2,A_POP) and
  570. GetNextInstruction(hp2,hp3) and
  571. MatchInstruction(hp3,A_POP) then
  572. begin
  573. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  574. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  575. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  576. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  577. begin
  578. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  579. taicpu(hp3).ops:=2;
  580. taicpu(hp3).opcode:=A_MOVW;
  581. taicpu(hp3).loadreg(1, taicpu(p).oper[0]^.reg);
  582. RemoveCurrentP(p);
  583. RemoveCurrentP(p);
  584. result:=RemoveCurrentP(p);
  585. end
  586. else
  587. begin
  588. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  589. taicpu(p).ops:=2;
  590. taicpu(p).opcode:=A_MOV;
  591. taicpu(hp1).ops:=2;
  592. taicpu(hp1).opcode:=A_MOV;
  593. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  594. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  595. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  596. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  597. { life range of reg2 and reg3 is increased, fix register allocation entries }
  598. CopyUsedRegs(TmpUsedRegs);
  599. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  600. AllocRegBetween(taicpu(hp2).oper[0]^.reg,hp1,hp2,TmpUsedRegs);
  601. ReleaseUsedRegs(TmpUsedRegs);
  602. CopyUsedRegs(TmpUsedRegs);
  603. AllocRegBetween(taicpu(hp3).oper[0]^.reg,p,hp3,TmpUsedRegs);
  604. ReleaseUsedRegs(TmpUsedRegs);
  605. IncludeRegInUsedRegs(taicpu(hp3).oper[0]^.reg,UsedRegs);
  606. UpdateUsedRegs(tai(p.Next));
  607. asml.Remove(hp2);
  608. hp2.Free;
  609. asml.Remove(hp3);
  610. hp3.Free;
  611. result:=true;
  612. end
  613. end;
  614. end;
  615. A_CALL:
  616. if (cs_opt_level4 in current_settings.optimizerswitches) and
  617. GetNextInstruction(p,hp1) and
  618. MatchInstruction(hp1,A_RET) then
  619. begin
  620. DebugMsg('Peephole CallReg2Jmp performed', p);
  621. taicpu(p).opcode:=A_JMP;
  622. asml.Remove(hp1);
  623. hp1.Free;
  624. result:=true;
  625. end;
  626. A_RCALL:
  627. if (cs_opt_level4 in current_settings.optimizerswitches) and
  628. GetNextInstruction(p,hp1) and
  629. MatchInstruction(hp1,A_RET) then
  630. begin
  631. DebugMsg('Peephole RCallReg2RJmp performed', p);
  632. taicpu(p).opcode:=A_RJMP;
  633. asml.Remove(hp1);
  634. hp1.Free;
  635. result:=true;
  636. end;
  637. A_MOV:
  638. begin
  639. { change
  640. mov reg0, reg1
  641. dealloc reg0
  642. into
  643. dealloc reg0
  644. }
  645. if MatchOpType(taicpu(p),top_reg,top_reg) then
  646. begin
  647. CopyUsedRegs(TmpUsedRegs);
  648. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  649. if not(RegInUsedRegs(taicpu(p).oper[0]^.reg,TmpUsedRegs)) and
  650. { reg. allocation information before calls is not perfect, so don't do this before
  651. calls/icalls }
  652. GetNextInstruction(p,hp1) and
  653. not(MatchInstruction(hp1,[A_CALL,A_RCALL])) then
  654. begin
  655. DebugMsg('Peephole Mov2Nop performed', p);
  656. result:=RemoveCurrentP(p);
  657. ReleaseUsedRegs(TmpUsedRegs);
  658. exit;
  659. end;
  660. ReleaseUsedRegs(TmpUsedRegs);
  661. end;
  662. { turn
  663. mov reg0, reg1
  664. <op> reg2,reg0
  665. dealloc reg0
  666. into
  667. <op> reg2,reg1
  668. }
  669. if MatchOpType(taicpu(p),top_reg,top_reg) and
  670. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  671. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  672. (MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  673. A_OUT,A_IN]) or
  674. { the reference register of ST/STD cannot be replaced }
  675. (MatchInstruction(hp1,[A_STD,A_ST]) and (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)))) and
  676. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  677. {(taicpu(hp1).ops=1) and
  678. (taicpu(hp1).oper[0]^.typ = top_reg) and
  679. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  680. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  681. begin
  682. DebugMsg('Peephole MovOp2Op performed', p);
  683. for i := 0 to taicpu(hp1).ops-1 do
  684. if taicpu(hp1).oper[i]^.typ=top_reg then
  685. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  686. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  687. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  688. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  689. if assigned(alloc) and assigned(dealloc) then
  690. begin
  691. asml.Remove(alloc);
  692. alloc.Free;
  693. asml.Remove(dealloc);
  694. dealloc.Free;
  695. end;
  696. { life range of reg1 is increased }
  697. AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,usedregs);
  698. { p will be removed, update used register as we continue
  699. with the next instruction after p }
  700. result:=RemoveCurrentP(p);
  701. end
  702. { remove
  703. mov reg0,reg0
  704. }
  705. else if (taicpu(p).ops=2) and
  706. (taicpu(p).oper[0]^.typ = top_reg) and
  707. (taicpu(p).oper[1]^.typ = top_reg) and
  708. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  709. begin
  710. DebugMsg('Peephole RedundantMov performed', p);
  711. result:=RemoveCurrentP(p);
  712. end
  713. {
  714. Turn
  715. mov rx,ry
  716. op rx,rz
  717. mov ry, rx
  718. Into
  719. op ry,rz
  720. }
  721. else if (taicpu(p).ops=2) and
  722. MatchOpType(taicpu(p),top_reg,top_reg) and
  723. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  724. (hp1.typ=ait_instruction) and
  725. (taicpu(hp1).ops >= 1) and
  726. (taicpu(hp1).oper[0]^.typ = top_reg) and
  727. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  728. MatchInstruction(hp2,A_MOV) and
  729. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  730. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  731. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  732. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  733. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  734. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  735. A_INC,A_DEC,
  736. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  737. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  738. begin
  739. DebugMsg('Peephole MovOpMov2Op performed', p);
  740. if (taicpu(hp1).ops=2) and
  741. (taicpu(hp1).oper[1]^.typ=top_reg) and
  742. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  743. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  744. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  745. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  746. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  747. if assigned(alloc) and assigned(dealloc) then
  748. begin
  749. asml.Remove(alloc);
  750. alloc.Free;
  751. asml.Remove(dealloc);
  752. dealloc.Free;
  753. end;
  754. asml.remove(hp2);
  755. hp2.free;
  756. result:=RemoveCurrentP(p);
  757. end
  758. {
  759. Turn
  760. mov rx,ry
  761. op rx,rw
  762. mov rw,rx
  763. Into
  764. op rw,ry
  765. }
  766. else if (taicpu(p).ops=2) and
  767. MatchOpType(taicpu(p),top_reg,top_reg) and
  768. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  769. (hp1.typ=ait_instruction) and
  770. (taicpu(hp1).ops = 2) and
  771. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  772. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  773. (hp2.typ=ait_instruction) and
  774. (taicpu(hp2).opcode=A_MOV) and
  775. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  776. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  777. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  778. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  779. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  780. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  781. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  782. begin
  783. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  784. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  785. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  786. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  787. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  788. if assigned(alloc) and assigned(dealloc) then
  789. begin
  790. asml.Remove(alloc);
  791. alloc.Free;
  792. asml.Remove(dealloc);
  793. dealloc.Free;
  794. end;
  795. result:=RemoveCurrentP(p);
  796. asml.remove(hp2);
  797. hp2.free;
  798. end
  799. { fold
  800. mov reg2,reg0
  801. mov reg3,reg1
  802. to
  803. movw reg2,reg0
  804. }
  805. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  806. (taicpu(p).ops=2) and
  807. (taicpu(p).oper[0]^.typ = top_reg) and
  808. (taicpu(p).oper[1]^.typ = top_reg) and
  809. getnextinstruction(p,hp1) and
  810. (hp1.typ = ait_instruction) and
  811. (taicpu(hp1).opcode = A_MOV) and
  812. (taicpu(hp1).ops=2) and
  813. (taicpu(hp1).oper[0]^.typ = top_reg) and
  814. (taicpu(hp1).oper[1]^.typ = top_reg) and
  815. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  816. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  817. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  818. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  819. begin
  820. DebugMsg('Peephole MovMov2Movw performed', p);
  821. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  822. if assigned(alloc) then
  823. begin
  824. asml.Remove(alloc);
  825. asml.InsertBefore(alloc,p);
  826. { proper book keeping of currently used registers }
  827. IncludeRegInUsedRegs(taicpu(hp1).oper[0]^.reg,UsedRegs);
  828. end;
  829. taicpu(p).opcode:=A_MOVW;
  830. asml.remove(hp1);
  831. hp1.free;
  832. result:=true;
  833. end
  834. {
  835. This removes the first mov from
  836. mov rX,...
  837. mov rX,...
  838. }
  839. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  840. while MatchInstruction(hp1,A_MOV) and
  841. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  842. { don't remove the first mov if the second is a mov rX,rX }
  843. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  844. begin
  845. DebugMsg('Peephole MovMov2Mov performed', p);
  846. result:=RemoveCurrentP(p);
  847. GetNextInstruction(hp1,hp1);
  848. if not assigned(hp1) then
  849. break;
  850. end;
  851. end;
  852. A_SBIC,
  853. A_SBIS:
  854. begin
  855. {
  856. Turn
  857. sbic/sbis X, y
  858. jmp .L1
  859. op
  860. .L1:
  861. into
  862. sbis/sbic X,y
  863. op
  864. .L1:
  865. }
  866. if GetNextInstruction(p, hp1) and
  867. (hp1.typ=ait_instruction) and
  868. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  869. (taicpu(hp1).ops>0) and
  870. (taicpu(hp1).oper[0]^.typ = top_ref) and
  871. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  872. GetNextInstruction(hp1, hp2) and
  873. (hp2.typ=ait_instruction) and
  874. (not taicpu(hp2).is_jmp) and
  875. GetNextInstruction(hp2, hp3) and
  876. (hp3.typ=ait_label) and
  877. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  878. begin
  879. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  880. if taicpu(p).opcode=A_SBIC then
  881. taicpu(p).opcode:=A_SBIS
  882. else
  883. taicpu(p).opcode:=A_SBIC;
  884. tai_label(hp3).labsym.decrefs;
  885. AsmL.remove(hp1);
  886. taicpu(hp1).Free;
  887. result:=true;
  888. end
  889. {
  890. Turn
  891. sbiX X, y
  892. jmp .L1
  893. jmp .L2
  894. .L1:
  895. op
  896. .L2:
  897. into
  898. sbiX X,y
  899. .L1:
  900. op
  901. .L2:
  902. }
  903. else if GetNextInstruction(p, hp1) and
  904. (hp1.typ=ait_instruction) and
  905. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  906. (taicpu(hp1).ops>0) and
  907. (taicpu(hp1).oper[0]^.typ = top_ref) and
  908. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  909. GetNextInstruction(hp1, hp2) and
  910. (hp2.typ=ait_instruction) and
  911. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  912. (taicpu(hp2).ops>0) and
  913. (taicpu(hp2).oper[0]^.typ = top_ref) and
  914. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  915. GetNextInstruction(hp2, hp3) and
  916. (hp3.typ=ait_label) and
  917. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  918. GetNextInstruction(hp3, hp4) and
  919. (hp4.typ=ait_instruction) and
  920. GetNextInstruction(hp4, hp5) and
  921. (hp3.typ=ait_label) and
  922. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  923. begin
  924. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  925. tai_label(hp3).labsym.decrefs;
  926. tai_label(hp5).labsym.decrefs;
  927. AsmL.remove(hp1);
  928. taicpu(hp1).Free;
  929. AsmL.remove(hp2);
  930. taicpu(hp2).Free;
  931. result:=true;
  932. end;
  933. end;
  934. end;
  935. end;
  936. end;
  937. end;
  938. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  939. begin
  940. end;
  941. begin
  942. casmoptimizer:=TCpuAsmOptimizer;
  943. End.