aoptcpu.pas 15 KB

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  1. {
  2. Copyright (c) 1998-2014 by the Free Pascal development team
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for m68k
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. {$define DEBUG_AOPTCPU}
  21. Interface
  22. uses
  23. cpubase, aoptobj, aoptcpub, aopt, aasmtai,
  24. cgbase;
  25. Type
  26. TCpuAsmOptimizer = class(TAsmOptimizer)
  27. function RegLoadedWithNewValue(reg: tregister; hp: tai): boolean; override;
  28. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  29. function TryToOptimizeMove(var p: tai): boolean;
  30. { outputs a debug message into the assembler file }
  31. procedure DebugMsg(const s: string; p: tai);
  32. End;
  33. Implementation
  34. uses
  35. cutils, aasmcpu, cgutils, globals, verbose, cpuinfo, itcpugas;
  36. function opname(var p: tai): string;
  37. begin
  38. result:=upcase(gas_op2str[taicpu(p).opcode]);
  39. end;
  40. function RefsEqual(const r1, r2: treference): boolean;
  41. begin
  42. RefsEqual :=
  43. (r1.offset = r2.offset) and
  44. (r1.base = r2.base) and
  45. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  46. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  47. (r1.relsymbol = r2.relsymbol);
  48. end;
  49. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean;
  50. begin
  51. result := oper1.typ = oper2.typ;
  52. if result then
  53. case oper1.typ of
  54. top_const:
  55. Result:=oper1.val = oper2.val;
  56. top_reg:
  57. Result:=oper1.reg = oper2.reg;
  58. top_ref:
  59. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  60. else
  61. internalerror(2016112401);
  62. end
  63. end;
  64. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  65. var
  66. p: taicpu;
  67. begin
  68. if not assigned(hp) or
  69. (hp.typ <> ait_instruction) then
  70. begin
  71. Result := false;
  72. exit;
  73. end;
  74. p := taicpu(hp);
  75. Result :=
  76. ((p.opcode in [A_MOVE,A_MOVEA,A_MVS,A_MVZ,A_MOVEQ,A_LEA]) and
  77. (p.oper[1]^.typ = top_reg) and
  78. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  79. ((p.oper[0]^.typ = top_const) or
  80. ((p.oper[0]^.typ = top_reg) and
  81. not(SuperRegistersEqual(p.oper[0]^.reg,reg))) or
  82. ((p.oper[0]^.typ = top_ref) and
  83. not RegInRef(reg,p.oper[0]^.ref^)))) or
  84. ((p.opcode = A_FMOVE) and
  85. (p.oper[1]^.typ = top_reg) and
  86. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  87. ((p.oper[0]^.typ = top_realconst) or
  88. ((p.oper[0]^.typ = top_reg) and
  89. not(SuperRegistersEqual(p.oper[0]^.reg,reg))))) or
  90. ((p.opcode = A_MOVEM) and
  91. (p.oper[1]^.typ = top_regset) and
  92. ((getsupreg(reg) in p.oper[1]^.dataregset) or
  93. (getsupreg(reg) in p.oper[1]^.addrregset))) or
  94. ((p.opcode = A_FMOVEM) and
  95. (p.oper[1]^.typ = top_regset) and
  96. (getsupreg(reg) in p.oper[1]^.fpuregset));
  97. end;
  98. {$ifdef DEBUG_AOPTCPU}
  99. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);
  100. begin
  101. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  102. end;
  103. {$else DEBUG_AOPTCPU}
  104. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);inline;
  105. begin
  106. end;
  107. {$endif DEBUG_AOPTCPU}
  108. function TCpuAsmOptimizer.TryToOptimizeMove(var p: tai): boolean;
  109. var
  110. next, next2: tai;
  111. opstr: string[15];
  112. begin
  113. result:=false;
  114. if GetNextInstruction(p,next) and
  115. (next.typ = ait_instruction) and
  116. (taicpu(next).opcode = taicpu(p).opcode) and
  117. (taicpu(p).opsize = taicpu(next).opsize) and
  118. (taicpu(p).oper[1]^.typ = top_reg) and
  119. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) then
  120. begin
  121. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[1]^)) and
  122. RegEndOfLife(taicpu(next).oper[0]^.reg, taicpu(next)) then
  123. begin
  124. opstr:=opname(p);
  125. case taicpu(p).oper[0]^.typ of
  126. top_reg:
  127. begin
  128. { move %reg0, %tmpreg; move %tmpreg, <ea> -> move %reg0, <ea> }
  129. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  130. asml.remove(next);
  131. next.free;
  132. result:=true;
  133. { also remove leftover move %reg0, %reg0, which can occur as the result
  134. of the previous optimization, if %reg0 and %tmpreg was different types
  135. (addr vs. data), so these moves were left in by the cg }
  136. if MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
  137. begin
  138. DebugMsg('Optimizer: '+opstr+' + '+opstr+' removed',p);
  139. asml.remove(p);
  140. p.free;
  141. end
  142. else
  143. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #1',p)
  144. end;
  145. top_const:
  146. begin
  147. // DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #2',p);
  148. end;
  149. top_ref:
  150. begin
  151. { move ref, %tmpreg; move %tmpreg, <ea> -> move ref, <ea> }
  152. { we only want to do this when <ea> is a reg or a simple reference }
  153. with taicpu(next).oper[1]^ do
  154. if (taicpu(next).opcode <> A_FMOVE) and
  155. ((typ = top_reg) or
  156. ((typ = top_ref) and
  157. ((ref^.index = NR_NO) or
  158. (ref^.base = NR_NO)) and
  159. (ref^.symbol = nil) and
  160. (ref^.offset = 0))) then
  161. begin
  162. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #3',p);
  163. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  164. asml.remove(next);
  165. next.free;
  166. result:=true;
  167. end;
  168. end;
  169. end;
  170. end;
  171. exit;
  172. end;
  173. if GetNextInstruction(p,next) and
  174. (next.typ = ait_instruction) and
  175. GetNextInstruction(next,next2) and
  176. (next2.typ = ait_instruction) and
  177. (taicpu(next).opcode <> taicpu(p).opcode) and
  178. (taicpu(next2).opcode = taicpu(p).opcode) and
  179. (taicpu(p).oper[0]^.typ = top_reg) and
  180. (taicpu(p).oper[1]^.typ = top_reg) and
  181. (getregtype(taicpu(p).oper[0]^.reg) = getregtype(taicpu(p).oper[1]^.reg)) and
  182. MatchOperand(taicpu(p).oper[1]^,taicpu(next2).oper[0]^) and
  183. MatchOperand(taicpu(next2).oper[1]^,taicpu(p).oper[0]^) and
  184. (taicpu(p).opsize = taicpu(next2).opsize) and
  185. ((taicpu(p).opcode = A_FMOVE) or
  186. (taicpu(p).opsize = taicpu(next).opsize)) then
  187. begin
  188. opstr:=opname(p);
  189. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next2).oper[1]^)) and
  190. not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[0]^)) and
  191. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(next2)) then
  192. begin
  193. { move %reg0, %tmpreg
  194. op ???, %tmpreg
  195. move %tmpreg, %reg0
  196. to:
  197. op ???, %reg0 }
  198. if MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[taicpu(next).ops-1]^) then
  199. begin
  200. {
  201. Disabled, because it breaks some tests... :( (KB)
  202. DebugMsg('Optimizer: '+opstr+' + OP + '+opstr+' to OP #1',next);
  203. taicpu(next).loadOper(taicpu(next).ops-1,taicpu(p).oper[0]^);
  204. asml.remove(p);
  205. asml.remove(next2);
  206. p.free;
  207. next2.free;
  208. result:=true;
  209. }
  210. end;
  211. end;
  212. end;
  213. end;
  214. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  215. var
  216. next: tai;
  217. tmpref: treference;
  218. tmpsingle: single;
  219. begin
  220. result:=false;
  221. case p.typ of
  222. ait_instruction:
  223. begin
  224. //asml.insertbefore(tai_comment.Create(strpnew('pass1 called for instr')), p);
  225. case taicpu(p).opcode of
  226. A_MOVE:
  227. result:=TryToOptimizeMove(p);
  228. { LEA (Ax),Ax is a NOP if src and dest reg is equal, so remove it. }
  229. A_LEA:
  230. if not assigned(taicpu(p).oper[0]^.ref^.symbol) and
  231. (((taicpu(p).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
  232. (taicpu(p).oper[0]^.ref^.index = NR_NO)) or
  233. ((taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
  234. (taicpu(p).oper[0]^.ref^.base = NR_NO))) and
  235. (taicpu(p).oper[0]^.ref^.offset = 0) then
  236. begin
  237. DebugMsg('Optimizer: LEA 0(Ax),Ax removed',p);
  238. asml.remove(p);
  239. p.free;
  240. result:=true;
  241. end;
  242. { Address register sub/add can be replaced with ADDQ/SUBQ or LEA if the value is in the
  243. SmallInt range, which is shorter to encode and faster to execute on most 68k }
  244. A_SUB,A_SUBA,A_ADD,A_ADDA:
  245. if (taicpu(p).oper[1]^.typ = top_reg) and isaddressregister(taicpu(p).oper[1]^.reg) and
  246. (taicpu(p).oper[0]^.typ = top_const) then
  247. begin
  248. if isvalueforaddqsubq(taicpu(p).oper[0]^.val) then
  249. begin
  250. DebugMsg('Optimizer: SUB/ADD #val,Ax to SUBQ/ADDQ',p);
  251. taicpu(p).opsize:=S_L; // this is safe, because we're targetting an address reg
  252. if taicpu(p).opcode in [A_ADD,A_ADDA] then
  253. taicpu(p).opcode:=A_ADDQ
  254. else
  255. taicpu(p).opcode:=A_SUBQ;
  256. result:=true;
  257. end
  258. else
  259. if isvalue16bit(abs(taicpu(p).oper[0]^.val)) then
  260. begin
  261. DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
  262. if taicpu(p).opcode in [A_SUB,A_SUBA] then
  263. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
  264. else
  265. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);
  266. taicpu(p).opcode:=A_LEA;
  267. taicpu(p).loadref(0,tmpref);
  268. result:=true;
  269. end;
  270. end;
  271. { MOVEA #0,Ax to SUBA Ax,Ax, because it's shorter }
  272. A_MOVEA:
  273. if (taicpu(p).oper[0]^.typ = top_const) and
  274. (taicpu(p).oper[0]^.val = 0) then
  275. begin
  276. DebugMsg('Optimizer: MOVEA #0,Ax to SUBA Ax,Ax',p);
  277. taicpu(p).opcode:=A_SUBA;
  278. taicpu(p).opsize:=S_L; { otherwise it will be .W -> BOOM }
  279. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  280. result:=true;
  281. end;
  282. { CLR.L Dx on a 68000 is slower than MOVEQ #0,Dx }
  283. A_CLR:
  284. if (current_settings.cputype in [cpu_mc68000]) and
  285. (taicpu(p).oper[0]^.typ = top_reg) and
  286. (taicpu(p).opsize = S_L) and
  287. isintregister(taicpu(p).oper[0]^.reg) then
  288. begin
  289. //DebugMsg('Optimizer: CLR.L Dx to MOVEQ #0,Dx',p);
  290. taicpu(p).opcode:=A_MOVEQ;
  291. taicpu(p).loadoper(1,taicpu(p).oper[0]^);
  292. taicpu(p).loadconst(0,0);
  293. taicpu(p).ops:=2;
  294. result:=true;
  295. end;
  296. { CMP #0,<ea> equals to TST <ea>, just shorter and TST is more flexible anyway }
  297. A_CMP,A_CMPI:
  298. if (taicpu(p).oper[0]^.typ = top_const) and
  299. (taicpu(p).oper[0]^.val = 0) then
  300. begin
  301. DebugMsg('Optimizer: CMP #0 to TST',p);
  302. taicpu(p).opcode:=A_TST;
  303. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  304. taicpu(p).clearop(1);
  305. taicpu(p).ops:=1;
  306. result:=true;
  307. end;
  308. A_FCMP:
  309. if (taicpu(p).oper[0]^.typ = top_realconst) then
  310. begin
  311. if (taicpu(p).oper[0]^.val_real = 0.0) then
  312. begin
  313. DebugMsg('Optimizer: FCMP #0.0 to FTST',p);
  314. taicpu(p).opcode:=A_FTST;
  315. taicpu(p).opsize:=S_FX;
  316. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  317. taicpu(p).clearop(1);
  318. taicpu(p).ops:=1;
  319. result:=true;
  320. end
  321. else
  322. begin
  323. tmpsingle:=taicpu(p).oper[0]^.val_real;
  324. if (taicpu(p).opsize = S_FD) and
  325. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  326. begin
  327. DebugMsg('Optimizer: FCMP const to lesser precision',p);
  328. taicpu(p).opsize:=S_FS;
  329. result:=true;
  330. end;
  331. end;
  332. end;
  333. A_FMOVE,A_FMUL,A_FADD,A_FSUB,A_FDIV:
  334. begin
  335. if (taicpu(p).opcode = A_FMOVE) and TryToOptimizeMove(p) then
  336. begin
  337. result:=true;
  338. exit;
  339. end;
  340. if (taicpu(p).oper[0]^.typ = top_realconst) then
  341. begin
  342. tmpsingle:=taicpu(p).oper[0]^.val_real;
  343. if (taicpu(p).opsize = S_FD) and
  344. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  345. begin
  346. DebugMsg('Optimizer: FMOVE/FMUL/FADD/FSUB/FDIV const to lesser precision',p);
  347. taicpu(p).opsize:=S_FS;
  348. result:=true;
  349. end;
  350. end;
  351. end;
  352. end;
  353. end;
  354. end;
  355. end;
  356. begin
  357. casmoptimizer:=TCpuAsmOptimizer;
  358. end.