nx86inl.pas 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate x86 inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86inl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl,ncginl;
  22. type
  23. tx86inlinenode = class(tcginlinenode)
  24. { first pass override
  25. so that the code generator will actually generate
  26. these nodes.
  27. }
  28. function first_pi: tnode ; override;
  29. function first_arctan_real: tnode; override;
  30. function first_abs_real: tnode; override;
  31. function first_sqr_real: tnode; override;
  32. function first_sqrt_real: tnode; override;
  33. function first_ln_real: tnode; override;
  34. function first_cos_real: tnode; override;
  35. function first_sin_real: tnode; override;
  36. function first_round_real: tnode; override;
  37. function first_trunc_real: tnode; override;
  38. { second pass override to generate these nodes }
  39. procedure second_IncludeExclude;override;
  40. procedure second_pi; override;
  41. procedure second_arctan_real; override;
  42. procedure second_abs_real; override;
  43. procedure second_round_real; override;
  44. procedure second_sqr_real; override;
  45. procedure second_sqrt_real; override;
  46. procedure second_ln_real; override;
  47. procedure second_cos_real; override;
  48. procedure second_sin_real; override;
  49. procedure second_trunc_real; override;
  50. procedure second_prefetch;override;
  51. private
  52. procedure load_fpu_location;
  53. end;
  54. implementation
  55. uses
  56. systems,
  57. globtype,globals,
  58. cutils,verbose,
  59. symconst,
  60. defutil,
  61. aasmbase,aasmtai,aasmdata,aasmcpu,
  62. symdef,
  63. cgbase,pass_2,
  64. cpuinfo,cpubase,paramgr,
  65. nbas,ncon,ncal,ncnv,nld,ncgutil,
  66. tgobj,
  67. cga,cgutils,cgx86,cgobj;
  68. {*****************************************************************************
  69. TX86INLINENODE
  70. *****************************************************************************}
  71. function tx86inlinenode.first_pi : tnode;
  72. begin
  73. expectloc:=LOC_FPUREGISTER;
  74. registersfpu:=1;
  75. first_pi := nil;
  76. end;
  77. function tx86inlinenode.first_arctan_real : tnode;
  78. begin
  79. expectloc:=LOC_FPUREGISTER;
  80. registersint:=left.registersint;
  81. registersfpu:=max(left.registersfpu,2);
  82. {$ifdef SUPPORT_MMX}
  83. registersmmx:=left.registersmmx;
  84. {$endif SUPPORT_MMX}
  85. first_arctan_real := nil;
  86. end;
  87. function tx86inlinenode.first_abs_real : tnode;
  88. begin
  89. if use_sse(resultdef) then
  90. begin
  91. expectloc:=LOC_MMREGISTER;
  92. registersmm:=max(left.registersmm,1);
  93. end
  94. else
  95. begin
  96. expectloc:=LOC_FPUREGISTER;
  97. registersfpu:=max(left.registersfpu,1);
  98. end;
  99. registersint:=left.registersint;
  100. {$ifdef SUPPORT_MMX}
  101. registersmmx:=left.registersmmx;
  102. {$endif SUPPORT_MMX}
  103. first_abs_real := nil;
  104. end;
  105. function tx86inlinenode.first_sqr_real : tnode;
  106. begin
  107. expectloc:=LOC_FPUREGISTER;
  108. registersint:=left.registersint;
  109. registersfpu:=max(left.registersfpu,1);
  110. {$ifdef SUPPORT_MMX}
  111. registersmmx:=left.registersmmx;
  112. {$endif SUPPORT_MMX}
  113. first_sqr_real := nil;
  114. end;
  115. function tx86inlinenode.first_sqrt_real : tnode;
  116. begin
  117. expectloc:=LOC_FPUREGISTER;
  118. registersint:=left.registersint;
  119. registersfpu:=max(left.registersfpu,1);
  120. {$ifdef SUPPORT_MMX}
  121. registersmmx:=left.registersmmx;
  122. {$endif SUPPORT_MMX}
  123. first_sqrt_real := nil;
  124. end;
  125. function tx86inlinenode.first_ln_real : tnode;
  126. begin
  127. expectloc:=LOC_FPUREGISTER;
  128. registersint:=left.registersint;
  129. registersfpu:=max(left.registersfpu,2);
  130. {$ifdef SUPPORT_MMX}
  131. registersmmx:=left.registersmmx;
  132. {$endif SUPPORT_MMX}
  133. first_ln_real := nil;
  134. end;
  135. function tx86inlinenode.first_cos_real : tnode;
  136. begin
  137. expectloc:=LOC_FPUREGISTER;
  138. registersint:=left.registersint;
  139. registersfpu:=max(left.registersfpu,1);
  140. {$ifdef SUPPORT_MMX}
  141. registersmmx:=left.registersmmx;
  142. {$endif SUPPORT_MMX}
  143. first_cos_real := nil;
  144. end;
  145. function tx86inlinenode.first_sin_real : tnode;
  146. begin
  147. expectloc:=LOC_FPUREGISTER;
  148. registersint:=left.registersint;
  149. registersfpu:=max(left.registersfpu,1);
  150. {$ifdef SUPPORT_MMX}
  151. registersmmx:=left.registersmmx;
  152. {$endif SUPPORT_MMX}
  153. first_sin_real := nil;
  154. end;
  155. function tx86inlinenode.first_round_real : tnode;
  156. begin
  157. {$ifdef x86_64}
  158. if use_sse(left.resultdef) then
  159. expectloc:=LOC_REGISTER
  160. else
  161. {$else x86_64}
  162. expectloc:=LOC_REFERENCE;
  163. {$endif x86_64}
  164. registersint:=left.registersint;
  165. registersfpu:=max(left.registersfpu,1);
  166. {$ifdef SUPPORT_MMX}
  167. registersmmx:=left.registersmmx;
  168. {$endif SUPPORT_MMX}
  169. result:=nil;
  170. end;
  171. function tx86inlinenode.first_trunc_real: tnode;
  172. begin
  173. if (cs_opt_size in current_settings.optimizerswitches)
  174. {$ifdef x86_64}
  175. and not(use_sse(left.resultdef))
  176. {$endif x86_64}
  177. then
  178. result:=inherited
  179. else
  180. begin
  181. {$ifdef x86_64}
  182. if use_sse(left.resultdef) then
  183. expectloc:=LOC_REGISTER
  184. else
  185. {$else x86_64}
  186. expectloc:=LOC_REFERENCE;
  187. {$endif x86_64}
  188. registersint:=left.registersint;
  189. registersfpu:=max(left.registersfpu,1);
  190. {$ifdef SUPPORT_MMX}
  191. registersmmx:=left.registersmmx;
  192. {$endif SUPPORT_MMX}
  193. result:=nil;
  194. end;
  195. end;
  196. procedure tx86inlinenode.second_Pi;
  197. begin
  198. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  199. emit_none(A_FLDPI,S_NO);
  200. tcgx86(cg).inc_fpu_stack;
  201. location.register:=NR_FPU_RESULT_REG;
  202. end;
  203. { load the FPU into the an fpu register }
  204. procedure tx86inlinenode.load_fpu_location;
  205. begin
  206. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  207. location.register:=NR_FPU_RESULT_REG;
  208. secondpass(left);
  209. case left.location.loc of
  210. LOC_FPUREGISTER:
  211. ;
  212. LOC_CFPUREGISTER:
  213. begin
  214. cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,left.location.size,
  215. left.location.size,left.location.register,location.register);
  216. end;
  217. LOC_REFERENCE,LOC_CREFERENCE:
  218. begin
  219. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,
  220. left.location.size,left.location.size,
  221. left.location.reference,location.register);
  222. end;
  223. LOC_MMREGISTER,LOC_CMMREGISTER:
  224. begin
  225. location:=left.location;
  226. location_force_fpureg(current_asmdata.CurrAsmList,location,false);
  227. end;
  228. else
  229. internalerror(309991);
  230. end;
  231. end;
  232. procedure tx86inlinenode.second_arctan_real;
  233. begin
  234. load_fpu_location;
  235. emit_none(A_FLD1,S_NO);
  236. emit_none(A_FPATAN,S_NO);
  237. end;
  238. procedure tx86inlinenode.second_abs_real;
  239. var
  240. href : treference;
  241. begin
  242. if use_sse(resultdef) then
  243. begin
  244. secondpass(left);
  245. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  246. location:=left.location;
  247. case tfloatdef(resultdef).floattype of
  248. s32real:
  249. reference_reset_symbol(href,current_asmdata.RefAsmSymbol('FPC_ABSMASK_SINGLE'),0);
  250. s64real:
  251. reference_reset_symbol(href,current_asmdata.RefAsmSymbol('FPC_ABSMASK_DOUBLE'),0);
  252. else
  253. internalerror(200506081);
  254. end;
  255. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ANDPS,S_XMM,href,location.register))
  256. end
  257. else
  258. begin
  259. load_fpu_location;
  260. emit_none(A_FABS,S_NO);
  261. end;
  262. end;
  263. procedure tx86inlinenode.second_round_real;
  264. var
  265. href : treference;
  266. begin
  267. {$ifdef x86_64}
  268. if use_sse(left.resultdef) then
  269. begin
  270. secondpass(left);
  271. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  272. location_reset(location,LOC_REGISTER,OS_S64);
  273. location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
  274. case left.location.size of
  275. OS_F32:
  276. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTSS2SI,S_Q,left.location.register,location.register));
  277. OS_F64:
  278. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTSD2SI,S_Q,left.location.register,location.register));
  279. else
  280. internalerror(2007031402);
  281. end;
  282. end
  283. else
  284. {$endif x86_64}
  285. begin
  286. load_fpu_location;
  287. location_reset(location,LOC_REFERENCE,OS_S64);
  288. tg.GetTempTyped(current_asmdata.CurrAsmList,resultdef,tt_normal,location.reference);
  289. emit_ref(A_FISTP,S_IQ,location.reference);
  290. emit_none(A_FWAIT,S_NO);
  291. end;
  292. end;
  293. procedure tx86inlinenode.second_trunc_real;
  294. var
  295. href : treference;
  296. oldcw,newcw : treference;
  297. tempreg : tregister;
  298. begin
  299. {$ifdef x86_64}
  300. if use_sse(left.resultdef) then
  301. begin
  302. secondpass(left);
  303. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  304. location_reset(location,LOC_REGISTER,OS_S64);
  305. location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
  306. case left.location.size of
  307. OS_F32:
  308. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTTSS2SI,S_Q,left.location.register,location.register));
  309. OS_F64:
  310. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTTSD2SI,S_Q,left.location.register,location.register));
  311. else
  312. internalerror(2007031401);
  313. end;
  314. end
  315. else
  316. {$endif x86_64}
  317. begin
  318. tg.GetTemp(current_asmdata.CurrAsmList,2,tt_normal,oldcw);
  319. tg.GetTemp(current_asmdata.CurrAsmList,2,tt_normal,newcw);
  320. emit_ref(A_FNSTCW,S_NO,newcw);
  321. emit_ref(A_FNSTCW,S_NO,oldcw);
  322. emit_const_ref(A_OR,S_W,$0f00,newcw);
  323. load_fpu_location;
  324. emit_ref(A_FLDCW,S_NO,newcw);
  325. location_reset(location,LOC_REFERENCE,OS_S64);
  326. tg.GetTempTyped(current_asmdata.CurrAsmList,resultdef,tt_normal,location.reference);
  327. emit_ref(A_FISTP,S_IQ,location.reference);
  328. emit_ref(A_FLDCW,S_NO,oldcw);
  329. emit_none(A_FWAIT,S_NO);
  330. tg.UnGetTemp(current_asmdata.CurrAsmList,oldcw);
  331. tg.UnGetTemp(current_asmdata.CurrAsmList,newcw);
  332. end;
  333. end;
  334. procedure tx86inlinenode.second_sqr_real;
  335. begin
  336. if use_sse(resultdef) then
  337. begin
  338. secondpass(left);
  339. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  340. location:=left.location;
  341. cg.a_opmm_loc_reg(current_asmdata.CurrAsmList,OP_MUL,left.location.size,left.location,left.location.register,mms_movescalar);
  342. end
  343. else
  344. begin
  345. load_fpu_location;
  346. emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
  347. end;
  348. end;
  349. procedure tx86inlinenode.second_sqrt_real;
  350. begin
  351. if use_sse(resultdef) then
  352. begin
  353. secondpass(left);
  354. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  355. location:=left.location;
  356. case tfloatdef(resultdef).floattype of
  357. s32real:
  358. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSS,S_XMM,location.register,location.register));
  359. s64real:
  360. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSD,S_XMM,location.register,location.register));
  361. else
  362. internalerror(200510031);
  363. end;
  364. end
  365. else
  366. begin
  367. load_fpu_location;
  368. emit_none(A_FSQRT,S_NO);
  369. end;
  370. end;
  371. procedure tx86inlinenode.second_ln_real;
  372. begin
  373. load_fpu_location;
  374. emit_none(A_FLDLN2,S_NO);
  375. emit_none(A_FXCH,S_NO);
  376. emit_none(A_FYL2X,S_NO);
  377. end;
  378. procedure tx86inlinenode.second_cos_real;
  379. begin
  380. load_fpu_location;
  381. emit_none(A_FCOS,S_NO);
  382. end;
  383. procedure tx86inlinenode.second_sin_real;
  384. begin
  385. load_fpu_location;
  386. emit_none(A_FSIN,S_NO)
  387. end;
  388. procedure tx86inlinenode.second_prefetch;
  389. var
  390. ref : treference;
  391. r : tregister;
  392. begin
  393. {$ifdef i386}
  394. if current_settings.cputype>=cpu_Pentium3 then
  395. {$endif i386}
  396. begin
  397. secondpass(left);
  398. case left.location.loc of
  399. LOC_CREFERENCE,
  400. LOC_REFERENCE:
  401. begin
  402. r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
  403. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
  404. reference_reset_base(ref,r,0);
  405. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PREFETCHNTA,S_NO,ref));
  406. end;
  407. else
  408. internalerror(200402021);
  409. end;
  410. end;
  411. end;
  412. {*****************************************************************************
  413. INCLUDE/EXCLUDE GENERIC HANDLING
  414. *****************************************************************************}
  415. procedure tx86inlinenode.second_IncludeExclude;
  416. var
  417. hregister : tregister;
  418. asmop : tasmop;
  419. bitsperop,l : longint;
  420. cgop : topcg;
  421. opsize : tcgsize;
  422. begin
  423. if not(is_varset(tcallparanode(left).resultdef)) then
  424. opsize:=int_cgsize(tcallparanode(left).resultdef.size)
  425. else
  426. opsize:=OS_32;
  427. bitsperop:=(8*tcgsize2size[opsize]);
  428. secondpass(tcallparanode(left).left);
  429. if tcallparanode(tcallparanode(left).right).left.nodetype=ordconstn then
  430. begin
  431. { calculate bit position }
  432. l:=1 shl (tordconstnode(tcallparanode(tcallparanode(left).right).left).value.svalue mod bitsperop);
  433. { determine operator }
  434. if inlinenumber=in_include_x_y then
  435. cgop:=OP_OR
  436. else
  437. begin
  438. cgop:=OP_AND;
  439. l:=not(l);
  440. end;
  441. case tcallparanode(left).left.location.loc of
  442. LOC_REFERENCE :
  443. begin
  444. inc(tcallparanode(left).left.location.reference.offset,
  445. (tordconstnode(tcallparanode(tcallparanode(left).right).left).value.svalue div bitsperop)*tcgsize2size[opsize]);
  446. cg.a_op_const_ref(current_asmdata.CurrAsmList,cgop,opsize,l,tcallparanode(left).left.location.reference);
  447. end;
  448. LOC_CREGISTER :
  449. cg.a_op_const_reg(current_asmdata.CurrAsmList,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
  450. else
  451. internalerror(200405022);
  452. end;
  453. end
  454. else
  455. begin
  456. if opsize=OS_8 then
  457. opsize:=OS_32;
  458. { generate code for the element to set }
  459. secondpass(tcallparanode(tcallparanode(left).right).left);
  460. { determine asm operator }
  461. if inlinenumber=in_include_x_y then
  462. asmop:=A_BTS
  463. else
  464. asmop:=A_BTR;
  465. if tcallparanode(tcallparanode(left).right).left.location.loc in [LOC_CREGISTER,LOC_REGISTER] then
  466. { we don't need a mod 32 because this is done automatically }
  467. { by the bts instruction. For proper checking we would }
  468. { note: bts doesn't do any mod'ing, that's why we can also use }
  469. { it for normalsets! (JM) }
  470. { need a cmp and jmp, but this should be done by the }
  471. { type cast code which does range checking if necessary (FK) }
  472. hregister:=cg.makeregsize(current_asmdata.CurrAsmList,Tcallparanode(Tcallparanode(left).right).left.location.register,opsize)
  473. else
  474. hregister:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  475. cg.a_load_loc_reg(current_asmdata.CurrAsmList,opsize,tcallparanode(tcallparanode(left).right).left.location,hregister);
  476. if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
  477. emit_reg_ref(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.reference)
  478. else
  479. emit_reg_reg(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.register);
  480. end;
  481. end;
  482. end.