cgppc.pas 35 KB

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  1. {
  2. Copyright (c) 2006 by Florian Klaempfl
  3. This unit implements the common part of the code generator for the PowerPC
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cgppc;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,symtype,symdef,
  22. cgbase,cgobj,
  23. aasmbase,aasmcpu,aasmtai,aasmdata,
  24. cpubase,cpuinfo,cgutils,rgcpu,
  25. parabase;
  26. type
  27. tcgppcgen = class(tcg)
  28. procedure a_load_const_cgpara(list: TAsmList; size: tcgsize; a: aint; const paraloc : tcgpara); override;
  29. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : tcgpara); override;
  30. procedure a_call_reg(list : TAsmList;reg: tregister); override;
  31. procedure a_call_ref(list : TAsmList;ref: treference); override;
  32. { stores the contents of register reg to the memory location described by
  33. ref }
  34. procedure a_load_reg_ref(list: TAsmList; fromsize, tosize: TCGSize;
  35. reg: tregister; const ref: treference); override;
  36. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  37. { fpu move instructions }
  38. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  39. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  40. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  41. { overflow checking }
  42. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef);override;
  43. { entry code }
  44. procedure g_profilecode(list: TAsmList); override;
  45. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  46. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  47. procedure g_maybe_got_init(list: TAsmList); override;
  48. protected
  49. function get_darwin_call_stub(const s: string; weak: boolean): tasmsymbol;
  50. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); override;
  51. { Make sure ref is a valid reference for the PowerPC and sets the }
  52. { base to the value of the index if (base = R_NO). }
  53. { Returns true if the reference contained a base, index and an }
  54. { offset or symbol, in which case the base will have been changed }
  55. { to a tempreg (which has to be freed by the caller) containing }
  56. { the sum of part of the original reference }
  57. function fixref(list: TAsmList; var ref: treference): boolean;
  58. { contains the common code of a_load_reg_ref and a_load_ref_reg }
  59. procedure a_load_store(list:TAsmList;op: tasmop;reg:tregister;ref: treference);virtual;
  60. { creates the correct branch instruction for a given combination }
  61. { of asmcondflags and destination addressing mode }
  62. procedure a_jmp(list: TAsmList; op: tasmop;
  63. c: tasmcondflag; crval: longint; l: tasmlabel);
  64. { returns true if the offset of the given reference can not be }
  65. { represented by a 16 bit immediate as required by some PowerPC }
  66. { instructions }
  67. function hasLargeOffset(const ref : TReference) : Boolean; inline;
  68. function save_lr_in_prologue: boolean;
  69. function load_got_symbol(list : TAsmList; symbol : string) : tregister;
  70. end;
  71. const
  72. TOpCmp2AsmCond: Array[topcmp] of TAsmCondFlag = (C_NONE,C_EQ,C_GT,
  73. C_LT,C_GE,C_LE,C_NE,C_LE,C_LT,C_GE,C_GT);
  74. {$ifdef extdebug}
  75. function ref2string(const ref : treference) : string;
  76. function cgsize2string(const size : TCgSize) : string;
  77. function cgop2string(const op : TOpCg) : String;
  78. {$endif extdebug}
  79. implementation
  80. uses
  81. {$ifdef extdebug}sysutils,{$endif}
  82. globals,verbose,systems,cutils,
  83. symconst,symsym,fmodule,
  84. rgobj,tgobj,cpupi,procinfo,paramgr;
  85. {$ifdef extdebug}
  86. function ref2string(const ref : treference) : string;
  87. begin
  88. result := 'base : ' + inttostr(ord(ref.base)) + ' index : ' + inttostr(ord(ref.index)) + ' refaddr : ' + inttostr(ord(ref.refaddr)) + ' offset : ' + inttostr(ref.offset) + ' symbol : ';
  89. if (assigned(ref.symbol)) then
  90. result := result + ref.symbol.name;
  91. end;
  92. function cgsize2string(const size : TCgSize) : string;
  93. const
  94. cgsize_strings : array[TCgSize] of string[8] = (
  95. 'OS_NO', 'OS_8', 'OS_16', 'OS_32', 'OS_64', 'OS_128', 'OS_S8', 'OS_S16', 'OS_S32',
  96. 'OS_S64', 'OS_S128', 'OS_F32', 'OS_F64', 'OS_F80', 'OS_C64', 'OS_F128',
  97. 'OS_M8', 'OS_M16', 'OS_M32', 'OS_M64', 'OS_M128', 'OS_MS8', 'OS_MS16', 'OS_MS32',
  98. 'OS_MS64', 'OS_MS128');
  99. begin
  100. result := cgsize_strings[size];
  101. end;
  102. function cgop2string(const op : TOpCg) : String;
  103. const
  104. opcg_strings : array[TOpCg] of string[6] = (
  105. 'None', 'Move', 'Add', 'And', 'Div', 'IDiv', 'IMul', 'Mul',
  106. 'Neg', 'Not', 'Or', 'Sar', 'Shl', 'Shr', 'Sub', 'Xor', 'Rol', 'Ror'
  107. );
  108. begin
  109. result := opcg_strings[op];
  110. end;
  111. {$endif extdebug}
  112. function tcgppcgen.hasLargeOffset(const ref : TReference) : Boolean;
  113. begin
  114. result := aword(ref.offset-low(smallint)) > high(smallint)-low(smallint);
  115. end;
  116. function tcgppcgen.save_lr_in_prologue: boolean;
  117. begin
  118. result:=
  119. (not (po_assembler in current_procinfo.procdef.procoptions) and
  120. ((pi_do_call in current_procinfo.flags) or
  121. (cs_profile in init_settings.moduleswitches))) or
  122. ([cs_lineinfo,cs_debuginfo] * current_settings.moduleswitches <> []);
  123. end;
  124. procedure tcgppcgen.a_load_const_cgpara(list: TAsmList; size: tcgsize; a: aint; const
  125. paraloc: tcgpara);
  126. var
  127. ref: treference;
  128. begin
  129. paraloc.check_simple_location;
  130. case paraloc.location^.loc of
  131. LOC_REGISTER, LOC_CREGISTER:
  132. a_load_const_reg(list, size, a, paraloc.location^.register);
  133. LOC_REFERENCE:
  134. begin
  135. reference_reset(ref,paraloc.alignment);
  136. ref.base := paraloc.location^.reference.index;
  137. ref.offset := paraloc.location^.reference.offset;
  138. a_load_const_ref(list, size, a, ref);
  139. end;
  140. else
  141. internalerror(2002081101);
  142. end;
  143. end;
  144. procedure tcgppcgen.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : tcgpara);
  145. var
  146. ref: treference;
  147. tmpreg: tregister;
  148. begin
  149. paraloc.check_simple_location;
  150. case paraloc.location^.loc of
  151. LOC_REGISTER,LOC_CREGISTER:
  152. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  153. LOC_REFERENCE:
  154. begin
  155. reference_reset(ref,paraloc.alignment);
  156. ref.base := paraloc.location^.reference.index;
  157. ref.offset := paraloc.location^.reference.offset;
  158. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  159. a_loadaddr_ref_reg(list,r,tmpreg);
  160. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  161. end;
  162. else
  163. internalerror(2002080701);
  164. end;
  165. end;
  166. procedure tcgppcgen.g_maybe_got_init(list: TAsmList);
  167. var
  168. instr: taicpu;
  169. cond: tasmcond;
  170. savedlr: boolean;
  171. begin
  172. if not(po_assembler in current_procinfo.procdef.procoptions) then
  173. begin
  174. if (cs_create_pic in current_settings.moduleswitches) and
  175. (pi_needs_got in current_procinfo.flags) then
  176. case target_info.system of
  177. system_powerpc_darwin,
  178. system_powerpc64_darwin:
  179. begin
  180. savedlr:=save_lr_in_prologue;
  181. if not savedlr then
  182. list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_LR));
  183. fillchar(cond,sizeof(cond),0);
  184. cond.simple:=false;
  185. cond.bo:=20;
  186. cond.bi:=31;
  187. instr:=taicpu.op_sym(A_BCL,current_procinfo.CurrGOTLabel);
  188. instr.setcondition(cond);
  189. list.concat(instr);
  190. a_label(list,current_procinfo.CurrGOTLabel);
  191. a_reg_alloc(list,current_procinfo.got);
  192. list.concat(taicpu.op_reg_reg(A_MFSPR,current_procinfo.got,NR_LR));
  193. if not savedlr or
  194. { in the following case lr is saved, but not restored }
  195. { (happens e.g. when generating debug info for leaf }
  196. { procedures) }
  197. not(pi_do_call in current_procinfo.flags) then
  198. list.concat(taicpu.op_reg_reg(A_MTSPR,NR_LR,NR_R0));
  199. end;
  200. end;
  201. end;
  202. end;
  203. function tcgppcgen.get_darwin_call_stub(const s: string; weak: boolean): tasmsymbol;
  204. var
  205. stubname: string;
  206. instr: taicpu;
  207. href: treference;
  208. l1: tasmsymbol;
  209. localgotlab: tasmlabel;
  210. cond: tasmcond;
  211. stubalign: byte;
  212. begin
  213. { function declared in the current unit? }
  214. { doesn't work correctly, because this will also return a hit if we }
  215. { previously took the address of an external procedure. It doesn't }
  216. { really matter, the linker will remove all unnecessary stubs. }
  217. stubname := 'L'+s+'$stub';
  218. result := current_asmdata.getasmsymbol(stubname);
  219. if assigned(result) then
  220. exit;
  221. if current_asmdata.asmlists[al_imports]=nil then
  222. current_asmdata.asmlists[al_imports]:=TAsmList.create;
  223. current_asmdata.asmlists[al_imports].concat(Tai_section.create(sec_stub,'',0));
  224. if (cs_create_pic in current_settings.moduleswitches) then
  225. stubalign:=32
  226. else
  227. stubalign:=16;
  228. current_asmdata.asmlists[al_imports].concat(Tai_align.Create(stubalign));
  229. result := current_asmdata.RefAsmSymbol(stubname);
  230. current_asmdata.asmlists[al_imports].concat(Tai_symbol.Create(result,0));
  231. { register as a weak symbol if necessary }
  232. if weak then
  233. current_asmdata.weakrefasmsymbol(s);
  234. current_asmdata.asmlists[al_imports].concat(tai_directive.create(asd_indirect_symbol,s));
  235. l1 := current_asmdata.RefAsmSymbol('L'+s+'$lazy_ptr');
  236. reference_reset_symbol(href,l1,0,sizeof(pint));
  237. href.refaddr := addr_higha;
  238. if (cs_create_pic in current_settings.moduleswitches) then
  239. begin
  240. current_asmdata.getjumplabel(localgotlab);
  241. href.relsymbol:=localgotlab;
  242. fillchar(cond,sizeof(cond),0);
  243. cond.simple:=false;
  244. cond.bo:=20;
  245. cond.bi:=31;
  246. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MFLR,NR_R0));
  247. instr:=taicpu.op_sym(A_BCL,localgotlab);
  248. instr.setcondition(cond);
  249. current_asmdata.asmlists[al_imports].concat(instr);
  250. a_label(current_asmdata.asmlists[al_imports],localgotlab);
  251. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MFLR,NR_R11));
  252. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_reg_ref(A_ADDIS,NR_R11,NR_R11,href));
  253. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MTLR,NR_R0));
  254. end
  255. else
  256. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LIS,NR_R11,href));
  257. href.refaddr := addr_low;
  258. href.base := NR_R11;
  259. {$ifndef cpu64bitaddr}
  260. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LWZU,NR_R12,href));
  261. {$else cpu64bitaddr}
  262. { darwin/ppc64 uses a 32 bit absolute address here, strange... }
  263. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LDU,NR_R12,href));
  264. {$endif cpu64bitaddr}
  265. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MTCTR,NR_R12));
  266. current_asmdata.asmlists[al_imports].concat(taicpu.op_none(A_BCTR));
  267. current_asmdata.asmlists[al_imports].concat(tai_section.create(sec_data_lazy,'',sizeof(pint)));
  268. current_asmdata.asmlists[al_imports].concat(Tai_symbol.Create(l1,0));
  269. current_asmdata.asmlists[al_imports].concat(tai_directive.create(asd_indirect_symbol,s));
  270. current_asmdata.asmlists[al_imports].concat(tai_const.createname('dyld_stub_binding_helper',0));
  271. end;
  272. procedure tcgppcgen.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  273. var
  274. ref2, tmpref: treference;
  275. begin
  276. ref2 := ref;
  277. fixref(list,ref2);
  278. if assigned(ref2.symbol) then
  279. begin
  280. if target_info.system = system_powerpc_macos then
  281. begin
  282. if macos_direct_globals then
  283. begin
  284. reference_reset(tmpref,ref2.alignment);
  285. tmpref.offset := ref2.offset;
  286. tmpref.symbol := ref2.symbol;
  287. tmpref.base := NR_NO;
  288. list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,NR_RTOC,tmpref));
  289. end
  290. else
  291. begin
  292. reference_reset(tmpref,ref2.alignment);
  293. tmpref.symbol := ref2.symbol;
  294. tmpref.offset := 0;
  295. tmpref.base := NR_RTOC;
  296. list.concat(taicpu.op_reg_ref(A_LWZ,r,tmpref));
  297. if ref2.offset <> 0 then
  298. begin
  299. reference_reset(tmpref,ref2.alignment);
  300. tmpref.offset := ref2.offset;
  301. tmpref.base:= r;
  302. list.concat(taicpu.op_reg_ref(A_LA,r,tmpref));
  303. end;
  304. end;
  305. if ref2.base <> NR_NO then
  306. list.concat(taicpu.op_reg_reg_reg(A_ADD,r,r,ref2.base));
  307. //list.concat(tai_comment.create(strpnew('*** a_loadaddr_ref_reg')));
  308. end
  309. else
  310. begin
  311. { add the symbol's value to the base of the reference, and if the }
  312. { reference doesn't have a base, create one }
  313. reference_reset(tmpref,ref2.alignment);
  314. tmpref.offset := ref2.offset;
  315. tmpref.symbol := ref2.symbol;
  316. tmpref.relsymbol := ref2.relsymbol;
  317. tmpref.refaddr := addr_higha;
  318. if ref2.base<> NR_NO then
  319. begin
  320. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,r,
  321. ref2.base,tmpref));
  322. end
  323. else
  324. list.concat(taicpu.op_reg_ref(A_LIS,r,tmpref));
  325. tmpref.base := NR_NO;
  326. tmpref.refaddr := addr_low;
  327. { can be folded with one of the next instructions by the }
  328. { optimizer probably }
  329. list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,r,tmpref));
  330. end
  331. end
  332. else if ref2.offset <> 0 Then
  333. if ref2.base <> NR_NO then
  334. a_op_const_reg_reg(list,OP_ADD,OS_ADDR,ref2.offset,ref2.base,r)
  335. { FixRef makes sure that "(ref.index <> R_NO) and (ref.offset <> 0)" never}
  336. { occurs, so now only ref.offset has to be loaded }
  337. else
  338. a_load_const_reg(list,OS_ADDR,ref2.offset,r)
  339. else if ref2.index <> NR_NO Then
  340. list.concat(taicpu.op_reg_reg_reg(A_ADD,r,ref2.base,ref2.index))
  341. else if (ref2.base <> NR_NO) and
  342. (r <> ref2.base) then
  343. a_load_reg_reg(list,OS_ADDR,OS_ADDR,ref2.base,r)
  344. else
  345. list.concat(taicpu.op_reg_const(A_LI,r,0));
  346. end;
  347. { calling a procedure by address }
  348. procedure tcgppcgen.a_call_reg(list : TAsmList;reg: tregister);
  349. begin
  350. list.concat(taicpu.op_reg(A_MTCTR,reg));
  351. list.concat(taicpu.op_none(A_BCTRL));
  352. include(current_procinfo.flags,pi_do_call);
  353. end;
  354. procedure tcgppcgen.a_call_ref(list : TAsmList;ref: treference);
  355. var
  356. tempreg : TRegister;
  357. begin
  358. tempreg := getintregister(list, OS_ADDR);
  359. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,tempreg);
  360. a_call_reg(list,tempreg);
  361. end;
  362. procedure tcgppcgen.a_load_reg_ref(list: TAsmList; fromsize, tosize: TCGSize;
  363. reg: tregister; const ref: treference);
  364. const
  365. StoreInstr: array[OS_8..OS_INT, boolean, boolean] of TAsmOp =
  366. { indexed? updating?}
  367. (((A_STB, A_STBU), (A_STBX, A_STBUX)),
  368. ((A_STH, A_STHU), (A_STHX, A_STHUX)),
  369. ((A_STW, A_STWU), (A_STWX, A_STWUX))
  370. {$ifdef cpu64bitalu}
  371. ,
  372. ((A_STD, A_STDU), (A_STDX, A_STDUX))
  373. {$endif cpu64bitalu}
  374. );
  375. var
  376. ref2: TReference;
  377. tmpreg: tregister;
  378. op: TAsmOp;
  379. begin
  380. if not (fromsize in [OS_8..OS_INT,OS_S8..OS_SINT]) then
  381. internalerror(2002090903);
  382. if not (tosize in [OS_8..OS_INT,OS_S8..OS_SINT]) then
  383. internalerror(2002090905);
  384. if tosize in [OS_S8..OS_SINT] then
  385. { storing is the same for signed and unsigned values }
  386. tosize := tcgsize(ord(tosize) - (ord(OS_S8) - ord(OS_8)));
  387. ref2 := ref;
  388. fixref(list, ref2);
  389. op := storeinstr[tcgsize2unsigned[tosize], ref2.index <> NR_NO, false];
  390. a_load_store(list, op, reg, ref2);
  391. end;
  392. procedure tcgppcgen.a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister);
  393. var
  394. op: tasmop;
  395. instr: taicpu;
  396. begin
  397. if not(fromsize in [OS_F32,OS_F64]) or
  398. not(tosize in [OS_F32,OS_F64]) then
  399. internalerror(2006123110);
  400. if (tosize < fromsize) then
  401. op:=A_FRSP
  402. else
  403. op:=A_FMR;
  404. instr := taicpu.op_reg_reg(op,reg2,reg1);
  405. list.concat(instr);
  406. if (op = A_FMR) then
  407. rg[R_FPUREGISTER].add_move_instruction(instr);
  408. end;
  409. procedure tcgppcgen.a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister);
  410. const
  411. FpuLoadInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
  412. { indexed? updating?}
  413. (((A_LFS,A_LFSU),(A_LFSX,A_LFSUX)),
  414. ((A_LFD,A_LFDU),(A_LFDX,A_LFDUX)));
  415. var
  416. op: tasmop;
  417. ref2: treference;
  418. begin
  419. if not(fromsize in [OS_F32,OS_F64]) or
  420. not(tosize in [OS_F32,OS_F64]) then
  421. internalerror(200201121);
  422. ref2 := ref;
  423. fixref(list,ref2);
  424. op := fpuloadinstr[fromsize,ref2.index <> NR_NO,false];
  425. a_load_store(list,op,reg,ref2);
  426. if (fromsize > tosize) then
  427. a_loadfpu_reg_reg(list,fromsize,tosize,reg,reg);
  428. end;
  429. procedure tcgppcgen.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  430. const
  431. FpuStoreInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
  432. { indexed? updating?}
  433. (((A_STFS,A_STFSU),(A_STFSX,A_STFSUX)),
  434. ((A_STFD,A_STFDU),(A_STFDX,A_STFDUX)));
  435. var
  436. op: tasmop;
  437. ref2: treference;
  438. reg2: tregister;
  439. begin
  440. if not(fromsize in [OS_F32,OS_F64]) or
  441. not(tosize in [OS_F32,OS_F64]) then
  442. internalerror(200201122);
  443. ref2 := ref;
  444. fixref(list,ref2);
  445. op := fpustoreinstr[tosize,ref2.index <> NR_NO,false];
  446. { some PPCs have a bug whereby storing a double to memory }
  447. { as single corrupts the value -> convert double to single }
  448. { first (bug confirmed on some G4s, but not on G5s) }
  449. if (tosize < fromsize) and
  450. (current_settings.cputype < cpu_PPC970) then
  451. begin
  452. reg2:=getfpuregister(list,tosize);
  453. a_loadfpu_reg_reg(list,fromsize,tosize,reg,reg2);
  454. reg:=reg2;
  455. end;
  456. a_load_store(list,op,reg,ref2);
  457. end;
  458. procedure tcgppcgen.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  459. var
  460. fromsreg, tosreg: tsubsetregister;
  461. restbits: byte;
  462. begin
  463. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  464. if (subsetsize in [OS_S8..OS_S128]) then
  465. begin
  466. { sign extend }
  467. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  468. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  469. end
  470. else
  471. begin
  472. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  473. { mask other bits }
  474. if (sref.bitlen <> AIntBits) then
  475. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
  476. end;
  477. { use subsetreg routine, it may have been overridden with an optimized version }
  478. fromsreg.subsetreg := extra_value_reg;
  479. fromsreg.subsetregsize := OS_INT;
  480. { subsetregs always count bits from right to left }
  481. fromsreg.startbit := loadbitsize-restbits;
  482. fromsreg.bitlen := restbits;
  483. tosreg.subsetreg := valuereg;
  484. tosreg.subsetregsize := OS_INT;
  485. tosreg.startbit := 0;
  486. tosreg.bitlen := restbits;
  487. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  488. end;
  489. procedure tcgppcgen.g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef);
  490. var
  491. hl : tasmlabel;
  492. flags : TResFlags;
  493. begin
  494. if not(cs_check_overflow in current_settings.localswitches) then
  495. exit;
  496. current_asmdata.getjumplabel(hl);
  497. if not ((def.typ=pointerdef) or
  498. ((def.typ=orddef) and
  499. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,pasbool]))) then
  500. begin
  501. if (current_settings.optimizecputype >= cpu_ppc970) or
  502. (current_settings.cputype >= cpu_ppc970) then
  503. begin
  504. { ... instructions setting overflow flag ...
  505. mfxerf R0
  506. mtcrf 128, R0
  507. ble cr0, label }
  508. list.concat(taicpu.op_reg(A_MFXER, NR_R0));
  509. list.concat(taicpu.op_const_reg(A_MTCRF, 128, NR_R0));
  510. flags.cr := RS_CR0;
  511. flags.flag := F_LE;
  512. a_jmp_flags(list, flags, hl);
  513. end
  514. else
  515. begin
  516. list.concat(taicpu.op_reg(A_MCRXR,NR_CR7));
  517. a_jmp(list,A_BC,C_NO,7,hl)
  518. end;
  519. end
  520. else
  521. a_jmp_cond(list,OC_AE,hl);
  522. a_call_name(list,'FPC_OVERFLOW',false);
  523. a_label(list,hl);
  524. end;
  525. procedure tcgppcgen.g_profilecode(list: TAsmList);
  526. var
  527. paraloc1 : tcgpara;
  528. begin
  529. if (target_info.system in [system_powerpc_darwin]) then
  530. begin
  531. paraloc1.init;
  532. paramanager.getintparaloc(pocall_cdecl,1,paraloc1);
  533. a_load_reg_cgpara(list,OS_ADDR,NR_R0,paraloc1);
  534. paramanager.freeparaloc(list,paraloc1);
  535. paraloc1.done;
  536. allocallcpuregisters(list);
  537. a_call_name(list,'mcount',false);
  538. deallocallcpuregisters(list);
  539. a_reg_dealloc(list,NR_R0);
  540. end;
  541. end;
  542. procedure tcgppcgen.a_jmp_cond(list : TAsmList;cond : TOpCmp; l: tasmlabel);
  543. begin
  544. a_jmp(list,A_BC,TOpCmp2AsmCond[cond],0,l);
  545. end;
  546. procedure tcgppcgen.a_jmp(list: TAsmList; op: tasmop; c: tasmcondflag;
  547. crval: longint; l: tasmlabel);
  548. var
  549. p: taicpu;
  550. begin
  551. p := taicpu.op_sym(op,l);
  552. if op <> A_B then
  553. create_cond_norm(c,crval,p.condition);
  554. p.is_jmp := true;
  555. list.concat(p)
  556. end;
  557. procedure tcgppcgen.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  558. procedure loadvmttor11;
  559. var
  560. href : treference;
  561. begin
  562. reference_reset_base(href,NR_R3,0,sizeof(pint));
  563. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R11);
  564. end;
  565. procedure op_onr11methodaddr;
  566. var
  567. href : treference;
  568. begin
  569. if (procdef.extnumber=$ffff) then
  570. Internalerror(200006139);
  571. { call/jmp vmtoffs(%eax) ; method offs }
  572. reference_reset_base(href,NR_R11,procdef._class.vmtmethodoffset(procdef.extnumber),sizeof(pint));
  573. if hasLargeOffset(href) then
  574. begin
  575. {$ifdef cpu64}
  576. if (longint(href.offset) <> href.offset) then
  577. { add support for offsets > 32 bit }
  578. internalerror(200510201);
  579. {$endif cpu64}
  580. list.concat(taicpu.op_reg_reg_const(A_ADDIS,NR_R11,NR_R11,
  581. smallint((href.offset shr 16)+ord(smallint(href.offset and $ffff) < 0))));
  582. href.offset := smallint(href.offset and $ffff);
  583. end;
  584. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R11);
  585. if (target_info.system = system_powerpc64_linux) then
  586. begin
  587. reference_reset_base(href, NR_R11, 0, sizeof(pint));
  588. a_load_ref_reg(list, OS_ADDR, OS_ADDR, href, NR_R11);
  589. end;
  590. list.concat(taicpu.op_reg(A_MTCTR,NR_R11));
  591. list.concat(taicpu.op_none(A_BCTR));
  592. if (target_info.system = system_powerpc64_linux) then
  593. list.concat(taicpu.op_none(A_NOP));
  594. end;
  595. var
  596. make_global : boolean;
  597. begin
  598. if not(procdef.proctypeoption in [potype_function,potype_procedure]) then
  599. Internalerror(200006137);
  600. if not assigned(procdef._class) or
  601. (procdef.procoptions*[po_classmethod, po_staticmethod,
  602. po_methodpointer, po_interrupt, po_iocheck]<>[]) then
  603. Internalerror(200006138);
  604. if procdef.owner.symtabletype<>ObjectSymtable then
  605. Internalerror(200109191);
  606. make_global:=false;
  607. if (not current_module.is_unit) or
  608. create_smartlink or
  609. (procdef.owner.defowner.owner.symtabletype=globalsymtable) then
  610. make_global:=true;
  611. if make_global then
  612. List.concat(Tai_symbol.Createname_global(labelname,AT_FUNCTION,0))
  613. else
  614. List.concat(Tai_symbol.Createname(labelname,AT_FUNCTION,0));
  615. { set param1 interface to self }
  616. g_adjust_self_value(list,procdef,ioffset);
  617. { case 4 }
  618. if po_virtualmethod in procdef.procoptions then
  619. begin
  620. loadvmttor11;
  621. op_onr11methodaddr;
  622. end
  623. { case 0 }
  624. else
  625. case target_info.system of
  626. system_powerpc_darwin,
  627. system_powerpc64_darwin:
  628. list.concat(taicpu.op_sym(A_B,get_darwin_call_stub(procdef.mangledname,false)));
  629. system_powerpc64_linux:
  630. {$note ts:todo add GOT change?? - think not needed :) }
  631. list.concat(taicpu.op_sym(A_B,current_asmdata.RefAsmSymbol('.' + procdef.mangledname)));
  632. else
  633. list.concat(taicpu.op_sym(A_B,current_asmdata.RefAsmSymbol(procdef.mangledname)))
  634. end;
  635. List.concat(Tai_symbol_end.Createname(labelname));
  636. end;
  637. function tcgppcgen.load_got_symbol(list: TAsmList; symbol : string) : tregister;
  638. var
  639. l: tasmsymbol;
  640. ref: treference;
  641. begin
  642. if (target_info.system <> system_powerpc64_linux) then
  643. internalerror(2007102010);
  644. l:=current_asmdata.getasmsymbol(symbol);
  645. reference_reset_symbol(ref,l,0,sizeof(pint));
  646. ref.base := NR_R2;
  647. ref.refaddr := addr_pic;
  648. result := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
  649. {$IFDEF EXTDEBUG}
  650. list.concat(tai_comment.create(strpnew('loading got reference for ' + symbol)));
  651. {$ENDIF EXTDEBUG}
  652. // cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  653. {$ifdef cpu64bitaddr}
  654. list.concat(taicpu.op_reg_ref(A_LD, result, ref));
  655. {$else cpu64bitaddr}
  656. list.concat(taicpu.op_reg_ref(A_LWZ, result, ref));
  657. {$endif cpu64bitaddr}
  658. end;
  659. function tcgppcgen.fixref(list: TAsmList; var ref: treference): boolean;
  660. var
  661. tmpreg: tregister;
  662. begin
  663. result := false;
  664. { Avoid recursion. }
  665. if (ref.refaddr = addr_pic) then
  666. exit;
  667. {$IFDEF EXTDEBUG}
  668. list.concat(tai_comment.create(strpnew('fixref0 ' + ref2string(ref))));
  669. {$ENDIF EXTDEBUG}
  670. if (target_info.system in [system_powerpc_darwin,system_powerpc64_darwin]) and
  671. assigned(ref.symbol) and
  672. not assigned(ref.relsymbol) and
  673. ((ref.symbol.bind in [AB_EXTERNAL,AB_WEAK_EXTERNAL]) or
  674. (cs_create_pic in current_settings.moduleswitches))then
  675. begin
  676. if (ref.symbol.bind in [AB_EXTERNAL,AB_WEAK_EXTERNAL]) or
  677. ((cs_create_pic in current_settings.moduleswitches) and
  678. (ref.symbol.bind in [AB_COMMON,AB_GLOBAL,AB_PRIVATE_EXTERN])) then
  679. begin
  680. tmpreg := g_indirect_sym_load(list,ref.symbol.name,ref.symbol.bind=AB_WEAK_EXTERNAL);
  681. ref.symbol:=nil;
  682. end
  683. else
  684. begin
  685. include(current_procinfo.flags,pi_needs_got);
  686. tmpreg := current_procinfo.got;
  687. if assigned(ref.relsymbol) then
  688. internalerror(2007093501);
  689. ref.relsymbol := current_procinfo.CurrGOTLabel;
  690. end;
  691. if (ref.base = NR_NO) then
  692. ref.base := tmpreg
  693. else if (ref.index = NR_NO) then
  694. ref.index := tmpreg
  695. else
  696. begin
  697. list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,ref.base,tmpreg));
  698. ref.base := tmpreg;
  699. end;
  700. end;
  701. { if we have to create PIC, add the symbol to the TOC/GOT }
  702. if (target_info.system = system_powerpc64_linux) and
  703. (cs_create_pic in current_settings.moduleswitches) and
  704. (assigned(ref.symbol)) then
  705. begin
  706. tmpreg := load_got_symbol(list, ref.symbol.name);
  707. if (ref.base = NR_NO) then
  708. ref.base := tmpreg
  709. else if (ref.index = NR_NO) then
  710. ref.index := tmpreg
  711. else begin
  712. a_op_reg_reg_reg(list, OP_ADD, OS_ADDR, ref.base, tmpreg, tmpreg);
  713. ref.base := tmpreg;
  714. end;
  715. ref.symbol := nil;
  716. {$IFDEF EXTDEBUG}
  717. list.concat(tai_comment.create(strpnew('fixref-pic ' + ref2string(ref))));
  718. {$ENDIF EXTDEBUG}
  719. end;
  720. if (ref.base = NR_NO) then
  721. begin
  722. ref.base := ref.index;
  723. ref.index := NR_NO;
  724. end;
  725. if (ref.base <> NR_NO) then
  726. begin
  727. if (ref.index <> NR_NO) and
  728. ((ref.offset <> 0) or assigned(ref.symbol)) then
  729. begin
  730. result := true;
  731. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  732. list.concat(taicpu.op_reg_reg_reg(
  733. A_ADD,tmpreg,ref.base,ref.index));
  734. ref.index := NR_NO;
  735. ref.base := tmpreg;
  736. end
  737. end;
  738. if (ref.index <> NR_NO) and
  739. (assigned(ref.symbol) or
  740. (ref.offset <> 0)) then
  741. internalerror(200208102);
  742. {$IFDEF EXTDEBUG}
  743. list.concat(tai_comment.create(strpnew('fixref1 ' + ref2string(ref))));
  744. {$ENDIF EXTDEBUG}
  745. end;
  746. procedure tcgppcgen.a_load_store(list:TAsmList;op: tasmop;reg:tregister;
  747. ref: treference);
  748. var
  749. tmpreg: tregister;
  750. tmpref: treference;
  751. largeOffset: Boolean;
  752. begin
  753. tmpreg := NR_NO;
  754. largeOffset:= hasLargeOffset(ref);
  755. if target_info.system = system_powerpc_macos then
  756. begin
  757. if assigned(ref.symbol) then
  758. begin {Load symbol's value}
  759. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  760. reference_reset(tmpref,sizeof(pint));
  761. tmpref.symbol := ref.symbol;
  762. tmpref.base := NR_RTOC;
  763. if macos_direct_globals then
  764. list.concat(taicpu.op_reg_ref(A_LA,tmpreg,tmpref))
  765. else
  766. list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
  767. end;
  768. if largeOffset then
  769. begin {Add hi part of offset}
  770. reference_reset(tmpref,ref.alignment);
  771. if Smallint(Lo(ref.offset)) < 0 then
  772. tmpref.offset := Hi(ref.offset) + 1 {Compensate when lo part is negative}
  773. else
  774. tmpref.offset := Hi(ref.offset);
  775. if (tmpreg <> NR_NO) then
  776. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,tmpreg, tmpreg,tmpref))
  777. else
  778. begin
  779. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  780. list.concat(taicpu.op_reg_ref(A_LIS,tmpreg,tmpref));
  781. end;
  782. end;
  783. if (tmpreg <> NR_NO) then
  784. begin
  785. {Add content of base register}
  786. if ref.base <> NR_NO then
  787. list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,
  788. ref.base,tmpreg));
  789. {Make ref ready to be used by op}
  790. ref.symbol:= nil;
  791. ref.base:= tmpreg;
  792. if largeOffset then
  793. ref.offset := Smallint(Lo(ref.offset));
  794. list.concat(taicpu.op_reg_ref(op,reg,ref));
  795. //list.concat(tai_comment.create(strpnew('*** a_load_store indirect global')));
  796. end
  797. else
  798. list.concat(taicpu.op_reg_ref(op,reg,ref));
  799. end
  800. else {if target_info.system <> system_powerpc_macos}
  801. begin
  802. if assigned(ref.symbol) or
  803. largeOffset then
  804. begin
  805. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  806. reference_reset(tmpref,ref.alignment);
  807. tmpref.symbol := ref.symbol;
  808. tmpref.relsymbol := ref.relsymbol;
  809. tmpref.offset := ref.offset;
  810. tmpref.refaddr := addr_higha;
  811. if ref.base <> NR_NO then
  812. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,tmpreg,
  813. ref.base,tmpref))
  814. else
  815. list.concat(taicpu.op_reg_ref(A_LIS,tmpreg,tmpref));
  816. ref.base := tmpreg;
  817. ref.refaddr := addr_low;
  818. list.concat(taicpu.op_reg_ref(op,reg,ref));
  819. end
  820. else
  821. list.concat(taicpu.op_reg_ref(op,reg,ref));
  822. end;
  823. end;
  824. end.