thumb2.inc 14 KB

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  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 2003 by the Free Pascal development team.
  4. Processor dependent implementation for the system unit for
  5. ARM
  6. See the file COPYING.FPC, included in this distribution,
  7. for details about the copyright.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  11. **********************************************************************}
  12. {$asmmode divided}
  13. {$ifndef FPC_SYSTEM_HAS_MOVE}
  14. {$define FPC_SYSTEM_FPC_MOVE}
  15. {$endif FPC_SYSTEM_HAS_MOVE}
  16. {$ifdef FPC_SYSTEM_FPC_MOVE}
  17. const
  18. cpu_has_edsp : boolean = false;
  19. in_edsp_test : boolean = false;
  20. {$endif FPC_SYSTEM_FPC_MOVE}
  21. {$if not(defined(wince)) and not(defined(gba)) and not(defined(nds)) and not(defined(FPUSOFT)) and not(defined(FPULIBGCC))}
  22. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  23. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  24. begin
  25. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  26. asm
  27. {$if defined(FPUFPA) or defined(FPUFPA10) or defined(FPUFPA11)}
  28. rfs r0
  29. and r0,r0,#0xffe0ffff
  30. orr r0,r0,#0x00070000
  31. wfs r0
  32. {$else}
  33. movw r0, #(0xed88)
  34. movt r0, #(0xe000)
  35. ldr r1, [r0]
  36. orr r1, r1, #(0xF << 20)
  37. str r1, [r0]
  38. {$endif}
  39. end;
  40. end;
  41. {$endif}
  42. procedure fpc_cpuinit;
  43. begin
  44. SysInitFPU;
  45. end;
  46. {$ifdef wince}
  47. function _controlfp(new: DWORD; mask: DWORD): DWORD; cdecl; external 'coredll';
  48. {$define FPC_SYSTEM_HAS_SYSRESETFPU}
  49. Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  50. begin
  51. softfloat_exception_flags:=[];
  52. end;
  53. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  54. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  55. begin
  56. softfloat_exception_mask:=[float_flag_underflow,float_flag_inexact,float_flag_denormal];
  57. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  58. { FPU precision 64 bit, rounding to nearest, affine infinity }
  59. _controlfp($000C0003, $030F031F);
  60. end;
  61. {$endif wince}
  62. {****************************************************************************
  63. stack frame related stuff
  64. ****************************************************************************}
  65. {$IFNDEF INTERNAL_BACKTRACE}
  66. {$define FPC_SYSTEM_HAS_GET_FRAME}
  67. function get_frame:pointer;assembler;nostackframe;
  68. asm
  69. mov r0,r11
  70. end;
  71. {$ENDIF not INTERNAL_BACKTRACE}
  72. {
  73. Stack frame on Thumb2:
  74. LR <- FP
  75. Old FP
  76. }
  77. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  78. function get_caller_addr(framebp:pointer;addr:pointer=nil):pointer;assembler;
  79. asm
  80. movs r0,r0
  81. beq .Lg_a_null
  82. ldr r0,[r0]
  83. .Lg_a_null:
  84. end;
  85. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  86. function get_caller_frame(framebp:pointer;addr:pointer=nil):pointer;assembler;
  87. asm
  88. movs r0,r0
  89. beq .Lgnf_null
  90. ldr r0,[r0,#-4]
  91. .Lgnf_null:
  92. end;
  93. {$define FPC_SYSTEM_HAS_SPTR}
  94. Function Sptr : pointer;assembler;
  95. asm
  96. mov r0,sp
  97. end;
  98. {$ifndef FPC_SYSTEM_HAS_FILLCHAR}
  99. {$define FPC_SYSTEM_HAS_FILLCHAR}
  100. Procedure FillChar(var x;count:longint;value:byte);assembler;nostackframe;
  101. asm
  102. // less than 0?
  103. cmp r1,#0
  104. it le
  105. movle pc,lr
  106. mov r3,r0
  107. cmp r1,#8 // at least 8 bytes to do?
  108. add r1, r0
  109. blt .LFillchar3
  110. orr r2,r2,r2,lsl #8
  111. orr r2,r2,r2,lsl #16
  112. .LFillchar0:
  113. ands ip, r3, #3
  114. beq .LAligned
  115. subs r0, ip, #1
  116. lsls r0, r0, #1
  117. add pc, r0
  118. nop
  119. strb r2,[r3,#2]
  120. strb r2,[r3,#1]
  121. strb r2,[r3,#0]
  122. rsb r0, ip, #4
  123. add r3, r0
  124. .LAligned:
  125. mov ip,r2
  126. push {r4,r5,lr}
  127. mov r4,r2
  128. mov r5,r2
  129. .LFillchar1:
  130. // Use calculated jump to do fills of x*16 bytes
  131. subs r0, r1, r3
  132. cmp r0, #128
  133. bge .LFillchar1_128
  134. lsrs r0, #4
  135. beq .LFillchar2
  136. rsb r0, #8
  137. lsls r0, #2
  138. add pc, r0
  139. nop
  140. .LFillchar1_128:
  141. stmia r3!,{r2,r4,r5,ip}
  142. stmia r3!,{r2,r4,r5,ip}
  143. stmia r3!,{r2,r4,r5,ip}
  144. stmia r3!,{r2,r4,r5,ip}
  145. stmia r3!,{r2,r4,r5,ip}
  146. stmia r3!,{r2,r4,r5,ip}
  147. stmia r3!,{r2,r4,r5,ip}
  148. stmia r3!,{r2,r4,r5,ip}
  149. b .LFillchar1
  150. .LFillchar2:
  151. // Mop up any leftover 8 byte chunks. We are still aligned at this point
  152. pop {r4,r5,lr}
  153. sub r0, r1, r3
  154. cmp r0, #8
  155. it ge
  156. stmgeia r3!,{r2,ip}
  157. .LFillchar3:
  158. // Write any remaining bytes
  159. subs r0, r3, r1
  160. adds r0, #7 // 7-(e-s) = 7+(s-e)
  161. lsls r0, #1
  162. add pc, r0
  163. nop
  164. strb r2,[r3,#6]
  165. strb r2,[r3,#5]
  166. strb r2,[r3,#4]
  167. strb r2,[r3,#3]
  168. strb r2,[r3,#2]
  169. strb r2,[r3,#1]
  170. strb r2,[r3,#0]
  171. end;
  172. {$endif FPC_SYSTEM_HAS_FILLCHAR}
  173. {$ifndef FPC_SYSTEM_HAS_MOVE}
  174. {$define FPC_SYSTEM_HAS_MOVE}
  175. procedure Move_pld(const source;var dest;count:longint);assembler;nostackframe;
  176. asm
  177. pld [r0]
  178. pld [r1]
  179. // count <=0 ?
  180. cmp r2,#0
  181. it le
  182. movle pc,lr
  183. // overlap?
  184. cmp r1,r0
  185. bls .Lnooverlap
  186. add r3,r0,r2
  187. cmp r3,r1
  188. bls .Lnooverlap
  189. // overlap, copy backward
  190. .Loverlapped:
  191. subs r2,r2,#1
  192. ldrb r3,[r0,r2]
  193. strb r3,[r1,r2]
  194. bne .Loverlapped
  195. mov pc,lr
  196. .Lnooverlap:
  197. // less then 16 bytes to copy?
  198. cmp r2,#8
  199. // yes, the forget about the whole optimizations
  200. // and do a bytewise copy
  201. blt .Lbyteloop
  202. // both aligned?
  203. orr r3,r0,r1
  204. tst r3,#3
  205. bne .Lbyteloop
  206. (*
  207. // yes, then align
  208. // alignment to 4 byte boundries is enough
  209. ldrb ip,[r0],#1
  210. sub r2,r2,#1
  211. stb ip,[r1],#1
  212. tst r3,#2
  213. bne .Ldifferentaligned
  214. ldrh ip,[r0],#2
  215. sub r2,r2,#2
  216. sth ip,[r1],#2
  217. .Ldifferentaligned
  218. // qword aligned?
  219. orrs r3,r0,r1
  220. tst r3,#7
  221. bne .Ldwordloop
  222. *)
  223. pld [r0,#32]
  224. pld [r1,#32]
  225. .Ldwordloop:
  226. sub r2,r2,#4
  227. ldr r3,[r0],#4
  228. // preload
  229. pld [r0,#64]
  230. pld [r1,#64]
  231. cmp r2,#4
  232. str r3,[r1],#4
  233. bcs .Ldwordloop
  234. cmp r2,#0
  235. it eq
  236. moveq pc,lr
  237. .Lbyteloop:
  238. subs r2,r2,#1
  239. ldrb r3,[r0],#1
  240. strb r3,[r1],#1
  241. bne .Lbyteloop
  242. mov pc,lr
  243. end;
  244. procedure Move_blended(const source;var dest;count:longint);assembler;nostackframe;
  245. asm
  246. // count <=0 ?
  247. cmp r2,#0
  248. it le
  249. movle pc,lr
  250. // overlap?
  251. cmp r1,r0
  252. bls .Lnooverlap
  253. add r3,r0,r2
  254. cmp r3,r1
  255. bls .Lnooverlap
  256. // overlap, copy backward
  257. .Loverlapped:
  258. subs r2,r2,#1
  259. ldrb r3,[r0,r2]
  260. strb r3,[r1,r2]
  261. bne .Loverlapped
  262. mov pc,lr
  263. .Lnooverlap:
  264. // less then 16 bytes to copy?
  265. cmp r2,#8
  266. // yes, the forget about the whole optimizations
  267. // and do a bytewise copy
  268. blt .Lbyteloop
  269. // both aligned?
  270. orr r3,r0,r1
  271. tst r3,#3
  272. bne .Lbyteloop
  273. (*
  274. // yes, then align
  275. // alignment to 4 byte boundries is enough
  276. ldrb ip,[r0],#1
  277. sub r2,r2,#1
  278. stb ip,[r1],#1
  279. tst r3,#2
  280. bne .Ldifferentaligned
  281. ldrh ip,[r0],#2
  282. sub r2,r2,#2
  283. sth ip,[r1],#2
  284. .Ldifferentaligned
  285. // qword aligned?
  286. orrs r3,r0,r1
  287. tst r3,#7
  288. bne .Ldwordloop
  289. *)
  290. .Ldwordloop:
  291. sub r2,r2,#4
  292. ldr r3,[r0],#4
  293. cmp r2,#4
  294. str r3,[r1],#4
  295. bcs .Ldwordloop
  296. cmp r2,#0
  297. it eq
  298. moveq pc,lr
  299. .Lbyteloop:
  300. subs r2,r2,#1
  301. ldrb r3,[r0],#1
  302. strb r3,[r1],#1
  303. bne .Lbyteloop
  304. mov pc,lr
  305. end;
  306. const
  307. moveproc : pointer = @move_blended;
  308. procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];assembler;nostackframe;
  309. asm
  310. ldr ip,.Lmoveproc
  311. ldr pc,[ip]
  312. .Lmoveproc:
  313. .long moveproc
  314. end;
  315. {$endif FPC_SYSTEM_HAS_MOVE}
  316. {****************************************************************************
  317. String
  318. ****************************************************************************}
  319. {$ifndef FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  320. {$define FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  321. procedure fpc_shortstr_to_shortstr(out res:shortstring;const sstr:shortstring);assembler;nostackframe;[public,alias: 'FPC_SHORTSTR_TO_SHORTSTR'];compilerproc;
  322. {r0: __RESULT
  323. r1: len
  324. r2: sstr}
  325. asm
  326. ldrb r12,[r2],#1
  327. cmp r12,r1
  328. it gt
  329. movgt r12,r1
  330. strb r12,[r0],#1
  331. cmp r12,#6 (* 6 seems to be the break even point. *)
  332. blt .LStartTailCopy
  333. (* Align destination on 32bits. This is the only place where unrolling
  334. really seems to help, since in the common case, sstr is aligned on
  335. 32 bits, therefore in the common case we need to copy 3 bytes to
  336. align, i.e. in the case of a loop, you wouldn't branch out early.*)
  337. rsb r3,r0,#0
  338. ands r3,r3,#3
  339. sub r12,r12,r3
  340. itttt ne
  341. ldrneb r1,[r2],#1
  342. strneb r1,[r0],#1
  343. subnes r3,r3,#1
  344. ldrneb r1,[r2],#1
  345. itttt ne
  346. strneb r1,[r0],#1
  347. subnes r3,r3,#1
  348. ldrneb r1,[r2],#1
  349. strneb r1,[r0],#1
  350. it ne
  351. subnes r3,r3,#1
  352. .LDoneAlign:
  353. (* Destination should be aligned now, but source might not be aligned,
  354. if this is the case, do a byte-per-byte copy. *)
  355. tst r2,#3
  356. bne .LStartTailCopy
  357. (* Start the main copy, 32 bit at a time. *)
  358. movs r3,r12,lsr #2
  359. and r12,r12,#3
  360. beq .LStartTailCopy
  361. .LNext4bytes:
  362. (* Unrolling this loop would save a little bit of time for long strings
  363. (>20 chars), but alas, it hurts for short strings and they are the
  364. common case.*)
  365. ittt ne
  366. ldrne r1,[r2],#4
  367. strne r1,[r0],#4
  368. subnes r3,r3,#1
  369. bne .LNext4bytes
  370. .LStartTailCopy:
  371. (* Do remaining bytes. *)
  372. cmp r12,#0
  373. beq .LDoneTail
  374. .LNextChar3:
  375. ldrb r1,[r2],#1
  376. strb r1,[r0],#1
  377. subs r12,r12,#1
  378. bne .LNextChar3
  379. .LDoneTail:
  380. end;
  381. procedure fpc_shortstr_assign(len:longint;sstr,dstr:pointer);assembler;nostackframe;[public,alias:'FPC_SHORTSTR_ASSIGN'];compilerproc;
  382. {r0: len
  383. r1: sstr
  384. r2: dstr}
  385. asm
  386. ldrb r12,[r1],#1
  387. cmp r12,r0
  388. it gt
  389. movgt r12,r0
  390. strb r12,[r2],#1
  391. cmp r12,#6 (* 6 seems to be the break even point. *)
  392. blt .LStartTailCopy
  393. (* Align destination on 32bits. This is the only place where unrolling
  394. really seems to help, since in the common case, sstr is aligned on
  395. 32 bits, therefore in the common case we need to copy 3 bytes to
  396. align, i.e. in the case of a loop, you wouldn't branch out early.*)
  397. rsb r3,r2,#0
  398. ands r3,r3,#3
  399. sub r12,r12,r3
  400. itttt ne
  401. ldrneb r0,[r1],#1
  402. strneb r0,[r2],#1
  403. subnes r3,r3,#1
  404. ldrneb r0,[r1],#1
  405. itttt ne
  406. strneb r0,[r2],#1
  407. subnes r3,r3,#1
  408. ldrneb r0,[r1],#1
  409. strneb r0,[r2],#1
  410. it ne
  411. subnes r3,r3,#1
  412. .LDoneAlign:
  413. (* Destination should be aligned now, but source might not be aligned,
  414. if this is the case, do a byte-per-byte copy. *)
  415. tst r1,#3
  416. bne .LStartTailCopy
  417. (* Start the main copy, 32 bit at a time. *)
  418. movs r3,r12,lsr #2
  419. and r12,r12,#3
  420. beq .LStartTailCopy
  421. .LNext4bytes:
  422. (* Unrolling this loop would save a little bit of time for long strings
  423. (>20 chars), but alas, it hurts for short strings and they are the
  424. common case.*)
  425. ittt ne
  426. ldrne r0,[r1],#4
  427. strne r0,[r2],#4
  428. subnes r3,r3,#1
  429. bne .LNext4bytes
  430. .LStartTailCopy:
  431. (* Do remaining bytes. *)
  432. cmp r12,#0
  433. beq .LDoneTail
  434. .LNextChar3:
  435. ldrb r0,[r1],#1
  436. strb r0,[r2],#1
  437. subs r12,r12,#1
  438. bne .LNextChar3
  439. .LDoneTail:
  440. end;
  441. {$endif FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  442. {$ifndef FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  443. {$define FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  444. function fpc_Pchar_length(p:Pchar):sizeint;assembler;nostackframe;[public,alias:'FPC_PCHAR_LENGTH'];compilerproc;
  445. asm
  446. cmp r0,#0
  447. mov r1,r0
  448. beq .Ldone
  449. .Lnextchar:
  450. (*Are we aligned?*)
  451. tst r1,#3
  452. bne .Ltest_unaligned (*No, do byte per byte.*)
  453. ldr r3,.L01010101
  454. .Ltest_aligned:
  455. (*Aligned, load 4 bytes at a time.*)
  456. ldr r12,[r1],#4
  457. (*Check wether r12 contains a 0 byte.*)
  458. sub r2,r12,r3
  459. mvn r12,r12
  460. and r2,r2,r12
  461. ands r2,r2,r3,lsl #7 (*r3 lsl 7 = $80808080*)
  462. beq .Ltest_aligned (*No 0 byte, repeat.*)
  463. sub r1,r1,#4
  464. .Ltest_unaligned:
  465. ldrb r12,[r1],#1
  466. cmp r12,#1 (*r12<1 same as r12=0, but result in carry flag*)
  467. bcs .Lnextchar
  468. (*Dirty trick: we need to subtract 1 extra because we have counted the
  469. terminating 0, due to the known carry flag sbc can do this.*)
  470. sbc r0,r1,r0
  471. .Ldone:
  472. mov pc,lr
  473. .L01010101:
  474. .long 0x01010101
  475. end;
  476. {$endif}
  477. function InterLockedDecrement (var Target: longint) : longint; assembler; nostackframe;
  478. asm
  479. .Lloop:
  480. ldrex ip, [r0]
  481. sub ip, #1
  482. strex r3, ip, [r0]
  483. cmp r3, #0
  484. bne .Lloop
  485. mov r0, ip
  486. end;
  487. function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
  488. asm
  489. .Lloop:
  490. ldrex ip, [r0]
  491. add ip, #1
  492. strex r3, ip, [r0]
  493. cmp r3, #0
  494. bne .Lloop
  495. mov r0, ip
  496. end;
  497. function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  498. asm
  499. .Lloop:
  500. ldrex ip, [r0]
  501. strex r3, r1, [r0]
  502. cmp r3, #0
  503. bne .Lloop
  504. mov r0, ip
  505. end;
  506. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  507. asm
  508. .Lloop:
  509. ldrex ip, [r0]
  510. add r2, ip, r1
  511. strex r3, r2, [r0]
  512. cmp r3, #0
  513. bne .Lloop
  514. mov r0, ip
  515. end;
  516. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler; nostackframe;
  517. asm
  518. .Lloop:
  519. ldrex ip, [r0]
  520. cmp ip, r2
  521. ite eq
  522. strexeq r3, r1, [r0]
  523. movne r3, #0
  524. cmp r3, #0
  525. bne .Lloop
  526. mov r0, ip
  527. end;
  528. {$define FPC_SYSTEM_HAS_DECLOCKED_LONGINT}
  529. function declocked(var l: longint) : boolean; inline;
  530. begin
  531. Result:=InterLockedDecrement(l) = 0;
  532. end;
  533. {$define FPC_SYSTEM_HAS_INCLOCKED_LONGINT}
  534. procedure inclocked(var l: longint); inline;
  535. begin
  536. InterLockedIncrement(l);
  537. end;
  538. procedure fpc_cpucodeinit;
  539. begin
  540. {$ifdef FPC_SYSTEM_FPC_MOVE}
  541. cpu_has_edsp:=true;
  542. in_edsp_test:=true;
  543. asm
  544. mov r1,sp
  545. bic r0,r1,#7
  546. ldrd r0,r1,[r0]
  547. end;
  548. in_edsp_test:=false;
  549. if cpu_has_edsp then
  550. moveproc:=@move_pld
  551. else
  552. moveproc:=@move_blended;
  553. {$endif FPC_SYSTEM_FPC_MOVE}
  554. end;